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Information for RPM smartsim-1.4-11.fc30.src.rpm

ID312689
Namesmartsim
Version1.4
Release11.fc30
Epoch
Archsrc
SummaryDigital logic circuit design and simulation package
DescriptionSmartSim is a free and open source digital logic circuit design and simulation package. SmartSim lets you create complex circuits by allowing you to create your own custom components and including them in other circuits, as if they were any other built-in component. These larger circuits can then also be included in other designs as sub-components. SmartSim also offers the ability to print out or export your circuit designs to PDF, PNG, or SVG. When you have finished designing your circuit, SmartSim offers an interactive simulation feature, allowing you to control your circuit and explore inside sub-components whilst the circuit is running. SmartSim also allows you to produce logic timing diagrams from your simulation's activity, which can then be exported to PDF, PNG, and SVG formats.
Build Time2018-12-08 16:28:10 GMT
Size760.82 KB
5ecd7e5f9208428841577b99c53a3e06
LicenseGPLv3
Buildrootf30-build-39767-22651
Provides No Provides
Obsoletes No Obsoletes
Conflicts No Conflicts
Requires
ImageMagick
desktop-file-utils
gcc
gtk3-devel
librsvg2-devel
libxml2-devel
rpmlib(CompressedFileNames) <= 3.0.4-1
rpmlib(FileDigests) <= 4.6.0-1
Recommends No Recommends
Suggests No Suggests
Supplements No Supplements
Enhances No Enhances
Files
1 through 2 of 2
Name ascending sort Size
smartsim.spec4.10 KB
v1.4.tar.gz755.75 KB
Component of No Buildroots