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Information for RPM vhd2vl-2.5-18.fc40.src.rpm

ID	1263139
Name	vhd2vl
Version	2.5
Release	18.fc40
Epoch
Arch	src
Summary	VHDL to Verilog translator
Description	vhd2vl is a VHDL to Verilog translation program. It targets the translation of synthetisable RTL. While far from complete it supports a useful subset of VHDL, sufficient for complex designs.
Build Time	2024-03-26 12:17:09 GMT
Size	61.91 KB
SIGMD5	82ebd944360e907995ad84dc945edc7a
License	GPLv2+
Buildroot	f40-build-797513-141347
Provides	vhd2vl = 2.5-18.fc40 vhd2vl-debuginfo = 2.5-18.fc40 vhd2vl-debugsource = 2.5-18.fc40
Obsoletes	No Obsoletes
Conflicts	No Conflicts
Requires	bison flex flex-devel gcc make rpmlib(CompressedFileNames) <= 3.0.4-1 rpmlib(FileDigests) <= 4.6.0-1
Recommends	No Recommends
Suggests	No Suggests
Supplements	No Supplements
Enhances	No Enhances
Files	1 through 2 of 2 Name Size vhd2vl-2.5.tar.gz 45.16 KB vhd2vl.spec 6.37 KB
Component of	No Buildroots