Sun, 22 Dec 2024 06:33:03 UTC | login

Information for build vhd2vl-2.5-10.fc33

ID150718
Package Namevhd2vl
Version2.5
Release10.fc33
Epoch
Sourcegit+https://src.fedoraproject.org/rpms/vhd2vl.git#32a9bde8e8947239d58938965320af73092ff17e
SummaryVHDL to Verilog translator
Descriptionvhd2vl is a VHDL to Verilog translation program. It targets the translation of synthetisable RTL. While far from complete it supports a useful subset of VHDL, sufficient for complex designs.
Built bydavidlt
State complete
Volume DEFAULT
StartedSat, 28 Mar 2020 04:59:33 UTC
CompletedSat, 28 Mar 2020 05:19:25 UTC
Taskbuild (f33, /rpms/vhd2vl.git:32a9bde8e8947239d58938965320af73092ff17e)
Extra{'source': {'original_url': 'git+https://src.fedoraproject.org/rpms/vhd2vl.git#32a9bde8e8947239d58938965320af73092ff17e'}}
Tags
f33
RPMs
src
vhd2vl-2.5-10.fc33.src.rpm (info) (download)
riscv64
vhd2vl-2.5-10.fc33.riscv64.rpm (info) (download)
vhd2vl-debuginfo-2.5-10.fc33.riscv64.rpm (info) (download)
vhd2vl-debugsource-2.5-10.fc33.riscv64.rpm (info) (download)
Logs
riscv64
build.log
hw_info.log
mock_output.log
root.log
state.log
Changelog * Fri Jan 31 2020 Fedora Release Engineering <releng@fedoraproject.org> - 2.5-10 - Rebuilt for https://fedoraproject.org/wiki/Fedora_32_Mass_Rebuild * Sat Jul 27 2019 Fedora Release Engineering <releng@fedoraproject.org> - 2.5-9 - Rebuilt for https://fedoraproject.org/wiki/Fedora_31_Mass_Rebuild * Sun Feb 03 2019 Fedora Release Engineering <releng@fedoraproject.org> - 2.5-8 - Rebuilt for https://fedoraproject.org/wiki/Fedora_30_Mass_Rebuild * Sat Jul 14 2018 Fedora Release Engineering <releng@fedoraproject.org> - 2.5-7 - Rebuilt for https://fedoraproject.org/wiki/Fedora_29_Mass_Rebuild * Mon Apr 09 2018 Filipe Rosset <rosset.filipe@gmail.com> - 2.5-6 - added gcc as BR