Apply patch to stage1 too
This needs to be applied to stage1 too. Signed-off-by: David Abdurachmanov <davidlt@rivosinc.com>
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b2357a4f9ed42d85e2b7dfaab8802ae2b05af475-stage1.patch
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87
b2357a4f9ed42d85e2b7dfaab8802ae2b05af475-stage1.patch
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From b2357a4f9ed42d85e2b7dfaab8802ae2b05af475 Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Alex=20R=C3=B8nne=20Petersen?= <alex@alexrp.com>
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Date: Mon, 23 Sep 2024 22:07:48 +0200
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Subject: [PATCH] zig.h: Improve portability of zig_trap() and
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zig_breakpoint().
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---
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stage1/zig.h | 52 +++++++++++++++++++++++++++++++++++-----------------
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1 file changed, 35 insertions(+), 17 deletions(-)
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diff --git a/stage1/zig.h b/stage1/zig.h
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index 05529feec783..603c9246315f 100644
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--- a/stage1/zig.h
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+++ b/stage1/zig.h
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@@ -248,37 +248,55 @@ typedef char bool;
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#if zig_has_builtin(trap)
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#define zig_trap() __builtin_trap()
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-#elif _MSC_VER && (_M_IX86 || _M_X64)
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+#elif defined(_MSC_VER) && (defined(_M_IX86) || defined(_M_X64))
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#define zig_trap() __ud2()
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-#elif _MSC_VER
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-#define zig_trap() __fastfail(0)
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-#elif defined(__i386__) || defined(__x86_64__)
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-#define zig_trap() __asm__ volatile("ud2");
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+#elif defined(_MSC_VER)
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+#define zig_trap() __fastfail(7)
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+#elif defined(__thumb__)
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+#define zig_trap() __asm__ volatile("udf #0xfe")
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#elif defined(__arm__) || defined(__aarch64__)
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-#define zig_trap() __asm__ volatile("udf #0");
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+#define zig_trap() __asm__ volatile("udf #0xfdee")
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+#elif defined(__loongarch__) || defined(__powerpc__)
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+#define zig_trap() __asm__ volatile(".word 0x0")
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+#elif defined(__mips__)
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+#define zig_trap() __asm__ volatile(".word 0x3d")
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+#elif defined(__riscv)
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+#define zig_trap() __asm__ volatile("unimp")
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+#elif defined(__s390__)
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+#define zig_trap() __asm__ volatile("j 0x2")
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+#elif defined(__sparc__)
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+#define zig_trap() __asm__ volatile("illtrap")
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+#elif defined(__i386__) || defined(__x86_64__)
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+#define zig_trap() __asm__ volatile("ud2")
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#else
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-#include <stdlib.h>
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-#define zig_trap() abort()
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+#define zig_trap() zig_trap_unavailable
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#endif
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#if zig_has_builtin(debugtrap)
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#define zig_breakpoint() __builtin_debugtrap()
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#elif defined(_MSC_VER) || defined(__MINGW32__) || defined(__MINGW64__)
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#define zig_breakpoint() __debugbreak()
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-#elif defined(__i386__) || defined(__x86_64__)
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-#define zig_breakpoint() __asm__ volatile("int $0x03");
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#elif defined(__arm__)
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-#define zig_breakpoint() __asm__ volatile("bkpt #0");
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+#define zig_breakpoint() __asm__ volatile("bkpt #0x0")
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#elif defined(__aarch64__)
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-#define zig_breakpoint() __asm__ volatile("brk #0");
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-#else
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-#include <signal.h>
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-#if defined(SIGTRAP)
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-#define zig_breakpoint() raise(SIGTRAP)
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+#define zig_breakpoint() __asm__ volatile("brk #0xf000")
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+#elif defined(__loongarch__)
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+#define zig_breakpoint() __asm__ volatile("break 0x0")
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+#elif defined(__mips__)
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+#define zig_breakpoint() __asm__ volatile("break")
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+#elif defined(__powerpc__)
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+#define zig_breakpoint() __asm__ volatile("trap")
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+#elif defined(__riscv)
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+#define zig_breakpoint() __asm__ volatile("ebreak")
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+#elif defined(__s390__)
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+#define zig_breakpoint() __asm__ volatile("j 0x6")
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+#elif defined(__sparc__)
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+#define zig_breakpoint() __asm__ volatile("ta 0x1")
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+#elif defined(__i386__) || defined(__x86_64__)
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+#define zig_breakpoint() __asm__ volatile("int $0x3")
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#else
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#define zig_breakpoint() zig_breakpoint_unavailable
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#endif
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-#endif
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#if zig_has_builtin(return_address) || defined(zig_gnuc)
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#define zig_return_address() __builtin_extract_return_addr(__builtin_return_address(0))
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1
zig.spec
1
zig.spec
@ -41,6 +41,7 @@ Patch: 0005-remove-native-lib-directories-from-rpath.patch
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# Backport from upstream to fix riscv64 bootstrap
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# https://github.com/ziglang/zig/pull/21474
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Patch: b2357a4f9ed42d85e2b7dfaab8802ae2b05af475.patch
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Patch: b2357a4f9ed42d85e2b7dfaab8802ae2b05af475-stage1.patch
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BuildRequires: gcc
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BuildRequires: gcc-c++
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