vtk/VTK-7.1.1-riscv64.patch
David Abdurachmanov 3b02d97280
Add support for RISC-V (riscv64)
Signed-off-by: David Abdurachmanov <david.abdurachmanov@gmail.com>
2018-10-08 11:50:57 +03:00

30 lines
1.0 KiB
Diff

diff --git a/Utilities/KWIML/vtkkwiml/include/kwiml/abi.h b/Utilities/KWIML/vtkkwiml/include/kwiml/abi.h
index 3626361..2050da1 100644
--- a/Utilities/KWIML/vtkkwiml/include/kwiml/abi.h
+++ b/Utilities/KWIML/vtkkwiml/include/kwiml/abi.h
@@ -467,6 +467,10 @@ suppression macro KWIML_ABI_NO_VERIFY was defined.
#elif defined(__XTENSA_EL__)
# define KWIML_ABI_ENDIAN_ID KWIML_ABI_ENDIAN_ID_LITTLE
+/* RISC-V */
+#elif defined(__riscv)
+# define KWIML_ABI_ENDIAN_ID KWIML_ABI_ENDIAN_ID_LITTLE
+
/* Unknown CPU */
#elif !defined(KWIML_ABI_NO_ERROR_ENDIAN)
# error "Byte order of target CPU unknown."
diff --git a/Wrapping/Tools/vtkParsePreprocess.c b/Wrapping/Tools/vtkParsePreprocess.c
index 383785a..af306e5 100644
--- a/Wrapping/Tools/vtkParsePreprocess.c
+++ b/Wrapping/Tools/vtkParsePreprocess.c
@@ -2706,6 +2706,9 @@ void vtkParsePreprocess_AddStandardMacros(
#ifdef __xtensa__
PREPROC_ADD_MACRO(info, __xtensa__);
#endif
+#ifdef __riscv
+ PREPROC_ADD_MACRO(info, __riscv);
+#endif
/*------------------------------
* compiler macros