diff --git a/sources b/sources index 39db599..ec43d92 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -b4ac7e2f438fde8d2840efc5beb2cc30 uhd-3.3.2.tar.gz +304728ac2f3dacfeab3dac611357aeec uhd-3.4.0.tar.gz diff --git a/uhd-3.4.0-usrp1-r45-dbsrx-i2c-fix.patch b/uhd-3.4.0-usrp1-r45-dbsrx-i2c-fix.patch new file mode 100644 index 0000000..ad91af1 --- /dev/null +++ b/uhd-3.4.0-usrp1-r45-dbsrx-i2c-fix.patch @@ -0,0 +1,41 @@ +commit 097f20df1653c33035b6dcfefbbef22572426c65 +Author: Josh Blum +Date: Mon Mar 26 14:25:56 2012 -0700 + + dbsrx: limit the USRP1 + DBSRX GPIO clock rate to 4MHz + + This fixes the lockup/clocking condition when the following hw combo is used: + USRP1 r4.5 + DBSRX + another i2c board + +diff --git a/host/lib/usrp/dboard/db_dbsrx.cpp b/host/lib/usrp/dboard/db_dbsrx.cpp +index 846597f..95c5c5d 100644 +--- a/host/lib/usrp/dboard/db_dbsrx.cpp ++++ b/host/lib/usrp/dboard/db_dbsrx.cpp +@@ -1,5 +1,5 @@ + // +-// Copyright 2010-2011 Ettus Research LLC ++// Copyright 2010-2012 Ettus Research LLC + // + // This program is free software: you can redistribute it and/or modify + // it under the terms of the GNU General Public License as published by +@@ -58,6 +58,8 @@ static const uhd::dict dbsrx_gain_ranges = map_list_o + ("GC2", gain_range_t(0, 24, 1)) + ; + ++static const double usrp1_gpio_clock_rate_limit = 4e6; ++ + /*********************************************************************** + * The DBSRX dboard class + **********************************************************************/ +@@ -265,6 +267,11 @@ double dbsrx::set_lo_freq(double target_freq){ + std::vector clock_rates = this->get_iface()->get_clock_rates(dboard_iface::UNIT_RX); + const double max_clock_rate = uhd::sorted(clock_rates).back(); + BOOST_FOREACH(ref_clock, uhd::reversed(uhd::sorted(clock_rates))){ ++ //USRP1 feeds the DBSRX clock from a FPGA GPIO line. ++ //make sure that this clock does not exceed rate limit. ++ if (this->get_iface()->get_special_props().soft_clock_divider){ ++ if (ref_clock > usrp1_gpio_clock_rate_limit) continue; ++ } + if (ref_clock > 27.0e6) continue; + if (size_t(max_clock_rate/ref_clock)%2 == 1) continue; //reject asymmetric clocks (odd divisors) + diff --git a/uhd.spec b/uhd.spec index 934af57..0d96d24 100644 --- a/uhd.spec +++ b/uhd.spec @@ -1,5 +1,5 @@ # Pull from git -%global git_tag release_003_003_002 +%global git_tag release_003_004_000 # git clone git://code.ettus.com/ettus/uhd.git # cd uhd @@ -8,7 +8,7 @@ Name: uhd URL: http://code.ettus.com/redmine/ettus/projects/uhd/wiki -Version: 3.3.2 +Version: 3.4.0 Release: 1%{?dist} License: GPLv3+ BuildRequires: cmake @@ -20,6 +20,8 @@ Group: Applications/Engineering Summary: Universal Hardware Driver for Ettus Research products Source0: %{name}-%{version}.tar.gz Source1: %{name}-limits.conf +# Upstream commit 097f20df1653c33035b6dcfefbbef22572426c65 +Patch0: uhd-3.4.0-usrp1-r45-dbsrx-i2c-fix.patch %description The UHD is the universal hardware driver for Ettus Research products. @@ -28,6 +30,7 @@ future Ettus Research products. It can be used standalone without GNU Radio. %prep %setup -q +%patch0 -p1 -b .usrp1-r45-dbsrx-i2c-fix %build mkdir host/build @@ -87,8 +90,7 @@ getent group usrp >/dev/null || groupadd -r usrp >/dev/null %files %doc _tmpdoc/* -%{_bindir}/uhd_find_devices -%{_bindir}/uhd_usrp_probe +%{_bindir}/* %config(noreplace) %{_sysconfdir}/udev/rules.d/10-usrp-uhd.rules %config(noreplace) %{_sysconfdir}/security/limits.d/*.conf %{_libdir}/lib*.so.* @@ -103,6 +105,12 @@ getent group usrp >/dev/null || groupadd -r usrp >/dev/null %doc %{_docdir}/%{name}/* %changelog +* Tue Mar 27 2012 Jaroslav Škarvada - 3.4.0-1 +- New version +- Fixed lockup on USRP1 r4.5 + DBSRX + another i2c board combo + (usrp1-r45-dbsrx-i2c-fix patch) + Resolves: rhbz#804440 + * Mon Mar 19 2012 Jaroslav Škarvada - 3.3.2-1 - New version