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uboot-tools/rockchip-rock960.patch
Peter Robinson f2e16593da 2019.07, Rock64, Rock960 enhancements, cleanups
2019-07-09 00:18:59 +01:00

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From 15c14b923f29dc69d51964e63f4ed35a7ffcd97f Mon Sep 17 00:00:00 2001
From: Peter Robinson <pbrobinson@gmail.com>
Date: Fri, 28 Jun 2019 14:09:02 +0100
Subject: [PATCH 1/6] arm64: rockchip: rock960: sync dts files from Linux
5.2-rc6
Sync the dts files for the Rock960 boards from Linux to get the
latest changes and fixes for the devices.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
---
arch/arm/dts/rk3399-ficus.dts | 92 ++++++++++++-
arch/arm/dts/rk3399-rock960.dts | 91 +++++++++++-
arch/arm/dts/rk3399-rock960.dtsi | 229 +++++++++++++++++++++++++------
3 files changed, 366 insertions(+), 46 deletions(-)
diff --git a/arch/arm/dts/rk3399-ficus.dts b/arch/arm/dts/rk3399-ficus.dts
index 4b2dd82b67..6b059bd7a0 100644
--- a/arch/arm/dts/rk3399-ficus.dts
+++ b/arch/arm/dts/rk3399-ficus.dts
@@ -23,6 +23,52 @@
clock-output-names = "clkin_gmac";
#clock-cells = <0>;
};
+
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <&user_led1>, <&user_led2>, <&user_led3>,
+ <&user_led4>, <&wlan_led>, <&bt_led>;
+
+ user_led1 {
+ label = "red:user1";
+ gpios = <&gpio4 25 0>;
+ linux,default-trigger = "heartbeat";
+ };
+
+ user_led2 {
+ label = "red:user2";
+ gpios = <&gpio4 26 0>;
+ linux,default-trigger = "mmc0";
+ };
+
+ user_led3 {
+ label = "red:user3";
+ gpios = <&gpio4 30 0>;
+ linux,default-trigger = "mmc1";
+ };
+
+ user_led4 {
+ label = "red:user4";
+ gpios = <&gpio1 0 0>;
+ panic-indicator;
+ linux,default-trigger = "none";
+ };
+
+ wlan_active_led {
+ label = "red:wlan";
+ gpios = <&gpio1 1 0>;
+ linux,default-trigger = "phy0tx";
+ default-state = "off";
+ };
+
+ bt_active_led {
+ label = "red:bt";
+ gpios = <&gpio1 4 0>;
+ linux,default-trigger = "hci0-power";
+ default-state = "off";
+ };
+ };
};
&gmac {
@@ -49,23 +95,63 @@
gmac {
rgmii_sleep_pins: rgmii-sleep-pins {
rockchip,pins =
- <3 15 RK_FUNC_GPIO &pcfg_output_low>;
+ <3 RK_PB7 RK_FUNC_GPIO &pcfg_output_low>;
};
};
pcie {
pcie_drv: pcie-drv {
rockchip,pins =
- <1 24 RK_FUNC_GPIO &pcfg_pull_none>;
+ <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
usb2 {
host_vbus_drv: host-vbus-drv {
rockchip,pins =
- <4 27 RK_FUNC_GPIO &pcfg_pull_none>;
+ <4 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
+
+ leds {
+ user_led1: user_led1 {
+ rockchip,pins =
+ <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ user_led2: user_led2 {
+ rockchip,pins =
+ <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ user_led3: user_led3 {
+ rockchip,pins =
+ <4 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ user_led4: user_led4 {
+ rockchip,pins =
+ <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ wlan_led: wlan_led {
+ rockchip,pins =
+ <1 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ bt_led: bt_led {
+ rockchip,pins =
+ <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+};
+
+&usbdrd_dwc3_0 {
+ dr_mode = "host";
+};
+
+&usbdrd_dwc3_1 {
+ dr_mode = "host";
};
&vcc3v3_pcie {
diff --git a/arch/arm/dts/rk3399-rock960.dts b/arch/arm/dts/rk3399-rock960.dts
index 7e06bc97e5..12285c51cc 100644
--- a/arch/arm/dts/rk3399-rock960.dts
+++ b/arch/arm/dts/rk3399-rock960.dts
@@ -1,6 +1,6 @@
-// SPDX-License-Identifier: GPL-2.0+
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
- * Copyright (C) 2018 Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
+ * Copyright (c) 2018 Linaro Ltd.
*/
/dts-v1/;
@@ -13,6 +13,53 @@
chosen {
stdout-path = "serial2:1500000n8";
};
+
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <&user_led1>, <&user_led2>, <&user_led3>,
+ <&user_led4>, <&wlan_led>, <&bt_led>;
+
+ user_led1 {
+ label = "green:user1";
+ gpios = <&gpio4 RK_PC2 0>;
+ linux,default-trigger = "heartbeat";
+ };
+
+ user_led2 {
+ label = "green:user2";
+ gpios = <&gpio4 RK_PC6 0>;
+ linux,default-trigger = "mmc0";
+ };
+
+ user_led3 {
+ label = "green:user3";
+ gpios = <&gpio4 RK_PD0 0>;
+ linux,default-trigger = "mmc1";
+ };
+
+ user_led4 {
+ label = "green:user4";
+ gpios = <&gpio4 RK_PD4 0>;
+ panic-indicator;
+ linux,default-trigger = "none";
+ };
+
+ wlan_active_led {
+ label = "yellow:wlan";
+ gpios = <&gpio4 RK_PD5 0>;
+ linux,default-trigger = "phy0tx";
+ default-state = "off";
+ };
+
+ bt_active_led {
+ label = "blue:bt";
+ gpios = <&gpio4 RK_PD6 0>;
+ linux,default-trigger = "hci0-power";
+ default-state = "off";
+ };
+ };
+
};
&pcie0 {
@@ -20,6 +67,38 @@
};
&pinctrl {
+ leds {
+ user_led1: user_led1 {
+ rockchip,pins =
+ <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ user_led2: user_led2 {
+ rockchip,pins =
+ <4 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ user_led3: user_led3 {
+ rockchip,pins =
+ <4 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ user_led4: user_led4 {
+ rockchip,pins =
+ <4 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ wlan_led: wlan_led {
+ rockchip,pins =
+ <4 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ bt_led: bt_led {
+ rockchip,pins =
+ <4 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
pcie {
pcie_drv: pcie-drv {
rockchip,pins =
@@ -35,6 +114,14 @@
};
};
+&usbdrd_dwc3_0 {
+ dr_mode = "otg";
+};
+
+&usbdrd_dwc3_1 {
+ dr_mode = "host";
+};
+
&vcc3v3_pcie {
gpio = <&gpio2 5 GPIO_ACTIVE_HIGH>;
};
diff --git a/arch/arm/dts/rk3399-rock960.dtsi b/arch/arm/dts/rk3399-rock960.dtsi
index 51644d6d02..c7d48d41e1 100644
--- a/arch/arm/dts/rk3399-rock960.dtsi
+++ b/arch/arm/dts/rk3399-rock960.dtsi
@@ -1,13 +1,32 @@
-// SPDX-License-Identifier: GPL-2.0+
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
+ * Copyright (c) 2018 Collabora Ltd.
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd.
* Copyright (c) 2018 Linaro Ltd.
*/
-#include <dt-bindings/pwm/pwm.h>
-#include <dt-bindings/pinctrl/rockchip.h>
#include "rk3399.dtsi"
+#include "rk3399-opp.dtsi"
/ {
+ sdio_pwrseq: sdio-pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ clocks = <&rk808 1>;
+ clock-names = "ext_clock";
+ pinctrl-names = "default";
+ pinctrl-0 = <&wifi_enable_h>;
+ reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
+ };
+
+ vcc12v_dcin: vcc12v-dcin {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc12v_dcin";
+ regulator-min-microvolt = <12000000>;
+ regulator-max-microvolt = <12000000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
vcc1v8_s0: vcc1v8-s0 {
compatible = "regulator-fixed";
regulator-name = "vcc1v8_s0";
@@ -16,12 +35,13 @@
regulator-always-on;
};
- vcc_sys: vcc-sys {
+ vcc5v0_sys: vcc5v0-sys {
compatible = "regulator-fixed";
- regulator-name = "vcc_sys";
+ regulator-name = "vcc5v0_sys";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
+ vin-supply = <&vcc12v_dcin>;
};
vcc3v3_sys: vcc3v3-sys {
@@ -30,7 +50,7 @@
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
- vin-supply = <&vcc_sys>;
+ vin-supply = <&vcc5v0_sys>;
};
vcc3v3_pcie: vcc3v3-pcie-regulator {
@@ -54,20 +74,8 @@
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
- vin-supply = <&vcc_sys>;
- };
-
- vdd_log: vdd-log {
- compatible = "pwm-regulator";
- pwms = <&pwm2 0 25000 0>;
- regulator-name = "vdd_log";
- regulator-min-microvolt = <800000>;
- regulator-max-microvolt = <1400000>;
- regulator-always-on;
- regulator-boot-on;
- vin-supply = <&vcc_sys>;
+ vin-supply = <&vcc5v0_sys>;
};
-
};
&cpu_l0 {
@@ -98,7 +106,19 @@
status = "okay";
};
+&gpu {
+ mali-supply = <&vdd_gpu>;
+ status = "okay";
+};
+
&hdmi {
+ ddc-i2c-bus = <&i2c3>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&hdmi_cec>;
+ status = "okay";
+};
+
+&hdmi_sound {
status = "okay";
};
@@ -118,7 +138,7 @@
regulator-ramp-delay = <1000>;
regulator-always-on;
regulator-boot-on;
- vin-supply = <&vcc_sys>;
+ vin-supply = <&vcc5v0_sys>;
status = "okay";
regulator-state-mem {
@@ -136,7 +156,7 @@
regulator-ramp-delay = <1000>;
regulator-always-on;
regulator-boot-on;
- vin-supply = <&vcc_sys>;
+ vin-supply = <&vcc5v0_sys>;
regulator-state-mem {
regulator-off-in-suspend;
};
@@ -154,16 +174,16 @@
#clock-cells = <1>;
clock-output-names = "xin32k", "rk808-clkout2";
- vcc1-supply = <&vcc_sys>;
- vcc2-supply = <&vcc_sys>;
- vcc3-supply = <&vcc_sys>;
- vcc4-supply = <&vcc_sys>;
- vcc6-supply = <&vcc_sys>;
- vcc7-supply = <&vcc_sys>;
+ vcc1-supply = <&vcc5v0_sys>;
+ vcc2-supply = <&vcc5v0_sys>;
+ vcc3-supply = <&vcc5v0_sys>;
+ vcc4-supply = <&vcc5v0_sys>;
+ vcc6-supply = <&vcc5v0_sys>;
+ vcc7-supply = <&vcc5v0_sys>;
vcc8-supply = <&vcc3v3_sys>;
- vcc9-supply = <&vcc_sys>;
- vcc10-supply = <&vcc_sys>;
- vcc11-supply = <&vcc_sys>;
+ vcc9-supply = <&vcc5v0_sys>;
+ vcc10-supply = <&vcc5v0_sys>;
+ vcc11-supply = <&vcc5v0_sys>;
vcc12-supply = <&vcc3v3_sys>;
vddio-supply = <&vcc_1v8>;
@@ -344,6 +364,10 @@
status = "okay";
};
+&i2s2 {
+ status = "okay";
+};
+
&io_domains {
bt656-supply = <&vcc1v8_s0>; /* bt656_gpio2ab_ms */
audio-supply = <&vcc1v8_s0>; /* audio_gpio3d4a_ms */
@@ -370,45 +394,92 @@
};
&pinctrl {
+ bt {
+ bt_enable_h: bt-enable-h {
+ rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ bt_host_wake_l: bt-host-wake-l {
+ rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ bt_wake_l: bt-wake-l {
+ rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
sdmmc {
sdmmc_bus1: sdmmc-bus1 {
rockchip,pins =
- <4 8 RK_FUNC_1 &pcfg_pull_up_8ma>;
+ <4 RK_PB0 1 &pcfg_pull_up_8ma>;
};
sdmmc_bus4: sdmmc-bus4 {
rockchip,pins =
- <4 8 RK_FUNC_1 &pcfg_pull_up_8ma>,
- <4 9 RK_FUNC_1 &pcfg_pull_up_8ma>,
- <4 10 RK_FUNC_1 &pcfg_pull_up_8ma>,
- <4 11 RK_FUNC_1 &pcfg_pull_up_8ma>;
+ <4 RK_PB0 1 &pcfg_pull_up_8ma>,
+ <4 RK_PB1 1 &pcfg_pull_up_8ma>,
+ <4 RK_PB2 1 &pcfg_pull_up_8ma>,
+ <4 RK_PB3 1 &pcfg_pull_up_8ma>;
};
sdmmc_clk: sdmmc-clk {
rockchip,pins =
- <4 12 RK_FUNC_1 &pcfg_pull_none_18ma>;
+ <4 RK_PB4 1 &pcfg_pull_none_18ma>;
};
sdmmc_cmd: sdmmc-cmd {
rockchip,pins =
- <4 13 RK_FUNC_1 &pcfg_pull_up_8ma>;
+ <4 RK_PB5 1 &pcfg_pull_up_8ma>;
+ };
+ };
+
+ sdio0 {
+ sdio0_bus4: sdio0-bus4 {
+ rockchip,pins =
+ <2 RK_PC4 1 &pcfg_pull_up_20ma>,
+ <2 RK_PC5 1 &pcfg_pull_up_20ma>,
+ <2 RK_PC6 1 &pcfg_pull_up_20ma>,
+ <2 RK_PC7 1 &pcfg_pull_up_20ma>;
+ };
+
+ sdio0_cmd: sdio0-cmd {
+ rockchip,pins =
+ <2 RK_PD0 1 &pcfg_pull_up_20ma>;
+ };
+
+ sdio0_clk: sdio0-clk {
+ rockchip,pins =
+ <2 RK_PD1 1 &pcfg_pull_none_20ma>;
};
};
pmic {
pmic_int_l: pmic-int-l {
rockchip,pins =
- <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
+ <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
};
vsel1_gpio: vsel1-gpio {
rockchip,pins =
- <1 17 RK_FUNC_GPIO &pcfg_pull_down>;
+ <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>;
};
vsel2_gpio: vsel2-gpio {
rockchip,pins =
- <1 14 RK_FUNC_GPIO &pcfg_pull_down>;
+ <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
+ };
+ };
+
+ sdio-pwrseq {
+ wifi_enable_h: wifi-enable-h {
+ rockchip,pins =
+ <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ wifi {
+ wifi_host_wake_l: wifi-host-wake-l {
+ rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};
@@ -421,6 +492,32 @@
status = "okay";
};
+&sdio0 {
+ bus-width = <4>;
+ clock-frequency = <50000000>;
+ cap-sdio-irq;
+ cap-sd-highspeed;
+ keep-power-in-suspend;
+ mmc-pwrseq = <&sdio_pwrseq>;
+ non-removable;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
+ sd-uhs-sdr104;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+
+ brcmf: wifi@1 {
+ compatible = "brcm,bcm4329-fmac";
+ reg = <1>;
+ interrupt-parent = <&gpio0>;
+ interrupts = <RK_PA3 GPIO_ACTIVE_HIGH>;
+ interrupt-names = "host-wake";
+ pinctrl-names = "default";
+ pinctrl-0 = <&wifi_host_wake_l>;
+ };
+};
+
&sdhci {
bus-width = <8>;
mmc-hs400-1_8v;
@@ -445,16 +542,42 @@
status = "okay";
};
+&tsadc {
+ rockchip,hw-tshut-mode = <1>;
+ rockchip,hw-tshut-polarity = <1>;
+ rockchip,hw-tshut-temp = <110000>;
+ status = "okay";
+};
+
&uart0 {
pinctrl-names = "default";
- pinctrl-0 = <&uart0_xfer &uart0_cts>;
+ pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
status = "okay";
+
+ bluetooth {
+ compatible = "brcm,bcm43438-bt";
+ clocks = <&rk808 1>;
+ clock-names = "ext_clock";
+ device-wakeup-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>;
+ host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>;
+ shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_enable_h>;
+ };
};
&uart2 {
status = "okay";
};
+&tcphy0 {
+ status = "okay";
+};
+
+&tcphy1 {
+ status = "okay";
+};
+
&u2phy0 {
status = "okay";
};
@@ -497,10 +620,34 @@
status = "okay";
};
+&usbdrd3_0 {
+ status = "okay";
+};
+
+&usbdrd_dwc3_0 {
+ status = "okay";
+};
+
+&usbdrd3_1 {
+ status = "okay";
+};
+
+&usbdrd_dwc3_1 {
+ status = "okay";
+};
+
&vopb {
status = "okay";
};
+&vopb_mmu {
+ status = "okay";
+};
+
&vopl {
status = "okay";
};
+
+&vopl_mmu {
+ status = "okay";
+};
--
2.21.0
From 66584f08b1a1eb122d4796d6923ac317bdf3c8ca Mon Sep 17 00:00:00 2001
From: Peter Robinson <pbrobinson@gmail.com>
Date: Sat, 29 Jun 2019 09:24:55 +0100
Subject: [PATCH 2/6] configs: rockchip: rock960: drop options for non-existent
HW
The Rock960 doesn't contain SPI flash so drop related config options.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
---
configs/rock960-rk3399_defconfig | 2 --
1 file changed, 2 deletions(-)
diff --git a/configs/rock960-rk3399_defconfig b/configs/rock960-rk3399_defconfig
index 1958b7e190..1aa986e9cd 100644
--- a/configs/rock960-rk3399_defconfig
+++ b/configs/rock960-rk3399_defconfig
@@ -21,7 +21,6 @@ CONFIG_SYS_PROMPT="rock960 => "
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TIME=y
@@ -35,7 +34,6 @@ CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ROCKCHIP=y
-CONFIG_SF_DEFAULT_SPEED=20000000
CONFIG_PMIC_RK8XX=y
CONFIG_REGULATOR_PWM=y
CONFIG_REGULATOR_RK8XX=y
--
2.21.0
From d9f234f28a17adad9f4b08114965815516605271 Mon Sep 17 00:00:00 2001
From: Peter Robinson <pbrobinson@gmail.com>
Date: Sat, 29 Jun 2019 09:57:29 +0100
Subject: [PATCH 3/6] configs: rockchip: rock960: enable pmic and regulator
commands
We have both PMIC and Regulator functionality so it's useful to
be able to see output and debug with the commands enabled.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
---
configs/rock960-rk3399_defconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/configs/rock960-rk3399_defconfig b/configs/rock960-rk3399_defconfig
index 1aa986e9cd..2381f0cd7e 100644
--- a/configs/rock960-rk3399_defconfig
+++ b/configs/rock960-rk3399_defconfig
@@ -21,6 +21,8 @@ CONFIG_SYS_PROMPT="rock960 => "
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_PMIC=y
+CONFIG_CMD_REGULATOR=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TIME=y
--
2.21.0
From 08cf06897ef382f4568568ea4210e41ed4ae19e2 Mon Sep 17 00:00:00 2001
From: Peter Robinson <pbrobinson@gmail.com>
Date: Sat, 29 Jun 2019 10:29:56 +0100
Subject: [PATCH 4/6] configs: rockchip: rock960: enable DMA for SDHCI
controller
Enable the SDMA controller so the eMMC connected to the SDHCI
controller (sdhci@fe330000) can make use of it.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
---
configs/rock960-rk3399_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/rock960-rk3399_defconfig b/configs/rock960-rk3399_defconfig
index 2381f0cd7e..20c9cdeda3 100644
--- a/configs/rock960-rk3399_defconfig
+++ b/configs/rock960-rk3399_defconfig
@@ -35,6 +35,7 @@ CONFIG_SYS_I2C_ROCKCHIP=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_ROCKCHIP=y
CONFIG_PMIC_RK8XX=y
CONFIG_REGULATOR_PWM=y
--
2.21.0
From 1340f50ee63727804cf7634b3679fe4208c8576f Mon Sep 17 00:00:00 2001
From: Peter Robinson <pbrobinson@gmail.com>
Date: Sat, 29 Jun 2019 10:43:01 +0100
Subject: [PATCH 5/6] configs: rockchip: rock960: Add support for USB ethernet
adapters
As the Rock960 doesn't have an onboard wired ethernet interface
it's useful to have some common USB wired ethernet devices added
to enable testing.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
---
configs/rock960-rk3399_defconfig | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/configs/rock960-rk3399_defconfig b/configs/rock960-rk3399_defconfig
index 20c9cdeda3..90115e903b 100644
--- a/configs/rock960-rk3399_defconfig
+++ b/configs/rock960-rk3399_defconfig
@@ -48,5 +48,12 @@ CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_ROCKCHIP_USB2_PHY=y
+CONFIG_DM_ETH=y
+CONFIG_USB_HOST_ETHER=y
+CONFIG_USB_ETHER_ASIX88179=y
+CONFIG_USB_ETHER_ASIX=y
+CONFIG_USB_ETHER_MCS7830=y
+CONFIG_USB_ETHER_RTL8152=y
+CONFIG_USB_ETHER_SMSC95XX=y
CONFIG_USE_TINY_PRINTF=y
CONFIG_ERRNO_STR=y
--
2.21.0
From 1bb09008d279c533f4fd76697aa396d63c10ed58 Mon Sep 17 00:00:00 2001
From: Peter Robinson <pbrobinson@gmail.com>
Date: Sat, 29 Jun 2019 18:34:57 +0100
Subject: [PATCH 6/6] configs: rockchip: rock960: enable USB3 support
Enable USB3 support via the dwc3 XHCI driver.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
---
configs/rock960-rk3399_defconfig | 3 +++
1 file changed, 3 insertions(+)
diff --git a/configs/rock960-rk3399_defconfig b/configs/rock960-rk3399_defconfig
index 90115e903b..5be36383e1 100644
--- a/configs/rock960-rk3399_defconfig
+++ b/configs/rock960-rk3399_defconfig
@@ -55,5 +55,8 @@ CONFIG_USB_ETHER_ASIX=y
CONFIG_USB_ETHER_MCS7830=y
CONFIG_USB_ETHER_RTL8152=y
CONFIG_USB_ETHER_SMSC95XX=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+# CONFIG_USB_XHCI_ROCKCHIP is not set
CONFIG_USE_TINY_PRINTF=y
CONFIG_ERRNO_STR=y
--
2.21.0
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