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uboot-tools/0001-WIP-RPi-3-32-bit-port.patch
Peter Robinson 7a98996733 Minor cleanups and new devices
2016-03-06 19:41:26 +00:00

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From 202d830b11d88335652a7b25ccd023a860e4e66f Mon Sep 17 00:00:00 2001
From: Stephen Warren <swarren@wwwdotorg.org>
Date: Sat, 5 Mar 2016 13:15:04 -0700
Subject: [PATCH] WIP: RPi 3 (32-bit) port
FIXME:
- split up into n patches
- describe
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
---
arch/arm/mach-bcm283x/Kconfig | 6 ++
arch/arm/mach-bcm283x/include/mach/aux.h | 25 +++++
arch/arm/mach-bcm283x/include/mach/gpio.h | 2 +-
arch/arm/mach-bcm283x/include/mach/mbox.h | 2 +-
arch/arm/mach-bcm283x/include/mach/sdhci.h | 2 +-
arch/arm/mach-bcm283x/include/mach/timer.h | 2 +-
arch/arm/mach-bcm283x/include/mach/wdog.h | 2 +-
arch/arm/mach-bcm283x/phys2bus.c | 2 +-
board/raspberrypi/rpi/rpi.c | 51 +++++++++-
board/raspberrypi/rpi_3_32b/MAINTAINERS | 6 ++
board/raspberrypi/rpi_3_32b/Makefile | 7 ++
configs/rpi_3_32b_defconfig | 9 ++
drivers/serial/Makefile | 1 +
drivers/serial/serial_bcm283x_mu.c | 138 +++++++++++++++++++++++++++
include/configs/rpi-common.h | 12 ++-
include/configs/rpi.h | 1 +
include/configs/rpi_3_32b.h | 18 ++++
include/dm/platform_data/serial_bcm283x_mu.h | 22 +++++
18 files changed, 297 insertions(+), 11 deletions(-)
create mode 100644 arch/arm/mach-bcm283x/include/mach/aux.h
create mode 100644 board/raspberrypi/rpi_3_32b/MAINTAINERS
create mode 100644 board/raspberrypi/rpi_3_32b/Makefile
create mode 100644 configs/rpi_3_32b_defconfig
create mode 100644 drivers/serial/serial_bcm283x_mu.c
create mode 100644 include/configs/rpi_3_32b.h
create mode 100644 include/dm/platform_data/serial_bcm283x_mu.h
diff --git a/arch/arm/mach-bcm283x/Kconfig b/arch/arm/mach-bcm283x/Kconfig
index 2315a13..aa2cf28 100644
--- a/arch/arm/mach-bcm283x/Kconfig
+++ b/arch/arm/mach-bcm283x/Kconfig
@@ -13,11 +13,16 @@ config TARGET_RPI_2
bool "Raspberry Pi 2"
select CPU_V7
+config TARGET_RPI_3_32B
+ bool "Raspberry Pi 3 32-bit build"
+ select CPU_V7
+
endchoice
config SYS_BOARD
default "rpi" if TARGET_RPI
default "rpi_2" if TARGET_RPI_2
+ default "rpi_3_32b" if TARGET_RPI_3_32B
config SYS_VENDOR
default "raspberrypi"
@@ -28,5 +33,6 @@ config SYS_SOC
config SYS_CONFIG_NAME
default "rpi" if TARGET_RPI
default "rpi_2" if TARGET_RPI_2
+ default "rpi_3_32b" if TARGET_RPI_3_32B
endmenu
diff --git a/arch/arm/mach-bcm283x/include/mach/aux.h b/arch/arm/mach-bcm283x/include/mach/aux.h
new file mode 100644
index 0000000..0f97e5c
--- /dev/null
+++ b/arch/arm/mach-bcm283x/include/mach/aux.h
@@ -0,0 +1,25 @@
+/*
+ * (C) Copyright 2016 Stephen Warren <swarren@wwwdotorg.org>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef _BCM2835_AUX_H_
+#define _BCM2835_AUX_H_
+
+#ifndef CONFIG_BCM2835
+#define BCM2835_AUX_BASE 0x3f215000
+#else
+#define BCM2835_AUX_BASE 0x20215000
+#endif
+
+#define BCM2835_AUX_ENABLES_SPI2 BIT(0)
+#define BCM2835_AUX_ENABLES_SPI1 BIT(0)
+#define BCM2835_AUX_ENABLES_MINI_UART BIT(0)
+
+struct bcm2835_aux_regs {
+ u32 irq;
+ u32 enables;
+};
+
+#endif /* _BCM2835_AXU_H_ */
diff --git a/arch/arm/mach-bcm283x/include/mach/gpio.h b/arch/arm/mach-bcm283x/include/mach/gpio.h
index c8ef8f5..e6e5d16 100644
--- a/arch/arm/mach-bcm283x/include/mach/gpio.h
+++ b/arch/arm/mach-bcm283x/include/mach/gpio.h
@@ -9,7 +9,7 @@
#ifndef _BCM2835_GPIO_H_
#define _BCM2835_GPIO_H_
-#ifdef CONFIG_BCM2836
+#ifndef CONFIG_BCM2835
#define BCM2835_GPIO_BASE 0x3f200000
#else
#define BCM2835_GPIO_BASE 0x20200000
diff --git a/arch/arm/mach-bcm283x/include/mach/mbox.h b/arch/arm/mach-bcm283x/include/mach/mbox.h
index 4a14391..627acb8 100644
--- a/arch/arm/mach-bcm283x/include/mach/mbox.h
+++ b/arch/arm/mach-bcm283x/include/mach/mbox.h
@@ -38,7 +38,7 @@
/* Raw mailbox HW */
-#ifdef CONFIG_BCM2836
+#ifndef CONFIG_BCM2835
#define BCM2835_MBOX_PHYSADDR 0x3f00b880
#else
#define BCM2835_MBOX_PHYSADDR 0x2000b880
diff --git a/arch/arm/mach-bcm283x/include/mach/sdhci.h b/arch/arm/mach-bcm283x/include/mach/sdhci.h
index 2a21ccb..64e582c 100644
--- a/arch/arm/mach-bcm283x/include/mach/sdhci.h
+++ b/arch/arm/mach-bcm283x/include/mach/sdhci.h
@@ -7,7 +7,7 @@
#ifndef _BCM2835_SDHCI_H_
#define _BCM2835_SDHCI_H_
-#ifdef CONFIG_BCM2836
+#ifndef CONFIG_BCM2835
#define BCM2835_SDHCI_BASE 0x3f300000
#else
#define BCM2835_SDHCI_BASE 0x20300000
diff --git a/arch/arm/mach-bcm283x/include/mach/timer.h b/arch/arm/mach-bcm283x/include/mach/timer.h
index 004c24b..2a85f23 100644
--- a/arch/arm/mach-bcm283x/include/mach/timer.h
+++ b/arch/arm/mach-bcm283x/include/mach/timer.h
@@ -7,7 +7,7 @@
#ifndef _BCM2835_TIMER_H
#define _BCM2835_TIMER_H
-#ifdef CONFIG_BCM2836
+#ifndef CONFIG_BCM2835
#define BCM2835_TIMER_PHYSADDR 0x3f003000
#else
#define BCM2835_TIMER_PHYSADDR 0x20003000
diff --git a/arch/arm/mach-bcm283x/include/mach/wdog.h b/arch/arm/mach-bcm283x/include/mach/wdog.h
index cbc350e..7741d7b 100644
--- a/arch/arm/mach-bcm283x/include/mach/wdog.h
+++ b/arch/arm/mach-bcm283x/include/mach/wdog.h
@@ -7,7 +7,7 @@
#ifndef _BCM2835_WDOG_H
#define _BCM2835_WDOG_H
-#ifdef CONFIG_BCM2836
+#ifndef CONFIG_BCM2835
#define BCM2835_WDOG_PHYSADDR 0x3f100000
#else
#define BCM2835_WDOG_PHYSADDR 0x20100000
diff --git a/arch/arm/mach-bcm283x/phys2bus.c b/arch/arm/mach-bcm283x/phys2bus.c
index fc1c299..8e9f492 100644
--- a/arch/arm/mach-bcm283x/phys2bus.c
+++ b/arch/arm/mach-bcm283x/phys2bus.c
@@ -9,7 +9,7 @@
unsigned long phys_to_bus(unsigned long phys)
{
-#ifdef CONFIG_BCM2836
+#ifndef CONFIG_BCM2835
return 0xc0000000 | phys;
#else
return 0x40000000 | phys;
diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c
index 776a958..1abf0bd 100644
--- a/board/raspberrypi/rpi/rpi.c
+++ b/board/raspberrypi/rpi/rpi.c
@@ -13,11 +13,14 @@
#include <lcd.h>
#include <memalign.h>
#include <mmc.h>
+#include <asm/io.h>
#include <asm/gpio.h>
+#include <asm/arch/aux.h>
#include <asm/arch/mbox.h>
#include <asm/arch/sdhci.h>
#include <asm/global_data.h>
#include <dm/platform_data/serial_pl01x.h>
+#include <dm/platform_data/serial_bcm283x_mu.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -30,8 +33,9 @@ U_BOOT_DEVICE(bcm2835_gpios) = {
.platdata = &gpio_platdata,
};
+#if defined(CONFIG_BCM2835) || defined(CONFIG_BCM2836)
static const struct pl01x_serial_platdata serial_platdata = {
-#ifdef CONFIG_BCM2836
+#ifndef CONFIG_BCM2835
.base = 0x3f201000,
#else
.base = 0x20201000,
@@ -43,6 +47,16 @@ U_BOOT_DEVICE(bcm2835_serials) = {
.name = "serial_pl01x",
.platdata = &serial_platdata,
};
+#else
+static const struct bcm283x_mu_serial_platdata serial_platdata = {
+ .base = 0x3f215040,
+};
+
+U_BOOT_DEVICE(bcm2837_serials) = {
+ .name = "serial_bcm283x_mu",
+ .platdata = &serial_platdata,
+};
+#endif
struct msg_get_arm_mem {
struct bcm2835_mbox_hdr hdr;
@@ -98,7 +112,9 @@ struct rpi_model {
static const struct rpi_model rpi_model_unknown = {
"Unknown model",
-#ifdef CONFIG_BCM2836
+#if defined(CONFIG_BCM2837)
+ "bcm2837-rpi-other.dtb",
+#elif defined(CONFIG_BCM2836)
"bcm2836-rpi-other.dtb",
#else
"bcm2835-rpi-other.dtb",
@@ -112,6 +128,11 @@ static const struct rpi_model rpi_models_new_scheme[] = {
"bcm2836-rpi-2-b.dtb",
true,
},
+ [0x8] = {
+ "3 Model B",
+ "bcm2837-rpi-3-b.dtb",
+ true,
+ },
[0x9] = {
"Zero",
"bcm2835-rpi-zero.dtb",
@@ -212,6 +233,32 @@ static uint32_t rev_scheme;
static uint32_t rev_type;
static const struct rpi_model *model;
+#ifdef CONFIG_BCM2837
+int board_early_init_f(void)
+{
+ struct bcm2835_gpio_regs *gpior =
+ (struct bcm2835_gpio_regs *)BCM2835_GPIO_BASE;
+ struct bcm2835_aux_regs *auxr =
+ (struct bcm2835_aux_regs *)BCM2835_AUX_BASE;
+ u32 val;
+
+ /* Route mini UART to header UART pins */
+ val = readl(&gpior->gpfsel[BCM2835_GPIO_FSEL_BANK(14)]);
+ val &= ~(BCM2835_GPIO_FSEL_MASK << BCM2835_GPIO_FSEL_SHIFT(14));
+ val |= (BCM2835_GPIO_ALT5 << BCM2835_GPIO_FSEL_SHIFT(14));
+ val &= ~(BCM2835_GPIO_FSEL_MASK << BCM2835_GPIO_FSEL_SHIFT(15));
+ val |= (BCM2835_GPIO_ALT5 << BCM2835_GPIO_FSEL_SHIFT(15));
+ writel(val, &gpior->gpfsel[BCM2835_GPIO_FSEL_BANK(14)]);
+
+ /* Enable mini UART HW module */
+ val = readl(&auxr->enables);
+ val |= BCM2835_AUX_ENABLES_MINI_UART;
+ writel(val, &auxr->enables);
+
+ return 0;
+}
+#endif
+
int dram_init(void)
{
ALLOC_CACHE_ALIGN_BUFFER(struct msg_get_arm_mem, msg, 1);
diff --git a/board/raspberrypi/rpi_3_32b/MAINTAINERS b/board/raspberrypi/rpi_3_32b/MAINTAINERS
new file mode 100644
index 0000000..bc9df87
--- /dev/null
+++ b/board/raspberrypi/rpi_3_32b/MAINTAINERS
@@ -0,0 +1,6 @@
+RPI_3_32B BOARD
+M: Stephen Warren <swarren@wwwdotorg.org>
+S: Maintained
+F: board/raspberrypi/rpi_3_32b/
+F: include/configs/rpi_3_32b.h
+F: configs/rpi_3_32b_defconfig
diff --git a/board/raspberrypi/rpi_3_32b/Makefile b/board/raspberrypi/rpi_3_32b/Makefile
new file mode 100644
index 0000000..e569431
--- /dev/null
+++ b/board/raspberrypi/rpi_3_32b/Makefile
@@ -0,0 +1,7 @@
+#
+# (C) Copyright 2012,2015 Stephen Warren <swarren@wwwdotorg.org>
+#
+# SPDX-License-Identifier: GPL-2.0
+#
+
+obj-y := ../rpi/rpi.o
diff --git a/configs/rpi_3_32b_defconfig b/configs/rpi_3_32b_defconfig
new file mode 100644
index 0000000..fcb8961
--- /dev/null
+++ b/configs/rpi_3_32b_defconfig
@@ -0,0 +1,9 @@
+CONFIG_ARM=y
+CONFIG_ARCH_BCM283X=y
+CONFIG_TARGET_RPI_3_32B=y
+CONFIG_SYS_PROMPT="U-Boot> "
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPIO=y
+CONFIG_PHYS_TO_BUS=y
diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
index 05bdf56..ee7147a 100644
--- a/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
@@ -38,6 +38,7 @@ obj-$(CONFIG_UNIPHIER_SERIAL) += serial_uniphier.o
obj-$(CONFIG_STM32_SERIAL) += serial_stm32.o
obj-$(CONFIG_PIC32_SERIAL) += serial_pic32.o
obj-$(CONFIG_STM32X7_SERIAL) += serial_stm32x7.o
+obj-$(CONFIG_BCM283X_MU_SERIAL) += serial_bcm283x_mu.o
ifndef CONFIG_SPL_BUILD
obj-$(CONFIG_USB_TTY) += usbtty.o
diff --git a/drivers/serial/serial_bcm283x_mu.c b/drivers/serial/serial_bcm283x_mu.c
new file mode 100644
index 0000000..97b57cc
--- /dev/null
+++ b/drivers/serial/serial_bcm283x_mu.c
@@ -0,0 +1,138 @@
+/*
+ * (C) Copyright 2016 Stephen Warren <swarren@wwwdotorg.org>
+ *
+ * Derived from pl01x code:
+ *
+ * (C) Copyright 2000
+ * Rob Taylor, Flying Pig Systems. robt@flyingpig.com.
+ *
+ * (C) Copyright 2004
+ * ARM Ltd.
+ * Philippe Robin, <philippe.robin@arm.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+/* Simple U-Boot driver for the BCM283x mini UART */
+
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <watchdog.h>
+#include <asm/io.h>
+#include <serial.h>
+#include <dm/platform_data/serial_bcm283x_mu.h>
+#include <linux/compiler.h>
+#include <fdtdec.h>
+
+struct bcm283x_mu_regs {
+ u32 io;
+ u32 iir;
+ u32 ier;
+ u32 lcr;
+ u32 mcr;
+ u32 lsr;
+ u32 msr;
+ u32 scratch;
+ u32 cntl;
+ u32 stat;
+ u32 baud;
+};
+
+#define BCM283X_MU_LCR_DATA_SIZE_8 3
+
+#define BCM283X_MU_LSR_TX_IDLE BIT(6)
+/* This actually means not full, but is named not empty in the docs */
+#define BCM283X_MU_LSR_TX_EMPTY BIT(5)
+#define BCM283X_MU_LSR_RX_READY BIT(0)
+
+struct bcm283x_mu_priv {
+ struct bcm283x_mu_regs *regs;
+};
+
+static int bcm283x_mu_serial_setbrg(struct udevice *dev, int baudrate)
+{
+ struct bcm283x_mu_priv *priv = dev_get_priv(dev);
+ struct bcm283x_mu_regs *regs = priv->regs;
+ /* FIXME: Get this from plat data later */
+ u32 clock_rate = 250000000;
+ u32 divider;
+
+ divider = clock_rate / (baudrate * 8);
+
+ writel(BCM283X_MU_LCR_DATA_SIZE_8, &regs->lcr);
+ writel(divider - 1, &regs->baud);
+
+ return 0;
+}
+
+static int bcm283x_mu_serial_probe(struct udevice *dev)
+{
+ struct bcm283x_mu_serial_platdata *plat = dev_get_platdata(dev);
+ struct bcm283x_mu_priv *priv = dev_get_priv(dev);
+
+ priv->regs = (struct bcm283x_mu_regs *)plat->base;
+
+ return 0;
+}
+
+static int bcm283x_mu_serial_getc(struct udevice *dev)
+{
+ struct bcm283x_mu_priv *priv = dev_get_priv(dev);
+ struct bcm283x_mu_regs *regs = priv->regs;
+ u32 data;
+
+ /* Wait until there is data in the FIFO */
+ if (!(readl(&regs->lsr) & BCM283X_MU_LSR_RX_READY))
+ return -EAGAIN;
+
+ data = readl(&regs->io);
+
+ return (int)data;
+}
+
+static int bcm283x_mu_serial_putc(struct udevice *dev, const char data)
+{
+ struct bcm283x_mu_priv *priv = dev_get_priv(dev);
+ struct bcm283x_mu_regs *regs = priv->regs;
+
+ /* Wait until there is space in the FIFO */
+ if (!(readl(&regs->lsr) & BCM283X_MU_LSR_TX_EMPTY))
+ return -EAGAIN;
+
+ /* Send the character */
+ writel(data, &regs->io);
+
+ return 0;
+}
+
+static int bcm283x_mu_serial_pending(struct udevice *dev, bool input)
+{
+ struct bcm283x_mu_priv *priv = dev_get_priv(dev);
+ struct bcm283x_mu_regs *regs = priv->regs;
+ unsigned int lsr = readl(&regs->lsr);
+
+ if (input) {
+ WATCHDOG_RESET();
+ return lsr & BCM283X_MU_LSR_RX_READY;
+ } else {
+ return !(lsr & BCM283X_MU_LSR_TX_IDLE);
+ }
+}
+
+static const struct dm_serial_ops bcm283x_mu_serial_ops = {
+ .putc = bcm283x_mu_serial_putc,
+ .pending = bcm283x_mu_serial_pending,
+ .getc = bcm283x_mu_serial_getc,
+ .setbrg = bcm283x_mu_serial_setbrg,
+};
+
+U_BOOT_DRIVER(serial_bcm283x_mu) = {
+ .name = "serial_bcm283x_mu",
+ .id = UCLASS_SERIAL,
+ .platdata_auto_alloc_size = sizeof(struct bcm283x_mu_serial_platdata),
+ .probe = bcm283x_mu_serial_probe,
+ .ops = &bcm283x_mu_serial_ops,
+ .flags = DM_FLAG_PRE_RELOC,
+ .priv_auto_alloc_size = sizeof(struct bcm283x_mu_priv),
+};
diff --git a/include/configs/rpi-common.h b/include/configs/rpi-common.h
index 9ae6805..30cd319 100644
--- a/include/configs/rpi-common.h
+++ b/include/configs/rpi-common.h
@@ -11,7 +11,6 @@
#include <asm/arch/timer.h>
/* Architecture, CPU, etc.*/
-#define CONFIG_BCM2835
#define CONFIG_ARCH_CPU_INIT
#define CONFIG_SYS_TIMER_RATE 1000000
@@ -25,8 +24,11 @@
* We don't define a machine type for bcm2709/bcm2836 since the RPi Foundation
* chose to use someone else's previously registered machine ID (3139, MX51_GGC)
* rather than obtaining a valid ID:-/
+ *
+ * For the bcm2837, hopefully a machine type is not needed, since everything
+ * is DT.
*/
-#ifndef CONFIG_BCM2836
+#ifdef CONFIG_BCM2835
#define CONFIG_MACH_TYPE MACH_TYPE_BCM2708
#endif
@@ -80,7 +82,7 @@
#define CONFIG_CMD_USB
#ifdef CONFIG_CMD_USB
#define CONFIG_USB_DWC2
-#ifdef CONFIG_BCM2836
+#ifndef CONFIG_BCM2835
#define CONFIG_USB_DWC2_REG_ADDR 0x3f980000
#else
#define CONFIG_USB_DWC2_REG_ADDR 0x20980000
@@ -95,7 +97,11 @@
#endif
/* Console UART */
+#ifdef CONFIG_BCM2837
+#define CONFIG_BCM283X_MU_SERIAL
+#else
#define CONFIG_PL01X_SERIAL
+#endif
#define CONFIG_CONS_INDEX 0
#define CONFIG_BAUDRATE 115200
diff --git a/include/configs/rpi.h b/include/configs/rpi.h
index 86422e3..a788ce4 100644
--- a/include/configs/rpi.h
+++ b/include/configs/rpi.h
@@ -7,6 +7,7 @@
#ifndef __CONFIG_H
#define __CONFIG_H
+#define CONFIG_BCM2835
#define CONFIG_SYS_CACHELINE_SIZE 32
#include "rpi-common.h"
diff --git a/include/configs/rpi_3_32b.h b/include/configs/rpi_3_32b.h
new file mode 100644
index 0000000..5343e33
--- /dev/null
+++ b/include/configs/rpi_3_32b.h
@@ -0,0 +1,18 @@
+/*
+ * (C) Copyright 2012,2015-2016 Stephen Warren <swarren@wwwdotorg.org>
+ *
+ * SPDX-License-Identifier: GPL-2.0
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#define CONFIG_SKIP_LOWLEVEL_INIT
+#define CONFIG_BOARD_EARLY_INIT_F
+#define CONFIG_BCM2837
+#define CONFIG_SYS_CACHELINE_SIZE 64
+#define CONFIG_SYS_DCACHE_OFF
+
+#include "rpi-common.h"
+
+#endif
diff --git a/include/dm/platform_data/serial_bcm283x_mu.h b/include/dm/platform_data/serial_bcm283x_mu.h
new file mode 100644
index 0000000..4415945
--- /dev/null
+++ b/include/dm/platform_data/serial_bcm283x_mu.h
@@ -0,0 +1,22 @@
+/*
+ * (C) Copyright 2016 Stephen Warren <swarren@wwwdotorg.org>
+ *
+ * Derived from pl01x code:
+ * Copyright (c) 2014 Google, Inc
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __serial_bcm283x_mu_h
+#define __serial_bcm283x_mu_h
+
+/*
+ *Information about a serial port
+ *
+ * @base: Register base address
+ */
+struct bcm283x_mu_serial_platdata {
+ unsigned long base;
+};
+
+#endif
--
2.5.0
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