147 lines
3.9 KiB
Diff
147 lines
3.9 KiB
Diff
From e512e16b155d9eba97764cb64cdcaa4e5b1953fc Mon Sep 17 00:00:00 2001
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From: Alexandre Courbot <acourbot@nvidia.com>
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Date: Thu, 9 Jul 2015 16:33:01 +0900
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Subject: [PATCH 8/9] ARM: tegra: enable GPU DT node when appropriate
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T124 requires some specific configuration (VPR setup) to be performed by
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the bootloader before the GPU can be used. For this reason, the GPU node
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in the device tree is disabled by default. This patch enables the node
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if U-boot has performed VPR configuration.
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Boards enabled by this patch are T124's Jetson TK1 and Venice 2.
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Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
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Cc: Stephen Warren <swarren@nvidia.com>
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Cc: Tom Warren <twarren@nvidia.com>
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---
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arch/arm/include/asm/arch-tegra/gpu.h | 16 ++++++++++++++++
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arch/arm/mach-tegra/gpu.c | 19 +++++++++++++++++++
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board/nvidia/jetson-tk1/jetson-tk1.c | 8 ++++++++
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board/nvidia/venice2/venice2.c | 8 ++++++++
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include/configs/jetson-tk1.h | 2 ++
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include/configs/venice2.h | 2 ++
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6 files changed, 55 insertions(+)
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diff --git a/arch/arm/include/asm/arch-tegra/gpu.h b/arch/arm/include/asm/arch-tegra/gpu.h
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index b347a21..eac73ed 100644
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--- a/arch/arm/include/asm/arch-tegra/gpu.h
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+++ b/arch/arm/include/asm/arch-tegra/gpu.h
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@@ -25,3 +25,19 @@ static inline bool gpu_configured(void)
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}
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#endif /* CONFIG_TEGRA_GPU */
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+
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+
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+#if defined(CONFIG_OF_LIBFDT)
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+
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+int gpu_enable_node(void *blob, const char *gpupath);
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+
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+#else /* CONFIG_OF_LIBFDT */
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+
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+static inline int gpu_enable_node(void *blob, const char *gpupath)
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+{
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+ return 0;
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+}
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+
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+#endif /* CONFIG_OF_LIBFDT */
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+
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+#endif
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diff --git a/arch/arm/mach-tegra/gpu.c b/arch/arm/mach-tegra/gpu.c
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index b2fa50b..4ea046d 100644
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--- a/arch/arm/mach-tegra/gpu.c
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+++ b/arch/arm/mach-tegra/gpu.c
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@@ -45,3 +45,22 @@ bool vpr_configured(void)
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{
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return _configured;
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}
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+
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+#if defined(CONFIG_OF_LIBFDT)
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+
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+int gpu_enable_node(void *blob, const char *gpupath)
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+{
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+ int offset;
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+
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+ if (vpr_configured()) {
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+ offset = fdt_path_offset(blob, gpupath);
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+ if (offset > 0) {
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+ fdt_status_okay(blob, offset);
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+ debug("enabled GPU node %s\n", gpupath);
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+ }
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+ }
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+
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+ return 0;
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+}
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+
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+#endif
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diff --git a/board/nvidia/jetson-tk1/jetson-tk1.c b/board/nvidia/jetson-tk1/jetson-tk1.c
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index 52425a8..3c21767 100644
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--- a/board/nvidia/jetson-tk1/jetson-tk1.c
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+++ b/board/nvidia/jetson-tk1/jetson-tk1.c
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@@ -11,6 +11,7 @@
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#include <asm/arch/gpio.h>
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#include <asm/arch/pinmux.h>
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+#include <asm/arch-tegra/gpu.h>
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#include "pinmux-config-jetson-tk1.h"
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@@ -79,3 +80,10 @@ int board_eth_init(bd_t *bis)
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return pci_eth_init(bis);
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}
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#endif /* PCI */
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+
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+int ft_board_setup(void *blob, bd_t *bd)
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+{
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+ gpu_enable_node(blob, "/gpu@0,57000000");
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+
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+ return 0;
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+}
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diff --git a/board/nvidia/venice2/venice2.c b/board/nvidia/venice2/venice2.c
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index c56ef12..3e2b9a7 100644
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--- a/board/nvidia/venice2/venice2.c
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+++ b/board/nvidia/venice2/venice2.c
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@@ -8,6 +8,7 @@
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#include <common.h>
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#include <asm/arch/gpio.h>
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#include <asm/arch/pinmux.h>
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+#include <asm/arch-tegra/gpu.h>
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#include "pinmux-config-venice2.h"
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/*
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@@ -27,3 +28,10 @@ void pinmux_init(void)
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pinmux_config_drvgrp_table(venice2_drvgrps,
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ARRAY_SIZE(venice2_drvgrps));
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}
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+
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+int ft_board_setup(void *blob, bd_t *bd)
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+{
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+ gpu_enable_node(blob, "/gpu@0,57000000");
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+
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+ return 0;
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+}
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diff --git a/include/configs/jetson-tk1.h b/include/configs/jetson-tk1.h
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index 3bbff28..b3e6496 100644
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--- a/include/configs/jetson-tk1.h
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+++ b/include/configs/jetson-tk1.h
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@@ -82,4 +82,6 @@
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#define CONFIG_ARMV7_SECURE_BASE 0xfff00000
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#define CONFIG_ARMV7_SECURE_RESERVE_SIZE 0x00100000
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+#define CONFIG_OF_BOARD_SETUP
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+
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#endif /* __CONFIG_H */
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diff --git a/include/configs/venice2.h b/include/configs/venice2.h
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index 1d9d053..bc5080a 100644
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--- a/include/configs/venice2.h
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+++ b/include/configs/venice2.h
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@@ -64,4 +64,6 @@
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#include "tegra-common-usb-gadget.h"
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#include "tegra-common-post.h"
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+#define CONFIG_OF_BOARD_SETUP
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+
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#endif /* __CONFIG_H */
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--
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2.5.0
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