708 lines
26 KiB
Diff
708 lines
26 KiB
Diff
From patchwork Mon Jun 22 15:30:48 2020
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X-Patchwork-Submitter: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
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X-Patchwork-Id: 1314562
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Mon, 22 Jun 2020 15:31:22 +0000 (UTC)
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From: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
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To: mbrugger@suse.com, u-boot@lists.denx.de, bmeng.cn@gmail.com,
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sjg@chromium.org, marex@denx.de
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Cc: m.szyprowski@samsung.com, s.nawrocki@samsung.com,
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Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
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Subject: [PATCH v5 1/4] arm: rpi: Add function to trigger VL805's firmware load
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Date: Mon, 22 Jun 2020 17:30:48 +0200
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Message-Id: <20200622153050.23193-2-nsaenzjulienne@suse.de>
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On the Raspberry Pi 4, after a PCI reset, VL805's (a xHCI chip) firmware
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may either be loaded directly from an EEPROM or, if not present, by the
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SoC's VideCore (the SoC's co-processor). Introduce the function that
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informs VideCore that VL805 may need its firmware loaded.
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Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
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---
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Changes since v1:
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- Rename function so it's not mistaken with regular firmware loading
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arch/arm/mach-bcm283x/include/mach/mbox.h | 13 +++++++
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arch/arm/mach-bcm283x/include/mach/msg.h | 7 ++++
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arch/arm/mach-bcm283x/msg.c | 46 +++++++++++++++++++++++
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3 files changed, 66 insertions(+)
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diff --git a/arch/arm/mach-bcm283x/include/mach/mbox.h b/arch/arm/mach-bcm283x/include/mach/mbox.h
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index 60e226ce1d..2ae2d3d97c 100644
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--- a/arch/arm/mach-bcm283x/include/mach/mbox.h
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+++ b/arch/arm/mach-bcm283x/include/mach/mbox.h
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@@ -491,6 +491,19 @@ struct bcm2835_mbox_tag_set_palette {
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} body;
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};
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+#define BCM2835_MBOX_TAG_NOTIFY_XHCI_RESET 0x00030058
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+
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+struct bcm2835_mbox_tag_pci_dev_addr {
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+ struct bcm2835_mbox_tag_hdr tag_hdr;
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+ union {
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+ struct {
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+ u32 dev_addr;
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+ } req;
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+ struct {
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+ } resp;
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+ } body;
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+};
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+
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/*
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* Pass a raw u32 message to the VC, and receive a raw u32 back.
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*
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diff --git a/arch/arm/mach-bcm283x/include/mach/msg.h b/arch/arm/mach-bcm283x/include/mach/msg.h
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index 4afb08631b..e45c1bf010 100644
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--- a/arch/arm/mach-bcm283x/include/mach/msg.h
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+++ b/arch/arm/mach-bcm283x/include/mach/msg.h
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@@ -48,4 +48,11 @@ int bcm2835_set_video_params(int *widthp, int *heightp, int depth_bpp,
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int pixel_order, int alpha_mode, ulong *fb_basep,
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ulong *fb_sizep, int *pitchp);
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+/**
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+ * bcm2711_load_vl805_firmware() - get vl805's firmware loaded
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+ *
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+ * @return 0 if OK, -EIO on error
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+ */
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+int bcm2711_notify_vl805_reset(void);
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+
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#endif
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diff --git a/arch/arm/mach-bcm283x/msg.c b/arch/arm/mach-bcm283x/msg.c
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index 94b75283f8..347aece3cd 100644
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--- a/arch/arm/mach-bcm283x/msg.c
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+++ b/arch/arm/mach-bcm283x/msg.c
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@@ -7,6 +7,7 @@
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#include <memalign.h>
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#include <phys2bus.h>
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#include <asm/arch/mbox.h>
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+#include <linux/delay.h>
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struct msg_set_power_state {
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struct bcm2835_mbox_hdr hdr;
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@@ -40,6 +41,12 @@ struct msg_setup {
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u32 end_tag;
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};
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+struct msg_notify_vl805_reset {
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+ struct bcm2835_mbox_hdr hdr;
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+ struct bcm2835_mbox_tag_pci_dev_addr dev_addr;
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+ u32 end_tag;
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+};
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+
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int bcm2835_power_on_module(u32 module)
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{
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ALLOC_CACHE_ALIGN_BUFFER(struct msg_set_power_state, msg_pwr, 1);
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@@ -151,3 +158,42 @@ int bcm2835_set_video_params(int *widthp, int *heightp, int depth_bpp,
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return 0;
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}
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+
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+/*
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+ * On the Raspberry Pi 4, after a PCI reset, VL805's (the xHCI chip) firmware
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+ * may either be loaded directly from an EEPROM or, if not present, by the
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+ * SoC's VideoCore. This informs VideoCore that VL805 needs its firmware
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+ * loaded.
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+ */
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+int bcm2711_notify_vl805_reset(void)
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+{
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+ ALLOC_CACHE_ALIGN_BUFFER(struct msg_notify_vl805_reset,
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+ msg_notify_vl805_reset, 1);
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+ int ret;
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+
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+ BCM2835_MBOX_INIT_HDR(msg_notify_vl805_reset);
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+ BCM2835_MBOX_INIT_TAG(&msg_notify_vl805_reset->dev_addr,
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+ NOTIFY_XHCI_RESET);
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+
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+ /*
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+ * The pci device address is expected like this:
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+ *
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+ * PCI_BUS << 20 | PCI_SLOT << 15 | PCI_FUNC << 12
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+ *
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+ * But since RPi4's PCIe setup is hardwired, we know the address in
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+ * advance.
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+ */
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+ msg_notify_vl805_reset->dev_addr.body.req.dev_addr = 0x100000;
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+
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+ ret = bcm2835_mbox_call_prop(BCM2835_MBOX_PROP_CHAN,
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+ &msg_notify_vl805_reset->hdr);
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+ if (ret) {
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+ printf("bcm2711: Faild to load vl805's firmware, %d\n", ret);
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+ return -EIO;
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+ }
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+
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+ udelay(200);
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+
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+ return 0;
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+}
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+
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From patchwork Mon Jun 22 15:30:49 2020
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X-Patchwork-Submitter: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
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Mon, 22 Jun 2020 15:31:22 +0000 (UTC)
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From: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
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To: mbrugger@suse.com, u-boot@lists.denx.de, bmeng.cn@gmail.com,
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sjg@chromium.org, marex@denx.de
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Cc: m.szyprowski@samsung.com, s.nawrocki@samsung.com,
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Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
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Subject: [PATCH v5 2/4] reset: Add Raspberry Pi 4 firmware reset controller
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Date: Mon, 22 Jun 2020 17:30:49 +0200
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Message-Id: <20200622153050.23193-3-nsaenzjulienne@suse.de>
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Raspberry Pi 4's co-processor controls some of the board's HW
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initialization process, but it's up to Linux to trigger it when
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relevant. Introduce a reset controller capable of interfacing with
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RPi4's co-processor that models these firmware initialization routines as
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reset lines.
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Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
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---
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drivers/reset/Kconfig | 10 ++++
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drivers/reset/Makefile | 1 +
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drivers/reset/reset-raspberrypi.c | 60 +++++++++++++++++++
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.../reset/raspberrypi,firmware-reset.h | 13 ++++
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4 files changed, 84 insertions(+)
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create mode 100644 drivers/reset/reset-raspberrypi.c
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create mode 100644 include/dt-bindings/reset/raspberrypi,firmware-reset.h
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diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
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index 88d3be1593..d02c1522e5 100644
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--- a/drivers/reset/Kconfig
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+++ b/drivers/reset/Kconfig
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@@ -148,4 +148,14 @@ config RESET_IMX7
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help
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Support for reset controller on i.MX7/8 SoCs.
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+config RESET_RASPBERRYPI
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+ bool "Raspberry Pi 4 Firmware Reset Controller Driver"
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+ depends on DM_RESET && ARCH_BCM283X
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+ default USB_XHCI_PCI
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+ help
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+ Raspberry Pi 4's co-processor controls some of the board's HW
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+ initialization process, but it's up to Linux to trigger it when
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+ relevant. This driver provides a reset controller capable of
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+ interfacing with RPi4's co-processor and model these firmware
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+ initialization routines as reset lines.
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endmenu
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diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile
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index 0a044d5d8c..be54dae725 100644
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--- a/drivers/reset/Makefile
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+++ b/drivers/reset/Makefile
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@@ -23,3 +23,4 @@ obj-$(CONFIG_RESET_MTMIPS) += reset-mtmips.o
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obj-$(CONFIG_RESET_SUNXI) += reset-sunxi.o
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obj-$(CONFIG_RESET_HISILICON) += reset-hisilicon.o
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obj-$(CONFIG_RESET_IMX7) += reset-imx7.o
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+obj-$(CONFIG_RESET_RASPBERRYPI) += reset-raspberrypi.o
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diff --git a/drivers/reset/reset-raspberrypi.c b/drivers/reset/reset-raspberrypi.c
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new file mode 100644
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index 0000000000..e2d284e5ac
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--- /dev/null
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+++ b/drivers/reset/reset-raspberrypi.c
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@@ -0,0 +1,60 @@
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+// SPDX-License-Identifier: GPL-2.0
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+/*
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+ * Raspberry Pi 4 firmware reset driver
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+ *
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+ * Copyright (C) 2020 Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
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+ */
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+#include <common.h>
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+#include <dm.h>
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+#include <reset-uclass.h>
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+#include <asm/arch/msg.h>
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+#include <dt-bindings/reset/raspberrypi,firmware-reset.h>
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+
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+static int raspberrypi_reset_request(struct reset_ctl *reset_ctl)
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+{
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+ if (reset_ctl->id >= RASPBERRYPI_FIRMWARE_RESET_NUM_IDS)
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+ return -EINVAL;
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+
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+ return 0;
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+}
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+
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+static int raspberrypi_reset_free(struct reset_ctl *reset_ctl)
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+{
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+ return 0;
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+}
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+
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+static int raspberrypi_reset_assert(struct reset_ctl *reset_ctl)
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+{
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+ switch (reset_ctl->id) {
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+ case RASPBERRYPI_FIRMWARE_RESET_ID_USB:
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+ bcm2711_notify_vl805_reset();
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+ return 0;
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+ default:
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+ return -EINVAL;
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+ }
|
|
+}
|
|
+
|
|
+static int raspberrypi_reset_deassert(struct reset_ctl *reset_ctl)
|
|
+{
|
|
+ return 0;
|
|
+}
|
|
+
|
|
+struct reset_ops raspberrypi_reset_ops = {
|
|
+ .request = raspberrypi_reset_request,
|
|
+ .rfree = raspberrypi_reset_free,
|
|
+ .rst_assert = raspberrypi_reset_assert,
|
|
+ .rst_deassert = raspberrypi_reset_deassert,
|
|
+};
|
|
+
|
|
+static const struct udevice_id raspberrypi_reset_ids[] = {
|
|
+ { .compatible = "raspberrypi,firmware-reset" },
|
|
+ { }
|
|
+};
|
|
+
|
|
+U_BOOT_DRIVER(raspberrypi_reset) = {
|
|
+ .name = "raspberrypi-reset",
|
|
+ .id = UCLASS_RESET,
|
|
+ .of_match = raspberrypi_reset_ids,
|
|
+ .ops = &raspberrypi_reset_ops,
|
|
+};
|
|
+
|
|
diff --git a/include/dt-bindings/reset/raspberrypi,firmware-reset.h b/include/dt-bindings/reset/raspberrypi,firmware-reset.h
|
|
new file mode 100644
|
|
index 0000000000..1a4f4c7927
|
|
--- /dev/null
|
|
+++ b/include/dt-bindings/reset/raspberrypi,firmware-reset.h
|
|
@@ -0,0 +1,13 @@
|
|
+/* SPDX-License-Identifier: GPL-2.0 */
|
|
+/*
|
|
+ * Copyright (c) 2020 Nicolas Saenz Julienne
|
|
+ * Author: Nicolas Saenz Julienne <nsaenzjulienne@suse.com>
|
|
+ */
|
|
+
|
|
+#ifndef _DT_BINDINGS_RASPBERRYPI_FIRMWARE_RESET_H
|
|
+#define _DT_BINDINGS_RASPBERRYPI_FIRMWARE_RESET_H
|
|
+
|
|
+#define RASPBERRYPI_FIRMWARE_RESET_ID_USB 0
|
|
+#define RASPBERRYPI_FIRMWARE_RESET_NUM_IDS 1
|
|
+
|
|
+#endif
|
|
|
|
From patchwork Mon Jun 22 15:30:50 2020
|
|
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Mon, 22 Jun 2020 15:31:23 +0000 (UTC)
|
|
From: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
|
|
To: mbrugger@suse.com, u-boot@lists.denx.de, bmeng.cn@gmail.com,
|
|
sjg@chromium.org, marex@denx.de
|
|
Cc: m.szyprowski@samsung.com, s.nawrocki@samsung.com,
|
|
Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
|
|
Subject: [PATCH v5 3/4] configs: Enable support for reset controllers on RPi4
|
|
Date: Mon, 22 Jun 2020 17:30:50 +0200
|
|
Message-Id: <20200622153050.23193-4-nsaenzjulienne@suse.de>
|
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|
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X-Virus-Status: Clean
|
|
|
|
This is required in order to access the reset controller used to
|
|
initialize the board's xHCI chip.
|
|
|
|
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
|
|
---
|
|
configs/rpi_4_32b_defconfig | 1 +
|
|
configs/rpi_4_defconfig | 1 +
|
|
configs/rpi_arm64_defconfig | 1 +
|
|
3 files changed, 3 insertions(+)
|
|
|
|
diff --git a/configs/rpi_4_32b_defconfig b/configs/rpi_4_32b_defconfig
|
|
index b0797373b5..00c8d963ab 100644
|
|
--- a/configs/rpi_4_32b_defconfig
|
|
+++ b/configs/rpi_4_32b_defconfig
|
|
@@ -35,6 +35,7 @@ CONFIG_DM_PCI=y
|
|
CONFIG_PCI_BRCMSTB=y
|
|
CONFIG_PINCTRL=y
|
|
# CONFIG_PINCTRL_GENERIC is not set
|
|
+CONFIG_DM_RESET=y
|
|
# CONFIG_REQUIRE_SERIAL_CONSOLE is not set
|
|
CONFIG_USB=y
|
|
CONFIG_DM_USB=y
|
|
diff --git a/configs/rpi_4_defconfig b/configs/rpi_4_defconfig
|
|
index 932b768164..c73eccb61c 100644
|
|
--- a/configs/rpi_4_defconfig
|
|
+++ b/configs/rpi_4_defconfig
|
|
@@ -35,6 +35,7 @@ CONFIG_DM_PCI=y
|
|
CONFIG_PCI_BRCMSTB=y
|
|
CONFIG_PINCTRL=y
|
|
# CONFIG_PINCTRL_GENERIC is not set
|
|
+CONFIG_DM_RESET=y
|
|
# CONFIG_REQUIRE_SERIAL_CONSOLE is not set
|
|
CONFIG_USB=y
|
|
CONFIG_DM_USB=y
|
|
diff --git a/configs/rpi_arm64_defconfig b/configs/rpi_arm64_defconfig
|
|
index 855afcf1cf..800b51e6f5 100644
|
|
--- a/configs/rpi_arm64_defconfig
|
|
+++ b/configs/rpi_arm64_defconfig
|
|
@@ -32,6 +32,7 @@ CONFIG_DM_PCI=y
|
|
CONFIG_PCI_BRCMSTB=y
|
|
CONFIG_PINCTRL=y
|
|
# CONFIG_PINCTRL_GENERIC is not set
|
|
+CONFIG_DM_RESET=y
|
|
# CONFIG_REQUIRE_SERIAL_CONSOLE is not set
|
|
CONFIG_USB=y
|
|
CONFIG_DM_USB=y
|
|
|
|
From patchwork Mon Jun 22 15:30:51 2020
|
|
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X-Patchwork-Submitter: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
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X-Patchwork-Delegate: matthias.bgg@gmail.com
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by ozlabs.org (Postfix) with ESMTPS id 49rD0q0fqDz9s6w
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From: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
|
|
To: mbrugger@suse.com, u-boot@lists.denx.de, bmeng.cn@gmail.com,
|
|
sjg@chromium.org, marex@denx.de
|
|
Cc: m.szyprowski@samsung.com, s.nawrocki@samsung.com,
|
|
Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
|
|
Subject: [PATCH v5 4/4] usb: xhci: Add reset controller support
|
|
Date: Mon, 22 Jun 2020 17:30:51 +0200
|
|
Message-Id: <20200622153050.23193-5-nsaenzjulienne@suse.de>
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|
|
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|
|
|
|
Some atypical users of xhci might need to manually reset their xHCI
|
|
controller before starting the HCD setup. Check if a reset controller
|
|
device is available to the PCI bus and trigger a reset.
|
|
|
|
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
|
|
---
|
|
|
|
Changes since v3:
|
|
- Move reset support to xchi core
|
|
|
|
drivers/usb/host/xhci-mem.c | 2 ++
|
|
drivers/usb/host/xhci.c | 33 +++++++++++++++++++++++++++++++++
|
|
include/usb/xhci.h | 2 ++
|
|
3 files changed, 37 insertions(+)
|
|
|
|
diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c
|
|
index f446520528..108f4bd8cf 100644
|
|
--- a/drivers/usb/host/xhci-mem.c
|
|
+++ b/drivers/usb/host/xhci-mem.c
|
|
@@ -180,6 +180,8 @@ void xhci_cleanup(struct xhci_ctrl *ctrl)
|
|
xhci_free_virt_devices(ctrl);
|
|
free(ctrl->erst.entries);
|
|
free(ctrl->dcbaa);
|
|
+ if (reset_valid(&ctrl->reset))
|
|
+ reset_free(&ctrl->reset);
|
|
memset(ctrl, '\0', sizeof(struct xhci_ctrl));
|
|
}
|
|
|
|
diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c
|
|
index ebd2954571..03b41cc855 100644
|
|
--- a/drivers/usb/host/xhci.c
|
|
+++ b/drivers/usb/host/xhci.c
|
|
@@ -190,6 +190,35 @@ static int xhci_start(struct xhci_hcor *hcor)
|
|
return ret;
|
|
}
|
|
|
|
+/**
|
|
+ * Resets XHCI Hardware
|
|
+ *
|
|
+ * @param ctrl pointer to host controller
|
|
+ * @return 0 if OK, or a negative error code.
|
|
+ */
|
|
+static int xhci_reset_hw(struct xhci_ctrl *ctrl)
|
|
+{
|
|
+ int ret;
|
|
+
|
|
+ ret = reset_get_by_index(ctrl->dev, 0, &ctrl->reset);
|
|
+ if (ret && ret != -ENOENT) {
|
|
+ dev_err(ctrl->dev, "failed to get reset\n");
|
|
+ return ret;
|
|
+ }
|
|
+
|
|
+ if (reset_valid(&ctrl->reset)) {
|
|
+ ret = reset_assert(&ctrl->reset);
|
|
+ if (ret)
|
|
+ return ret;
|
|
+
|
|
+ ret = reset_deassert(&ctrl->reset);
|
|
+ if (ret)
|
|
+ return ret;
|
|
+ }
|
|
+
|
|
+ return 0;
|
|
+}
|
|
+
|
|
/**
|
|
* Resets the XHCI Controller
|
|
*
|
|
@@ -1508,6 +1537,10 @@ int xhci_register(struct udevice *dev, struct xhci_hccr *hccr,
|
|
|
|
ctrl->dev = dev;
|
|
|
|
+ ret = xhci_reset_hw(ctrl);
|
|
+ if (ret)
|
|
+ goto err;
|
|
+
|
|
/*
|
|
* XHCI needs to issue a Address device command to setup
|
|
* proper device context structures, before it can interact
|
|
diff --git a/include/usb/xhci.h b/include/usb/xhci.h
|
|
index 1170c0ac69..7d34103fd5 100644
|
|
--- a/include/usb/xhci.h
|
|
+++ b/include/usb/xhci.h
|
|
@@ -16,6 +16,7 @@
|
|
#ifndef HOST_XHCI_H_
|
|
#define HOST_XHCI_H_
|
|
|
|
+#include <reset.h>
|
|
#include <asm/types.h>
|
|
#include <asm/cache.h>
|
|
#include <asm/io.h>
|
|
@@ -1209,6 +1210,7 @@ struct xhci_ctrl {
|
|
#if CONFIG_IS_ENABLED(DM_USB)
|
|
struct udevice *dev;
|
|
#endif
|
|
+ struct reset_ctl reset;
|
|
struct xhci_hccr *hccr; /* R/O registers, not need for volatile */
|
|
struct xhci_hcor *hcor;
|
|
struct xhci_doorbell_array *dba;
|