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uboot-tools/sunxi-A83T-improvements.patch

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From patchwork Fri Sep 22 07:26:27 2017
Content-Type: text/plain; charset="utf-8"
MIME-Version: 1.0
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Subject: [U-Boot,1/9] sunxi: rename Bananapi M3 dts file name
X-Patchwork-Submitter: Chen-Yu Tsai <wens@csie.org>
X-Patchwork-Id: 817346
X-Patchwork-Delegate: jagannadh.teki@gmail.com
Message-Id: <20170922072635.32105-2-wens@csie.org>
To: u-boot@lists.denx.de
Cc: Joe Hershberger <joe.hershberger@ni.com>, Jagan Teki <jagan@openedev.com>,
Maxime Ripard <maxime.ripard@free-electrons.com>
Date: Fri, 22 Sep 2017 15:26:27 +0800
From: Chen-Yu Tsai <wens@csie.org>
List-Id: U-Boot discussion <u-boot.lists.denx.de>
The upstream (Linux) device tree file for the Bananapi M3 follows the
convention of using the well known brand name, instead of the vendor
name, for naming. The file was recently added to upstream in commit
359b5a1e1c2d ("ARM: sun8i: a83t: Add device tree for Sinovoip Bananapi
BPI-M3")
Rename the device tree file in U-boot to match.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
arch/arm/dts/Makefile | 4 ++--
.../{sun8i-a83t-sinovoip-bpi-m3.dts => sun8i-a83t-bananapi-m3.dts} | 0
configs/Sinovoip_BPI_M3_defconfig | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
rename arch/arm/dts/{sun8i-a83t-sinovoip-bpi-m3.dts => sun8i-a83t-bananapi-m3.dts} (100%)
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 762429c463d1..b7550104c340 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -307,8 +307,8 @@ dtb-$(CONFIG_MACH_SUN8I_A33) += \
sun8i-r16-parrot.dtb
dtb-$(CONFIG_MACH_SUN8I_A83T) += \
sun8i-a83t-allwinner-h8homlet-v2.dtb \
- sun8i-a83t-cubietruck-plus.dtb \
- sun8i-a83t-sinovoip-bpi-m3.dtb
+ sun8i-a83t-bananapi-m3.dtb \
+ sun8i-a83t-cubietruck-plus.dtb
dtb-$(CONFIG_MACH_SUN8I_H3) += \
sun8i-h2-plus-orangepi-zero.dtb \
sun8i-h3-bananapi-m2-plus.dtb \
diff --git a/arch/arm/dts/sun8i-a83t-sinovoip-bpi-m3.dts b/arch/arm/dts/sun8i-a83t-bananapi-m3.dts
similarity index 100%
rename from arch/arm/dts/sun8i-a83t-sinovoip-bpi-m3.dts
rename to arch/arm/dts/sun8i-a83t-bananapi-m3.dts
diff --git a/configs/Sinovoip_BPI_M3_defconfig b/configs/Sinovoip_BPI_M3_defconfig
index 04d81693ebd8..f321d94e04eb 100644
--- a/configs/Sinovoip_BPI_M3_defconfig
+++ b/configs/Sinovoip_BPI_M3_defconfig
@@ -13,7 +13,7 @@ CONFIG_USB0_ID_DET="PH11"
CONFIG_USB1_VBUS_PIN="PD24"
CONFIG_AXP_GPIO=y
CONFIG_SATAPWR="PD25"
-CONFIG_DEFAULT_DEVICE_TREE="sun8i-a83t-sinovoip-bpi-m3"
+CONFIG_DEFAULT_DEVICE_TREE="sun8i-a83t-bananapi-m3"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_CONSOLE_MUX=y
CONFIG_SPL=y
From patchwork Fri Sep 22 07:26:28 2017
Content-Type: text/plain; charset="utf-8"
MIME-Version: 1.0
Content-Transfer-Encoding: 7bit
Subject: [U-Boot,2/9] sunxi: Enable eMMC on Cubietruck Plus
X-Patchwork-Submitter: Chen-Yu Tsai <wens@csie.org>
X-Patchwork-Id: 817342
X-Patchwork-Delegate: jagannadh.teki@gmail.com
Message-Id: <20170922072635.32105-3-wens@csie.org>
To: u-boot@lists.denx.de
Cc: Joe Hershberger <joe.hershberger@ni.com>, Jagan Teki <jagan@openedev.com>,
Maxime Ripard <maxime.ripard@free-electrons.com>
Date: Fri, 22 Sep 2017 15:26:28 +0800
From: Chen-Yu Tsai <wens@csie.org>
List-Id: U-Boot discussion <u-boot.lists.denx.de>
Set CONFIG_MMC_SUNXI_SLOT_EXTRA=2 to enable the eMMC controller to
access eMMC on the board.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
configs/Cubietruck_plus_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/Cubietruck_plus_defconfig b/configs/Cubietruck_plus_defconfig
index 34444ec0bd09..3d999192cbc1 100644
--- a/configs/Cubietruck_plus_defconfig
+++ b/configs/Cubietruck_plus_defconfig
@@ -4,6 +4,7 @@ CONFIG_MACH_SUN8I_A83T=y
CONFIG_DRAM_CLK=672
CONFIG_DRAM_ZQ=15355
CONFIG_DRAM_ODT_EN=y
+CONFIG_MMC_SUNXI_SLOT_EXTRA=2
CONFIG_USB0_VBUS_PIN="AXP0-VBUS-ENABLE"
CONFIG_USB0_VBUS_DET="AXP0-VBUS-DETECT"
CONFIG_USB0_ID_DET="PH11"
From patchwork Fri Sep 22 07:26:29 2017
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MIME-Version: 1.0
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Subject: [U-Boot,3/9] sunxi: Fix USB PHY control register offset for A83T
X-Patchwork-Submitter: Chen-Yu Tsai <wens@csie.org>
X-Patchwork-Id: 817341
X-Patchwork-Delegate: jagannadh.teki@gmail.com
Message-Id: <20170922072635.32105-4-wens@csie.org>
To: u-boot@lists.denx.de
Cc: Joe Hershberger <joe.hershberger@ni.com>, Jagan Teki <jagan@openedev.com>,
Maxime Ripard <maxime.ripard@free-electrons.com>
Date: Fri, 22 Sep 2017 15:26:29 +0800
From: Chen-Yu Tsai <wens@csie.org>
List-Id: U-Boot discussion <u-boot.lists.denx.de>
It was recently discovered that the USB PHY control register offset on
the A83T is 0x410 like on the A33, not 0x404. Fix it.
Fixes: 0c935acb9e5d ("sunxi: usb_phy: Add support for A83T USB PHYs")
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
arch/arm/mach-sunxi/usb_phy.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-sunxi/usb_phy.c b/arch/arm/mach-sunxi/usb_phy.c
index 9bf0b5633d4a..3fbef0050e3f 100644
--- a/arch/arm/mach-sunxi/usb_phy.c
+++ b/arch/arm/mach-sunxi/usb_phy.c
@@ -19,7 +19,7 @@
#include <errno.h>
#define SUNXI_USB_PMU_IRQ_ENABLE 0x800
-#ifdef CONFIG_MACH_SUN8I_A33
+#if defined CONFIG_MACH_SUN8I_A33 || defined CONFIG_MACH_SUN8I_A83T
#define SUNXI_USB_CSR 0x410
#else
#define SUNXI_USB_CSR 0x404
From patchwork Fri Sep 22 07:26:30 2017
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MIME-Version: 1.0
Content-Transfer-Encoding: 7bit
Subject: [U-Boot,4/9] sunxi: Switch MUSB to gadget mode on the Bananapi M3
X-Patchwork-Submitter: Chen-Yu Tsai <wens@csie.org>
X-Patchwork-Id: 817348
X-Patchwork-Delegate: jagannadh.teki@gmail.com
Message-Id: <20170922072635.32105-5-wens@csie.org>
To: u-boot@lists.denx.de
Cc: Joe Hershberger <joe.hershberger@ni.com>, Jagan Teki <jagan@openedev.com>,
Maxime Ripard <maxime.ripard@free-electrons.com>
Date: Fri, 22 Sep 2017 15:26:30 +0800
From: Chen-Yu Tsai <wens@csie.org>
List-Id: U-Boot discussion <u-boot.lists.denx.de>
The Bananapi M3 has a micro-USB OTG port. It supports both host and
gadget mode. Having the OTG port operate in gadget mode is more useful,
as we can use it for fastboot or Ethernet over USB.
The board has 2 other USB host ports that are supported. These can be
used for connecting peripherals.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
configs/Sinovoip_BPI_M3_defconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/configs/Sinovoip_BPI_M3_defconfig b/configs/Sinovoip_BPI_M3_defconfig
index f321d94e04eb..e48983fc3310 100644
--- a/configs/Sinovoip_BPI_M3_defconfig
+++ b/configs/Sinovoip_BPI_M3_defconfig
@@ -27,5 +27,5 @@ CONFIG_AXP_DCDC5_VOLT=1200
CONFIG_AXP_DLDO3_VOLT=2500
CONFIG_AXP_SW_ON=y
CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_MUSB_HOST=y
+CONFIG_USB_MUSB_GADGET=y
CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
From patchwork Fri Sep 22 07:26:31 2017
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MIME-Version: 1.0
Content-Transfer-Encoding: 7bit
Subject: [U-Boot, 5/9] sunxi: Switch MUSB to gadget mode on the Cubietruck Plus
X-Patchwork-Submitter: Chen-Yu Tsai <wens@csie.org>
X-Patchwork-Id: 817344
X-Patchwork-Delegate: jagannadh.teki@gmail.com
Message-Id: <20170922072635.32105-6-wens@csie.org>
To: u-boot@lists.denx.de
Cc: Joe Hershberger <joe.hershberger@ni.com>, Jagan Teki <jagan@openedev.com>,
Maxime Ripard <maxime.ripard@free-electrons.com>
Date: Fri, 22 Sep 2017 15:26:31 +0800
From: Chen-Yu Tsai <wens@csie.org>
List-Id: U-Boot discussion <u-boot.lists.denx.de>
The Cubietruck Plus has a micro-USB OTG port. It supports both host and
gadget mode. Having the OTG port operate in gadget mode is more useful,
as we can use it for fastboot or Ethernet over USB.
The board has 2 other USB host ports that are supported. These can be
used for connecting peripherals.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
configs/Cubietruck_plus_defconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/configs/Cubietruck_plus_defconfig b/configs/Cubietruck_plus_defconfig
index 3d999192cbc1..3aefcc58413c 100644
--- a/configs/Cubietruck_plus_defconfig
+++ b/configs/Cubietruck_plus_defconfig
@@ -26,5 +26,5 @@ CONFIG_AXP_DLDO3_VOLT=2500
CONFIG_AXP_DLDO4_VOLT=3300
CONFIG_AXP_FLDO1_VOLT=1200
CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_MUSB_HOST=y
+CONFIG_USB_MUSB_GADGET=y
CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
From patchwork Fri Sep 22 07:26:32 2017
Content-Type: text/plain; charset="utf-8"
MIME-Version: 1.0
Content-Transfer-Encoding: 7bit
Subject: [U-Boot,6/9] net: sun8i_emac: Support RX/TX delay chains
X-Patchwork-Submitter: Chen-Yu Tsai <wens@csie.org>
X-Patchwork-Id: 817350
X-Patchwork-Delegate: jagannadh.teki@gmail.com
Message-Id: <20170922072635.32105-7-wens@csie.org>
To: u-boot@lists.denx.de
Cc: Joe Hershberger <joe.hershberger@ni.com>, Jagan Teki <jagan@openedev.com>,
Maxime Ripard <maxime.ripard@free-electrons.com>
Date: Fri, 22 Sep 2017 15:26:32 +0800
From: Chen-Yu Tsai <wens@csie.org>
List-Id: U-Boot discussion <u-boot.lists.denx.de>
The EMAC syscon has configurable RX/TX delay chains for use with RGMII
PHYs.
This adds support for configuring them via device tree properties. The
property names and format were defined in Linux's dwmac-sun8i binding
that was merged at one point.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
drivers/net/sun8i_emac.c | 25 +++++++++++++++++++++++++
1 file changed, 25 insertions(+)
diff --git a/drivers/net/sun8i_emac.c b/drivers/net/sun8i_emac.c
index 09bbb2cdb5ca..5fa1b4c170d7 100644
--- a/drivers/net/sun8i_emac.c
+++ b/drivers/net/sun8i_emac.c
@@ -56,6 +56,10 @@
#define H3_EPHY_SELECT BIT(15) /* 1: internal PHY, 0: external PHY */
#define SC_RMII_EN BIT(13)
+#define SC_TXDC_SHIFT 10
+#define SC_TXDC_MASK GENMASK(2, 0)
+#define SC_RXDC_SHIFT 5
+#define SC_RXDC_MASK GENMASK(4, 0)
#define SC_EPIT BIT(2) /* 1: RGMII, 0: MII */
#define SC_ETCS_MASK GENMASK(1, 0)
#define SC_ETCS_EXT_GMII 0x1
@@ -125,6 +129,8 @@ struct emac_eth_dev {
u32 addr;
u32 tx_slot;
bool use_internal_phy;
+ u32 tx_delay;
+ u32 rx_delay;
enum emac_variant variant;
void *mac_reg;
@@ -290,6 +296,12 @@ static int sun8i_emac_set_syscon(struct emac_eth_dev *priv)
if (priv->variant == H3_EMAC || priv->variant == A64_EMAC)
reg &= ~SC_RMII_EN;
+ /* Configure RX/TX delay chains */
+ reg &= ~(SC_RXDC_MASK << SC_RXDC_SHIFT);
+ reg &= ~(SC_TXDC_MASK << SC_TXDC_SHIFT);
+ reg |= (priv->rx_delay & SC_RXDC_MASK) << SC_RXDC_SHIFT;
+ reg |= (priv->tx_delay & SC_TXDC_MASK) << SC_TXDC_SHIFT;
+
switch (priv->interface) {
case PHY_INTERFACE_MODE_MII:
/* default */
@@ -836,6 +848,19 @@ static int sun8i_emac_eth_ofdata_to_platdata(struct udevice *dev)
}
#endif
+ /* Get RX/TX delays for RGMII */
+ priv->rx_delay = fdtdec_get_uint(gd->fdt_blob, dev_of_offset(dev),
+ "allwinner,rx-delay-ps", 0);
+ if (priv->rx_delay % 100 || priv->rx_delay > 3100)
+ debug("%s: invalid rx delay value\n", __func__);
+ priv->rx_delay /= 100;
+
+ priv->tx_delay = fdtdec_get_uint(gd->fdt_blob, dev_of_offset(dev),
+ "allwinner,tx-delay-ps", 0);
+ if (priv->tx_delay % 100 || priv->tx_delay > 800)
+ debug("%s: invalid tx delay value\n", __func__);
+ priv->tx_delay /= 100;
+
return 0;
}
From patchwork Fri Sep 22 07:26:33 2017
Content-Type: text/plain; charset="utf-8"
MIME-Version: 1.0
Content-Transfer-Encoding: 7bit
Subject: [U-Boot,7/9] net: sun8i_emac: Fix build for non-H3/H5 SoCs
X-Patchwork-Submitter: Chen-Yu Tsai <wens@csie.org>
X-Patchwork-Id: 817349
X-Patchwork-Delegate: jagannadh.teki@gmail.com
Message-Id: <20170922072635.32105-8-wens@csie.org>
To: u-boot@lists.denx.de
Cc: Joe Hershberger <joe.hershberger@ni.com>, Jagan Teki <jagan@openedev.com>,
Maxime Ripard <maxime.ripard@free-electrons.com>
Date: Fri, 22 Sep 2017 15:26:33 +0800
From: Chen-Yu Tsai <wens@csie.org>
List-Id: U-Boot discussion <u-boot.lists.denx.de>
Only the H3/H5 SoCs have an internal PHY and its related clock and
reset controls.
Use an #ifdef to guard the internal PHY control code block so it
can be built for other SoCs, such as the A83T or A64.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
---
drivers/net/sun8i_emac.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/net/sun8i_emac.c b/drivers/net/sun8i_emac.c
index 5fa1b4c170d7..0a98a04967da 100644
--- a/drivers/net/sun8i_emac.c
+++ b/drivers/net/sun8i_emac.c
@@ -616,6 +616,8 @@ static void sun8i_emac_board_setup(struct emac_eth_dev *priv)
{
struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
+#ifdef CONFIG_MACH_SUNXI_H3_H5
+ /* Only H3/H5 have clock controls for internal EPHY */
if (priv->use_internal_phy) {
/* Set clock gating for ephy */
setbits_le32(&ccm->bus_gate4, BIT(AHB_GATE_OFFSET_EPHY));
@@ -623,6 +625,7 @@ static void sun8i_emac_board_setup(struct emac_eth_dev *priv)
/* Deassert EPHY */
setbits_le32(&ccm->ahb_reset2_cfg, BIT(AHB_RESET_OFFSET_EPHY));
}
+#endif
/* Set clock gating for emac */
setbits_le32(&ccm->ahb_gate0, BIT(AHB_GATE_OFFSET_GMAC));
From patchwork Fri Sep 22 07:26:34 2017
Content-Type: text/plain; charset="utf-8"
MIME-Version: 1.0
Content-Transfer-Encoding: 7bit
Subject: [U-Boot,8/9] sunxi: Enable EMAC on the Cubietruck Plus
X-Patchwork-Submitter: Chen-Yu Tsai <wens@csie.org>
X-Patchwork-Id: 817345
X-Patchwork-Delegate: jagannadh.teki@gmail.com
Message-Id: <20170922072635.32105-9-wens@csie.org>
To: u-boot@lists.denx.de
Cc: Joe Hershberger <joe.hershberger@ni.com>, Jagan Teki <jagan@openedev.com>,
Maxime Ripard <maxime.ripard@free-electrons.com>
Date: Fri, 22 Sep 2017 15:26:34 +0800
From: Chen-Yu Tsai <wens@csie.org>
List-Id: U-Boot discussion <u-boot.lists.denx.de>
The Cubietruck Plus has an RTL8211E PHY connected to the EMAC using
RGMII. The PHY is powered by DLDO4 @ 3.3V, while the I/O pins are
powered by DLDO3 @ 2.5V.
This patch adds a U-boot specific dtsi file for the board adding
an enabled EMAC node, and enables the EMAC driver in the defconfig.
The binding used here is the old revision currently supported in
U-boot. There is no stable binding nor support in upstream Linux
at this time.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
.../arm/dts/sun8i-a83t-cubietruck-plus-u-boot.dtsi | 39 ++++++++++++++++++++++
configs/Cubietruck_plus_defconfig | 1 +
2 files changed, 40 insertions(+)
create mode 100644 arch/arm/dts/sun8i-a83t-cubietruck-plus-u-boot.dtsi
diff --git a/arch/arm/dts/sun8i-a83t-cubietruck-plus-u-boot.dtsi b/arch/arm/dts/sun8i-a83t-cubietruck-plus-u-boot.dtsi
new file mode 100644
index 000000000000..b4e216c14264
--- /dev/null
+++ b/arch/arm/dts/sun8i-a83t-cubietruck-plus-u-boot.dtsi
@@ -0,0 +1,39 @@
+#include "sunxi-u-boot.dtsi"
+
+/ {
+ aliases {
+ ethernet0 = &emac;
+ };
+
+ soc {
+ emac: ethernet@01c30000 {
+ compatible = "allwinner,sun8i-a83t-emac";
+ reg = <0x01c30000 0x2000>, <0x01c00030 0x4>;
+ reg-names = "emac", "syscon";
+ interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&rgmii_pins>;
+ phy-mode = "rgmii";
+ phy = <&phy1>;
+ status = "okay";
+
+ phy1: ethernet-phy@1 {
+ reg = <1>;
+ };
+ };
+ };
+};
+
+&pio {
+ rgmii_pins: rgmii_pins {
+ allwinner,pins = "PD8", "PD9", "PD10", "PD11",
+ "PD12", "PD13", "PD15",
+ "PD16", "PD17", "PD18", "PD19",
+ "PD20", "PD21", "PD22", "PD23";
+ allwinner,function = "emac";
+ allwinner,drive = <3>;
+ allwinner,pull = <0>;
+ };
+};
diff --git a/configs/Cubietruck_plus_defconfig b/configs/Cubietruck_plus_defconfig
index 3aefcc58413c..ee8b901d0d08 100644
--- a/configs/Cubietruck_plus_defconfig
+++ b/configs/Cubietruck_plus_defconfig
@@ -22,6 +22,7 @@ CONFIG_SPL=y
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_SUN8I_EMAC=y
CONFIG_AXP_DLDO3_VOLT=2500
CONFIG_AXP_DLDO4_VOLT=3300
CONFIG_AXP_FLDO1_VOLT=1200
From patchwork Fri Sep 22 07:26:35 2017
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MIME-Version: 1.0
Content-Transfer-Encoding: 7bit
Subject: [U-Boot,9/9] sunxi: Enable EMAC on the Bananapi M3
X-Patchwork-Submitter: Chen-Yu Tsai <wens@csie.org>
X-Patchwork-Id: 817347
X-Patchwork-Delegate: jagannadh.teki@gmail.com
Message-Id: <20170922072635.32105-10-wens@csie.org>
To: u-boot@lists.denx.de
Cc: Joe Hershberger <joe.hershberger@ni.com>, Jagan Teki <jagan@openedev.com>,
Maxime Ripard <maxime.ripard@free-electrons.com>
Date: Fri, 22 Sep 2017 15:26:35 +0800
From: Chen-Yu Tsai <wens@csie.org>
List-Id: U-Boot discussion <u-boot.lists.denx.de>
The Bananapi M3 has an RTL8211E PHY connected to the EMAC using
RGMII. The PHY is powered by DCDC1 through SW @ 3.3V.
This patch adds a U-boot specific dtsi file for the board adding
an enabled EMAC node, and enables the EMAC driver in the defconfig.
The binding used here is the old revision currently supported in
U-boot. There is no stable binding nor support in upstream Linux
at this time.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
arch/arm/dts/sun8i-a83t-bananapi-m3-u-boot.dtsi | 41 +++++++++++++++++++++++++
configs/Sinovoip_BPI_M3_defconfig | 1 +
2 files changed, 42 insertions(+)
create mode 100644 arch/arm/dts/sun8i-a83t-bananapi-m3-u-boot.dtsi
diff --git a/arch/arm/dts/sun8i-a83t-bananapi-m3-u-boot.dtsi b/arch/arm/dts/sun8i-a83t-bananapi-m3-u-boot.dtsi
new file mode 100644
index 000000000000..9c7977e67b92
--- /dev/null
+++ b/arch/arm/dts/sun8i-a83t-bananapi-m3-u-boot.dtsi
@@ -0,0 +1,41 @@
+#include "sunxi-u-boot.dtsi"
+
+/ {
+ aliases {
+ ethernet0 = &emac;
+ };
+
+ soc {
+ emac: ethernet@01c30000 {
+ compatible = "allwinner,sun8i-a83t-emac";
+ reg = <0x01c30000 0x2000>, <0x01c00030 0x4>;
+ reg-names = "emac", "syscon";
+ interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&rgmii_pins>;
+ phy-mode = "rgmii";
+ phy = <&phy1>;
+ allwinner,rx-delay-ps = <700>;
+ allwinner,tx-delay-ps = <700>;
+ status = "okay";
+
+ phy1: ethernet-phy@1 {
+ reg = <1>;
+ };
+ };
+ };
+};
+
+&pio {
+ rgmii_pins: rgmii_pins {
+ allwinner,pins = "PD8", "PD9", "PD10", "PD11",
+ "PD12", "PD13", "PD15",
+ "PD16", "PD17", "PD18", "PD19",
+ "PD20", "PD21", "PD22", "PD23";
+ allwinner,function = "emac";
+ allwinner,drive = <3>;
+ allwinner,pull = <0>;
+ };
+};
diff --git a/configs/Sinovoip_BPI_M3_defconfig b/configs/Sinovoip_BPI_M3_defconfig
index e48983fc3310..efdf3c7396fd 100644
--- a/configs/Sinovoip_BPI_M3_defconfig
+++ b/configs/Sinovoip_BPI_M3_defconfig
@@ -23,6 +23,7 @@ CONFIG_SPL=y
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_SUN8I_EMAC=y
CONFIG_AXP_DCDC5_VOLT=1200
CONFIG_AXP_DLDO3_VOLT=2500
CONFIG_AXP_SW_ON=y
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