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uboot-tools/rk3399-Rock960-board-support.patch

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From patchwork Tue Aug 21 17:28:16 2018
Content-Type: text/plain; charset="utf-8"
MIME-Version: 1.0
Content-Transfer-Encoding: 7bit
Subject: [U-Boot,v2,1/2] arm: dts: Add Rock960 devicetree support
X-Patchwork-Submitter: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
X-Patchwork-Id: 960637
Message-Id: <20180821172817.26463-2-manivannan.sadhasivam@linaro.org>
To: sjg@chromium.org,
philipp.tomsich@theobroma-systems.com
Cc: tom@vamrs.com, amit.kucheria@linaro.org, dev@vamrs.com,
u-boot@lists.denx.de,
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>,
stephen@vamrs.com
Date: Tue, 21 Aug 2018 22:58:16 +0530
From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
List-Id: U-Boot discussion <u-boot.lists.denx.de>
Add devicetree support for Vamrs Limited Rock960. This board is one of
the 96Boards Consumer Edition platform.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
---
Changes in v2:
* Added missing DTB entry in arch/arm/dts/Makefile
arch/arm/dts/Makefile | 1 +
arch/arm/dts/rk3399-rock960.dts | 348 ++++++++++++++++++++++++++++++++
2 files changed, 349 insertions(+)
create mode 100644 arch/arm/dts/rk3399-rock960.dts
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index ebfa2272627..9b891826b73 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -51,6 +51,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
rk3399-puma-ddr1333.dtb \
rk3399-puma-ddr1600.dtb \
rk3399-puma-ddr1866.dtb \
+ rk3399-rock960.dtb \
rv1108-evb.dtb
dtb-$(CONFIG_ARCH_MESON) += \
meson-gxbb-nanopi-k2.dtb \
diff --git a/arch/arm/dts/rk3399-rock960.dts b/arch/arm/dts/rk3399-rock960.dts
new file mode 100644
index 00000000000..8662548e642
--- /dev/null
+++ b/arch/arm/dts/rk3399-rock960.dts
@@ -0,0 +1,348 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018 Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
+ */
+
+/dts-v1/;
+#include <dt-bindings/pwm/pwm.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+#include "rk3399.dtsi"
+#include "rk3399-sdram-lpddr3-4GB-1600.dtsi"
+
+/ {
+ model = "Vamrs Limited Rock960 96Board";
+ compatible = "rockchip,rk3399-rock960", "rockchip,rk3399";
+
+ chosen {
+ stdout-path = &uart2;
+ u-boot,spl-boot-order = \
+ &sdhci, &sdmmc;
+ };
+
+ vccsys: vccsys {
+ compatible = "regulator-fixed";
+ regulator-name = "vccsys";
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ vcc3v3_sys: vcc3v3-sys {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3_sys";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ vcc5v0_sys: vcc5v0-sys {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_sys";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ };
+
+ vcc5v0_usb: vcc5v0-usb {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_usb";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ };
+
+ vcc5v0_host0: vcc5v0-host0-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_host0";
+ gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
+ };
+
+ vcc5v0_host1: vcc5v0-host1-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_host1";
+ gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
+ };
+
+ vcc5v0_host2: vcc5v0-host2-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_host2";
+ gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
+ };
+
+ vbus_typec: vbus-typec-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vbus_typec";
+ gpio = <&gpio1 3 GPIO_ACTIVE_HIGH>;
+ };
+
+ vdd_log: vdd-log {
+ compatible = "pwm-regulator";
+ pwms = <&pwm2 0 25000 1>;
+ regulator-name = "vdd_log";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <1400000>;
+ regulator-init-microvolt = <900000>;
+ };
+};
+
+&emmc_phy {
+ status = "okay";
+};
+
+&pwm0 {
+ status = "okay";
+};
+
+&pwm2 {
+ status = "okay";
+};
+
+&pwm3 {
+ status = "okay";
+};
+
+&saradc {
+ status = "okay";
+};
+
+&sdmmc {
+ u-boot,dm-pre-reloc;
+ bus-width = <4>;
+ status = "okay";
+};
+
+&sdhci {
+ bus-width = <8>;
+ mmc-hs400-1_8v;
+ mmc-hs400-enhanced-strobe;
+ non-removable;
+ status = "okay";
+};
+
+&uart2 {
+ status = "okay";
+};
+
+&i2c0 {
+ status = "okay";
+ clock-frequency = <400000>;
+ i2c-scl-falling-time-ns = <50>;
+ i2c-scl-rising-time-ns = <100>;
+ u-boot,dm-pre-reloc;
+
+ rk808: pmic@1b {
+ compatible = "rockchip,rk808";
+ reg = <0x1b>;
+ interrupt-parent = <&gpio1>;
+ interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
+ #clock-cells = <1>;
+ clock-output-names = "rtc_clko_soc", "rtc_clko_wifi";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pmic_int_l>;
+ rockchip,system-power-controller;
+ wakeup-source;
+
+ vcc1-supply = <&vcc5v0_sys>;
+ vcc2-supply = <&vcc5v0_sys>;
+ vcc3-supply = <&vcc5v0_sys>;
+ vcc4-supply = <&vcc5v0_sys>;
+ vcc6-supply = <&vcc5v0_sys>;
+ vcc7-supply = <&vcc5v0_sys>;
+ vcc8-supply = <&vcc5v0_sys>;
+ vcc9-supply = <&vcc5v0_sys>;
+ vcc10-supply = <&vcc5v0_sys>;
+ vcc11-supply = <&vcc5v0_sys>;
+ vcc12-supply = <&vcc3v3_sys>;
+ vcc13-supply = <&vcc5v0_sys>;
+ vcc14-supply = <&vcc5v0_sys>;
+ vddio-supply = <&vcc_1v8>;
+
+ regulators {
+ vdd_center: DCDC_REG1 {
+ regulator-name = "vdd_center";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <750000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-ramp-delay = <6001>;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_cpu_l: DCDC_REG2 {
+ regulator-name = "vdd_cpu_l";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <750000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-ramp-delay = <6001>;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_ddr: DCDC_REG3 {
+ regulator-name = "vcc_ddr";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ vcc_1v8: DCDC_REG4 {
+ regulator-name = "vcc_1v8";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ vcc1v8_dvp: LDO_REG1 {
+ regulator-name = "vcc1v8_dvp";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcca1v8_hdmi: LDO_REG2 {
+ regulator-name = "vcca1v8_hdmi";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcca_1v8: LDO_REG3 {
+ regulator-name = "vcca_1v8";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ vcc_sdio: LDO_REG4 {
+ regulator-name = "vcc_sdio";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <3000000>;
+ };
+ };
+
+ vcca1v8_mipi: LDO_REG5 {
+ regulator-name = "vcca1v8_mipi";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_1v5: LDO_REG6 {
+ regulator-name = "vcc_1v5";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1500000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1500000>;
+ };
+ };
+
+ vcca0v9_hdmi: LDO_REG7 {
+ regulator-name = "vcca0v9_hdmi";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <900000>;
+ regulator-max-microvolt = <900000>;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_3v0: LDO_REG8 {
+ regulator-name = "vcc_3v0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <3000000>;
+ };
+ };
+ };
+ };
+
+ vdd_cpu_b: regulator@40 {
+ compatible = "silergy,syr827";
+ reg = <0x40>;
+ fcs,suspend-voltage-selector = <0>;
+ regulator-name = "vdd_cpu_b";
+ regulator-min-microvolt = <712500>;
+ regulator-max-microvolt = <1500000>;
+ regulator-ramp-delay = <1000>;
+ regulator-always-on;
+ regulator-boot-on;
+ vin-supply = <&vcc5v0_sys>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_gpu: regulator@41 {
+ compatible = "silergy,syr828";
+ reg = <0x41>;
+ fcs,suspend-voltage-selector = <1>;
+ regulator-name = "vdd_gpu";
+ regulator-min-microvolt = <712500>;
+ regulator-max-microvolt = <1500000>;
+ regulator-ramp-delay = <1000>;
+ regulator-always-on;
+ regulator-boot-on;
+ vin-supply = <&vcc5v0_sys>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+};
+
+&pinctrl {
+ pmic {
+ pmic_int_l: pmic-int-l {
+ rockchip,pins =
+ <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+};
From patchwork Tue Aug 21 17:28:17 2018
Content-Type: text/plain; charset="utf-8"
MIME-Version: 1.0
Content-Transfer-Encoding: 7bit
Subject: [U-Boot,v2,2/2] board: Add Vamrs Limited Rock960 board support
X-Patchwork-Submitter: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
X-Patchwork-Id: 960641
Message-Id: <20180821172817.26463-3-manivannan.sadhasivam@linaro.org>
To: sjg@chromium.org,
philipp.tomsich@theobroma-systems.com
Cc: tom@vamrs.com, amit.kucheria@linaro.org, dev@vamrs.com,
u-boot@lists.denx.de,
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>,
stephen@vamrs.com
Date: Tue, 21 Aug 2018 22:58:17 +0530
From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
List-Id: U-Boot discussion <u-boot.lists.denx.de>
Add board support for Vamrs Limited Rock960 board, which is
one of the 96Boards Consumer Edition platform.
Rock960 features:
* CPU: ARMv8 64bit Big-Little architecture,
* Big: dual-core Cortex-A72
* Little: quad-core Cortex-A53
* IRAM: 200KB
* DRAM: 2GB/4GB LPDDR3 @ 1866MHz
* eMMC: 16/32GB eMMC 5.1
* PMU: RK808
* SD/MMC
* USB:
* 1x USB 3.0 type A, 1x USB 2.0 type A (host mode only) and
1x USB 3.0 type C OTG
* Display:
* 1x HDMI 2.0(Type A - full) up to 4Kx2K@60Hz,
1x 4L - MIPI DSI up to 1080p@60Hz,
1x DP 1.2(Type C) up to 4Kx2K@60
* Camera: 2x 4-lane MIPI CSI
* PCI-E: 4- lane M.2 PCI-E 2.1
* Low Speed Expansion Connector
* High Speed Expansion Connector
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
---
Changes in v2: None
arch/arm/mach-rockchip/rk3399/Kconfig | 16 +++++
board/vamrs/rock960_rk3399/Kconfig | 15 ++++
board/vamrs/rock960_rk3399/MAINTAINERS | 6 ++
board/vamrs/rock960_rk3399/Makefile | 6 ++
board/vamrs/rock960_rk3399/README | 79 +++++++++++++++++++++
board/vamrs/rock960_rk3399/rock960-rk3399.c | 50 +++++++++++++
configs/rock960-rk3399_defconfig | 62 ++++++++++++++++
include/configs/rock960_rk3399.h | 15 ++++
8 files changed, 249 insertions(+)
create mode 100644 board/vamrs/rock960_rk3399/Kconfig
create mode 100644 board/vamrs/rock960_rk3399/MAINTAINERS
create mode 100644 board/vamrs/rock960_rk3399/Makefile
create mode 100644 board/vamrs/rock960_rk3399/README
create mode 100644 board/vamrs/rock960_rk3399/rock960-rk3399.c
create mode 100644 configs/rock960-rk3399_defconfig
create mode 100644 include/configs/rock960_rk3399.h
diff --git a/arch/arm/mach-rockchip/rk3399/Kconfig b/arch/arm/mach-rockchip/rk3399/Kconfig
index 415466a49bb..ce4605187e3 100644
--- a/arch/arm/mach-rockchip/rk3399/Kconfig
+++ b/arch/arm/mach-rockchip/rk3399/Kconfig
@@ -28,6 +28,21 @@ config TARGET_PUMA_RK3399
* HDMI, eDP, MIPI-DSI, MIPI-DSI/CSI and MIPI-CSI
* SPI, I2C, I2S, UART, GPIO, ...
+config TARGET_ROCK960_RK3399
+ bool "Vamrs Limited Rock960 board"
+ help
+ Support for Rock960 board. This board complies with
+ 96Board Consumer Edition Specification.
+
+ Features:
+ * Rockchip RK3399 SoC (2xCortex A72, 4xCortex A53, ARM Mali T860MP4)
+ * 2GiB/4GiB RAM
+ * 16/32GB eMMC, uSD slot
+ * WiFi, Bluetooth
+ * 1x USB 3.0 type A, 1x USB 2.0 type A (host mode only), 1x USB 3.0 type C OTG
+ * HDMI
+ * 20-pin low speed and 40-pin high speed expanders, 6 LED, 3 buttons
+
endchoice
config SYS_SOC
@@ -38,5 +53,6 @@ config SYS_MALLOC_F_LEN
source "board/rockchip/evb_rk3399/Kconfig"
source "board/theobroma-systems/puma_rk3399/Kconfig"
+source "board/vamrs/rock960_rk3399/Kconfig"
endif
diff --git a/board/vamrs/rock960_rk3399/Kconfig b/board/vamrs/rock960_rk3399/Kconfig
new file mode 100644
index 00000000000..cacc53f3780
--- /dev/null
+++ b/board/vamrs/rock960_rk3399/Kconfig
@@ -0,0 +1,15 @@
+if TARGET_ROCK960_RK3399
+
+config SYS_BOARD
+ default "rock960_rk3399"
+
+config SYS_VENDOR
+ default "vamrs"
+
+config SYS_CONFIG_NAME
+ default "rock960_rk3399"
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+ def_bool y
+
+endif
diff --git a/board/vamrs/rock960_rk3399/MAINTAINERS b/board/vamrs/rock960_rk3399/MAINTAINERS
new file mode 100644
index 00000000000..9f3fe75f4fb
--- /dev/null
+++ b/board/vamrs/rock960_rk3399/MAINTAINERS
@@ -0,0 +1,6 @@
+ROCK960-RK3399
+M: Manivannan Sadhasivam manivannan.sadhasivam@linaro.org
+S: Maintained
+F: board/rockchip/rock960_rk3399
+F: include/configs/rock960_rk3399.h
+F: configs/rock960-rk3399_defconfig
diff --git a/board/vamrs/rock960_rk3399/Makefile b/board/vamrs/rock960_rk3399/Makefile
new file mode 100644
index 00000000000..6c3e475b3a8
--- /dev/null
+++ b/board/vamrs/rock960_rk3399/Makefile
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (C) 2018 Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
+#
+
+obj-y += rock960-rk3399.o
diff --git a/board/vamrs/rock960_rk3399/README b/board/vamrs/rock960_rk3399/README
new file mode 100644
index 00000000000..be6b5cd1d34
--- /dev/null
+++ b/board/vamrs/rock960_rk3399/README
@@ -0,0 +1,79 @@
+Introduction
+============
+
+Rock960 is a 96Boards Consumer Edition platform featuring the Rockchip
+RK3399 SoC.
+
+Rock960 features:
+ * CPU: ARMv8 64bit Big-Little architecture,
+ * Big: dual-core Cortex-A72
+ * Little: quad-core Cortex-A53
+ * IRAM: 200KB
+ * DRAM: 2GB/4GB LPDDR3 @ 1866MHz
+ * eMMC: 16/32GB eMMC 5.1
+ * PMU: RK808
+ * SD/MMC
+ * USB:
+ * 1x USB 3.0 type A, 1x USB 2.0 type A (host mode only) and
+ 1x USB 3.0 type C OTG
+ * Display:
+ * 1x HDMI 2.0(Type A - full) up to 4Kx2K@60Hz,
+ 1x 4L - MIPI DSI up to 1080p@60Hz,
+ 1x DP 1.2(Type C) up to 4Kx2K@60
+ * Camera: 2x 4-lane MIPI CSI
+ * PCI-E: 4- lane M.2 PCI-E 2.1
+ * Low Speed Expansion Connector
+ * High Speed Expansion Connector
+
+Here is the step-by-step to boot to U-Boot on rk3399.
+
+Get the Source and prebuild binary
+==================================
+
+ > git clone https://github.com/96rocks/rkbin.git
+ > git clone https://github.com/rockchip-linux/rkdeveloptool.git
+
+Compile the U-Boot
+==================
+
+ > cd ../u-boot
+ > export ARCH=arm64
+ > export CROSS_COMPILE=aarch64-linux-gnu-
+ > make rock960-rk3399_defconfig
+ > make
+
+Compile the rkdeveloptool
+=========================
+ Follow instructions in latest README
+ > cd ../rkdeveloptool
+ > autoreconf -i
+ > ./configure
+ > make
+ > sudo make install
+
+Package the image
+=================
+
+Package the image for Rockchip miniloader
+------------------------------------------
+ > cd ../rkbin
+ > ./tools/loaderimage --pack --uboot u-boot/u-boot-dtb.bin uboot.img 0x200000
+
+ > ../u-boot/tools/mkimage -n rk3399 -T rksd -d rk3399_ddr_933MHz_v1.08.bin idbloader.img
+ > cat ./rk33/rk3399_miniloader_v1.06.bin >> idbloader.img
+
+ Get uboot.img and idbloader.img in this step.
+
+Flash the image to eMMC
+=======================
+
+Flash the image with Rockchip miniloader
+----------------------------------------
+Power on(or reset with RESET KEY) with MASKROM KEY preesed, and then:
+ > rkdeveloptool db ./rk33/rk3399_loader_v1.08.106.bin
+ > rkdeveloptool wl 0x40 idbloader.img
+ > rkdeveloptool wl 0x4000 uboot.img
+ > rkdeveloptool wl 0x6000 ./img/rk3399/trust.img
+ > rkdeveloptool rd
+
+You should be able to get U-Boot log in console/UART2(baurdrate 1500000)
diff --git a/board/vamrs/rock960_rk3399/rock960-rk3399.c b/board/vamrs/rock960_rk3399/rock960-rk3399.c
new file mode 100644
index 00000000000..d3775b22191
--- /dev/null
+++ b/board/vamrs/rock960_rk3399/rock960-rk3399.c
@@ -0,0 +1,50 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018 Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <dm/pinctrl.h>
+#include <dm/uclass-internal.h>
+#include <asm/arch/periph.h>
+#include <power/regulator.h>
+#include <spl.h>
+
+int board_init(void)
+{
+ int ret;
+
+ ret = regulators_enable_boot_on(false);
+ if (ret)
+ debug("%s: Cannot enable boot on regulator\n", __func__);
+
+ return 0;
+}
+
+void spl_board_init(void)
+{
+ struct udevice *pinctrl;
+ int ret;
+
+ ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
+ if (ret) {
+ debug("%s: Cannot find pinctrl device\n", __func__);
+ goto err;
+ }
+
+ /* Enable debug UART */
+ ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_UART_DBG);
+ if (ret) {
+ debug("%s: Failed to set up console UART\n", __func__);
+ goto err;
+ }
+
+ preloader_console_init();
+ return;
+err:
+ printf("%s: Error %d\n", __func__, ret);
+
+ /* No way to report error here */
+ hang();
+}
diff --git a/configs/rock960-rk3399_defconfig b/configs/rock960-rk3399_defconfig
new file mode 100644
index 00000000000..998c7a4b707
--- /dev/null
+++ b/configs/rock960-rk3399_defconfig
@@ -0,0 +1,62 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SYS_TEXT_BASE=0x00200000
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x4000
+CONFIG_ROCKCHIP_RK3399=y
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000
+CONFIG_TARGET_ROCK960_RK3399=y
+CONFIG_DEBUG_UART_BASE=0xFF1A0000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_BAUDRATE=1500000
+CONFIG_SPL_STACK_R_ADDR=0x80000
+CONFIG_DEFAULT_DEVICE_TREE="rk3399-rock960"
+CONFIG_DEBUG_UART=y
+CONFIG_FIT=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rock960.dtb"
+CONFIG_SYS_PROMPT="rock960 => "
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
+CONFIG_SPL_ATF=y
+CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
+CONFIG_CMD_BOOTZ=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_TIME=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_SPL_OF_PLATDATA=y
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
+CONFIG_CLK=y
+CONFIG_SPL_CLK=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_PINCTRL=y
+CONFIG_SPL_PINCTRL=y
+CONFIG_PINCTRL_ROCKCHIP_RK3399=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_RAM=y
+CONFIG_SPL_RAM=y
+CONFIG_SYSRESET=y
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_ERRNO_STR=y
diff --git a/include/configs/rock960_rk3399.h b/include/configs/rock960_rk3399.h
new file mode 100644
index 00000000000..746d24cbff5
--- /dev/null
+++ b/include/configs/rock960_rk3399.h
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2018 Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
+ */
+
+#ifndef __ROCK960_RK3399_H
+#define __ROCK960_RK3399_H
+
+#include <configs/rk3399_common.h>
+
+#define CONFIG_SYS_MMC_ENV_DEV 1
+
+#define SDRAM_BANK_SIZE (2UL << 30)
+
+#endif
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