uboot-tools/zynqmp-Add-support-for-u-bo...

287 lines
10 KiB
Diff

From patchwork Thu Dec 5 08:46:57 2019
Content-Type: text/plain; charset="utf-8"
MIME-Version: 1.0
Content-Transfer-Encoding: 7bit
X-Patchwork-Submitter: Michal Simek <michal.simek@xilinx.com>
X-Patchwork-Id: 1204536
Return-Path: <u-boot-bounces@lists.denx.de>
X-Original-To: incoming@patchwork.ozlabs.org
Delivered-To: patchwork-incoming@bilbo.ozlabs.org
Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized)
smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61;
helo=phobos.denx.de;
envelope-from=u-boot-bounces@lists.denx.de;
receiver=<UNKNOWN>)
Authentication-Results: ozlabs.org;
dmarc=none (p=none dis=none) header.from=xilinx.com
Authentication-Results: ozlabs.org;
dkim=fail reason="signature verification failed" (2048-bit key;
unprotected) header.d=monstr-eu.20150623.gappssmtp.com
header.i=@monstr-eu.20150623.gappssmtp.com
header.b="F7yFmrcr"; dkim-atps=neutral
Received: from phobos.denx.de (phobos.denx.de [85.214.62.61])
(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)
key-exchange X25519 server-signature RSA-PSS (4096 bits))
(No client certificate requested)
by ozlabs.org (Postfix) with ESMTPS id 47T8mj1rxFz9sPT
for <incoming@patchwork.ozlabs.org>;
Thu, 5 Dec 2019 19:59:49 +1100 (AEDT)
Received: by phobos.denx.de (Postfix, from userid 109)
id DC15F81730; Thu, 5 Dec 2019 09:59:15 +0100 (CET)
X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on mail.denx.de
X-Spam-Level:
X-Spam-Status: No, score=-0.8 required=5.0 tests=DKIM_INVALID,DKIM_SIGNED,
MAILING_LIST_MULTI,RCVD_IN_MSPIKE_H2,SPF_HELO_NONE,SPF_PASS,
URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.2
Received: from phobos.denx.de (localhost [IPv6:::1])
by phobos.denx.de (Postfix) with ESMTP id AD3C281702;
Thu, 5 Dec 2019 09:47:37 +0100 (CET)
Authentication-Results: mail.denx.de;
dmarc=none (p=none dis=none) header.from=xilinx.com
Authentication-Results: mail.denx.de;
spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de
Authentication-Results: mail.denx.de;
dkim=fail reason="signature verification failed" (2048-bit key;
unprotected) header.d=monstr-eu.20150623.gappssmtp.com
header.i=@monstr-eu.20150623.gappssmtp.com
header.b="F7yFmrcr"; dkim-atps=neutral
Received: by phobos.denx.de (Postfix, from userid 109)
id EFEE0816D6; Thu, 5 Dec 2019 09:47:35 +0100 (CET)
Received: from mail-wm1-f68.google.com (mail-wm1-f68.google.com
[209.85.128.68])
(using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits))
(No client certificate requested)
by phobos.denx.de (Postfix) with ESMTPS id 13F3481702
for <u-boot@lists.denx.de>; Thu, 5 Dec 2019 09:47:05 +0100 (CET)
Authentication-Results: mail.denx.de;
dmarc=none (p=none dis=none) header.from=xilinx.com
Authentication-Results: mail.denx.de; spf=none smtp.mailfrom=monstr@monstr.eu
Received: by mail-wm1-f68.google.com with SMTP id p9so2672948wmc.2
for <u-boot@lists.denx.de>; Thu, 05 Dec 2019 00:47:05 -0800 (PST)
DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed;
d=monstr-eu.20150623.gappssmtp.com; s=20150623;
h=sender:from:to:cc:subject:date:message-id:mime-version
:content-transfer-encoding;
bh=zKC9njDJvxTe218gXlGDt/iSWcQwlzyEn/MHFrB1GUk=;
b=F7yFmrcrJYGseyeuyhzqQujaDM8FvSqw3O1Pfmlh+SK6+tZ7BLQ6+XIDpi5DQAIzHs
9Oe0co+RlaN+ypuEKw69o+zmaAHwbQoupL2LBoVJkAcVDseWpjatJtapzpyfUVqhfUaw
XRFXuVzSyRx64eELCzcR7Hl5ioK9Q7Y/tjvV07IHac4Uc8N0N/LS66Rj/49Reo4DGIhT
ThR6PDhriY0ANIDa8KnxQpQBiMuSuC4lTz3BuDMM/7LbS4r7Yy89EC+4wwXE4ZzXYAsO
Kykj/rvg7d+BW8O1g3bxbDQVy/5IVDqslArlUH6xZpNOKDxwfLAvkAIvQiV/YJlNC1hQ
f+OQ==
X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed;
d=1e100.net; s=20161025;
h=x-gm-message-state:sender:from:to:cc:subject:date:message-id
:mime-version:content-transfer-encoding;
bh=zKC9njDJvxTe218gXlGDt/iSWcQwlzyEn/MHFrB1GUk=;
b=W2HsrghOni524RBbGxTnERtM2TNSUjmMhNi98cPFIy39d+LzzF1vxLBvF16jtovKsF
DVYBg8lVrIEeaD1/XjcNmN7mk4LdWuwBnhUpAEVSQ3ccrxqMGSAud4vaduMo2czlBNWq
m85KtYJctifHGMThcX9fwwr3+VmZIZ46ZUyXVuGSEqr7lZK/Nrnn7dH+v5hfYR60KhtI
1yxf6vkuoC+Z89WfQGiM2JMCnlmVy7ety6+s6b1PYRyf1FQbt4MmZ4ywRAfSuAtY4NUD
XmDp+8lDrpa08LjlJxBbKqeKS+Eeh2pKDkOwInuxWiLDOgZ7fAT3LG5Uq+1GDGbNfKs9
xtlA==
X-Gm-Message-State: APjAAAUFPoTdro6+fDkKW4xky4+l2r/NtdDEuEaU72qNICk1Wlu+706B
tYlmosjzcX01d6VDfvz1eDIGZy20ca8=
X-Google-Smtp-Source: APXvYqzdmCVgU6CmN6exvPPKe9MZLPRPrinxyPtHvAnw7yyB3wd7uJyGYyFkZXVKepilUtZDhUtjHg==
X-Received: by 2002:a7b:cc0c:: with SMTP id f12mr3835348wmh.5.1575535624294;
Thu, 05 Dec 2019 00:47:04 -0800 (PST)
Received: from localhost (nat-35.starnet.cz. [178.255.168.35])
by smtp.gmail.com with ESMTPSA id
a7sm11805025wrr.50.2019.12.05.00.47.03
(version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256);
Thu, 05 Dec 2019 00:47:03 -0800 (PST)
From: Michal Simek <michal.simek@xilinx.com>
To: u-boot@lists.denx.de,
git@xilinx.com,
pbrobinson@gmail.com
Subject: [PATCH v2] arm64: zynqmp: Add support for u-boot.itb generation with
ATF
Date: Thu, 5 Dec 2019 09:46:57 +0100
Message-Id: <311b20ae349e6a93714c227df5907667d1cb9463.1575535613.git.michal.simek@xilinx.com>
X-Mailer: git-send-email 2.24.0
MIME-Version: 1.0
X-BeenThere: u-boot@lists.denx.de
X-Mailman-Version: 2.1.26
Precedence: list
List-Id: U-Boot discussion <u-boot.lists.denx.de>
List-Unsubscribe: <https://lists.denx.de/options/u-boot>,
<mailto:u-boot-request@lists.denx.de?subject=unsubscribe>
List-Archive: <https://lists.denx.de/pipermail/u-boot/>
List-Post: <mailto:u-boot@lists.denx.de>
List-Help: <mailto:u-boot-request@lists.denx.de?subject=help>
List-Subscribe: <https://lists.denx.de/listinfo/u-boot>,
<mailto:u-boot-request@lists.denx.de?subject=subscribe>
Cc: Marek Vasut <marex@denx.de>, Stefan Roese <sr@denx.de>
Errors-To: u-boot-bounces@lists.denx.de
Sender: "U-Boot" <u-boot-bounces@lists.denx.de>
X-Virus-Scanned: clamav-milter 0.101.4 at mail.denx.de
X-Virus-Status: Clean
Follow i.MX, Sunxi, RISC-V and Rockchip to generate u-boot.itb which
includes U-Boot proper, ATF and DTBs in FIT format. ZynqMP supports FIT for
quite a long time but with using out of tree solution. The patch is filling
this gap.
Tested on zcu102, zcu104 and zcu100/Ultra96.
zcu100/Ultra96 v2.2 ATF build by:
make DEBUG=0 ZYNQMP_CONSOLE=cadence1 RESET_TO_BL31=1 PLAT=zynqmp bl31
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---
Changes in v2:
- Exchange u-boot/atf in config section
- Use default ATF baseaddr from mainline
- Update commit message
Kconfig | 3 +-
arch/arm/mach-zynqmp/mkimage_fit_atf.sh | 99 +++++++++++++++++++++++++
include/configs/xilinx_zynqmp.h | 6 +-
3 files changed, 106 insertions(+), 2 deletions(-)
create mode 100755 arch/arm/mach-zynqmp/mkimage_fit_atf.sh
diff --git a/Kconfig b/Kconfig
index e22417ec4471..7efafffec0a4 100644
--- a/Kconfig
+++ b/Kconfig
@@ -253,7 +253,7 @@ config BUILD_TARGET
default "u-boot-spl.kwb" if ARCH_MVEBU && SPL
default "u-boot-elf.srec" if RCAR_GEN3
default "u-boot.itb" if SPL_LOAD_FIT && (ARCH_ROCKCHIP || \
- ARCH_SUNXI || RISCV)
+ ARCH_SUNXI || RISCV || ARCH_ZYNQMP)
default "u-boot.kwb" if KIRKWOOD
default "u-boot-with-spl.bin" if ARCH_AT91 && SPL_NAND_SUPPORT
default "u-boot-with-spl.imx" if ARCH_MX6 && SPL
@@ -481,6 +481,7 @@ config SPL_FIT_GENERATOR
depends on SPL_FIT
default "board/sunxi/mksunxi_fit_atf.sh" if SPL_LOAD_FIT && ARCH_SUNXI
default "arch/arm/mach-rockchip/make_fit_atf.py" if SPL_LOAD_FIT && ARCH_ROCKCHIP
+ default "arch/arm/mach-zynqmp/mkimage_fit_atf.sh" if SPL_LOAD_FIT && ARCH_ZYNQMP
default "arch/riscv/lib/mkimage_fit_opensbi.sh" if SPL_LOAD_FIT && RISCV
help
Specifies a (platform specific) script file to generate the FIT
diff --git a/arch/arm/mach-zynqmp/mkimage_fit_atf.sh b/arch/arm/mach-zynqmp/mkimage_fit_atf.sh
new file mode 100755
index 000000000000..c50aba45ca5c
--- /dev/null
+++ b/arch/arm/mach-zynqmp/mkimage_fit_atf.sh
@@ -0,0 +1,99 @@
+#!/bin/sh
+# SPDX-License-Identifier: GPL-2.0+
+#
+# script to generate FIT image source for Xilinx ZynqMP boards with
+# ARM Trusted Firmware and multiple device trees (given on the command line)
+#
+# usage: $0 <dt_name> [<dt_name> [<dt_name] ...]
+
+BL33="u-boot-nodtb.bin"
+[ -z "$BL31" ] && BL31="bl31.bin"
+[ -z "$ATF_LOAD_ADDR" ] && ATF_LOAD_ADDR="0xfffea000"
+[ -z "$BL33_LOAD_ADDR" ] && BL33_LOAD_ADDR="0x8000000"
+
+if [ ! -f $BL31 ]; then
+ echo "ERROR: BL31 file $BL31 NOT found" >&2
+else
+ echo "$BL31 size: " >&2
+ ls -lct $BL31 | awk '{print $5}' >&2
+fi
+
+
+
+cat << __HEADER_EOF
+/dts-v1/;
+
+/ {
+ description = "Configuration to load ATF before U-Boot";
+
+ images {
+ uboot {
+ description = "U-Boot (64-bit)";
+ data = /incbin/("$BL33");
+ type = "firmware";
+ os = "u-boot";
+ arch = "arm64";
+ compression = "none";
+ load = <$BL33_LOAD_ADDR>;
+ hash {
+ algo = "md5";
+ };
+ };
+ atf {
+ description = "ARM Trusted Firmware";
+ data = /incbin/("$BL31");
+ type = "firmware";
+ os = "arm-trusted-firmware";
+ arch = "arm64";
+ compression = "none";
+ load = <$ATF_LOAD_ADDR>;
+ entry = <$ATF_LOAD_ADDR>;
+ hash {
+ algo = "md5";
+ };
+ };
+__HEADER_EOF
+
+cnt=1
+for dtname in $*
+do
+ cat << __FDT_IMAGE_EOF
+ fdt_$cnt {
+ description = "$(basename $dtname .dtb)";
+ data = /incbin/("$dtname");
+ type = "flat_dt";
+ arch = "arm64";
+ compression = "none";
+ hash {
+ algo = "md5";
+ };
+ };
+__FDT_IMAGE_EOF
+cnt=$((cnt+1))
+done
+
+cat << __CONF_HEADER_EOF
+ };
+ configurations {
+ default = "config_1";
+
+__CONF_HEADER_EOF
+
+cnt=1
+for dtname in $*
+do
+cat << __CONF_SECTION1_EOF
+ config_$cnt {
+ description = "$(basename $dtname .dtb)";
+ firmware = "atf";
+ loadables = "uboot";
+ fdt = "fdt_$cnt";
+ };
+__CONF_SECTION1_EOF
+cnt=$((cnt+1))
+done
+
+cat << __ITS_EOF
+ };
+};
+__ITS_EOF
diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h
index ee1ceebf1291..e7eb8dbfcb45 100644
--- a/include/configs/xilinx_zynqmp.h
+++ b/include/configs/xilinx_zynqmp.h
@@ -243,7 +243,11 @@
# define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0 /* unused */
# define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0 /* unused */
# define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0 /* unused */
-# define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
+# if defined(CONFIG_SPL_LOAD_FIT)
+# define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.itb"
+# else
+# define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
+# endif
#endif
#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_DFU)