Merge remote-tracking branch 'up/master' into master-riscv64

Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
Fix riscv patches
2020-01-07 10:37:47 +02:00 · 2020-01-02 17:35:57 +02:00 · 2019-12-29 21:20:25 +02:00 · 2019-12-29 20:52:34 +02:00 · 2019-12-28 20:08:05 +02:00 · 2019-12-14 16:36:40 +02:00
28 changed files with 2531 additions and 4393 deletions
--- a/0001-Fix-BeagleAI-detection.patch
+++ b/0001-Fix-BeagleAI-detection.patch
@ -1,29 +0,0 @@
-From 1849ef423238aeb1732eb3b8e67eb46bc21401c7 Mon Sep 17 00:00:00 2001
-From: Peter Robinson <pbrobinson@gmail.com>
-Date: Thu, 10 Sep 2020 14:24:12 +0100
-Subject: [PATCH] Fix BeagleAI detection
-
-Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
---
- board/ti/am57xx/board.c | 4 +++-
- 1 file changed, 3 insertions(+), 1 deletion(-)
-
-diff --git a/board/ti/am57xx/board.c b/board/ti/am57xx/board.c
-index 7809875510..3232812a97 100644
--- a/board/ti/am57xx/board.c
-+++ b/board/ti/am57xx/board.c
-@@ -527,8 +527,10 @@ void do_board_detect(void)
- 
- 	rc = ti_i2c_eeprom_am_get(CONFIG_EEPROM_BUS_ADDRESS,
- 				  CONFIG_EEPROM_CHIP_ADDRESS);
-	if (rc)
-+	if (rc) {
- 		printf("ti_i2c_eeprom_init failed %d\n", rc);
-+		ti_i2c_eeprom_am_set("BBONE-AI", "A");
-+	}
- 
- #ifdef CONFIG_SUPPORT_EMMC_BOOT
- 	rc = board_bootmode_has_emmc();
-- 
-2.26.2
-
--- a/0001-Fixes-for-AllWinner-ethernet-network-interfaces.patch
+++ b/0001-Fixes-for-AllWinner-ethernet-network-interfaces.patch
@ -1,518 +0,0 @@
-From 25ce28126444900b7b3efef36c6b9d15a6ab9af1 Mon Sep 17 00:00:00 2001
-From: Peter Robinson <pbrobinson@gmail.com>
-Date: Wed, 28 Oct 2020 10:08:44 +0000
-Subject: [PATCH] Fixes for AllWinner ethernet network interfaces
-
-The upstream kernel in fixing stuff has broken stuff.
-
-Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
---
- arch/arm/dts/sun50i-a64-bananapi-m64.dts        | 2 +-
- arch/arm/dts/sun50i-a64-nanopi-a64.dts          | 2 +-
- arch/arm/dts/sun50i-a64-oceanic-5205-5inmfd.dts | 2 +-
- arch/arm/dts/sun50i-a64-olinuxino.dts           | 2 +-
- arch/arm/dts/sun50i-a64-orangepi-win.dts        | 2 +-
- arch/arm/dts/sun50i-a64-pine64-plus.dts         | 2 +-
- arch/arm/dts/sun50i-a64-sopine-baseboard.dts    | 2 +-
- arch/arm/dts/sun50i-h5-libretech-all-h5-cc.dts  | 2 +-
- arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts     | 2 +-
- arch/arm/dts/sun50i-h5-nanopi-neo2.dts          | 2 +-
- arch/arm/dts/sun50i-h5-orangepi-pc2.dts         | 2 +-
- arch/arm/dts/sun50i-h5-orangepi-prime.dts       | 2 +-
- arch/arm/dts/sun50i-h5-orangepi-zero-plus.dts   | 2 +-
- arch/arm/dts/sun50i-h6-beelink-gs1.dts          | 2 +-
- arch/arm/dts/sun50i-h6-pine-h64.dts             | 2 +-
- arch/arm/dts/sun7i-a20-bananapi-m1-plus.dts     | 2 +-
- arch/arm/dts/sun7i-a20-bananapi.dts             | 2 +-
- arch/arm/dts/sun7i-a20-bananapro.dts            | 2 +-
- arch/arm/dts/sun7i-a20-cubietruck.dts           | 2 +-
- arch/arm/dts/sun7i-a20-hummingbird.dts          | 2 +-
- arch/arm/dts/sun7i-a20-lamobo-r1.dts            | 2 +-
- arch/arm/dts/sun7i-a20-olimex-som-evb.dts       | 2 +-
- arch/arm/dts/sun7i-a20-olimex-som204-evb.dts    | 2 +-
- arch/arm/dts/sun7i-a20-olinuxino-lime2.dts      | 2 +-
- arch/arm/dts/sun7i-a20-orangepi-mini.dts        | 2 +-
- arch/arm/dts/sun7i-a20-orangepi.dts             | 2 +-
- arch/arm/dts/sun7i-a20-pcduino3-nano.dts        | 2 +-
- arch/arm/dts/sun7i-a20-wits-pro-a20-dkt.dts     | 2 +-
- arch/arm/dts/sun8i-a83t-bananapi-m3.dts         | 2 +-
- arch/arm/dts/sun8i-a83t-cubietruck-plus.dts     | 2 +-
- arch/arm/dts/sun8i-h3-nanopi-m1-plus.dts        | 2 +-
- arch/arm/dts/sun8i-h3-orangepi-plus.dts         | 2 +-
- arch/arm/dts/sun8i-h3-orangepi-plus2e.dts       | 2 +-
- arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts    | 2 +-
- arch/arm/dts/sun8i-v40-bananapi-m2-berry.dts    | 2 +-
- arch/arm/dts/sunxi-bananapi-m2-plus.dtsi        | 2 +-
- 36 files changed, 36 insertions(+), 36 deletions(-)
-
-diff --git a/arch/arm/dts/sun50i-a64-bananapi-m64.dts b/arch/arm/dts/sun50i-a64-bananapi-m64.dts
-index ef1c90401b..e1c22aeb29 100644
--- a/arch/arm/dts/sun50i-a64-bananapi-m64.dts
-+++ b/arch/arm/dts/sun50i-a64-bananapi-m64.dts
-@@ -112,7 +112,7 @@
- &emac {
- 	pinctrl-names = "default";
- 	pinctrl-0 = <&rgmii_pins>;
-	phy-mode = "rgmii";
-+	phy-mode = "rgmii-id";
- 	phy-handle = <&ext_rgmii_phy>;
- 	phy-supply = <&reg_dc1sw>;
- 	status = "okay";
-diff --git a/arch/arm/dts/sun50i-a64-nanopi-a64.dts b/arch/arm/dts/sun50i-a64-nanopi-a64.dts
-index 31884dbc88..03ebe3e44b 100644
--- a/arch/arm/dts/sun50i-a64-nanopi-a64.dts
-+++ b/arch/arm/dts/sun50i-a64-nanopi-a64.dts
-@@ -102,7 +102,7 @@
- &emac {
- 	pinctrl-names = "default";
- 	pinctrl-0 = <&rgmii_pins>;
-	phy-mode = "rgmii";
-+	phy-mode = "rgmii-id";
- 	phy-handle = <&ext_rgmii_phy>;
- 	phy-supply = <&reg_dcdc1>;
- 	status = "okay";
-diff --git a/arch/arm/dts/sun50i-a64-oceanic-5205-5inmfd.dts b/arch/arm/dts/sun50i-a64-oceanic-5205-5inmfd.dts
-index 6a2154525d..94caf110ab 100644
--- a/arch/arm/dts/sun50i-a64-oceanic-5205-5inmfd.dts
-+++ b/arch/arm/dts/sun50i-a64-oceanic-5205-5inmfd.dts
-@@ -30,7 +30,7 @@
- &emac {
- 	pinctrl-names = "default";
- 	pinctrl-0 = <&rgmii_pins>;
-	phy-mode = "rgmii";
-+	phy-mode = "rgmii-id";
- 	phy-handle = <&ext_rgmii_phy>;
- 	phy-supply = <&reg_dc1sw>;
- 	allwinner,tx-delay-ps = <600>;
-diff --git a/arch/arm/dts/sun50i-a64-olinuxino.dts b/arch/arm/dts/sun50i-a64-olinuxino.dts
-index f7a4bccaa5..2396d9b797 100644
--- a/arch/arm/dts/sun50i-a64-olinuxino.dts
-+++ b/arch/arm/dts/sun50i-a64-olinuxino.dts
-@@ -102,7 +102,7 @@
- &emac {
- 	pinctrl-names = "default";
- 	pinctrl-0 = <&rgmii_pins>;
-	phy-mode = "rgmii";
-+	phy-mode = "rgmii-id";
- 	phy-handle = <&ext_rgmii_phy>;
- 	phy-supply = <&reg_dcdc1>;
- 	allwinner,tx-delay-ps = <600>;
-diff --git a/arch/arm/dts/sun50i-a64-orangepi-win.dts b/arch/arm/dts/sun50i-a64-orangepi-win.dts
-index b0c64f7579..5b5d4f31b6 100644
--- a/arch/arm/dts/sun50i-a64-orangepi-win.dts
-+++ b/arch/arm/dts/sun50i-a64-orangepi-win.dts
-@@ -127,7 +127,7 @@
- &emac {
- 	pinctrl-names = "default";
- 	pinctrl-0 = <&rgmii_pins>;
-	phy-mode = "rgmii";
-+	phy-mode = "rgmii-id";
- 	phy-handle = <&ext_rgmii_phy>;
- 	phy-supply = <&reg_gmac_3v3>;
- 	status = "okay";
-diff --git a/arch/arm/dts/sun50i-a64-pine64-plus.dts b/arch/arm/dts/sun50i-a64-pine64-plus.dts
-index 24f1aac366..b09b4276f1 100644
--- a/arch/arm/dts/sun50i-a64-pine64-plus.dts
-+++ b/arch/arm/dts/sun50i-a64-pine64-plus.dts
-@@ -52,7 +52,7 @@
- &emac {
- 	pinctrl-names = "default";
- 	pinctrl-0 = <&rgmii_pins>;
-	phy-mode = "rgmii";
-+	phy-mode = "rgmii-txid";
- 	phy-handle = <&ext_rgmii_phy>;
- 	status = "okay";
- };
-diff --git a/arch/arm/dts/sun50i-a64-sopine-baseboard.dts b/arch/arm/dts/sun50i-a64-sopine-baseboard.dts
-index 53fcc9098d..4a50a18128 100644
--- a/arch/arm/dts/sun50i-a64-sopine-baseboard.dts
-+++ b/arch/arm/dts/sun50i-a64-sopine-baseboard.dts
-@@ -95,7 +95,7 @@
- &emac {
- 	pinctrl-names = "default";
- 	pinctrl-0 = <&rgmii_pins>;
-	phy-mode = "rgmii";
-+	phy-mode = "rgmii-id";
- 	phy-handle = <&ext_rgmii_phy>;
- 	phy-supply = <&reg_dc1sw>;
- 	status = "okay";
-diff --git a/arch/arm/dts/sun50i-h5-libretech-all-h5-cc.dts b/arch/arm/dts/sun50i-h5-libretech-all-h5-cc.dts
-index df1b9263ad..6e30a564c8 100644
--- a/arch/arm/dts/sun50i-h5-libretech-all-h5-cc.dts
-+++ b/arch/arm/dts/sun50i-h5-libretech-all-h5-cc.dts
-@@ -36,7 +36,7 @@
- 	pinctrl-0 = <&emac_rgmii_pins>;
- 	phy-supply = <&reg_gmac_3v3>;
- 	phy-handle = <&ext_rgmii_phy>;
-	phy-mode = "rgmii";
-+	phy-mode = "rgmii-id";
- 	/delete-property/ allwinner,leds-active-low;
- 	status = "okay";
- };
-diff --git a/arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts b/arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts
-index 4f9ba53ffa..9d93fe1536 100644
--- a/arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts
-+++ b/arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts
-@@ -96,7 +96,7 @@
- 	pinctrl-0 = <&emac_rgmii_pins>;
- 	phy-supply = <&reg_gmac_3v3>;
- 	phy-handle = <&ext_rgmii_phy>;
-	phy-mode = "rgmii";
-+	phy-mode = "rgmii-id";
- 	status = "okay";
- };
- 
-diff --git a/arch/arm/dts/sun50i-h5-nanopi-neo2.dts b/arch/arm/dts/sun50i-h5-nanopi-neo2.dts
-index b059e20813..e8ab8c2df5 100644
--- a/arch/arm/dts/sun50i-h5-nanopi-neo2.dts
-+++ b/arch/arm/dts/sun50i-h5-nanopi-neo2.dts
-@@ -75,7 +75,7 @@
- 	pinctrl-0 = <&emac_rgmii_pins>;
- 	phy-supply = <&reg_gmac_3v3>;
- 	phy-handle = <&ext_rgmii_phy>;
-	phy-mode = "rgmii";
-+	phy-mode = "rgmii-id";
- 	status = "okay";
- };
- 
-diff --git a/arch/arm/dts/sun50i-h5-orangepi-pc2.dts b/arch/arm/dts/sun50i-h5-orangepi-pc2.dts
-index 70b5f09984..6cc567ea99 100644
--- a/arch/arm/dts/sun50i-h5-orangepi-pc2.dts
-+++ b/arch/arm/dts/sun50i-h5-orangepi-pc2.dts
-@@ -118,7 +118,7 @@
- 	pinctrl-0 = <&emac_rgmii_pins>;
- 	phy-supply = <&reg_gmac_3v3>;
- 	phy-handle = <&ext_rgmii_phy>;
-	phy-mode = "rgmii";
-+	phy-mode = "rgmii-id";
- 	status = "okay";
- };
- 
-diff --git a/arch/arm/dts/sun50i-h5-orangepi-prime.dts b/arch/arm/dts/sun50i-h5-orangepi-prime.dts
-index cb44bfa598..33ab44072e 100644
--- a/arch/arm/dts/sun50i-h5-orangepi-prime.dts
-+++ b/arch/arm/dts/sun50i-h5-orangepi-prime.dts
-@@ -124,7 +124,7 @@
- 	pinctrl-0 = <&emac_rgmii_pins>;
- 	phy-supply = <&reg_gmac_3v3>;
- 	phy-handle = <&ext_rgmii_phy>;
-	phy-mode = "rgmii";
-+	phy-mode = "rgmii-id";
- 	status = "okay";
- };
- 
-diff --git a/arch/arm/dts/sun50i-h5-orangepi-zero-plus.dts b/arch/arm/dts/sun50i-h5-orangepi-zero-plus.dts
-index ef5ca64442..de448ca51e 100644
--- a/arch/arm/dts/sun50i-h5-orangepi-zero-plus.dts
-+++ b/arch/arm/dts/sun50i-h5-orangepi-zero-plus.dts
-@@ -69,7 +69,7 @@
- 	pinctrl-0 = <&emac_rgmii_pins>;
- 	phy-supply = <&reg_gmac_3v3>;
- 	phy-handle = <&ext_rgmii_phy>;
-	phy-mode = "rgmii";
-+	phy-mode = "rgmii-id";
- 	status = "okay";
- };
- 
-diff --git a/arch/arm/dts/sun50i-h6-beelink-gs1.dts b/arch/arm/dts/sun50i-h6-beelink-gs1.dts
-index 0dc33c90dd..024035d36e 100644
--- a/arch/arm/dts/sun50i-h6-beelink-gs1.dts
-+++ b/arch/arm/dts/sun50i-h6-beelink-gs1.dts
-@@ -64,7 +64,7 @@
- &emac {
- 	pinctrl-names = "default";
- 	pinctrl-0 = <&ext_rgmii_pins>;
-	phy-mode = "rgmii";
-+	phy-mode = "rgmii-id";
- 	phy-handle = <&ext_rgmii_phy>;
- 	phy-supply = <&reg_aldo2>;
- 	status = "okay";
-diff --git a/arch/arm/dts/sun50i-h6-pine-h64.dts b/arch/arm/dts/sun50i-h6-pine-h64.dts
-index 1898345183..13fbf26817 100644
--- a/arch/arm/dts/sun50i-h6-pine-h64.dts
-+++ b/arch/arm/dts/sun50i-h6-pine-h64.dts
-@@ -66,7 +66,7 @@
- &emac {
- 	pinctrl-names = "default";
- 	pinctrl-0 = <&ext_rgmii_pins>;
-	phy-mode = "rgmii";
-+	phy-mode = "rgmii-id";
- 	phy-handle = <&ext_rgmii_phy>;
- 	phy-supply = <&reg_aldo2>;
- 	allwinner,rx-delay-ps = <200>;
-diff --git a/arch/arm/dts/sun7i-a20-bananapi-m1-plus.dts b/arch/arm/dts/sun7i-a20-bananapi-m1-plus.dts
-index e2bfe00588..4dbcad1343 100644
--- a/arch/arm/dts/sun7i-a20-bananapi-m1-plus.dts
-+++ b/arch/arm/dts/sun7i-a20-bananapi-m1-plus.dts
-@@ -130,7 +130,7 @@
- 	pinctrl-names = "default";
- 	pinctrl-0 = <&gmac_rgmii_pins>;
- 	phy = <&phy1>;
-	phy-mode = "rgmii";
-+	phy-mode = "rgmii-id";
- 	phy-supply = <&reg_gmac_3v3>;
- 	status = "okay";
- 
-diff --git a/arch/arm/dts/sun7i-a20-bananapi.dts b/arch/arm/dts/sun7i-a20-bananapi.dts
-index 81bc85d398..33040c43bc 100644
--- a/arch/arm/dts/sun7i-a20-bananapi.dts
-+++ b/arch/arm/dts/sun7i-a20-bananapi.dts
-@@ -132,7 +132,7 @@
- 	pinctrl-names = "default";
- 	pinctrl-0 = <&gmac_rgmii_pins>;
- 	phy = <&phy1>;
-	phy-mode = "rgmii";
-+	phy-mode = "rgmii-id";
- 	phy-supply = <&reg_gmac_3v3>;
- 	status = "okay";
- 
-diff --git a/arch/arm/dts/sun7i-a20-bananapro.dts b/arch/arm/dts/sun7i-a20-bananapro.dts
-index 0176e9de01..8a75545e22 100644
--- a/arch/arm/dts/sun7i-a20-bananapro.dts
-+++ b/arch/arm/dts/sun7i-a20-bananapro.dts
-@@ -110,7 +110,7 @@
- 	pinctrl-names = "default";
- 	pinctrl-0 = <&gmac_rgmii_pins>;
- 	phy = <&phy1>;
-	phy-mode = "rgmii";
-+	phy-mode = "rgmii-id";
- 	phy-supply = <&reg_gmac_3v3>;
- 	status = "okay";
- 
-diff --git a/arch/arm/dts/sun7i-a20-cubietruck.dts b/arch/arm/dts/sun7i-a20-cubietruck.dts
-index 99f531b8d2..46a9f4669e 100644
--- a/arch/arm/dts/sun7i-a20-cubietruck.dts
-+++ b/arch/arm/dts/sun7i-a20-cubietruck.dts
-@@ -151,7 +151,7 @@
- 	pinctrl-names = "default";
- 	pinctrl-0 = <&gmac_rgmii_pins>;
- 	phy = <&phy1>;
-	phy-mode = "rgmii";
-+	phy-mode = "rgmii-id";
- 	status = "okay";
- 
- 	phy1: ethernet-phy@1 {
-diff --git a/arch/arm/dts/sun7i-a20-hummingbird.dts b/arch/arm/dts/sun7i-a20-hummingbird.dts
-index fd0153f656..5c3d107094 100644
--- a/arch/arm/dts/sun7i-a20-hummingbird.dts
-+++ b/arch/arm/dts/sun7i-a20-hummingbird.dts
-@@ -101,7 +101,7 @@
- 	pinctrl-names = "default";
- 	pinctrl-0 = <&gmac_rgmii_pins>;
- 	phy = <&phy1>;
-	phy-mode = "rgmii";
-+	phy-mode = "rgmii-id";
- 	phy-supply = <&reg_gmac_vdd>;
- 	/* phy reset config */
- 	snps,reset-gpio = <&pio 0 17 GPIO_ACTIVE_HIGH>; /* PA17 */
-diff --git a/arch/arm/dts/sun7i-a20-lamobo-r1.dts b/arch/arm/dts/sun7i-a20-lamobo-r1.dts
-index f91e1bee44..8173d77c12 100644
--- a/arch/arm/dts/sun7i-a20-lamobo-r1.dts
-+++ b/arch/arm/dts/sun7i-a20-lamobo-r1.dts
-@@ -120,7 +120,7 @@
- &gmac {
- 	pinctrl-names = "default";
- 	pinctrl-0 = <&gmac_rgmii_pins>;
-	phy-mode = "rgmii";
-+	phy-mode = "rgmii-id";
- 	phy-supply = <&reg_gmac_3v3>;
- 	status = "okay";
- 	/delete-property/#address-cells;
-diff --git a/arch/arm/dts/sun7i-a20-olimex-som-evb.dts b/arch/arm/dts/sun7i-a20-olimex-som-evb.dts
-index f0e6a96e57..f0c5160ff8 100644
--- a/arch/arm/dts/sun7i-a20-olimex-som-evb.dts
-+++ b/arch/arm/dts/sun7i-a20-olimex-som-evb.dts
-@@ -112,7 +112,7 @@
- 	pinctrl-names = "default";
- 	pinctrl-0 = <&gmac_rgmii_pins>;
- 	phy = <&phy1>;
-	phy-mode = "rgmii";
-+	phy-mode = "rgmii-id";
- 	status = "okay";
- 
- 	phy1: ethernet-phy@1 {
-diff --git a/arch/arm/dts/sun7i-a20-olimex-som204-evb.dts b/arch/arm/dts/sun7i-a20-olimex-som204-evb.dts
-index 823aabce04..ff42708137 100644
--- a/arch/arm/dts/sun7i-a20-olimex-som204-evb.dts
-+++ b/arch/arm/dts/sun7i-a20-olimex-som204-evb.dts
-@@ -106,7 +106,7 @@
- 	pinctrl-names = "default";
- 	pinctrl-0 = <&gmac_rgmii_pins>;
- 	phy = <&phy3>;
-	phy-mode = "rgmii";
-+	phy-mode = "rgmii-id";
- 	phy-supply = <&reg_vcc3v3>;
- 
- 	snps,reset-gpio = <&pio 0 17 GPIO_ACTIVE_HIGH>;
-diff --git a/arch/arm/dts/sun7i-a20-olinuxino-lime2.dts b/arch/arm/dts/sun7i-a20-olinuxino-lime2.dts
-index 4e1c590eb0..996201665b 100644
--- a/arch/arm/dts/sun7i-a20-olinuxino-lime2.dts
-+++ b/arch/arm/dts/sun7i-a20-olinuxino-lime2.dts
-@@ -112,7 +112,7 @@
- 	pinctrl-names = "default";
- 	pinctrl-0 = <&gmac_rgmii_pins>;
- 	phy = <&phy1>;
-	phy-mode = "rgmii";
-+	phy-mode = "rgmii-id";
- 	status = "okay";
- 
- 	phy1: ethernet-phy@1 {
-diff --git a/arch/arm/dts/sun7i-a20-orangepi-mini.dts b/arch/arm/dts/sun7i-a20-orangepi-mini.dts
-index 15881081ca..b80215c61c 100644
--- a/arch/arm/dts/sun7i-a20-orangepi-mini.dts
-+++ b/arch/arm/dts/sun7i-a20-orangepi-mini.dts
-@@ -121,7 +121,7 @@
- 	pinctrl-names = "default";
- 	pinctrl-0 = <&gmac_rgmii_pins>;
- 	phy = <&phy1>;
-	phy-mode = "rgmii";
-+	phy-mode = "rgmii-id";
- 	phy-supply = <&reg_gmac_3v3>;
- 	status = "okay";
- 
-diff --git a/arch/arm/dts/sun7i-a20-orangepi.dts b/arch/arm/dts/sun7i-a20-orangepi.dts
-index d64de2e73a..66efb7d1ab 100644
--- a/arch/arm/dts/sun7i-a20-orangepi.dts
-+++ b/arch/arm/dts/sun7i-a20-orangepi.dts
-@@ -97,7 +97,7 @@
- 	pinctrl-names = "default";
- 	pinctrl-0 = <&gmac_rgmii_pins>;
- 	phy = <&phy1>;
-	phy-mode = "rgmii";
-+	phy-mode = "rgmii-id";
- 	phy-supply = <&reg_gmac_3v3>;
- 	status = "okay";
- 
-diff --git a/arch/arm/dts/sun7i-a20-pcduino3-nano.dts b/arch/arm/dts/sun7i-a20-pcduino3-nano.dts
-index 538ea15fa3..205eaae44a 100644
--- a/arch/arm/dts/sun7i-a20-pcduino3-nano.dts
-+++ b/arch/arm/dts/sun7i-a20-pcduino3-nano.dts
-@@ -115,7 +115,7 @@
- 	pinctrl-names = "default";
- 	pinctrl-0 = <&gmac_rgmii_pins>;
- 	phy = <&phy1>;
-	phy-mode = "rgmii";
-+	phy-mode = "rgmii-id";
- 	status = "okay";
- 
- 	phy1: ethernet-phy@1 {
-diff --git a/arch/arm/dts/sun7i-a20-wits-pro-a20-dkt.dts b/arch/arm/dts/sun7i-a20-wits-pro-a20-dkt.dts
-index c27e56091f..56cc5791c4 100644
--- a/arch/arm/dts/sun7i-a20-wits-pro-a20-dkt.dts
-+++ b/arch/arm/dts/sun7i-a20-wits-pro-a20-dkt.dts
-@@ -82,7 +82,7 @@
- 	pinctrl-names = "default";
- 	pinctrl-0 = <&gmac_rgmii_pins>;
- 	phy = <&phy1>;
-	phy-mode = "rgmii";
-+	phy-mode = "rgmii-id";
- 	status = "okay";
- 
- 	phy1: ethernet-phy@1 {
-diff --git a/arch/arm/dts/sun8i-a83t-bananapi-m3.dts b/arch/arm/dts/sun8i-a83t-bananapi-m3.dts
-index eaff6fa401..2beafe3a31 100644
--- a/arch/arm/dts/sun8i-a83t-bananapi-m3.dts
-+++ b/arch/arm/dts/sun8i-a83t-bananapi-m3.dts
-@@ -123,7 +123,7 @@
- 	pinctrl-0 = <&emac_rgmii_pins>;
- 	phy-supply = <&reg_sw>;
- 	phy-handle = <&rgmii_phy>;
-	phy-mode = "rgmii";
-+	phy-mode = "rgmii-id";
- 	allwinner,rx-delay-ps = <700>;
- 	allwinner,tx-delay-ps = <700>;
- 	status = "okay";
-diff --git a/arch/arm/dts/sun8i-a83t-cubietruck-plus.dts b/arch/arm/dts/sun8i-a83t-cubietruck-plus.dts
-index 5dba4fc310..ecd9ff38a8 100644
--- a/arch/arm/dts/sun8i-a83t-cubietruck-plus.dts
-+++ b/arch/arm/dts/sun8i-a83t-cubietruck-plus.dts
-@@ -160,7 +160,7 @@
- 	pinctrl-0 = <&emac_rgmii_pins>;
- 	phy-supply = <&reg_dldo4>;
- 	phy-handle = <&rgmii_phy>;
-	phy-mode = "rgmii";
-+	phy-mode = "rgmii-id";
- 	status = "okay";
- };
- 
-diff --git a/arch/arm/dts/sun8i-h3-nanopi-m1-plus.dts b/arch/arm/dts/sun8i-h3-nanopi-m1-plus.dts
-index 4ba533b034..bc370d4ea1 100644
--- a/arch/arm/dts/sun8i-h3-nanopi-m1-plus.dts
-+++ b/arch/arm/dts/sun8i-h3-nanopi-m1-plus.dts
-@@ -96,7 +96,7 @@
- 	pinctrl-0 = <&emac_rgmii_pins>;
- 	phy-supply = <&reg_gmac_3v3>;
- 	phy-handle = <&ext_rgmii_phy>;
-	phy-mode = "rgmii";
-+	phy-mode = "rgmii-id";
- 
- 	status = "okay";
- };
-diff --git a/arch/arm/dts/sun8i-h3-orangepi-plus.dts b/arch/arm/dts/sun8i-h3-orangepi-plus.dts
-index 97f497854e..d05fa679dc 100644
--- a/arch/arm/dts/sun8i-h3-orangepi-plus.dts
-+++ b/arch/arm/dts/sun8i-h3-orangepi-plus.dts
-@@ -85,7 +85,7 @@
- 	pinctrl-0 = <&emac_rgmii_pins>;
- 	phy-supply = <&reg_gmac_3v3>;
- 	phy-handle = <&ext_rgmii_phy>;
-	phy-mode = "rgmii";
-+	phy-mode = "rgmii-id";
- 
- 	status = "okay";
- };
-diff --git a/arch/arm/dts/sun8i-h3-orangepi-plus2e.dts b/arch/arm/dts/sun8i-h3-orangepi-plus2e.dts
-index 6dbf7b2e0c..b6ca45d18e 100644
--- a/arch/arm/dts/sun8i-h3-orangepi-plus2e.dts
-+++ b/arch/arm/dts/sun8i-h3-orangepi-plus2e.dts
-@@ -67,7 +67,7 @@
- 	pinctrl-0 = <&emac_rgmii_pins>;
- 	phy-supply = <&reg_gmac_3v3>;
- 	phy-handle = <&ext_rgmii_phy>;
-	phy-mode = "rgmii";
-+	phy-mode = "rgmii-id";
- 	status = "okay";
- };
- 
-diff --git a/arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts b/arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts
-index c488aaacbd..9c20245eef 100644
--- a/arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts
-+++ b/arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts
-@@ -129,7 +129,7 @@
- 	pinctrl-names = "default";
- 	pinctrl-0 = <&gmac_rgmii_pins>;
- 	phy-handle = <&phy1>;
-	phy-mode = "rgmii";
-+	phy-mode = "rgmii-id";
- 	phy-supply = <&reg_dc1sw>;
- 	status = "okay";
- };
-diff --git a/arch/arm/dts/sun8i-v40-bananapi-m2-berry.dts b/arch/arm/dts/sun8i-v40-bananapi-m2-berry.dts
-index 15c22b06fc..3ab6f47cea 100644
--- a/arch/arm/dts/sun8i-v40-bananapi-m2-berry.dts
-+++ b/arch/arm/dts/sun8i-v40-bananapi-m2-berry.dts
-@@ -120,7 +120,7 @@
- 	pinctrl-names = "default";
- 	pinctrl-0 = <&gmac_rgmii_pins>;
- 	phy-handle = <&phy1>;
-	phy-mode = "rgmii";
-+	phy-mode = "rgmii-id";
- 	phy-supply = <&reg_dc1sw>;
- 	status = "okay";
- };
-diff --git a/arch/arm/dts/sunxi-bananapi-m2-plus.dtsi b/arch/arm/dts/sunxi-bananapi-m2-plus.dtsi
-index 39263e74fb..8e5cb3b3fd 100644
--- a/arch/arm/dts/sunxi-bananapi-m2-plus.dtsi
-+++ b/arch/arm/dts/sunxi-bananapi-m2-plus.dtsi
-@@ -126,7 +126,7 @@
- 	pinctrl-0 = <&emac_rgmii_pins>;
- 	phy-supply = <&reg_gmac_3v3>;
- 	phy-handle = <&ext_rgmii_phy>;
-	phy-mode = "rgmii";
-+	phy-mode = "rgmii-id";
- 
- 	status = "okay";
- };
-- 
-2.28.0
-
--- a/10-devicetree.install
+++ b/10-devicetree.install
@ -0,0 +1,73 @@
+#!/bin/bash
+
+# set -x
+
+if [[ "$(uname -m)" == arm* || "$(uname -m)" == aarch64 ]]
+then
+COMMAND="$1"
+KERNEL_VERSION="$2"
+#BOOT_DIR_ABS="$3"
+#KERNEL_IMAGE="$4"
+
+[ -f /etc/u-boot.conf ] && source /etc/u-boot.conf || true
+[ -z "$FIRMWAREDT" ] || FirmwareDT=$FIRMWAREDT
+
+if [[ $FirmwareDT == "True" ]]
+then
+	# if we want to use firmware DT we remove symlink to current kernel DT
+        if [ -h /boot/dtb ]; then
+            rm -f /boot/dtb
+        fi
+	exit 0
+fi
+
+# Setup a /boot/dtb -> /boot/dtb-$newest_kernel_version symlink so that
+# u-boot can find the correct dtb to load.
+#
+# If invoked to 'add' a new kernel, find the newest based on `sort`ing
+# the kernel versions dtb.  If 'remove', then follow basically the same
+# procedure but exclude the version currently being removed.
+#
+# The theory of operation here is that, while newer kernels may add new
+# dtb nodes and fields, as upstreaming hw support for some particular
+# device progresses, it should never make backward incompatible changes.
+# So it should always be safe to use a newer dtb with an older kernel.
+
+    list_dtb_versions() {
+        excluded_version="$1"
+        for dtbdir in /boot/dtb-*; do
+            dtbver=${dtbdir#*-}
+            if [ "$dtbver" != "$excluded_version" ]; then
+                echo $dtbver
+            fi
+        done
+    }
+
+    setup_dtb_link() {
+        ver=`list_dtb_versions $1 | sort -r --sort=version | head -1`
+        if [ -h /boot/dtb ]; then
+            rm -f /boot/dtb
+        fi
+        ln -s dtb-$ver /boot/dtb
+    }
+
+    ret=0
+    case "$COMMAND" in
+        add)
+            # If we're adding a kernel we want that version
+            if [ -h /boot/dtb ]; then
+                rm -f /boot/dtb
+            fi
+            ln -s dtb-$KERNEL_VERSION /boot/dtb
+            ret=$?
+            ;;
+        remove)
+            setup_dtb_link $KERNEL_VERSION
+            ret=$?
+            ;;
+    esac
+    exit $ret
+else
+    # Just exit on non ARM
+    exit 0
+fi
--- a/ARM-tegra-Add-NVIDIA-Jetson-Nano.patch
+++ b/ARM-tegra-Add-NVIDIA-Jetson-Nano.patch
@ -0,0 +1,862 @@
+From patchwork Mon Apr 15 09:32:39 2019
+Content-Type: text/plain; charset="utf-8"
+MIME-Version: 1.0
+Content-Transfer-Encoding: 7bit
+Subject: [U-Boot, v5,
+ 27/27] ARM: tegra: Add NVIDIA Jetson Nano Developer Kit support
+X-Patchwork-Submitter: Thierry Reding <thierry.reding@gmail.com>
+X-Patchwork-Id: 1085538
+X-Patchwork-Delegate: twarren@nvidia.com
+Message-Id: <20190415093239.27509-28-thierry.reding@gmail.com>
+To: Tom Warren <twarren@nvidia.com>,
+	Simon Glass <sjg@chromium.org>
+Cc: u-boot@lists.denx.de, Jon Hunter <jonathanh@nvidia.com>
+Date: Mon, 15 Apr 2019 11:32:39 +0200
+From: Thierry Reding <thierry.reding@gmail.com>
+List-Id: U-Boot discussion <u-boot.lists.denx.de>
+
+From: Thierry Reding <treding@nvidia.com>
+
+The Jetson Nano Developer Kit is a Tegra X1 based development board. It
+is similar to Jetson TX1 but it is not pin compatible. It features 4 GB
+of LPDDR4, an SPI NOR flash for early boot firmware and an SD card slot
+used for storage.
+
+HDMI 2.0 or DP 1.2 are available for display, four USB ports (3 USB 2.0
+and 1 USB 3.0) can be used to attach a variety of peripherals and a PCI
+Ethernet controller provides onboard network connectivity.
+
+A 40-pin header on the board can be used to extend the capabilities and
+exposed interfaces of the Jetson Nano.
+
+Signed-off-by: Thierry Reding <treding@nvidia.com>
+---
+Changes in v5:
+- add "ethernet" alias and store an empty MAC address as placeholder
+
+Changes in v3:
+- rename "Development Kit" to "Developer Kit"
+- drop alias for non-existent eMMC interface
+- import pinmux from A02 spreadsheet
+- drop preboot support for now
+- fixup text base
+
+ arch/arm/dts/Makefile                         |   3 +-
+ arch/arm/dts/tegra210-p3450-0000.dts          | 135 +++++++++
+ arch/arm/mach-tegra/tegra210/Kconfig          |   7 +
+ board/nvidia/p3450-0000/Kconfig               |  12 +
+ board/nvidia/p3450-0000/MAINTAINERS           |   6 +
+ board/nvidia/p3450-0000/Makefile              |   8 +
+ board/nvidia/p3450-0000/p3450-0000.c          | 198 +++++++++++++
+ .../p3450-0000/pinmux-config-p3450-0000.h     | 265 ++++++++++++++++++
+ configs/p3450-0000_defconfig                  |  55 ++++
+ include/configs/p3450-0000.h                  |  34 +++
+ 10 files changed, 722 insertions(+), 1 deletion(-)
+ create mode 100644 arch/arm/dts/tegra210-p3450-0000.dts
+ create mode 100644 board/nvidia/p3450-0000/Kconfig
+ create mode 100644 board/nvidia/p3450-0000/MAINTAINERS
+ create mode 100644 board/nvidia/p3450-0000/Makefile
+ create mode 100644 board/nvidia/p3450-0000/p3450-0000.c
+ create mode 100644 board/nvidia/p3450-0000/pinmux-config-p3450-0000.h
+ create mode 100644 configs/p3450-0000_defconfig
+ create mode 100644 include/configs/p3450-0000.h
+
+diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
+index 8167cdb4e856..f8d3441663c0 100644
+--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
+@@ -127,7 +127,8 @@ dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \
+ 	tegra210-e2220-1170.dtb \
+ 	tegra210-p2371-0000.dtb \
+ 	tegra210-p2371-2180.dtb \
+-	tegra210-p2571.dtb
+	tegra210-p2571.dtb \
+	tegra210-p3450-0000.dtb
+ 
+ dtb-$(CONFIG_ARCH_MVEBU) +=			\
+ 	armada-3720-db.dtb			\
+diff --git a/arch/arm/dts/tegra210-p3450-0000.dts b/arch/arm/dts/tegra210-p3450-0000.dts
+new file mode 100644
+index 000000000000..d45ee9afc016
+--- /dev/null
+++ b/arch/arm/dts/tegra210-p3450-0000.dts
+@@ -0,0 +1,135 @@
+/dts-v1/;
+
+#include "tegra210.dtsi"
+
+/ {
+	model = "NVIDIA Jetson Nano Developer Kit";
+	compatible = "nvidia,p3450-0000", "nvidia,tegra210";
+
+	chosen {
+		stdout-path = &uarta;
+	};
+
+	aliases {
+		ethernet = "/pcie@1003000/pci@2,0/ethernet@0,0";
+		i2c0 = "/i2c@7000d000";
+		i2c2 = "/i2c@7000c400";
+		i2c3 = "/i2c@7000c500";
+		i2c4 = "/i2c@7000c700";
+		sdhci0 = "/sdhci@700b0000";
+		spi0 = "/spi@70410000";
+		usb0 = "/usb@7d000000";
+	};
+
+	memory {
+		reg = <0x0 0x80000000 0x0 0xc0000000>;
+	};
+
+	pcie@1003000 {
+		status = "okay";
+
+		pci@1,0 {
+			status = "okay";
+		};
+
+		pci@2,0 {
+			status = "okay";
+
+			ethernet@0,0 {
+				reg = <0x000000 0 0 0 0>;
+				local-mac-address = [ 00 00 00 00 00 00 ];
+			};
+		};
+	};
+
+	serial@70006000 {
+		status = "okay";
+	};
+
+	padctl@7009f000 {
+		pinctrl-0 = <&padctl_default>;
+		pinctrl-names = "default";
+
+		padctl_default: pinmux {
+			xusb {
+				nvidia,lanes = "otg-1", "otg-2";
+				nvidia,function = "xusb";
+				nvidia,iddq = <0>;
+			};
+
+			usb3 {
+				nvidia,lanes = "pcie-5", "pcie-6";
+				nvidia,function = "usb3";
+				nvidia,iddq = <0>;
+			};
+
+			pcie-x1 {
+				nvidia,lanes = "pcie-0";
+				nvidia,function = "pcie-x1";
+				nvidia,iddq = <0>;
+			};
+
+			pcie-x4 {
+				nvidia,lanes = "pcie-1", "pcie-2",
+					       "pcie-3", "pcie-4";
+				nvidia,function = "pcie-x4";
+				nvidia,iddq = <0>;
+			};
+
+			sata {
+				nvidia,lanes = "sata-0";
+				nvidia,function = "sata";
+				nvidia,iddq = <0>;
+			};
+		};
+	};
+
+	sdhci@700b0000 {
+		status = "okay";
+		cd-gpios = <&gpio TEGRA_GPIO(Z, 1) GPIO_ACTIVE_LOW>;
+		power-gpios = <&gpio TEGRA_GPIO(Z, 3) GPIO_ACTIVE_HIGH>;
+		bus-width = <4>;
+	};
+
+	i2c@7000c400 {
+		status = "okay";
+		clock-frequency = <400000>;
+	};
+
+	i2c@7000c500 {
+		status = "okay";
+		clock-frequency = <400000>;
+	};
+
+	i2c@7000c700 {
+		status = "okay";
+		clock-frequency = <400000>;
+	};
+
+	i2c@7000d000 {
+		status = "okay";
+		clock-frequency = <400000>;
+	};
+
+	spi@70410000 {
+		status = "okay";
+	};
+
+	usb@7d000000 {
+		status = "okay";
+		dr_mode = "peripheral";
+	};
+
+	clocks {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		clk32k_in: clock@0 {
+			compatible = "fixed-clock";
+			reg = <0>;
+			#clock-cells = <0>;
+			clock-frequency = <32768>;
+		};
+	};
+};
+diff --git a/arch/arm/mach-tegra/tegra210/Kconfig b/arch/arm/mach-tegra/tegra210/Kconfig
+index 250738aed312..ea28392c0f3a 100644
+--- a/arch/arm/mach-tegra/tegra210/Kconfig
+++ b/arch/arm/mach-tegra/tegra210/Kconfig
+@@ -35,6 +35,12 @@ config TARGET_P2571
+ 	help
+ 	  P2571 is a P2530 married to a P1963 I/O board
+ 
+config TARGET_P3450_0000
+	bool "NVIDIA Jetson Nano Developer Kit"
+	select BOARD_LATE_INIT
+	help
+	  P3450-0000 is a P3448 CPU board married to a P3449 I/O board.
+
+ endchoice
+ 
+ config SYS_SOC
+@@ -47,5 +53,6 @@ source "board/nvidia/e2220-1170/Kconfig"
+ source "board/nvidia/p2371-0000/Kconfig"
+ source "board/nvidia/p2371-2180/Kconfig"
+ source "board/nvidia/p2571/Kconfig"
+source "board/nvidia/p3450-0000/Kconfig"
+ 
+ endif
+diff --git a/board/nvidia/p3450-0000/Kconfig b/board/nvidia/p3450-0000/Kconfig
+new file mode 100644
+index 000000000000..7a08cd88675f
+--- /dev/null
+++ b/board/nvidia/p3450-0000/Kconfig
+@@ -0,0 +1,12 @@
+if TARGET_P3450_0000
+
+config SYS_BOARD
+	default "p3450-0000"
+
+config SYS_VENDOR
+	default "nvidia"
+
+config SYS_CONFIG_NAME
+	default "p3450-0000"
+
+endif
+diff --git a/board/nvidia/p3450-0000/MAINTAINERS b/board/nvidia/p3450-0000/MAINTAINERS
+new file mode 100644
+index 000000000000..40700066bf39
+--- /dev/null
+++ b/board/nvidia/p3450-0000/MAINTAINERS
+@@ -0,0 +1,6 @@
+P3450-0000 BOARD
+M:	Tom Warren <twarren@nvidia.com>
+S:	Maintained
+F:	board/nvidia/p3450-0000/
+F:	include/configs/p3450-0000.h
+F:	configs/p3450-0000_defconfig
+diff --git a/board/nvidia/p3450-0000/Makefile b/board/nvidia/p3450-0000/Makefile
+new file mode 100644
+index 000000000000..993c506d8200
+--- /dev/null
+++ b/board/nvidia/p3450-0000/Makefile
+@@ -0,0 +1,8 @@
+#
+# (C) Copyright 2018
+# NVIDIA Corporation <www.nvidia.com>
+#
+# SPDX-License-Identifier:     GPL-2.0+
+#
+
+obj-y	+= p3450-0000.o
+diff --git a/board/nvidia/p3450-0000/p3450-0000.c b/board/nvidia/p3450-0000/p3450-0000.c
+new file mode 100644
+index 000000000000..432179e92605
+--- /dev/null
+++ b/board/nvidia/p3450-0000/p3450-0000.c
+@@ -0,0 +1,198 @@
+/*
+ * (C) Copyright 2018
+ * NVIDIA Corporation <www.nvidia.com>
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <env.h>
+#include <fdtdec.h>
+#include <i2c.h>
+#include <linux/libfdt.h>
+#include <pca953x.h>
+#include <asm/arch-tegra/cboot.h>
+#include <asm/arch/gpio.h>
+#include <asm/arch/pinmux.h>
+#include "../p2571/max77620_init.h"
+#include "pinmux-config-p3450-0000.h"
+
+void pin_mux_mmc(void)
+{
+	struct udevice *dev;
+	uchar val;
+	int ret;
+
+	/* Turn on MAX77620 LDO2 to 3.3V for SD card power */
+	debug("%s: Set LDO2 for VDDIO_SDMMC_AP power to 3.3V\n", __func__);
+	ret = i2c_get_chip_for_busnum(0, MAX77620_I2C_ADDR_7BIT, 1, &dev);
+	if (ret) {
+		printf("%s: Cannot find MAX77620 I2C chip\n", __func__);
+		return;
+	}
+	/* 0xF2 for 3.3v, enabled: bit7:6 = 11 = enable, bit5:0 = voltage */
+	val = 0xF2;
+	ret = dm_i2c_write(dev, MAX77620_CNFG1_L2_REG, &val, 1);
+	if (ret)
+		printf("i2c_write 0 0x3c 0x27 failed: %d\n", ret);
+
+	/* Disable LDO4 discharge */
+	ret = dm_i2c_read(dev, MAX77620_CNFG2_L4_REG, &val, 1);
+	if (ret) {
+		printf("i2c_read 0 0x3c 0x2c failed: %d\n", ret);
+	} else {
+		val &= ~BIT(1); /* ADE */
+		ret = dm_i2c_write(dev, MAX77620_CNFG2_L4_REG, &val, 1);
+		if (ret)
+			printf("i2c_write 0 0x3c 0x2c failed: %d\n", ret);
+	}
+
+	/* Set MBLPD */
+	ret = dm_i2c_read(dev, MAX77620_CNFGGLBL1_REG, &val, 1);
+	if (ret) {
+		printf("i2c_write 0 0x3c 0x00 failed: %d\n", ret);
+	} else {
+		val |= BIT(6); /* MBLPD */
+		ret = dm_i2c_write(dev, MAX77620_CNFGGLBL1_REG, &val, 1);
+		if (ret)
+			printf("i2c_write 0 0x3c 0x00 failed: %d\n", ret);
+	}
+}
+
+/*
+ * Routine: pinmux_init
+ * Description: Do individual peripheral pinmux configs
+ */
+void pinmux_init(void)
+{
+	pinmux_clear_tristate_input_clamping();
+
+	gpio_config_table(p3450_0000_gpio_inits,
+			  ARRAY_SIZE(p3450_0000_gpio_inits));
+
+	pinmux_config_pingrp_table(p3450_0000_pingrps,
+				   ARRAY_SIZE(p3450_0000_pingrps));
+
+	pinmux_config_drvgrp_table(p3450_0000_drvgrps,
+				   ARRAY_SIZE(p3450_0000_drvgrps));
+}
+
+#ifdef CONFIG_PCI_TEGRA
+int tegra_pcie_board_init(void)
+{
+	struct udevice *dev;
+	uchar val;
+	int ret;
+
+	/* Turn on MAX77620 LDO1 to 1.05V for PEX power */
+	debug("%s: Set LDO1 for PEX power to 1.05V\n", __func__);
+	ret = i2c_get_chip_for_busnum(0, MAX77620_I2C_ADDR_7BIT, 1, &dev);
+	if (ret) {
+		printf("%s: Cannot find MAX77620 I2C chip\n", __func__);
+		return -1;
+	}
+	/* 0xCA for 1.05v, enabled: bit7:6 = 11 = enable, bit5:0 = voltage */
+	val = 0xCA;
+	ret = dm_i2c_write(dev, MAX77620_CNFG1_L1_REG, &val, 1);
+	if (ret)
+		printf("i2c_write 0 0x3c 0x25 failed: %d\n", ret);
+
+	return 0;
+}
+#endif /* PCI */
+
+static void ft_mac_address_setup(void *fdt)
+{
+	const void *cboot_fdt = (const void *)cboot_boot_x0;
+	uint8_t mac[ETH_ALEN], local_mac[ETH_ALEN];
+	const char *path;
+	int offset, err;
+
+	err = cboot_get_ethaddr(cboot_fdt, local_mac);
+	if (err < 0)
+		memset(local_mac, 0, ETH_ALEN);
+
+	path = fdt_get_alias(fdt, "ethernet");
+	if (!path)
+		return;
+
+	debug("ethernet alias found: %s\n", path);
+
+	offset = fdt_path_offset(fdt, path);
+	if (offset < 0) {
+		printf("ethernet alias points to absent node %s\n", path);
+		return;
+	}
+
+	if (is_valid_ethaddr(local_mac)) {
+		err = fdt_setprop(fdt, offset, "local-mac-address", local_mac,
+				  ETH_ALEN);
+		if (!err)
+			debug("Local MAC address set: %pM\n", local_mac);
+	}
+
+	if (eth_env_get_enetaddr("ethaddr", mac)) {
+		if (memcmp(local_mac, mac, ETH_ALEN) != 0) {
+			err = fdt_setprop(fdt, offset, "mac-address", mac,
+					  ETH_ALEN);
+			if (!err)
+				debug("MAC address set: %pM\n", mac);
+		}
+	}
+}
+
+static int ft_copy_carveout(void *dst, const void *src, const char *node)
+{
+	struct fdt_memory fb;
+	int err;
+
+	err = fdtdec_get_carveout(src, node, "memory-region", 0, &fb);
+	if (err < 0) {
+		if (err != -FDT_ERR_NOTFOUND)
+			printf("failed to get carveout for %s: %d\n", node,
+			       err);
+
+		return err;
+	}
+
+	err = fdtdec_set_carveout(dst, node, "memory-region", 0, "framebuffer",
+				  &fb);
+	if (err < 0) {
+		printf("failed to set carveout for %s: %d\n", node, err);
+		return err;
+	}
+
+	return 0;
+}
+
+static void ft_carveout_setup(void *fdt)
+{
+	const void *cboot_fdt = (const void *)cboot_boot_x0;
+	static const char * const nodes[] = {
+		"/host1x@50000000/dc@54200000",
+		"/host1x@50000000/dc@54240000",
+	};
+	unsigned int i;
+	int err;
+
+	for (i = 0; i < ARRAY_SIZE(nodes); i++) {
+		printf("copying carveout for %s...\n", nodes[i]);
+
+		err = ft_copy_carveout(fdt, cboot_fdt, nodes[i]);
+		if (err < 0) {
+			if (err != -FDT_ERR_NOTFOUND)
+				printf("failed to copy carveout for %s: %d\n",
+				       nodes[i], err);
+
+			continue;
+		}
+	}
+}
+
+int ft_board_setup(void *fdt, bd_t *bd)
+{
+	ft_mac_address_setup(fdt);
+	ft_carveout_setup(fdt);
+
+	return 0;
+}
+diff --git a/board/nvidia/p3450-0000/pinmux-config-p3450-0000.h b/board/nvidia/p3450-0000/pinmux-config-p3450-0000.h
+new file mode 100644
+index 000000000000..722da4973542
+--- /dev/null
+++ b/board/nvidia/p3450-0000/pinmux-config-p3450-0000.h
+@@ -0,0 +1,265 @@
+/*
+ * Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+/*
+ * THIS FILE IS AUTO-GENERATED - DO NOT EDIT!
+ *
+ * To generate this file, use the tegra-pinmux-scripts tool available from
+ * https://github.com/NVIDIA/tegra-pinmux-scripts
+ * Run "board-to-uboot.py p3450-0000".
+ */
+
+#ifndef _PINMUX_CONFIG_P3450_0000_H_
+#define _PINMUX_CONFIG_P3450_0000_H_
+
+#define GPIO_INIT(_port, _gpio, _init)			\
+	{						\
+		.gpio	= TEGRA_GPIO(_port, _gpio),	\
+		.init	= TEGRA_GPIO_INIT_##_init,	\
+	}
+
+static const struct tegra_gpio_config p3450_0000_gpio_inits[] = {
+	/*        port, pin, init_val */
+	GPIO_INIT(A,    5,   IN),
+	GPIO_INIT(A,    6,   OUT1),
+	GPIO_INIT(B,    4,   IN),
+	GPIO_INIT(B,    5,   IN),
+	GPIO_INIT(B,    6,   IN),
+	GPIO_INIT(B,    7,   IN),
+	GPIO_INIT(C,    0,   IN),
+	GPIO_INIT(C,    1,   IN),
+	GPIO_INIT(C,    2,   IN),
+	GPIO_INIT(C,    3,   IN),
+	GPIO_INIT(C,    4,   IN),
+	GPIO_INIT(E,    6,   IN),
+	GPIO_INIT(G,    2,   IN),
+	GPIO_INIT(G,    3,   IN),
+	GPIO_INIT(H,    0,   OUT0),
+	GPIO_INIT(H,    2,   IN),
+	GPIO_INIT(H,    3,   OUT0),
+	GPIO_INIT(H,    4,   OUT0),
+	GPIO_INIT(H,    5,   IN),
+	GPIO_INIT(H,    6,   IN),
+	GPIO_INIT(H,    7,   OUT0),
+	GPIO_INIT(I,    0,   OUT0),
+	GPIO_INIT(I,    1,   IN),
+	GPIO_INIT(I,    2,   OUT0),
+	GPIO_INIT(J,    4,   IN),
+	GPIO_INIT(J,    5,   IN),
+	GPIO_INIT(J,    6,   IN),
+	GPIO_INIT(J,    7,   IN),
+	GPIO_INIT(S,    5,   IN),
+	GPIO_INIT(S,    7,   OUT0),
+	GPIO_INIT(T,    0,   OUT0),
+	GPIO_INIT(V,    0,   IN),
+	GPIO_INIT(V,    1,   IN),
+	GPIO_INIT(X,    3,   OUT1),
+	GPIO_INIT(X,    4,   IN),
+	GPIO_INIT(X,    5,   IN),
+	GPIO_INIT(X,    6,   IN),
+	GPIO_INIT(Y,    1,   IN),
+	GPIO_INIT(Y,    2,   IN),
+	GPIO_INIT(Z,    0,   IN),
+	GPIO_INIT(Z,    2,   IN),
+	GPIO_INIT(Z,    3,   OUT0),
+	GPIO_INIT(BB,   0,   IN),
+	GPIO_INIT(CC,   4,   IN),
+	GPIO_INIT(DD,   0,   IN),
+};
+
+#define PINCFG(_pingrp, _mux, _pull, _tri, _io, _od, _e_io_hv)	\
+	{							\
+		.pingrp		= PMUX_PINGRP_##_pingrp,	\
+		.func		= PMUX_FUNC_##_mux,		\
+		.pull		= PMUX_PULL_##_pull,		\
+		.tristate	= PMUX_TRI_##_tri,		\
+		.io		= PMUX_PIN_##_io,		\
+		.od		= PMUX_PIN_OD_##_od,		\
+		.e_io_hv	= PMUX_PIN_E_IO_HV_##_e_io_hv,	\
+		.lock		= PMUX_PIN_LOCK_DEFAULT,	\
+	}
+
+static const struct pmux_pingrp_config p3450_0000_pingrps[] = {
+	/*     pingrp,               mux,        pull,   tri,      e_input, od,      e_io_hv */
+	PINCFG(PEX_L0_RST_N_PA0,     PE0,        NORMAL, NORMAL,   OUTPUT,  DISABLE, HIGH),
+	PINCFG(PEX_L0_CLKREQ_N_PA1,  PE0,        NORMAL, NORMAL,   INPUT,   DISABLE, HIGH),
+	PINCFG(PEX_WAKE_N_PA2,       PE,         NORMAL, NORMAL,   INPUT,   DISABLE, HIGH),
+	PINCFG(PEX_L1_RST_N_PA3,     PE1,        NORMAL, NORMAL,   OUTPUT,  DISABLE, HIGH),
+	PINCFG(PEX_L1_CLKREQ_N_PA4,  PE1,        NORMAL, NORMAL,   INPUT,   DISABLE, HIGH),
+	PINCFG(SATA_LED_ACTIVE_PA5,  DEFAULT,    UP,     NORMAL,   INPUT,   DISABLE, DEFAULT),
+	PINCFG(PA6,                  DEFAULT,    NORMAL, NORMAL,   OUTPUT,  DISABLE, DEFAULT),
+	PINCFG(DAP1_FS_PB0,          RSVD1,      DOWN,   TRISTATE, OUTPUT,  DISABLE, DEFAULT),
+	PINCFG(DAP1_DIN_PB1,         RSVD1,      DOWN,   TRISTATE, OUTPUT,  DISABLE, DEFAULT),
+	PINCFG(DAP1_DOUT_PB2,        RSVD1,      DOWN,   TRISTATE, OUTPUT,  DISABLE, DEFAULT),
+	PINCFG(DAP1_SCLK_PB3,        RSVD1,      DOWN,   TRISTATE, OUTPUT,  DISABLE, DEFAULT),
+	PINCFG(SPI2_MOSI_PB4,        DEFAULT,    DOWN,   NORMAL,   INPUT,   DISABLE, DEFAULT),
+	PINCFG(SPI2_MISO_PB5,        DEFAULT,    DOWN,   NORMAL,   INPUT,   DISABLE, DEFAULT),
+	PINCFG(SPI2_SCK_PB6,         DEFAULT,    DOWN,   NORMAL,   INPUT,   DISABLE, DEFAULT),
+	PINCFG(SPI2_CS0_PB7,         DEFAULT,    DOWN,   NORMAL,   INPUT,   DISABLE, DEFAULT),
+	PINCFG(SPI1_MOSI_PC0,        DEFAULT,    DOWN,   NORMAL,   INPUT,   DISABLE, DEFAULT),
+	PINCFG(SPI1_MISO_PC1,        DEFAULT,    DOWN,   NORMAL,   INPUT,   DISABLE, DEFAULT),
+	PINCFG(SPI1_SCK_PC2,         DEFAULT,    DOWN,   NORMAL,   INPUT,   DISABLE, DEFAULT),
+	PINCFG(SPI1_CS0_PC3,         DEFAULT,    UP,     NORMAL,   INPUT,   DISABLE, DEFAULT),
+	PINCFG(SPI1_CS1_PC4,         DEFAULT,    UP,     NORMAL,   INPUT,   DISABLE, DEFAULT),
+	PINCFG(SPI4_SCK_PC5,         RSVD1,      DOWN,   TRISTATE, OUTPUT,  DISABLE, DEFAULT),
+	PINCFG(SPI4_CS0_PC6,         RSVD1,      DOWN,   TRISTATE, OUTPUT,  DISABLE, DEFAULT),
+	PINCFG(SPI4_MOSI_PC7,        RSVD1,      DOWN,   TRISTATE, OUTPUT,  DISABLE, DEFAULT),
+	PINCFG(SPI4_MISO_PD0,        RSVD1,      DOWN,   TRISTATE, OUTPUT,  DISABLE, DEFAULT),
+	PINCFG(UART3_TX_PD1,         UARTC,      NORMAL, NORMAL,   OUTPUT,  DISABLE, DEFAULT),
+	PINCFG(UART3_RX_PD2,         UARTC,      NORMAL, NORMAL,   INPUT,   DISABLE, DEFAULT),
+	PINCFG(UART3_RTS_PD3,        UARTC,      UP,     NORMAL,   OUTPUT,  DISABLE, DEFAULT),
+	PINCFG(UART3_CTS_PD4,        UARTC,      UP,     NORMAL,   INPUT,   DISABLE, DEFAULT),
+	PINCFG(DMIC1_CLK_PE0,        I2S3,       NORMAL, NORMAL,   INPUT,   DISABLE, DEFAULT),
+	PINCFG(DMIC1_DAT_PE1,        I2S3,       NORMAL, NORMAL,   INPUT,   DISABLE, DEFAULT),
+	PINCFG(DMIC2_CLK_PE2,        I2S3,       NORMAL, NORMAL,   INPUT,   DISABLE, DEFAULT),
+	PINCFG(DMIC2_DAT_PE3,        I2S3,       NORMAL, NORMAL,   INPUT,   DISABLE, DEFAULT),
+	PINCFG(DMIC3_CLK_PE4,        RSVD2,      DOWN,   TRISTATE, OUTPUT,  DISABLE, DEFAULT),
+	PINCFG(DMIC3_DAT_PE5,        RSVD2,      DOWN,   TRISTATE, OUTPUT,  DISABLE, DEFAULT),
+	PINCFG(PE6,                  DEFAULT,    DOWN,   NORMAL,   INPUT,   DISABLE, DEFAULT),
+	PINCFG(PE7,                  PWM3,       NORMAL, NORMAL,   OUTPUT,  DISABLE, DEFAULT),
+	PINCFG(GEN3_I2C_SCL_PF0,     I2C3,       NORMAL, NORMAL,   INPUT,   DISABLE, NORMAL),
+	PINCFG(GEN3_I2C_SDA_PF1,     I2C3,       NORMAL, NORMAL,   INPUT,   DISABLE, NORMAL),
+	PINCFG(UART2_TX_PG0,         UARTB,      NORMAL, NORMAL,   OUTPUT,  DISABLE, DEFAULT),
+	PINCFG(UART2_RX_PG1,         UARTB,      DOWN,   NORMAL,   INPUT,   DISABLE, DEFAULT),
+	PINCFG(UART2_RTS_PG2,        DEFAULT,    DOWN,   NORMAL,   INPUT,   DISABLE, DEFAULT),
+	PINCFG(UART2_CTS_PG3,        DEFAULT,    DOWN,   NORMAL,   INPUT,   DISABLE, DEFAULT),
+	PINCFG(WIFI_EN_PH0,          DEFAULT,    NORMAL, NORMAL,   OUTPUT,  DISABLE, DEFAULT),
+	PINCFG(WIFI_RST_PH1,         RSVD0,      DOWN,   TRISTATE, OUTPUT,  DISABLE, DEFAULT),
+	PINCFG(WIFI_WAKE_AP_PH2,     DEFAULT,    DOWN,   NORMAL,   INPUT,   DISABLE, DEFAULT),
+	PINCFG(AP_WAKE_BT_PH3,       DEFAULT,    NORMAL, NORMAL,   OUTPUT,  DISABLE, DEFAULT),
+	PINCFG(BT_RST_PH4,           DEFAULT,    NORMAL, NORMAL,   OUTPUT,  DISABLE, DEFAULT),
+	PINCFG(BT_WAKE_AP_PH5,       DEFAULT,    UP,     NORMAL,   INPUT,   DISABLE, DEFAULT),
+	PINCFG(PH6,                  DEFAULT,    UP,     NORMAL,   INPUT,   DISABLE, DEFAULT),
+	PINCFG(AP_WAKE_NFC_PH7,      DEFAULT,    NORMAL, NORMAL,   OUTPUT,  DISABLE, DEFAULT),
+	PINCFG(NFC_EN_PI0,           DEFAULT,    NORMAL, NORMAL,   OUTPUT,  DISABLE, DEFAULT),
+	PINCFG(NFC_INT_PI1,          DEFAULT,    DOWN,   NORMAL,   INPUT,   DISABLE, DEFAULT),
+	PINCFG(GPS_EN_PI2,           DEFAULT,    NORMAL, NORMAL,   OUTPUT,  DISABLE, DEFAULT),
+	PINCFG(GPS_RST_PI3,          RSVD0,      DOWN,   TRISTATE, OUTPUT,  DISABLE, DEFAULT),
+	PINCFG(UART4_TX_PI4,         UARTD,      NORMAL, NORMAL,   OUTPUT,  DISABLE, DEFAULT),
+	PINCFG(UART4_RX_PI5,         UARTD,      NORMAL, NORMAL,   INPUT,   DISABLE, DEFAULT),
+	PINCFG(UART4_RTS_PI6,        UARTD,      NORMAL, NORMAL,   OUTPUT,  DISABLE, DEFAULT),
+	PINCFG(UART4_CTS_PI7,        UARTD,      UP,     NORMAL,   INPUT,   DISABLE, DEFAULT),
+	PINCFG(GEN1_I2C_SDA_PJ0,     I2C1,       NORMAL, NORMAL,   INPUT,   DISABLE, HIGH),
+	PINCFG(GEN1_I2C_SCL_PJ1,     I2C1,       NORMAL, NORMAL,   INPUT,   DISABLE, HIGH),
+	PINCFG(GEN2_I2C_SCL_PJ2,     I2C2,       NORMAL, NORMAL,   INPUT,   DISABLE, HIGH),
+	PINCFG(GEN2_I2C_SDA_PJ3,     I2C2,       NORMAL, NORMAL,   INPUT,   DISABLE, HIGH),
+	PINCFG(DAP4_FS_PJ4,          DEFAULT,    DOWN,   NORMAL,   INPUT,   DISABLE, DEFAULT),
+	PINCFG(DAP4_DIN_PJ5,         DEFAULT,    DOWN,   NORMAL,   INPUT,   DISABLE, DEFAULT),
+	PINCFG(DAP4_DOUT_PJ6,        DEFAULT,    DOWN,   NORMAL,   INPUT,   DISABLE, DEFAULT),
+	PINCFG(DAP4_SCLK_PJ7,        DEFAULT,    DOWN,   NORMAL,   INPUT,   DISABLE, DEFAULT),
+	PINCFG(PK0,                  RSVD2,      DOWN,   TRISTATE, OUTPUT,  DISABLE, DEFAULT),
+	PINCFG(PK1,                  RSVD2,      DOWN,   TRISTATE, OUTPUT,  DISABLE, DEFAULT),
+	PINCFG(PK2,                  RSVD2,      DOWN,   TRISTATE, OUTPUT,  DISABLE, DEFAULT),
+	PINCFG(PK3,                  RSVD2,      DOWN,   TRISTATE, OUTPUT,  DISABLE, DEFAULT),
+	PINCFG(PK4,                  RSVD1,      DOWN,   TRISTATE, OUTPUT,  DISABLE, DEFAULT),
+	PINCFG(PK5,                  RSVD1,      DOWN,   TRISTATE, OUTPUT,  DISABLE, DEFAULT),
+	PINCFG(PK6,                  RSVD1,      DOWN,   TRISTATE, OUTPUT,  DISABLE, DEFAULT),
+	PINCFG(PK7,                  RSVD1,      DOWN,   TRISTATE, OUTPUT,  DISABLE, DEFAULT),
+	PINCFG(PL0,                  RSVD0,      DOWN,   TRISTATE, OUTPUT,  DISABLE, DEFAULT),
+	PINCFG(PL1,                  RSVD1,      DOWN,   TRISTATE, OUTPUT,  DISABLE, DEFAULT),
+	PINCFG(SDMMC1_CLK_PM0,       SDMMC1,     NORMAL, NORMAL,   INPUT,   DISABLE, DEFAULT),
+	PINCFG(SDMMC1_CMD_PM1,       SDMMC1,     UP,     NORMAL,   INPUT,   DISABLE, DEFAULT),
+	PINCFG(SDMMC1_DAT3_PM2,      SDMMC1,     UP,     NORMAL,   INPUT,   DISABLE, DEFAULT),
+	PINCFG(SDMMC1_DAT2_PM3,      SDMMC1,     UP,     NORMAL,   INPUT,   DISABLE, DEFAULT),
+	PINCFG(SDMMC1_DAT1_PM4,      SDMMC1,     UP,     NORMAL,   INPUT,   DISABLE, DEFAULT),
+	PINCFG(SDMMC1_DAT0_PM5,      SDMMC1,     UP,     NORMAL,   INPUT,   DISABLE, DEFAULT),
+	PINCFG(SDMMC3_CLK_PP0,       SDMMC3,     NORMAL, NORMAL,   INPUT,   DISABLE, DEFAULT),
+	PINCFG(SDMMC3_CMD_PP1,       SDMMC3,     UP,     NORMAL,   INPUT,   DISABLE, DEFAULT),
+	PINCFG(SDMMC3_DAT3_PP2,      SDMMC3,     UP,     NORMAL,   INPUT,   DISABLE, DEFAULT),
+	PINCFG(SDMMC3_DAT2_PP3,      SDMMC3,     UP,     NORMAL,   INPUT,   DISABLE, DEFAULT),
+	PINCFG(SDMMC3_DAT1_PP4,      SDMMC3,     UP,     NORMAL,   INPUT,   DISABLE, DEFAULT),
+	PINCFG(SDMMC3_DAT0_PP5,      SDMMC3,     UP,     NORMAL,   INPUT,   DISABLE, DEFAULT),
+	PINCFG(CAM1_MCLK_PS0,        EXTPERIPH3, NORMAL, NORMAL,   OUTPUT,  DISABLE, DEFAULT),
+	PINCFG(CAM2_MCLK_PS1,        EXTPERIPH3, NORMAL, NORMAL,   OUTPUT,  DISABLE, DEFAULT),
+	PINCFG(CAM_I2C_SCL_PS2,      I2CVI,      NORMAL, NORMAL,   INPUT,   DISABLE, HIGH),
+	PINCFG(CAM_I2C_SDA_PS3,      I2CVI,      NORMAL, NORMAL,   INPUT,   DISABLE, HIGH),
+	PINCFG(CAM_RST_PS4,          RSVD1,      DOWN,   TRISTATE, OUTPUT,  DISABLE, DEFAULT),
+	PINCFG(CAM_AF_EN_PS5,        DEFAULT,    UP,     NORMAL,   INPUT,   DISABLE, DEFAULT),
+	PINCFG(CAM_FLASH_EN_PS6,     RSVD2,      DOWN,   TRISTATE, OUTPUT,  DISABLE, DEFAULT),
+	PINCFG(CAM1_PWDN_PS7,        DEFAULT,    NORMAL, NORMAL,   OUTPUT,  DISABLE, DEFAULT),
+	PINCFG(CAM2_PWDN_PT0,        DEFAULT,    NORMAL, NORMAL,   OUTPUT,  DISABLE, DEFAULT),
+	PINCFG(CAM1_STROBE_PT1,      RSVD1,      DOWN,   TRISTATE, OUTPUT,  DISABLE, DEFAULT),
+	PINCFG(UART1_TX_PU0,         UARTA,      NORMAL, NORMAL,   OUTPUT,  DISABLE, DEFAULT),
+	PINCFG(UART1_RX_PU1,         UARTA,      NORMAL, NORMAL,   INPUT,   DISABLE, DEFAULT),
+	PINCFG(UART1_RTS_PU2,        RSVD1,      DOWN,   TRISTATE, OUTPUT,  DISABLE, DEFAULT),
+	PINCFG(UART1_CTS_PU3,        RSVD1,      DOWN,   TRISTATE, OUTPUT,  DISABLE, DEFAULT),
+	PINCFG(LCD_BL_PWM_PV0,       DEFAULT,    DOWN,   NORMAL,   INPUT,   DISABLE, DEFAULT),
+	PINCFG(LCD_BL_EN_PV1,        DEFAULT,    NORMAL, NORMAL,   INPUT,   DISABLE, DEFAULT),
+	PINCFG(LCD_RST_PV2,          RSVD0,      DOWN,   TRISTATE, OUTPUT,  DISABLE, DEFAULT),
+	PINCFG(LCD_GPIO1_PV3,        RSVD1,      DOWN,   TRISTATE, OUTPUT,  DISABLE, DEFAULT),
+	PINCFG(LCD_GPIO2_PV4,        PWM1,       NORMAL, NORMAL,   OUTPUT,  DISABLE, DEFAULT),
+	PINCFG(AP_READY_PV5,         RSVD0,      DOWN,   TRISTATE, OUTPUT,  DISABLE, DEFAULT),
+	PINCFG(TOUCH_RST_PV6,        RSVD0,      DOWN,   TRISTATE, OUTPUT,  DISABLE, DEFAULT),
+	PINCFG(TOUCH_CLK_PV7,        RSVD1,      DOWN,   TRISTATE, OUTPUT,  DISABLE, DEFAULT),
+	PINCFG(MODEM_WAKE_AP_PX0,    RSVD0,      DOWN,   TRISTATE, OUTPUT,  DISABLE, DEFAULT),
+	PINCFG(TOUCH_INT_PX1,        RSVD0,      DOWN,   TRISTATE, OUTPUT,  DISABLE, DEFAULT),
+	PINCFG(MOTION_INT_PX2,       RSVD0,      DOWN,   TRISTATE, OUTPUT,  DISABLE, DEFAULT),
+	PINCFG(ALS_PROX_INT_PX3,     DEFAULT,    NORMAL, NORMAL,   OUTPUT,  DISABLE, DEFAULT),
+	PINCFG(TEMP_ALERT_PX4,       DEFAULT,    UP,     NORMAL,   INPUT,   DISABLE, DEFAULT),
+	PINCFG(BUTTON_POWER_ON_PX5,  DEFAULT,    UP,     NORMAL,   INPUT,   DISABLE, DEFAULT),
+	PINCFG(BUTTON_VOL_UP_PX6,    DEFAULT,    UP,     NORMAL,   INPUT,   DISABLE, DEFAULT),
+	PINCFG(BUTTON_VOL_DOWN_PX7,  RSVD0,      DOWN,   TRISTATE, OUTPUT,  DISABLE, DEFAULT),
+	PINCFG(BUTTON_SLIDE_SW_PY0,  RSVD0,      DOWN,   TRISTATE, OUTPUT,  DISABLE, DEFAULT),
+	PINCFG(BUTTON_HOME_PY1,      DEFAULT,    UP,     NORMAL,   INPUT,   DISABLE, DEFAULT),
+	PINCFG(LCD_TE_PY2,           DEFAULT,    DOWN,   NORMAL,   INPUT,   DISABLE, DEFAULT),
+	PINCFG(PWR_I2C_SCL_PY3,      I2CPMU,     NORMAL, NORMAL,   INPUT,   DISABLE, NORMAL),
+	PINCFG(PWR_I2C_SDA_PY4,      I2CPMU,     NORMAL, NORMAL,   INPUT,   DISABLE, NORMAL),
+	PINCFG(CLK_32K_OUT_PY5,      RSVD2,      DOWN,   TRISTATE, OUTPUT,  DISABLE, DEFAULT),
+	PINCFG(PZ0,                  DEFAULT,    UP,     NORMAL,   INPUT,   DISABLE, DEFAULT),
+	PINCFG(PZ1,                  SDMMC1,     UP,     NORMAL,   INPUT,   DISABLE, DEFAULT),
+	PINCFG(PZ2,                  DEFAULT,    UP,     NORMAL,   INPUT,   DISABLE, DEFAULT),
+	PINCFG(PZ3,                  DEFAULT,    NORMAL, NORMAL,   OUTPUT,  DISABLE, DEFAULT),
+	PINCFG(PZ4,                  RSVD1,      DOWN,   TRISTATE, OUTPUT,  DISABLE, DEFAULT),
+	PINCFG(PZ5,                  SOC,        UP,     NORMAL,   INPUT,   DISABLE, DEFAULT),
+	PINCFG(DAP2_FS_PAA0,         I2S2,       NORMAL, NORMAL,   INPUT,   DISABLE, DEFAULT),
+	PINCFG(DAP2_SCLK_PAA1,       I2S2,       NORMAL, NORMAL,   INPUT,   DISABLE, DEFAULT),
+	PINCFG(DAP2_DIN_PAA2,        I2S2,       NORMAL, NORMAL,   INPUT,   DISABLE, DEFAULT),
+	PINCFG(DAP2_DOUT_PAA3,       I2S2,       NORMAL, NORMAL,   INPUT,   DISABLE, DEFAULT),
+	PINCFG(AUD_MCLK_PBB0,        DEFAULT,    UP,     NORMAL,   INPUT,   DISABLE, DEFAULT),
+	PINCFG(DVFS_PWM_PBB1,        CLDVFS,     NORMAL, TRISTATE, OUTPUT,  DISABLE, DEFAULT),
+	PINCFG(DVFS_CLK_PBB2,        RSVD0,      DOWN,   TRISTATE, OUTPUT,  DISABLE, DEFAULT),
+	PINCFG(GPIO_X1_AUD_PBB3,     RSVD0,      DOWN,   TRISTATE, OUTPUT,  DISABLE, DEFAULT),
+	PINCFG(GPIO_X3_AUD_PBB4,     RSVD0,      DOWN,   TRISTATE, OUTPUT,  DISABLE, DEFAULT),
+	PINCFG(HDMI_CEC_PCC0,        CEC,        NORMAL, NORMAL,   INPUT,   DISABLE, HIGH),
+	PINCFG(HDMI_INT_DP_HPD_PCC1, DP,         NORMAL, NORMAL,   INPUT,   DISABLE, NORMAL),
+	PINCFG(SPDIF_OUT_PCC2,       RSVD1,      DOWN,   TRISTATE, OUTPUT,  DISABLE, DEFAULT),
+	PINCFG(SPDIF_IN_PCC3,        RSVD1,      DOWN,   TRISTATE, OUTPUT,  DISABLE, DEFAULT),
+	PINCFG(USB_VBUS_EN0_PCC4,    DEFAULT,    UP,     NORMAL,   INPUT,   DISABLE, NORMAL),
+	PINCFG(USB_VBUS_EN1_PCC5,    RSVD1,      DOWN,   TRISTATE, OUTPUT,  DISABLE, NORMAL),
+	PINCFG(DP_HPD0_PCC6,         DP,         NORMAL, NORMAL,   INPUT,   DISABLE, DEFAULT),
+	PINCFG(PCC7,                 RSVD0,      DOWN,   TRISTATE, OUTPUT,  DISABLE, NORMAL),
+	PINCFG(SPI2_CS1_PDD0,        DEFAULT,    DOWN,   NORMAL,   INPUT,   DISABLE, DEFAULT),
+	PINCFG(QSPI_SCK_PEE0,        QSPI,       NORMAL, NORMAL,   INPUT,   DISABLE, DEFAULT),
+	PINCFG(QSPI_CS_N_PEE1,       QSPI,       NORMAL, NORMAL,   OUTPUT,  DISABLE, DEFAULT),
+	PINCFG(QSPI_IO0_PEE2,        QSPI,       NORMAL, NORMAL,   INPUT,   DISABLE, DEFAULT),
+	PINCFG(QSPI_IO1_PEE3,        QSPI,       NORMAL, NORMAL,   INPUT,   DISABLE, DEFAULT),
+	PINCFG(QSPI_IO2_PEE4,        QSPI,       NORMAL, NORMAL,   INPUT,   DISABLE, DEFAULT),
+	PINCFG(QSPI_IO3_PEE5,        QSPI,       NORMAL, NORMAL,   INPUT,   DISABLE, DEFAULT),
+	PINCFG(CORE_PWR_REQ,         CORE,       NORMAL, NORMAL,   OUTPUT,  DISABLE, DEFAULT),
+	PINCFG(CPU_PWR_REQ,          RSVD1,      DOWN,   TRISTATE, OUTPUT,  DISABLE, DEFAULT),
+	PINCFG(PWR_INT_N,            PMI,        UP,     NORMAL,   INPUT,   DISABLE, DEFAULT),
+	PINCFG(CLK_32K_IN,           CLK,        NORMAL, NORMAL,   INPUT,   DISABLE, DEFAULT),
+	PINCFG(JTAG_RTCK,            JTAG,       NORMAL, NORMAL,   OUTPUT,  DISABLE, DEFAULT),
+	PINCFG(CLK_REQ,              RSVD1,      DOWN,   TRISTATE, OUTPUT,  DISABLE, DEFAULT),
+	PINCFG(SHUTDOWN,             SHUTDOWN,   NORMAL, NORMAL,   OUTPUT,  DISABLE, DEFAULT),
+};
+
+#define DRVCFG(_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) \
+	{						\
+		.drvgrp = PMUX_DRVGRP_##_drvgrp,	\
+		.slwf   = _slwf,			\
+		.slwr   = _slwr,			\
+		.drvup  = _drvup,			\
+		.drvdn  = _drvdn,			\
+		.lpmd   = PMUX_LPMD_##_lpmd,		\
+		.schmt  = PMUX_SCHMT_##_schmt,		\
+		.hsm    = PMUX_HSM_##_hsm,		\
+	}
+
+static const struct pmux_drvgrp_config p3450_0000_drvgrps[] = {
+};
+
+#endif /* PINMUX_CONFIG_P3450_0000_H */
+diff --git a/configs/p3450-0000_defconfig b/configs/p3450-0000_defconfig
+new file mode 100644
+index 000000000000..3a95028279d3
+--- /dev/null
+++ b/configs/p3450-0000_defconfig
+@@ -0,0 +1,55 @@
+CONFIG_ARM=y
+CONFIG_TEGRA=y
+CONFIG_SYS_TEXT_BASE=0x80080000
+CONFIG_TEGRA210=y
+CONFIG_TARGET_P3450_0000=y
+CONFIG_NR_DRAM_BANKS=2
+CONFIG_OF_SYSTEM_SETUP=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_CONSOLE_MUX=y
+CONFIG_SYS_STDIO_DEREGISTER=y
+CONFIG_SYS_PROMPT="Tegra210 (P3450-0000) # "
+# CONFIG_CMD_IMI is not set
+CONFIG_CMD_DFU=y
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_SETEXPR is not set
+# CONFIG_CMD_NFS is not set
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_OF_LIVE=y
+CONFIG_DEFAULT_DEVICE_TREE="tegra210-p3450-0000"
+CONFIG_DFU_MMC=y
+CONFIG_DFU_RAM=y
+CONFIG_DFU_SF=y
+CONFIG_SYS_I2C_TEGRA=y
+CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=24000000
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_RTL8169=y
+CONFIG_PCI=y
+CONFIG_DM_PCI=y
+CONFIG_DM_PCI_COMPAT=y
+CONFIG_PCI_TEGRA=y
+CONFIG_SYS_NS16550=y
+CONFIG_TEGRA114_SPI=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_TEGRA=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="NVIDIA"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0955
+CONFIG_USB_GADGET_PRODUCT_NUM=0x701a
+CONFIG_CI_UDC=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_USB_HOST_ETHER=y
+CONFIG_USB_ETHER_ASIX=y
+# CONFIG_ENV_IS_IN_MMC is not set
+diff --git a/include/configs/p3450-0000.h b/include/configs/p3450-0000.h
+new file mode 100644
+index 000000000000..ee819b7573b0
+--- /dev/null
+++ b/include/configs/p3450-0000.h
+@@ -0,0 +1,34 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * (C) Copyright 2018-2019 NVIDIA Corporation. All rights reserved.
+ */
+
+#ifndef _P3450_0000_H
+#define _P3450_0000_H
+
+#include <linux/sizes.h>
+
+#include "tegra210-common.h"
+
+/* High-level configuration options */
+#define CONFIG_TEGRA_BOARD_STRING	"NVIDIA P3450-0000"
+
+/* Board-specific serial config */
+#define CONFIG_TEGRA_ENABLE_UARTA
+
+/* Only MMC1/PXE/DHCP for now, add USB back in later when supported */
+#define BOOT_TARGET_DEVICES(func) \
+	func(MMC, mmc, 0) \
+	func(PXE, pxe, na) \
+	func(DHCP, dhcp, na)
+
+/* SPI */
+#define CONFIG_SPI_FLASH_SIZE		(4 << 20)
+
+#include "tegra-common-usb-gadget.h"
+#include "tegra-common-post.h"
+
+/* Crystal is 38.4MHz. clk_m runs at half that rate */
+#define COUNTER_FREQUENCY	19200000
+
+#endif /* _P3450_0000_H */
--- a/AllWinner-PineTab.patch
+++ b/AllWinner-PineTab.patch
@ -1,45 +0,0 @@
-From 6bf15552c2b6becb48ce7732120e0ddb2078cb1a Mon Sep 17 00:00:00 2001
-From: Peter Robinson <pbrobinson@gmail.com>
-Date: Tue, 14 Apr 2020 09:53:07 +0100
-Subject: [PATCH 9/9] initial pinetab support
-
-Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
---
- configs/pinetab_defconfig | 26 ++++++++++++++++++++++++++
- 1 file changed, 26 insertions(+)
- create mode 100644 configs/pinetab_defconfig
-
-diff --git a/configs/pinetab_defconfig b/configs/pinetab_defconfig
-new file mode 100644
-index 0000000000..5b9620f3e5
--- /dev/null
-+++ b/configs/pinetab_defconfig
-@@ -0,0 +1,26 @@
-+CONFIG_ARM=y
-+CONFIG_ARCH_SUNXI=y
-+CONFIG_SPL=y
-+CONFIG_MACH_SUN50I=y
-+CONFIG_SUNXI_DRAM_LPDDR3_STOCK=y
-+CONFIG_DRAM_CLK=552
-+CONFIG_DRAM_ZQ=3881949
-+CONFIG_MMC_SUNXI_SLOT_EXTRA=2
-+CONFIG_R_I2C_ENABLE=y
-+CONFIG_SPL_SPI_SUNXI=y
-+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-+CONFIG_USE_PREBOOT=y
-+# CONFIG_SPL_DOS_PARTITION is not set
-+# CONFIG_SPL_EFI_PARTITION is not set
-+CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-pinetab"
-+CONFIG_OF_LIST="sun50i-a64-pinetab"
-+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-+CONFIG_DM_REGULATOR=y
-+CONFIG_DM_REGULATOR_FIXED=y
-+CONFIG_DM_PWM=y
-+CONFIG_PWM_SUNXI=y
-+CONFIG_LED=y
-+CONFIG_LED_GPIO=y
-+CONFIG_USB_EHCI_HCD=y
-+CONFIG_USB_OHCI_HCD=y
-+CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
-- 
-2.26.0
--- a/Raspberry-Pi-400-Compute-Module-4-support.patch
+++ b/Raspberry-Pi-400-Compute-Module-4-support.patch
--- a/16
+++ b/16
@ -1,5 +1,6 @@
 a64-olinuxino
 amarula_a64_relic
+avnet_ultra96_rev1
 bananapi_m2_plus_h5
 bananapi_m64
 dragonboard410c
@ -17,11 +18,8 @@ khadas-edge-rk3399
 khadas-vim
 khadas-vim2
 khadas-vim3
-khadas-vim3l
 libretech-ac
 libretech_all_h3_cc_h5
-libretech_all_h3_it_h5
-libretech_all_h5_cc_h5
 libretech-cc
 mvebu_espressobin-88f3720
 mvebu_mcbin-88f8040
@ -29,7 +27,6 @@ nanopc-t4-rk3399
 nanopi_a64
 nanopi-k2
 nanopi-m4-rk3399
-nanopi-m4-2gb-rk3399
 nanopi_neo2
 nanopi-neo4-rk3399
 nanopi_neo_plus2
@ -49,27 +46,18 @@ p3450-0000
 pine64-lts
 pine64_plus
 pinebook
-pinebook-pro-rk3399
-pinephone
-pinetab
 pine_h64
 poplar
 puma-rk3399
 rock64-rk3328
 rock960-rk3399
 rock-pi-4-rk3399
-rock-pi-4c-rk3399
-rock-pi-e-rk3328
-rock-pi-n10-rk3399pro
 rockpro64-rk3399
-roc-cc-rk3328
 roc-pc-rk3399
-roc-pc-mezzanine-rk3399
 rpi_3
 rpi_4
-rpi_arm64
 sopine_baseboard
 teres_i
 turris_mox
 vexpress_aemv8a_juno
-xilinx_zynqmp_virt
+xilinx_zynqmp_zcu100_revC
--- a/9
+++ b/9
@ -87,6 +87,7 @@ novena
 odroid
 odroid-xu3
 omap3_beagle
+omap3_pandora
 omap4_panda
 omap5_uevm
 Orangepi
@ -102,7 +103,6 @@ orangepi_r1
 orangepi_zero
 origen
 paz00
-pinecube
 polaroid_mid2809pxe04
 pov_protab2_ips9
 q8_a13_tablet
@ -113,7 +113,6 @@ qemu_arm
 r7-tv-dongle
 riotboard
 rock
-rock-pi-n8-rk3288
 rock2
 rpi_2
 rpi_3_32b
@ -122,11 +121,9 @@ Sinlinx_SinA31s
 Sinovoip_BPI_M2
 Sinovoip_BPI_M3
 stih410-b2260
-stm32mp15_basic
 sunxi_Gemei_G9
 tbs_a711
 tinker-rk3288
-tinker-s-rk3288
 trimslice
 udoo
 udoo_neo
@ -140,4 +137,6 @@ warp7
 Wexler_TAB7200
 Wits_Pro_A20_DKT
 Yones_Toptech_BS1078_V2
-xilinx_zynq_virt
+zynq_microzed
+zynq_zed
+zynq_zybo
--- a/arm-rk3399-enable-rng-on-rock960-and-firefly3399.patch
+++ b/arm-rk3399-enable-rng-on-rock960-and-firefly3399.patch
@ -1,135 +0,0 @@
-From 5cb3ca7ebd46c1983d0929b5ba027a03c1f5e51e Mon Sep 17 00:00:00 2001
-From: Peter Robinson <pbrobinson@gmail.com>
-Date: Wed, 16 Dec 2020 15:22:34 +0000
-Subject: [PATCH 1/2] arm: dts: rockchip: rk3399: enable rng at the SoC level
-
-The rng is embedded in the SoC so enable it in the device tree
-universally, the use of it can be controlled by enabling/disabling
-at the device config level.
-
-Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
---
- arch/arm/dts/rk3399-evb-u-boot.dtsi          | 4 ----
- arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi | 4 ----
- arch/arm/dts/rk3399-rockpro64-u-boot.dtsi    | 4 ----
- arch/arm/dts/rk3399-u-boot.dtsi              | 2 +-
- 4 files changed, 1 insertion(+), 13 deletions(-)
-
-diff --git a/arch/arm/dts/rk3399-evb-u-boot.dtsi b/arch/arm/dts/rk3399-evb-u-boot.dtsi
-index 8056dc843e..398b205ec2 100644
--- a/arch/arm/dts/rk3399-evb-u-boot.dtsi
-+++ b/arch/arm/dts/rk3399-evb-u-boot.dtsi
-@@ -13,10 +13,6 @@
- 	};
- };
- 
-&rng {
-	status = "okay";
-};
-
- &i2c0 {
- 	u-boot,dm-pre-reloc;
- };
-diff --git a/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi b/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi
-index ded7db0aef..c3e866a779 100644
--- a/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi
-+++ b/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi
-@@ -28,10 +28,6 @@
- 	u-boot,dm-pre-reloc;
- };
- 
-&rng {
-	status = "okay";
-};
-
- &sdhci {
- 	max-frequency = <25000000>;
- 	u-boot,dm-pre-reloc;
-diff --git a/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi b/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi
-index 6317b47e41..37dff04adf 100644
--- a/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi
-+++ b/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi
-@@ -15,10 +15,6 @@
- 	};
- };
- 
-&rng {
-	status = "okay";
-};
-
- &spi1 {
- 	spi_flash: flash@0 {
- 		u-boot,dm-pre-reloc;
-diff --git a/arch/arm/dts/rk3399-u-boot.dtsi b/arch/arm/dts/rk3399-u-boot.dtsi
-index ecd230c720..73922c328a 100644
--- a/arch/arm/dts/rk3399-u-boot.dtsi
-+++ b/arch/arm/dts/rk3399-u-boot.dtsi
-@@ -32,7 +32,7 @@
- 	rng: rng@ff8b8000 {
- 		compatible = "rockchip,cryptov1-rng";
- 		reg = <0x0 0xff8b8000 0x0 0x1000>;
-		status = "disabled";
-+		status = "okay";
- 	};
- 
- 	dmc: dmc {
-- 
-2.29.2
-
-From 62093137fcbe760d009cf2757feda7ccf328fbb7 Mon Sep 17 00:00:00 2001
-From: Peter Robinson <pbrobinson@gmail.com>
-Date: Wed, 16 Dec 2020 15:37:21 +0000
-Subject: [PATCH 2/2] configs: rk3399: enable rng on firefly/rock960/rockpro64
-
-Enable the RNG on the Firefly, rock960 and RockPro64 devices
-to enable KASLR on devices that support it.
-
-Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
---
- configs/firefly-rk3399_defconfig   | 2 ++
- configs/rock960-rk3399_defconfig   | 2 ++
- configs/rockpro64-rk3399_defconfig | 2 ++
- 3 files changed, 6 insertions(+)
-
-diff --git a/configs/firefly-rk3399_defconfig b/configs/firefly-rk3399_defconfig
-index c453b82dc5..cfbaae40aa 100644
--- a/configs/firefly-rk3399_defconfig
-+++ b/configs/firefly-rk3399_defconfig
-@@ -35,6 +35,8 @@ CONFIG_MMC_DW=y
- CONFIG_MMC_DW_ROCKCHIP=y
- CONFIG_MMC_SDHCI=y
- CONFIG_MMC_SDHCI_ROCKCHIP=y
-+CONFIG_DM_RNG=y
-+CONFIG_RNG_ROCKCHIP=y
- CONFIG_SF_DEFAULT_SPEED=20000000
- CONFIG_DM_ETH=y
- CONFIG_ETH_DESIGNWARE=y
-diff --git a/configs/rock960-rk3399_defconfig b/configs/rock960-rk3399_defconfig
-index 65dce3cd73..aadbc55f57 100644
--- a/configs/rock960-rk3399_defconfig
-+++ b/configs/rock960-rk3399_defconfig
-@@ -39,6 +39,8 @@ CONFIG_MMC_DW_ROCKCHIP=y
- CONFIG_MMC_SDHCI=y
- CONFIG_MMC_SDHCI_SDMA=y
- CONFIG_MMC_SDHCI_ROCKCHIP=y
-+CONFIG_DM_RNG=y
-+CONFIG_RNG_ROCKCHIP=y
- CONFIG_DM_ETH=y
- CONFIG_NVME=y
- CONFIG_PCI=y
-diff --git a/configs/rockpro64-rk3399_defconfig b/configs/rockpro64-rk3399_defconfig
-index 575b7a20d5..f78dfcc8f7 100644
--- a/configs/rockpro64-rk3399_defconfig
-+++ b/configs/rockpro64-rk3399_defconfig
-@@ -42,6 +42,8 @@ CONFIG_MMC_DW=y
- CONFIG_MMC_DW_ROCKCHIP=y
- CONFIG_MMC_SDHCI=y
- CONFIG_MMC_SDHCI_ROCKCHIP=y
-+CONFIG_DM_RNG=y
-+CONFIG_RNG_ROCKCHIP=y
- CONFIG_SF_DEFAULT_BUS=1
- CONFIG_SPI_FLASH_GIGADEVICE=y
- CONFIG_DM_ETH=y
-- 
-2.29.2
-
--- a/arm-tegra-defaine-fdtfile-for-all-devices.patch
+++ b/arm-tegra-defaine-fdtfile-for-all-devices.patch
@ -0,0 +1,162 @@
+From 1e93c98419e6a1ea62ef697ed915617024eb6da0 Mon Sep 17 00:00:00 2001
+From: Peter Robinson <pbrobinson@gmail.com>
+Date: Thu, 18 Apr 2019 14:03:33 +0100
+Subject: [PATCH] arm: tegra: defaine fdtfile for all devices
+
+Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
+---
+ include/configs/tegra-common.h    | 6 ++++++
+ include/configs/tegra114-common.h | 1 +
+ include/configs/tegra124-common.h | 1 +
+ include/configs/tegra186-common.h | 1 +
+ include/configs/tegra20-common.h  | 1 +
+ include/configs/tegra210-common.h | 1 +
+ include/configs/tegra30-common.h  | 1 +
+ 7 files changed, 12 insertions(+)
+
+diff --git a/include/configs/tegra-common.h b/include/configs/tegra-common.h
+index 84f671d00c..c3e16d8cfc 100644
+--- a/include/configs/tegra-common.h
+++ b/include/configs/tegra-common.h
+@@ -56,6 +56,12 @@
+ #define CONFIG_SYS_MEMTEST_START	(NV_PA_SDRC_CS0 + 0x600000)
+ #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + 0x100000)
+ 
+#ifdef CONFIG_ARM64
+#define FDTFILE "nvidia/" CONFIG_DEFAULT_DEVICE_TREE ".dtb"
+#else
+#define FDTFILE CONFIG_DEFAULT_DEVICE_TREE ".dtb"
+#endif
+
+ /*-----------------------------------------------------------------------
+  * Physical Memory Map
+  */
+diff --git a/include/configs/tegra114-common.h b/include/configs/tegra114-common.h
+index 1aa4412645..0c44a7673b 100644
+--- a/include/configs/tegra114-common.h
+++ b/include/configs/tegra114-common.h
+@@ -50,6 +50,7 @@
+ 	"scriptaddr=0x90000000\0" \
+ 	"pxefile_addr_r=0x90100000\0" \
+ 	"kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
+	"fdtfile=" FDTFILE "\0" \
+ 	"fdt_addr_r=0x83000000\0" \
+ 	"ramdisk_addr_r=0x83100000\0"
+ 
+diff --git a/include/configs/tegra124-common.h b/include/configs/tegra124-common.h
+index 3530684164..29da06c8f7 100644
+--- a/include/configs/tegra124-common.h
+++ b/include/configs/tegra124-common.h
+@@ -52,6 +52,7 @@
+ 	"scriptaddr=0x90000000\0" \
+ 	"pxefile_addr_r=0x90100000\0" \
+ 	"kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
+	"fdtfile=" FDTFILE "\0" \
+ 	"fdt_addr_r=0x83000000\0" \
+ 	"ramdisk_addr_r=0x83100000\0"
+ 
+diff --git a/include/configs/tegra186-common.h b/include/configs/tegra186-common.h
+index b4936cc731..5c3ad35c76 100644
+--- a/include/configs/tegra186-common.h
+++ b/include/configs/tegra186-common.h
+@@ -49,6 +49,7 @@
+ 	"scriptaddr=0x90000000\0" \
+ 	"pxefile_addr_r=0x90100000\0" \
+ 	"kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
+	"fdtfile=" FDTFILE "\0" \
+ 	"fdt_addr_r=0x82000000\0" \
+ 	"ramdisk_addr_r=0x82100000\0"
+ 
+diff --git a/include/configs/tegra20-common.h b/include/configs/tegra20-common.h
+index e58477e289..73c94d993b 100644
+--- a/include/configs/tegra20-common.h
+++ b/include/configs/tegra20-common.h
+@@ -51,6 +51,7 @@
+ 	"scriptaddr=0x10000000\0" \
+ 	"pxefile_addr_r=0x10100000\0" \
+ 	"kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
+	"fdtfile=" FDTFILE "\0" \
+ 	"fdt_addr_r=0x03000000\0" \
+ 	"ramdisk_addr_r=0x03100000\0"
+ 
+diff --git a/include/configs/tegra210-common.h b/include/configs/tegra210-common.h
+index 1c533118ad..69e446ed58 100644
+--- a/include/configs/tegra210-common.h
+++ b/include/configs/tegra210-common.h
+@@ -46,6 +46,7 @@
+ 	"scriptaddr=0x90000000\0" \
+ 	"pxefile_addr_r=0x90100000\0" \
+ 	"kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
+	"fdtfile=" FDTFILE "\0" \
+ 	"fdt_addr_r=0x82000000\0" \
+ 	"ramdisk_addr_r=0x82100000\0"
+ 
+diff --git a/include/configs/tegra30-common.h b/include/configs/tegra30-common.h
+index 2d8948d9d9..27696009cd 100644
+--- a/include/configs/tegra30-common.h
+++ b/include/configs/tegra30-common.h
+@@ -47,6 +47,7 @@
+ 	"scriptaddr=0x90000000\0" \
+ 	"pxefile_addr_r=0x90100000\0" \
+ 	"kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
+	"fdtfile=" FDTFILE "\0" \
+ 	"fdt_addr_r=0x83000000\0" \
+ 	"ramdisk_addr_r=0x83100000\0"
+ 
+-- 
+2.21.0
+From 267dc15aa8f247362b04387d6a1ab01d94d41aef Mon Sep 17 00:00:00 2001
+From: Peter Robinson <pbrobinson@gmail.com>
+Date: Thu, 18 Apr 2019 15:44:59 +0100
+Subject: [PATCH] add BOOTENV_EFI_SET_FDTFILE_FALLBACK for tegra186 because tx2
+ variants
+
+Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
+---
+ include/config_distro_bootcmd.h   | 2 ++
+ include/configs/tegra186-common.h | 7 ++++++-
+ 2 files changed, 8 insertions(+), 1 deletion(-)
+
+diff --git a/include/config_distro_bootcmd.h b/include/config_distro_bootcmd.h
+index 4993303f4d..cd317bb457 100644
+--- a/include/config_distro_bootcmd.h
+++ b/include/config_distro_bootcmd.h
+@@ -118,8 +118,10 @@
+ 	  "setenv efi_fdtfile ${soc}-${board}${boardver}.dtb; "           \
+ 	"fi; "
+ #else
+#ifndef BOOTENV_EFI_SET_FDTFILE_FALLBACK
+ #define BOOTENV_EFI_SET_FDTFILE_FALLBACK
+ #endif
+#endif
+ 
+ 
+ #define BOOTENV_SHARED_EFI                                                \
+diff --git a/include/configs/tegra186-common.h b/include/configs/tegra186-common.h
+index 5c3ad35c76..d5f21e0907 100644
+--- a/include/configs/tegra186-common.h
+++ b/include/configs/tegra186-common.h
+@@ -20,6 +20,12 @@
+ /* Generic Interrupt Controller */
+ #define CONFIG_GICV2
+ 
+#undef FDTFILE
+#define BOOTENV_EFI_SET_FDTFILE_FALLBACK                                  \
+        "if test -z \"${fdtfile}\" -a -n \"${soc}\"; then "               \
+          "setenv efi_fdtfile ${vendor}/${soc}-${board}${boardver}.dtb; "           \
+        "fi; "
+
+ /*
+  * Memory layout for where various images get loaded by boot scripts:
+  *
+@@ -49,7 +55,6 @@
+ 	"scriptaddr=0x90000000\0" \
+ 	"pxefile_addr_r=0x90100000\0" \
+ 	"kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
+-	"fdtfile=" FDTFILE "\0" \
+ 	"fdt_addr_r=0x82000000\0" \
+ 	"ramdisk_addr_r=0x82100000\0"
+ 
+-- 
+2.21.0
+
--- a/image-add-image.gz-parsing-support-in-booti.patch
+++ b/image-add-image.gz-parsing-support-in-booti.patch
@ -0,0 +1,267 @@
+diff --git a/cmd/booti.c b/cmd/booti.c
+index 841eff10..60bb4920 100644
+--- a/cmd/booti.c
+++ b/cmd/booti.c
+@@ -13,6 +13,7 @@
+ #include <linux/kernel.h>
+ #include <linux/sizes.h>
+ 
+DECLARE_GLOBAL_DATA_PTR;
+ /*
+  * Image booting support
+  */
+@@ -23,6 +24,12 @@ static int booti_start(cmd_tbl_t *cmdtp, int flag, int argc,
+ 	ulong ld;
+ 	ulong relocated_addr;
+ 	ulong image_size;
+	uint8_t *temp;
+	ulong dest;
+	ulong dest_end;
+	unsigned long comp_len;
+	unsigned long decomp_len;
+	int ctype;
+ 
+ 	ret = do_bootm_states(cmdtp, flag, argc, argv, BOOTM_STATE_START,
+ 			      images, 1);
+@@ -37,6 +44,33 @@ static int booti_start(cmd_tbl_t *cmdtp, int flag, int argc,
+ 		debug("*  kernel: cmdline image address = 0x%08lx\n", ld);
+ 	}
+ 
+	temp = map_sysmem(ld, 0);
+	ctype = image_decomp_type(temp, 2);
+	if (ctype > 0) {
+		dest = env_get_ulong("kernel_comp_addr_r", 16, 0);
+		comp_len = env_get_ulong("filesize", 16, 0);
+		if (!dest || !comp_len) {
+			puts("kernel_comp_addr_r or filesize is not provided!\n");
+			return -EINVAL;
+		}
+		if (dest < gd->ram_base || dest > gd->ram_top) {
+			puts("kernel_comp_addr_r is outside of DRAM range!\n");
+			return -EINVAL;
+		}
+
+		debug("kernel image compression type %d size = 0x%08lx address = 0x%08lx\n",
+			ctype, comp_len, (ulong)dest);
+		decomp_len = comp_len * 10;
+		ret = image_decomp(ctype, 0, ld, IH_TYPE_KERNEL,
+				 (void *)dest, (void *)ld, comp_len,
+				 decomp_len, &dest_end);
+		if (ret)
+			return ret;
+		/* dest_end contains the uncompressed Image size */
+		memmove((void *) ld, (void *)dest, dest_end);
+	}
+	unmap_sysmem((void *)ld);
+
+ 	ret = booti_setup(ld, &relocated_addr, &image_size, false);
+ 	if (ret != 0)
+ 		return 1;
+@@ -99,10 +133,14 @@ int do_booti(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+ #ifdef CONFIG_SYS_LONGHELP
+ static char booti_help_text[] =
+ 	"[addr [initrd[:size]] [fdt]]\n"
+-	"    - boot Linux 'Image' stored at 'addr'\n"
+	"    - boot Linux flat or compressed 'Image' stored at 'addr'\n"
+ 	"\tThe argument 'initrd' is optional and specifies the address\n"
+ 	"\tof an initrd in memory. The optional parameter ':size' allows\n"
+ 	"\tspecifying the size of a RAW initrd.\n"
+	"\tCurrently only booting from gz, bz2, lzma and lz4 compression\n"
+	"\ttypes are supported. In order to boot from any of these compressed\n"
+	"\timages, user have to set kernel_comp_addr_r and filesize enviornment\n"
+	"\tvariables beforehand.\n"
+ #if defined(CONFIG_OF_LIBFDT)
+ 	"\tSince booting a Linux kernel requires a flat device-tree, a\n"
+ 	"\tthird argument providing the address of the device-tree blob\n"
+diff --git a/common/image.c b/common/image.c
+index f17fa40c..cbd6c494 100644
+--- a/common/image.c
+++ b/common/image.c
+@@ -197,6 +197,14 @@ struct table_info {
+ 	const table_entry_t *table;
+ };
+ 
+static const struct comp_magic_map image_comp[] = {
+	{	IH_COMP_BZIP2,	"bzip2",	{0x42, 0x5a},},
+	{	IH_COMP_GZIP,	"gzip",		{0x1f, 0x8b},},
+	{	IH_COMP_LZMA,	"lzma",		{0x5d, 0x00},},
+	{	IH_COMP_LZO,	"lzo",		{0x89, 0x4c},},
+	{	IH_COMP_NONE,	"none",		{},	},
+};
+
+ static const struct table_info table_info[IH_COUNT] = {
+ 	{ "architecture", IH_ARCH_COUNT, uimage_arch },
+ 	{ "compression", IH_COMP_COUNT, uimage_comp },
+@@ -402,6 +410,21 @@ static void print_decomp_msg(int comp_type, int type, bool is_xip)
+ 		printf("   Uncompressing %s\n", name);
+ }
+ 
+int image_decomp_type(const unsigned char *buf, ulong len)
+{
+	const struct comp_magic_map *cmagic = image_comp;
+
+	if (len < 2)
+		return -EINVAL;
+
+	for (; cmagic->comp_id > 0; cmagic++) {
+		if (!memcmp(buf, cmagic->magic, 2))
+			break;
+	}
+
+	return cmagic->comp_id;
+}
+
+ int image_decomp(int comp, ulong load, ulong image_start, int type,
+ 		 void *load_buf, void *image_buf, ulong image_len,
+ 		 uint unc_len, ulong *load_end)
+diff --git a/doc/README.distro b/doc/README.distro
+index ab6e6f4e..67b49e1e 100644
+--- a/doc/README.distro
+++ b/doc/README.distro
+@@ -246,6 +246,18 @@ kernel_addr_r:
+ 
+   A size of 16MB for the kernel is likely adequate.
+ 
+kernel_comp_addr_r:
+  Optional. This is only required if user wants to boot Linux from a compressed
+  Image(.gz, .bz2, .lzma, .lzo) using booti command. It represents the location
+  in RAM where the compressed Image will be decompressed temporarily. Once the
+  decompression is complete, decompressed data will be moved kernel_addr_r for
+  booting.
+
+filesize:
+  Optional. This is only required if user wants to boot Linux from a compressed
+  Image using booti command. It represents the size of the compressed file. The
+  size has to at least the size of loaded image for decompression to succeed.
+
+ pxefile_addr_r:
+ 
+   Mandatory. The location in RAM where extlinux.conf will be loaded to prior
+diff --git a/doc/board/sifive/fu540.rst b/doc/board/sifive/fu540.rst
+index 7807f5b2..df2c5ad8 100644
+--- a/doc/board/sifive/fu540.rst
+++ b/doc/board/sifive/fu540.rst
+@@ -138,6 +138,10 @@ load uImage.
+    => setenv netmask 255.255.252.0
+    => setenv serverip 10.206.4.143
+    => setenv gateway 10.206.4.1
+
+If you want to use a flat kernel image such as Image file
+
+.. code-block:: none
+    => tftpboot ${kernel_addr_r} /sifive/fu540/Image
+    ethernet@10090000: PHY present at 0
+    ethernet@10090000: Starting autonegotiation...
+@@ -177,6 +181,57 @@ load uImage.
+             1.2 MiB/s
+    done
+    Bytes transferred = 8867100 (874d1c hex)
+
+Or if you want to use a compressed kernel image file such as Image.gz
+
+.. code-block:: none
+   => tftpboot ${kernel_addr_r} /sifive/fu540/Image.gz
+   ethernet@10090000: PHY present at 0
+   ethernet@10090000: Starting autonegotiation...
+   ethernet@10090000: Autonegotiation complete
+   ethernet@10090000: link up, 1000Mbps full-duplex (lpa: 0x3c00)
+   Using ethernet@10090000 device
+   TFTP from server 10.206.4.143; our IP address is 10.206.7.133
+   Filename '/sifive/fu540/Image.gz'.
+   Load address: 0x84000000
+   Loading: #################################################################
+            #################################################################
+            #################################################################
+            #################################################################
+            #################################################################
+            #################################################################
+            #################################################################
+            #################################################################
+            #################################################################
+            #################################################################
+            #################################################################
+            #################################################################
+            #################################################################
+            #################################################################
+            #################################################################
+            #################################################################
+            #################################################################
+            #################################################################
+            #################################################################
+            #################################################################
+            #################################################################
+            #################################################################
+            #################################################################
+            #################################################################
+            #################################################################
+            #################################################################
+            ##########################################
+            1.2 MiB/s
+   done
+   Bytes transferred = 4809458 (4962f2 hex)
+   =>setenv kernel_comp_addr_r 0x90000000
+   =>setenv filesize 0x500000
+
+By this time, correct kernel image is loaded and required enviornment variables
+are set. You can proceed to load the ramdisk and device tree from the tftp server
+as well.
+
+.. code-block:: none
+    => tftpboot ${ramdisk_addr_r} /sifive/fu540/uRamdisk
+    ethernet@10090000: PHY present at 0
+    ethernet@10090000: Starting autonegotiation...
+diff --git a/include/image.h b/include/image.h
+index f4d2aaf5..823c187b 100644
+--- a/include/image.h
+++ b/include/image.h
+@@ -447,6 +447,15 @@ typedef struct table_entry {
+ 	char	*lname;		/* long (output) name to print for messages */
+ } table_entry_t;
+ 
+/*
+ * Compression type and magic number mapping table.
+ */
+struct comp_magic_map {
+	int		comp_id;
+	const char	*name;
+	unsigned char	magic[2];
+};
+
+ /*
+  * get_table_entry_id() scans the translation table trying to find an
+  * entry that matches the given short name. If a matching entry is
+@@ -851,6 +860,18 @@ static inline int image_check_target_arch(const image_header_t *hdr)
+ }
+ #endif /* USE_HOSTCC */
+ 
+/**
+ * image_decomp_type() - Find out compression type of an image
+ *
+ * @buf:	Address in U-Boot memory where image is loaded.
+ * @len:	Length of the compressed image.
+ * @return	compression type or IH_COMP_NONE if not compressed.
+ *
+ * Note: Only following compression types are supported now.
+ * lzo, lzma, gzip, bzip2
+ */
+int image_decomp_type(const unsigned char *buf, ulong len);
+
+ /**
+  * image_decomp() - decompress an image
+  *
+diff --git a/lib/Kconfig b/lib/Kconfig
+index b8a8509d..53661baf 100644
+--- a/lib/Kconfig
+++ b/lib/Kconfig
+@@ -397,6 +397,11 @@ config GZIP
+ 	help
+ 	  This enables support for GZIP compression algorithm.
+ 
+config BZIP2
+	bool "Enable bzip2 decompression support"
+	help
+	  This enables support for BZIP2 compression algorithm.
+
+ config ZLIB
+ 	bool
+ 	default y
--- a/riscv-bootargs-preboot.patch
+++ b/riscv-bootargs-preboot.patch
@ -0,0 +1,22 @@
+diff --git a/configs/qemu-riscv64_smode_defconfig b/configs/qemu-riscv64_smode_defconfig
+index 33776f03..42ec49eb 100644
+--- a/configs/qemu-riscv64_smode_defconfig
+++ b/configs/qemu-riscv64_smode_defconfig
+@@ -13,3 +13,7 @@ CONFIG_CMD_NVEDIT_EFI=y
+ # CONFIG_CMD_MII is not set
+ CONFIG_OF_PRIOR_STAGE=y
+ CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0 earlycon"
+CONFIG_USE_PREBOOT=y
+CONFIG_PREBOOT="cp.l ${fdtcontroladdr} ${fdt_addr_r} 0x10000;"
+diff --git a/configs/sifive_fu540_defconfig b/configs/sifive_fu540_defconfig
+index 790da976..dff48057 100644
+--- a/configs/sifive_fu540_defconfig
+++ b/configs/sifive_fu540_defconfig
+@@ -11,3 +11,5 @@ CONFIG_DISPLAY_CPUINFO=y
+ CONFIG_DISPLAY_BOARDINFO=y
+ CONFIG_OF_PRIOR_STAGE=y
+ CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttySIF0 earlycon"
--- a/riscv-set-bootargs-nrcpus-preboot.patch
+++ b/riscv-set-bootargs-nrcpus-preboot.patch
@ -0,0 +1,24 @@
+diff --git a/configs/qemu-riscv64_smode_defconfig b/configs/qemu-riscv64_smode_defconfig
+index a7b0e06a..99f8111a 100644
+--- a/configs/qemu-riscv64_smode_defconfig
+++ b/configs/qemu-riscv64_smode_defconfig
+@@ -14,3 +14,8 @@ CONFIG_CMD_NVEDIT_EFI=y
+ CONFIG_OF_PRIOR_STAGE=y
+ CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+ CONFIG_DM_MTD=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0 earlycon"
+CONFIG_NR_CPUS=32
+CONFIG_USE_PREBOOT=y
+CONFIG_PREBOOT="cp.l ${fdtcontroladdr} ${fdt_addr_r} 0x10000;"
+diff --git a/configs/sifive_fu540_defconfig b/configs/sifive_fu540_defconfig
+index 7d38ec9a..b120537d 100644
+--- a/configs/sifive_fu540_defconfig
+++ b/configs/sifive_fu540_defconfig
+@@ -13,3 +13,6 @@ CONFIG_DISPLAY_BOARDINFO=y
+ CONFIG_OF_SEPARATE=y
+ CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+ CONFIG_DM_MTD=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttySIF0 earlycon"
+CONFIG_NR_CPUS=32
--- a/4
+++ b/4
@ -0,0 +1,4 @@
+qemu-riscv64
+qemu-riscv64_smode
+ae350_rv64
+sifive_fu540
--- a/riscv64-set-fdt_addr.patch
+++ b/riscv64-set-fdt_addr.patch
@ -0,0 +1,31 @@
+diff --git a/include/configs/qemu-riscv.h b/include/configs/qemu-riscv.h
+index fa9b9af9..bc831a84 100644
+--- a/include/configs/qemu-riscv.h
+++ b/include/configs/qemu-riscv.h
+@@ -56,6 +56,7 @@
+ 	"initrd_high=0xffffffffffffffff\0" \
+ 	"kernel_addr_r=0x84000000\0" \
+ 	"fdt_addr_r=0x88000000\0" \
+	"fdt_addr=0x88000000\0" \
+ 	"scriptaddr=0x88100000\0" \
+ 	"pxefile_addr_r=0x88200000\0" \
+ 	"ramdisk_addr_r=0x88300000\0" \
+diff --git a/include/configs/sifive-fu540.h b/include/configs/sifive-fu540.h
+index 736ceb1f..59cf0281 100644
+--- a/include/configs/sifive-fu540.h
+++ b/include/configs/sifive-fu540.h
+@@ -36,13 +36,10 @@
+ 	"initrd_high=0xffffffffffffffff\0" \
+ 	"kernel_addr_r=0x84000000\0" \
+ 	"fdt_addr_r=0x88000000\0" \
+	"fdt_addr=0x88000000\0" \
+ 	"scriptaddr=0x88100000\0" \
+ 	"pxefile_addr_r=0x88200000\0" \
+ 	"ramdisk_addr_r=0x88300000\0" \
+ 	BOOTENV
+ 
+-#define CONFIG_PREBOOT \
+-	"setenv fdt_addr ${fdtcontroladdr};" \
+-	"fdt addr ${fdtcontroladdr};"
+-
+ #endif /* __CONFIG_H */
--- a/rk3399-Pinebook-pro-EDP-support.patch
+++ b/rk3399-Pinebook-pro-EDP-support.patch
--- a/rng-Add-iProc-RNG200-driver.patch
+++ b/rng-Add-iProc-RNG200-driver.patch
@ -1,450 +0,0 @@
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-	Matthias Brugger <mbrugger@suse.com>
-Subject: [PATCH v2 1/2] rng: Add iProc RNG200 driver
-Date: Tue, 15 Dec 2020 10:49:23 +0100
-Message-Id: <20201215094924.30072-1-matthias.bgg@kernel.org>
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-From: Matthias Brugger <mbrugger@suse.com>
-
-Add support for random number generator RNG200.
-This is for example found on RPi4.
-
-Signed-off-by: Matthias Brugger <mbrugger@suse.com>
-Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
---
-
-Changes in v2: None
-
- drivers/rng/Kconfig        |   6 ++
- drivers/rng/Makefile       |   1 +
- drivers/rng/iproc_rng200.c | 186 +++++++++++++++++++++++++++++++++++++
- 3 files changed, 193 insertions(+)
- create mode 100644 drivers/rng/iproc_rng200.c
-
-diff --git a/drivers/rng/Kconfig b/drivers/rng/Kconfig
-index 11001c8ae7..94915d45b3 100644
--- a/drivers/rng/Kconfig
-+++ b/drivers/rng/Kconfig
-@@ -46,4 +46,10 @@ config RNG_ROCKCHIP
- 	  Enable random number generator for rockchip.This driver is
- 	  support rng module of crypto v1 and crypto v2.
- 
-+config RNG_IPROC200
-+	bool "Broadcom iProc RNG200 random number generator"
-+	depends on DM_RNG
-+	default n
-+	help
-+	  Enable random number generator for RPI4.
- endif
-diff --git a/drivers/rng/Makefile b/drivers/rng/Makefile
-index 8953406882..39f7ee3f03 100644
--- a/drivers/rng/Makefile
-+++ b/drivers/rng/Makefile
-@@ -9,3 +9,4 @@ obj-$(CONFIG_RNG_SANDBOX) += sandbox_rng.o
- obj-$(CONFIG_RNG_MSM) += msm_rng.o
- obj-$(CONFIG_RNG_STM32MP1) += stm32mp1_rng.o
- obj-$(CONFIG_RNG_ROCKCHIP) += rockchip_rng.o
-+obj-$(CONFIG_RNG_IPROC200) += iproc_rng200.o
-diff --git a/drivers/rng/iproc_rng200.c b/drivers/rng/iproc_rng200.c
-new file mode 100644
-index 0000000000..1063f43953
--- /dev/null
-+++ b/drivers/rng/iproc_rng200.c
-@@ -0,0 +1,186 @@
-+// SPDX-License-Identifier: GPL-2.0-or-later
-+/*
-+ * Copyright 2020, Matthias Brugger <mbrugger@suse.com>
-+ *
-+ * Driver for Raspberry Pi hardware random number generator
-+ */
-+
-+#include <common.h>
-+#include <dm.h>
-+#include <linux/delay.h>
-+#include <rng.h>
-+#include <asm/io.h>
-+
-+#define usleep_range(a, b) udelay((b))
-+
-+#define RNG_CTRL_OFFSET					0x00
-+#define RNG_CTRL_RNG_RBGEN_MASK				0x00001FFF
-+#define RNG_CTRL_RNG_RBGEN_ENABLE			0x00000001
-+#define RNG_CTRL_RNG_RBGEN_DISABLE			0x00000000
-+
-+#define RNG_SOFT_RESET_OFFSET				0x04
-+#define RNG_SOFT_RESET					0x00000001
-+
-+#define RBG_SOFT_RESET_OFFSET				0x08
-+#define RBG_SOFT_RESET					0x00000001
-+
-+#define RNG_INT_STATUS_OFFSET				0x18
-+#define RNG_INT_STATUS_MASTER_FAIL_LOCKOUT_IRQ_MASK	0x80000000
-+#define RNG_INT_STATUS_NIST_FAIL_IRQ_MASK		0x00000020
-+
-+#define RNG_FIFO_DATA_OFFSET				0x20
-+
-+#define RNG_FIFO_COUNT_OFFSET				0x24
-+#define RNG_FIFO_COUNT_RNG_FIFO_COUNT_MASK		0x000000FF
-+
-+struct iproc_rng200_platdata {
-+	fdt_addr_t base;
-+};
-+
-+static void iproc_rng200_enable(struct iproc_rng200_platdata *pdata, bool enable)
-+{
-+	fdt_addr_t rng_base = pdata->base;
-+	u32 val;
-+
-+	val = readl(rng_base + RNG_CTRL_OFFSET);
-+	val &= ~RNG_CTRL_RNG_RBGEN_MASK;
-+	if (enable)
-+		val |= RNG_CTRL_RNG_RBGEN_ENABLE;
-+	else
-+		val &= ~RNG_CTRL_RNG_RBGEN_ENABLE;
-+
-+	writel(val, rng_base + RNG_CTRL_OFFSET);
-+
-+}
-+
-+static void iproc_rng200_restart(struct iproc_rng200_platdata *pdata)
-+{
-+	fdt_addr_t rng_base = pdata->base;
-+	u32 val;
-+
-+	iproc_rng200_enable(pdata, false);
-+
-+	/* Clear all interrupt status */
-+	writel(0xFFFFFFFFUL, rng_base + RNG_INT_STATUS_OFFSET);
-+
-+	/* Reset RNG and RBG */
-+	val = readl(rng_base + RBG_SOFT_RESET_OFFSET);
-+	val |= RBG_SOFT_RESET;
-+	writel(val, rng_base + RBG_SOFT_RESET_OFFSET);
-+
-+	val = readl(rng_base + RNG_SOFT_RESET_OFFSET);
-+	val |= RNG_SOFT_RESET;
-+	writel(val, rng_base + RNG_SOFT_RESET_OFFSET);
-+
-+	val = readl(rng_base + RNG_SOFT_RESET_OFFSET);
-+	val &= ~RNG_SOFT_RESET;
-+	writel(val, rng_base + RNG_SOFT_RESET_OFFSET);
-+
-+	val = readl(rng_base + RBG_SOFT_RESET_OFFSET);
-+	val &= ~RBG_SOFT_RESET;
-+	writel(val, rng_base + RBG_SOFT_RESET_OFFSET);
-+
-+	iproc_rng200_enable(pdata, true);
-+}
-+
-+static int iproc_rng200_read(struct udevice *dev, void *data, size_t len)
-+{
-+	struct iproc_rng200_platdata *priv = dev_get_platdata(dev);
-+	char *buf = (char *)data;
-+	u32 num_remaining = len;
-+	u32 status;
-+
-+	#define MAX_RESETS_PER_READ	1
-+	u32 num_resets = 0;
-+
-+	while (num_remaining > 0) {
-+
-+		/* Is RNG sane? If not, reset it. */
-+		status = readl(priv->base + RNG_INT_STATUS_OFFSET);
-+		if ((status & (RNG_INT_STATUS_MASTER_FAIL_LOCKOUT_IRQ_MASK |
-+			RNG_INT_STATUS_NIST_FAIL_IRQ_MASK)) != 0) {
-+
-+			if (num_resets >= MAX_RESETS_PER_READ)
-+				return len - num_remaining;
-+
-+			iproc_rng200_restart(priv);
-+			num_resets++;
-+		}
-+
-+		/* Are there any random numbers available? */
-+		if ((readl(priv->base + RNG_FIFO_COUNT_OFFSET) &
-+				RNG_FIFO_COUNT_RNG_FIFO_COUNT_MASK) > 0) {
-+
-+			if (num_remaining >= sizeof(u32)) {
-+				/* Buffer has room to store entire word */
-+				*(u32 *)buf = readl(priv->base +
-+							RNG_FIFO_DATA_OFFSET);
-+				buf += sizeof(u32);
-+				num_remaining -= sizeof(u32);
-+			} else {
-+				/* Buffer can only store partial word */
-+				u32 rnd_number = readl(priv->base +
-+							RNG_FIFO_DATA_OFFSET);
-+				memcpy(buf, &rnd_number, num_remaining);
-+				buf += num_remaining;
-+				num_remaining = 0;
-+			}
-+
-+		} else {
-+			/* Can wait, give others chance to run */
-+			usleep_range(min(num_remaining * 10, 500U), 500);
-+		}
-+	}
-+
-+	return 0;
-+}
-+
-+static int iproc_rng200_probe(struct udevice *dev)
-+{
-+	struct iproc_rng200_platdata *priv = dev_get_platdata(dev);
-+
-+	iproc_rng200_enable(priv, true);
-+
-+	return 0;
-+}
-+
-+static int iproc_rng200_remove(struct udevice *dev)
-+{
-+	struct iproc_rng200_platdata *priv = dev_get_platdata(dev);
-+
-+	iproc_rng200_enable(priv, false);
-+
-+	return 0;
-+}
-+
-+static int iproc_rng200_ofdata_to_platdata(struct udevice *dev)
-+{
-+	struct iproc_rng200_platdata *pdata = dev_get_platdata(dev);
-+
-+	pdata->base = dev_read_addr(dev);
-+	if (!pdata->base)
-+		return -ENODEV;
-+
-+	return 0;
-+}
-+
-+static const struct dm_rng_ops iproc_rng200_ops = {
-+	.read = iproc_rng200_read,
-+};
-+
-+static const struct udevice_id iproc_rng200_rng_match[] = {
-+	{ .compatible = "brcm,bcm2711-rng200", },
-+	{ .compatible = "brcm,iproc-rng200", },
-+	{},
-+};
-+
-+U_BOOT_DRIVER(iproc_rng200_rng) = {
-+	.name = "iproc_rng200-rng",
-+	.id = UCLASS_RNG,
-+	.of_match = iproc_rng200_rng_match,
-+	.ops = &iproc_rng200_ops,
-+	.probe = iproc_rng200_probe,
-+	.remove = iproc_rng200_remove,
-+	.platdata_auto_alloc_size = sizeof(struct iproc_rng200_platdata),
-+	.ofdata_to_platdata = iproc_rng200_ofdata_to_platdata,
-+};
-
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-Cc: u-boot@lists.denx.de,
-	Matthias Brugger <mbrugger@suse.com>
-Subject: [PATCH v2 2/2] config: Enable iProc RNG200 driver in RPi4 configs
-Date: Tue, 15 Dec 2020 10:49:24 +0100
-Message-Id: <20201215094924.30072-2-matthias.bgg@kernel.org>
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-
-From: Matthias Brugger <mbrugger@suse.com>
-
-We find the iProc RNG200 in the Raspberry Pi 4. Add it to all it's
-config so that it can be used.
-
-Signed-off-by: Matthias Brugger <mbrugger@suse.com>
---
-
-Changes in v2:
- fix defconfigs using savedefconfig (Heinrich)
-
- configs/rpi_4_32b_defconfig | 2 ++
- configs/rpi_4_defconfig     | 2 ++
- configs/rpi_arm64_defconfig | 2 ++
- drivers/rng/iproc_rng200.c  | 1 -
- 4 files changed, 6 insertions(+), 1 deletion(-)
-
-diff --git a/configs/rpi_4_32b_defconfig b/configs/rpi_4_32b_defconfig
-index 5ddd838fd5..4039e46c81 100644
--- a/configs/rpi_4_32b_defconfig
-+++ b/configs/rpi_4_32b_defconfig
-@@ -36,6 +36,8 @@ CONFIG_PCI_BRCMSTB=y
- CONFIG_PINCTRL=y
- # CONFIG_PINCTRL_GENERIC is not set
- CONFIG_DM_RESET=y
-+CONFIG_DM_RNG=y
-+CONFIG_RNG_IPROC200=y
- # CONFIG_REQUIRE_SERIAL_CONSOLE is not set
- CONFIG_USB=y
- CONFIG_DM_USB=y
-diff --git a/configs/rpi_4_defconfig b/configs/rpi_4_defconfig
-index 2590d0a696..46b6cc3046 100644
--- a/configs/rpi_4_defconfig
-+++ b/configs/rpi_4_defconfig
-@@ -36,6 +36,8 @@ CONFIG_PCI_BRCMSTB=y
- CONFIG_PINCTRL=y
- # CONFIG_PINCTRL_GENERIC is not set
- CONFIG_DM_RESET=y
-+CONFIG_DM_RNG=y
-+CONFIG_RNG_IPROC200=y
- # CONFIG_REQUIRE_SERIAL_CONSOLE is not set
- CONFIG_USB=y
- CONFIG_DM_USB=y
-diff --git a/configs/rpi_arm64_defconfig b/configs/rpi_arm64_defconfig
-index 2639219a1a..b75144036d 100644
--- a/configs/rpi_arm64_defconfig
-+++ b/configs/rpi_arm64_defconfig
-@@ -33,6 +33,8 @@ CONFIG_PCI_BRCMSTB=y
- CONFIG_PINCTRL=y
- # CONFIG_PINCTRL_GENERIC is not set
- CONFIG_DM_RESET=y
-+CONFIG_DM_RNG=y
-+CONFIG_RNG_IPROC200=y
- # CONFIG_REQUIRE_SERIAL_CONSOLE is not set
- CONFIG_USB=y
- CONFIG_DM_USB=y
-diff --git a/drivers/rng/iproc_rng200.c b/drivers/rng/iproc_rng200.c
-index 1063f43953..378f6cf48d 100644
--- a/drivers/rng/iproc_rng200.c
-+++ b/drivers/rng/iproc_rng200.c
-@@ -50,7 +50,6 @@ static void iproc_rng200_enable(struct iproc_rng200_platdata *pdata, bool enable
- 		val &= ~RNG_CTRL_RNG_RBGEN_ENABLE;
- 
- 	writel(val, rng_base + RNG_CTRL_OFFSET);
-
- }
- 
- static void iproc_rng200_restart(struct iproc_rng200_platdata *pdata)
--- a/rockchip-spl-u-boot-itb-offset.patch
+++ b/rockchip-spl-u-boot-itb-offset.patch
@ -1,11 +0,0 @@
--- u-boot-2020.10/common/spl/Kconfig.orig	2020-10-07 12:08:54.972632715 +0100
-+++ u-boot-2020.10/common/spl/Kconfig	2020-10-07 12:08:59.100672506 +0100
-@@ -324,7 +324,7 @@
- 	default 0x200 if ARCH_SOCFPGA || ARCH_AT91
- 	default 0x300 if ARCH_ZYNQ || ARCH_KEYSTONE || OMAP34XX || OMAP44XX || \
- 		         OMAP54XX || AM33XX || AM43XX || ARCH_K3
-	default 0x4000 if ARCH_ROCKCHIP
-+	default 0x200 if ARCH_ROCKCHIP
- 	default 0x822 if TARGET_SIFIVE_FU540
- 	help
- 	  Address on the MMC to load U-Boot from, when the MMC is being used
--- a/rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch
+++ b/rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch
@ -1,96 +1,82 @@
-From f10f94831450671a77f61fe413b4a57459963860 Mon Sep 17 00:00:00 2001
+From 7bf054b1b2e1e4105e94642e18fc74a63eccce97 Mon Sep 17 00:00:00 2001
 From: Peter Robinson <pbrobinson@gmail.com>
-Date: Mon, 10 Aug 2020 22:20:29 +0100
+Date: Tue, 4 Dec 2018 15:26:59 +0000
 Subject: [PATCH] rpi: Use firmware provided device tree

 Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
 ---
- configs/rpi_0_w_defconfig      | 2 +-
- configs/rpi_2_defconfig        | 2 +-
- configs/rpi_3_32b_defconfig    | 2 +-
- configs/rpi_3_b_plus_defconfig | 2 +-
- configs/rpi_3_defconfig        | 2 +-
- configs/rpi_defconfig          | 2 +-
- 6 files changed, 6 insertions(+), 6 deletions(-)
+ configs/rpi_0_w_defconfig   | 2 +-
+ configs/rpi_2_defconfig     | 2 +-
+ configs/rpi_3_32b_defconfig | 2 +-
+ configs/rpi_3_defconfig     | 2 +-
+ configs/rpi_defconfig       | 2 +-
+ 5 files changed, 5 insertions(+), 5 deletions(-)

 diff --git a/configs/rpi_0_w_defconfig b/configs/rpi_0_w_defconfig
-index bba5e12b12..0241f4c6d3 100644
+index 66b0de31b60..9446465fdf7 100644
 --- a/configs/rpi_0_w_defconfig
 +++ b/configs/rpi_0_w_defconfig
-@@ -17,7 +17,7 @@ CONFIG_CMD_GPIO=y
+@@ -14,7 +14,7 @@ CONFIG_CMD_GPIO=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_FS_UUID=y
 -CONFIG_OF_EMBED=y
 +CONFIG_OF_BOARD=y
+ CONFIG_DEFAULT_DEVICE_TREE="bcm2835-rpi-zero-w"
+ CONFIG_ENV_FAT_INTERFACE="mmc"
 CONFIG_ENV_FAT_DEVICE_AND_PART="0:1"
- CONFIG_SYS_RELOC_GD_ENV_ADDR=y
- CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
 diff --git a/configs/rpi_2_defconfig b/configs/rpi_2_defconfig
-index 1c2bbb29ce..9573e475f4 100644
+index ba75e52dda0..d324e2bdd33 100644
 --- a/configs/rpi_2_defconfig
 +++ b/configs/rpi_2_defconfig
-@@ -17,7 +17,7 @@ CONFIG_CMD_GPIO=y
+@@ -14,7 +14,7 @@ CONFIG_CMD_GPIO=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_FS_UUID=y
 -CONFIG_OF_EMBED=y
 +CONFIG_OF_BOARD=y
+ CONFIG_DEFAULT_DEVICE_TREE="bcm2836-rpi-2-b"
+ CONFIG_ENV_FAT_INTERFACE="mmc"
 CONFIG_ENV_FAT_DEVICE_AND_PART="0:1"
- CONFIG_SYS_RELOC_GD_ENV_ADDR=y
- CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
 diff --git a/configs/rpi_3_32b_defconfig b/configs/rpi_3_32b_defconfig
-index b8a3d17f43..252df994e6 100644
+index bbcdd91e909..46816cd1da7 100644
 --- a/configs/rpi_3_32b_defconfig
 +++ b/configs/rpi_3_32b_defconfig
-@@ -18,7 +18,7 @@ CONFIG_CMD_GPIO=y
+@@ -15,7 +15,7 @@ CONFIG_CMD_GPIO=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_FS_UUID=y
 -CONFIG_OF_EMBED=y
 +CONFIG_OF_BOARD=y
+ CONFIG_DEFAULT_DEVICE_TREE="bcm2837-rpi-3-b"
+ CONFIG_ENV_FAT_INTERFACE="mmc"
 CONFIG_ENV_FAT_DEVICE_AND_PART="0:1"
- CONFIG_SYS_RELOC_GD_ENV_ADDR=y
- CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
-diff --git a/configs/rpi_3_b_plus_defconfig b/configs/rpi_3_b_plus_defconfig
-index 4c361438fa..3b2996a2f9 100644
--- a/configs/rpi_3_b_plus_defconfig
-+++ b/configs/rpi_3_b_plus_defconfig
-@@ -18,7 +18,7 @@ CONFIG_CMD_GPIO=y
- CONFIG_CMD_MMC=y
- CONFIG_CMD_USB=y
- CONFIG_CMD_FS_UUID=y
-CONFIG_OF_EMBED=y
-+CONFIG_OF_BOARD=y
- CONFIG_ENV_FAT_DEVICE_AND_PART="0:1"
- CONFIG_SYS_RELOC_GD_ENV_ADDR=y
- CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
 diff --git a/configs/rpi_3_defconfig b/configs/rpi_3_defconfig
-index 9b281a4f15..1e9ee6122e 100644
+index 54b6303c2d8..f05ddf8f61f 100644
 --- a/configs/rpi_3_defconfig
 +++ b/configs/rpi_3_defconfig
-@@ -18,7 +18,7 @@ CONFIG_CMD_GPIO=y
+@@ -15,7 +15,7 @@ CONFIG_CMD_GPIO=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_FS_UUID=y
 -CONFIG_OF_EMBED=y
 +CONFIG_OF_BOARD=y
+ CONFIG_DEFAULT_DEVICE_TREE="bcm2837-rpi-3-b"
+ CONFIG_ENV_FAT_INTERFACE="mmc"
 CONFIG_ENV_FAT_DEVICE_AND_PART="0:1"
- CONFIG_SYS_RELOC_GD_ENV_ADDR=y
- CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
 diff --git a/configs/rpi_defconfig b/configs/rpi_defconfig
-index b5ad53c37b..223fc03275 100644
+index e7820cb147b..d248873174d 100644
 --- a/configs/rpi_defconfig
 +++ b/configs/rpi_defconfig
-@@ -17,7 +17,7 @@ CONFIG_CMD_GPIO=y
+@@ -14,7 +14,7 @@ CONFIG_CMD_GPIO=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_FS_UUID=y
 -CONFIG_OF_EMBED=y
 +CONFIG_OF_BOARD=y
+ CONFIG_DEFAULT_DEVICE_TREE="bcm2835-rpi-b"
+ CONFIG_ENV_FAT_INTERFACE="mmc"
 CONFIG_ENV_FAT_DEVICE_AND_PART="0:1"
- CONFIG_SYS_RELOC_GD_ENV_ADDR=y
- CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
 -- 
-2.26.2
+2.19.2

--- a/2
+++ b/2
@ -1 +1 @@
-SHA512 (u-boot-2021.01-rc4.tar.bz2) = 6de2c60d02276f4eed31b5baf2d8239ad0af30c9d341339a4cd7fa0786068cb5faa1ab8bd0b4155e536962e1a4869906f60f1d2a1e50b0ed15e98c2e84d6a97b
+SHA512 (u-boot-2020.01.tar.bz2) = 073d4e0234095c1bda1ffa7a648972aa4530d106ee1a73035e0501b1aba2951653582c8b7bcf338d4e95012fa67e75f97b7e1fbac5cc764d609b671ef29617f7
--- a/sunxi-add-PineCube-board.patch
+++ b/sunxi-add-PineCube-board.patch
@ -1,222 +0,0 @@
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-Cc: u-boot@lists.denx.de, linux-sunxi@googlegroups.com,
- Icenowy Zheng <icenowy@aosc.io>
-Subject: [PATCH v3] sunxi: add PineCube board
-Date: Wed, 18 Nov 2020 18:27:17 +0800
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-
-PineCube is an IP camera development kit released by Pine64.
-
-It comes with the following compoents:
-
- A mainboard with Sochip S3 SoC, a 16MByte SPI Flash, AXP209 PMIC,
-a power-only microUSB connector, a USB Type-A connector, a 10/100Mbps
-Ethernet port and FPC connectors for camera and daughter board.
- An OV5640-based camera module which is connected to the parallel CSI
-bus of the mainboard.
- A daughterboard with several buttons, a SD slot, some IR LEDs, a
-microphone and a speaker connector.
-
-As the device tree is synchronized in a previous commit, just add it to
-Makefile, create a new MAINTAINER item and provide a defconfig.
-
-Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
-Reviewed-by: Andre Przywara <andre.przywara@arm.com>
---
-Changes since v2:
- Add Makefile reference to DT.
-Changes since v1:
- Dropped LDO3 quirk.
-
- arch/arm/dts/Makefile      |  1 +
- board/sunxi/MAINTAINERS    |  5 +++++
- configs/pinecube_defconfig | 15 +++++++++++++++
- 3 files changed, 21 insertions(+)
- create mode 100644 configs/pinecube_defconfig
-
-diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
-index 7d1a369845..e6993733b0 100644
--- a/arch/arm/dts/Makefile
-+++ b/arch/arm/dts/Makefile
-@@ -587,6 +587,7 @@ dtb-$(CONFIG_MACH_SUN8I_R40) += \
- 	sun8i-r40-bananapi-m2-ultra.dtb \
- 	sun8i-v40-bananapi-m2-berry.dtb
- dtb-$(CONFIG_MACH_SUN8I_V3S) += \
-+	sun8i-s3-pinecube.dtb \
- 	sun8i-v3s-licheepi-zero.dtb
- dtb-$(CONFIG_MACH_SUN50I_H5) += \
- 	sun50i-h5-bananapi-m2-plus.dtb \
-diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS
-index d3755ae41a..735801ae1d 100644
--- a/board/sunxi/MAINTAINERS
-+++ b/board/sunxi/MAINTAINERS
-@@ -440,6 +440,11 @@ M:	Vasily Khoruzhick <anarsoul@gmail.com>
- S:	Maintained
- F:	configs/pinebook_defconfig
- 
-+PINECUBE BOARD:
-+M:	Icenowy Zheng <icenowy@aosc.io>
-+S:	Maintained
-+F:	configs/pinecube_defconfig
-+
- PINE64 BOARDS
- M:	Andre Przywara <andre.przywara@arm.com>
- S:	Maintained
-diff --git a/configs/pinecube_defconfig b/configs/pinecube_defconfig
-new file mode 100644
-index 0000000000..a8c404f6b1
--- /dev/null
-+++ b/configs/pinecube_defconfig
-@@ -0,0 +1,15 @@
-+CONFIG_ARM=y
-+CONFIG_ARCH_SUNXI=y
-+CONFIG_SPL=y
-+CONFIG_MACH_SUN8I_V3S=y
-+CONFIG_SUNXI_DRAM_DDR3_1333=y
-+CONFIG_DRAM_CLK=504
-+CONFIG_DRAM_ODT_EN=y
-+CONFIG_I2C0_ENABLE=y
-+CONFIG_DEFAULT_DEVICE_TREE="sun8i-s3-pinecube"
-+CONFIG_SPL_I2C_SUPPORT=y
-+# CONFIG_NETDEVICES is not set
-+CONFIG_AXP209_POWER=y
-+CONFIG_AXP_DCDC2_VOLT=1250
-+CONFIG_AXP_DCDC3_VOLT=3300
-+CONFIG_CONS_INDEX=3
--- a/uboot-addappend.patch
+++ b/uboot-addappend.patch
@ -0,0 +1,146 @@
+diff --git a/cmd/pxe_utils.c b/cmd/pxe_utils.c
+index a636346b..9e2af76a 100644
+--- a/cmd/pxe_utils.c
+++ b/cmd/pxe_utils.c
+@@ -250,7 +250,7 @@ static struct pxe_label *label_create(void)
+ 
+ /*
+  * Free the memory used by a pxe_label, including that used by its name,
+- * kernel, append and initrd members, if they're non NULL.
+ * kernel, append, addappend and initrd members, if they're non NULL.
+  *
+  * So - be sure to only use dynamically allocated memory for the members of
+  * the pxe_label struct, unless you want to clean it up first. These are
+@@ -270,6 +270,9 @@ static void label_destroy(struct pxe_label *label)
+ 	if (label->append)
+ 		free(label->append);
+ 
+	if (label->addappend)
+		free(label->addappend);
+
+ 	if (label->initrd)
+ 		free(label->initrd);
+ 
+@@ -301,7 +304,9 @@ static void label_print(void *data)
+  * environment variable is defined. Its contents will be executed as U-Boot
+  * command.  If the label specified an 'append' line, its contents will be
+  * used to overwrite the contents of the 'bootargs' environment variable prior
+- * to running 'localcmd'.
+ * to running 'localcmd'. If the label specified an 'addappend' line, it's
+ * contents will be appended to the 'bootargs' environment variable priot to
+ * running 'localcmd'.
+  *
+  * Returns 1 on success or < 0 on error.
+  */
+@@ -314,6 +319,22 @@ static int label_localboot(struct pxe_label *label)
+ 	if (!localcmd)
+ 		return -ENOENT;
+ 
+	if (label->addappend) {
+		char newbootargs[CONFIG_SYS_CBSIZE] = "";
+		char addappend[CONFIG_SYS_CBSIZE];
+
+		strncat(newbootargs, env_get("bootargs"), CONFIG_SYS_CBSIZE - 1);
+
+		cli_simple_process_macros(label->addappend, addappend);
+
+		if (strlen(newbootargs) + 1 < CONFIG_SYS_CBSIZE)
+			strcat(newbootargs, " ");
+		strncat(newbootargs, addappend,
+			CONFIG_SYS_CBSIZE - strlen(newbootargs) - 1);
+
+		env_set("bootargs", newbootargs);
+	}
+
+ 	if (label->append) {
+ 		char bootargs[CONFIG_SYS_CBSIZE];
+ 
+@@ -340,6 +361,9 @@ static int label_localboot(struct pxe_label *label)
+  *
+  * If the label specifies an 'append' line, its contents will overwrite that
+  * of the 'bootargs' environment variable.
+ *
+ * If the label specifies an 'addappend' line, it's contents will be appended
+ * to the 'bootargs' environment variable.
+  */
+ static int label_boot(cmd_tbl_t *cmdtp, struct pxe_label *label)
+ {
+@@ -406,19 +430,28 @@ static int label_boot(cmd_tbl_t *cmdtp, struct pxe_label *label)
+ 	}
+ #endif
+ 
+-	if ((label->ipappend & 0x3) || label->append) {
+	if ((label->ipappend & 0x3) || label->append || label->addappend) {
+ 		char bootargs[CONFIG_SYS_CBSIZE] = "";
+ 		char finalbootargs[CONFIG_SYS_CBSIZE];
+ 
+-		if (strlen(label->append ?: "") +
+		if (strlen(label->append ?: "") + strlen(label->addappend ?: "") +
+ 		    strlen(ip_str) + strlen(mac_str) + 1 > sizeof(bootargs)) {
+-			printf("bootarg overflow %zd+%zd+%zd+1 > %zd\n",
+			printf("bootarg overflow %zd+%zd+%zd+%zd+1 > %zd\n",
+ 			       strlen(label->append ?: ""),
+			       strlen(label->addappend ?: ""),
+ 			       strlen(ip_str), strlen(mac_str),
+ 			       sizeof(bootargs));
+ 			return 1;
+ 		}
+ 
+		if (label->addappend) {
+			strncat(bootargs, env_get("bootargs"), CONFIG_SYS_CBSIZE - 1);
+			if (strlen(bootargs) + 1 < CONFIG_SYS_CBSIZE)
+				strcat(bootargs, " ");
+			strncat(bootargs, label->addappend,
+				CONFIG_SYS_CBSIZE - strlen(bootargs) - 1);
+		}
+
+ 		if (label->append)
+ 			strncpy(bootargs, label->append, sizeof(bootargs));
+ 
+@@ -570,6 +603,7 @@ enum token_type {
+ 	T_KERNEL,
+ 	T_LINUX,
+ 	T_APPEND,
+	T_ADDAPPEND,
+ 	T_INITRD,
+ 	T_LOCALBOOT,
+ 	T_DEFAULT,
+@@ -605,6 +639,7 @@ static const struct token keywords[] = {
+ 	{"linux", T_LINUX},
+ 	{"localboot", T_LOCALBOOT},
+ 	{"append", T_APPEND},
+	{"addappend", T_ADDAPPEND},
+ 	{"initrd", T_INITRD},
+ 	{"include", T_INCLUDE},
+ 	{"devicetree", T_FDT},
+@@ -1028,6 +1063,10 @@ static int parse_label(char **c, struct pxe_menu *cfg)
+ 
+ 			break;
+ 
+		case T_ADDAPPEND:
+			err = parse_sliteral(c, &label->addappend);
+			break;
+
+ 		case T_INITRD:
+ 			if (!label->initrd)
+ 				err = parse_sliteral(c, &label->initrd);
+diff --git a/cmd/pxe_utils.h b/cmd/pxe_utils.h
+index a38ac81a..a6770679 100644
+--- a/cmd/pxe_utils.h
+++ b/cmd/pxe_utils.h
+@@ -28,6 +28,7 @@
+  * name - the name of the menu as given on the 'menu label' line.
+  * kernel - the path to the kernel file to use for this label.
+  * append - kernel command line to use when booting this label
+ * addappend - additional kernel command line options
+  * initrd - path to the initrd to use for this label.
+  * attempted - 0 if we haven't tried to boot this label, 1 if we have.
+  * localboot - 1 if this label specified 'localboot', 0 otherwise.
+@@ -40,6 +41,7 @@ struct pxe_label {
+ 	char *kernel;
+ 	char *config;
+ 	char *append;
+	char *addappend;
+ 	char *initrd;
+ 	char *fdt;
+ 	char *fdtdir;
--- a/uboot-riscv-def-kernel_comp_addr_r.patch
+++ b/uboot-riscv-def-kernel_comp_addr_r.patch
@ -0,0 +1,24 @@
+diff --git a/include/configs/qemu-riscv.h b/include/configs/qemu-riscv.h
+index 801d2f5c..0bcadb0f 100644
+--- a/include/configs/qemu-riscv.h
+++ b/include/configs/qemu-riscv.h
+@@ -59,6 +59,7 @@
+ 	"scriptaddr=0x88100000\0" \
+ 	"pxefile_addr_r=0x88200000\0" \
+ 	"ramdisk_addr_r=0x88300000\0" \
+	"kernel_comp_addr_r=0x90000000\0" \
+ 	BOOTENV
+ #endif
+ 
+diff --git a/include/configs/sifive-fu540.h b/include/configs/sifive-fu540.h
+index 4fef86c1..864bb051 100644
+--- a/include/configs/sifive-fu540.h
+++ b/include/configs/sifive-fu540.h
+@@ -39,6 +39,7 @@
+ 	"scriptaddr=0x88100000\0" \
+ 	"pxefile_addr_r=0x88200000\0" \
+ 	"ramdisk_addr_r=0x88300000\0" \
+	"kernel_comp_addr_r=0x90000000\0" \
+ 	BOOTENV
+ 
+ #endif /* __CONFIG_H */
--- a/uboot-tools.spec
+++ b/uboot-tools.spec
@ -1,40 +1,60 @@
-%global candidate rc4
+#global candidate rc5

-Name:     uboot-tools
-Version:  2021.01
-Release:  0.4%{?candidate:.%{candidate}}%{?dist}
-Summary:  U-Boot utilities
-License:  GPLv2+ BSD LGPL-2.1+ LGPL-2.0+
-URL:      http://www.denx.de/wiki/U-Boot
+Name:      uboot-tools
+Version:   2020.01
+Release:   1%{?candidate:.%{candidate}}.0.riscv64%{?dist}
+Summary:   U-Boot utilities
+License:   GPLv2+ BSD LGPL-2.1+ LGPL-2.0+
+URL:       http://www.denx.de/wiki/U-Boot

-Source0:  ftp://ftp.denx.de/pub/u-boot/u-boot-%{version}%{?candidate:-%{candidate}}.tar.bz2
-Source1:  arm-boards
-Source2:  arm-chromebooks
-Source3:  aarch64-boards
-Source4:  aarch64-chromebooks
+Source0:   ftp://ftp.denx.de/pub/u-boot/u-boot-%{version}%{?candidate:-%{candidate}}.tar.bz2
+Source1:   arm-boards
+Source2:   arm-chromebooks
+Source3:   aarch64-boards
+Source4:   aarch64-chromebooks
+Source5:   10-devicetree.install
+Source6:   riscv64-boards

 # Fedoraisms patches
 # Needed to find DT on boot partition that's not the first partition
-Patch1:   uefi-distro-load-FDT-from-any-partition-on-boot-device.patch
+Patch1:    uefi-distro-load-FDT-from-any-partition-on-boot-device.patch
 # Needed due to issues with shim
-Patch2:   uefi-use-Fedora-specific-path-name.patch
-# RPi - uses RPI firmware device tree for HAT support
-Patch3:   rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch
-# Ajust the U-Boot offsets in SPL to take less space
-#Patch4:   rockchip-spl-u-boot-itb-offset.patch
+Patch2:    uefi-use-Fedora-specific-path-name.patch

 # Board fixes and enablement
-Patch5:   Raspberry-Pi-400-Compute-Module-4-support.patch
-Patch6:   rng-Add-iProc-RNG200-driver.patch
-# AllWinner improvements
-Patch10:  AllWinner-PineTab.patch
-Patch11:  sunxi-add-PineCube-board.patch
-Patch12:  0001-Fixes-for-AllWinner-ethernet-network-interfaces.patch
-# TI fixes
-Patch13:  0001-Fix-BeagleAI-detection.patch
-# Rockchips improvements
-Patch14:  arm-rk3399-enable-rng-on-rock960-and-firefly3399.patch
-Patch15:  rk3399-Pinebook-pro-EDP-support.patch
+Patch4:    usb-kbd-fixes.patch
+Patch5:    rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch
+Patch6:    dragonboard-fixes.patch
+Patch7:    ARM-tegra-Add-NVIDIA-Jetson-Nano.patch
+Patch8:    arm-tegra-defaine-fdtfile-for-all-devices.patch
+Patch9:    zynqmp-Add-support-for-u-boot.itb-generation-with-ATF.patch
+Patch10:   zynqmp-Do-not-assing-MIO34-that-early-on-zcu100.patch
+
+# PXE depends on fdt_addr (mandatory)
+# fdt_addr is an address to DTB in HW (e.g. ROM)
+# While off-chip NVM QSPI Flash is mapped to the memory our DTB comes from
+# FSBL or OpenSBI (most likely).
+# Both (FSBL and OpenSBI) incl. the latest DTB directly from the kernel build.
+# Thus we have to set fdt_addr to the save value as fdt_addr_r which matches
+# the location where OpenSBI will place embedded DTB.
+Patch20:   riscv64-set-fdt_addr.patch
+
+# Set bootargs (console and earlycon)
+# Set CPUs to 32 (same as Linux)
+Patch21:   riscv-set-bootargs-nrcpus-preboot.patch
+
+# Not upstream
+# Adds support for Image.gz to booti (RFC/RFT)
+# See: https://patchwork.ozlabs.org/patch/1174807/
+Patch22:   image-add-image.gz-parsing-support-in-booti.patch
+
+# Not upstream
+# Add 'addappend' label to  PXE/EXTLINUX configuration
+Patch23: uboot-addappend.patch
+
+# Not upstream
+# Define kernel_comp_addr_r and filesize for booti Image.gz support
+Patch24: uboot-riscv-def-kernel_comp_addr_r.patch

 BuildRequires:  bc
 BuildRequires:  dtc
@ -45,7 +65,7 @@ BuildRequires:  devtoolset-7-build
 BuildRequires:  devtoolset-7-binutils
 BuildRequires:  devtoolset-7-gcc
 BuildRequires:  python2-devel
-BuildRequires:  python2-setuptools
+BuildRequires:  python3-setuptools
 BuildRequires:  python2-libfdt
 %else
 BuildRequires:  gcc
@ -63,7 +83,13 @@ BuildRequires:  vboot-utils
 %ifarch aarch64
 BuildRequires:  arm-trusted-firmware-armv8
 %endif
+
 Requires:       dtc
+Requires:       systemd
+%ifarch aarch64 %{arm}
+Obsoletes:      uboot-images-elf < 2019.07
+Provides:       uboot-images-elf < 2019.07
+%endif

 %description
 This package contains a few U-Boot utilities - mkimage for creating boot images
@ -71,26 +97,38 @@ and fw_printenv/fw_setenv for manipulating the boot environment variables.

 %ifarch aarch64
 %package     -n uboot-images-armv8
-Summary:     U-Boot firmware images for aarch64 boards
+Summary:     u-boot bootloader images for aarch64 boards
+Requires:    uboot-tools
 BuildArch:   noarch

 %description -n uboot-images-armv8
-U-Boot firmware binaries for aarch64 boards
+u-boot bootloader binaries for aarch64 boards
 %endif

 %ifarch %{arm}
 %package     -n uboot-images-armv7
-Summary:     U-Boot firmware images for armv7 boards
+Summary:     u-boot bootloader images for armv7 boards
+Requires:    uboot-tools
 BuildArch:   noarch

 %description -n uboot-images-armv7
-U-Boot firmware binaries for armv7 boards
+u-boot bootloader binaries for armv7 boards
+%endif
+
+%ifarch riscv64
+%package     -n uboot-images-riscv64
+Summary:     u-boot bootloader images for riscv64 boards
+Requires:    uboot-tools
+BuildArch:   noarch
+
+%description -n uboot-images-riscv64
+u-boot bootloader binaries for riscv64 boards
 %endif

 %prep
 %autosetup -p1 -n u-boot-%{version}%{?candidate:-%{candidate}}

-cp %SOURCE1 %SOURCE2 %SOURCE3 %SOURCE4 .
+cp %SOURCE1 %SOURCE2 %SOURCE3 %SOURCE4 %SOURCE6 .

 %build
 mkdir builds
@ -100,13 +138,13 @@ mkdir builds
 %{?enable_devtoolset7:%{enable_devtoolset7}}
 %endif

-%ifarch aarch64 %{arm}
+%ifarch aarch64 %{arm} riscv64
 for board in $(cat %{_arch}-boards)
 do
  echo "Building board: $board"
  mkdir builds/$(echo $board)/
  # ATF selection, needs improving, suggestions of ATF SoC to Board matrix welcome
-  sun50i=(a64-olinuxino amarula_a64_relic bananapi_m2_plus_h5 bananapi_m64 libretech_all_h3_cc_h5 nanopi_a64 nanopi_neo2 nanopi_neo_plus2 orangepi_pc2 orangepi_prime orangepi_win orangepi_zero_plus orangepi_zero_plus2 pine64-lts pine64_plus pinebook pinephone pinetab sopine_baseboard teres_i)
+  sun50i=(a64-olinuxino amarula_a64_relic bananapi_m2_plus_h5 bananapi_m64 libretech_all_h3_cc_h5 nanopi_a64 nanopi_neo2 nanopi_neo_plus2 orangepi_pc2 orangepi_prime orangepi_win orangepi_zero_plus orangepi_zero_plus2 pine64-lts pine64_plus pinebook sopine_baseboard teres_i)
  if [[ " ${sun50i[*]} " == *" $board "* ]]; then
    echo "Board: $board using sun50i_a64"
    cp /usr/share/arm-trusted-firmware/sun50i_a64/* builds/$(echo $board)/
@ -116,25 +154,33 @@ do
    echo "Board: $board using sun50i_h6"
    cp /usr/share/arm-trusted-firmware/sun50i_h6/* builds/$(echo $board)/
  fi
-  rk3328=(evb-rk3328 rock64-rk3328 rock-pi-e-rk3328 roc-cc-rk3328)
+  rk3328=(evb-rk3328 rock64-rk3328)
  if [[ " ${rk3328[*]} " == *" $board "* ]]; then
    echo "Board: $board using rk3328"
    cp /usr/share/arm-trusted-firmware/rk3328/* builds/$(echo $board)/
  fi
-  rk3399=(evb-rk3399 ficus-rk3399 firefly-rk3399 khadas-edge-captain-rk3399 khadas-edge-rk3399 khadas-edge-v-rk3399 nanopc-t4-rk3399 nanopi-m4-2gb-rk3399 nanopi-m4-rk3399 nanopi-neo4-rk3399 orangepi-rk3399 pinebook-pro-rk3399 puma-rk3399 rock960-rk3399 rock-pi-4c-rk3399 rock-pi-4-rk3399 rock-pi-n10-rk3399pro rockpro64-rk3399 roc-pc-mezzanine-rk3399 roc-pc-rk3399)
+  rk3399=(evb-rk3399 ficus-rk3399 firefly-rk3399 nanopc-t4-rk3399 nanopi-m4-rk3399 nanopi-neo4-rk3399 orangepi-rk3399 puma-rk3399 rock960-rk3399 rock-pi-4-rk3399 rockpro64-rk3399 roc-pc-rk3399)
  if [[ " ${rk3399[*]} " == *" $board "* ]]; then
    echo "Board: $board using rk3399"
    cp /usr/share/arm-trusted-firmware/rk3399/* builds/$(echo $board)/
  fi
  # End ATF
  make $(echo $board)_defconfig O=builds/$(echo $board)/
-  %make_build HOSTCC="gcc $RPM_OPT_FLAGS" CROSS_COMPILE="" O=builds/$(echo $board)/
+  make HOSTCC="gcc $RPM_OPT_FLAGS" CROSS_COMPILE="" %{?_smp_mflags} V=1 O=builds/$(echo $board)/
+  #if [[ " ${rk3328[*]} " == *" $board "* ]]; then
+    #builds/$(echo $board)/tools/mkimage -n rk3328 -T rksd  -d builds/$(echo $board)/spl/u-boot-spl.bin builds/$(echo $board)/spl_sd.img
+    #builds/$(echo $board)/tools/mkimage -n rk3328 -T rkspi -d builds/$(echo $board)/spl/u-boot-spl.bin builds/$(echo $board)/spl_spi.img
+  #fi
+  if [[ " ${rk3399[*]} " == *" $board "* ]]; then
+    builds/$(echo $board)/tools/mkimage -n rk3399 -T rksd  -d builds/$(echo $board)/spl/u-boot-spl.bin builds/$(echo $board)/spl_sd.img
+    builds/$(echo $board)/tools/mkimage -n rk3399 -T rkspi -d builds/$(echo $board)/spl/u-boot-spl.bin builds/$(echo $board)/spl_spi.img
+  fi
 done

 %endif

-%make_build HOSTCC="gcc $RPM_OPT_FLAGS" CROSS_COMPILE="" tools-only_defconfig O=builds/
-%make_build HOSTCC="gcc $RPM_OPT_FLAGS" CROSS_COMPILE="" tools-all O=builds/
+make HOSTCC="gcc $RPM_OPT_FLAGS" %{?_smp_mflags} CROSS_COMPILE="" tools-only_defconfig V=1 O=builds/
+make HOSTCC="gcc $RPM_OPT_FLAGS" %{?_smp_mflags} CROSS_COMPILE="" tools-all V=1 O=builds/

 %install
 mkdir -p $RPM_BUILD_ROOT%{_bindir}
@ -146,7 +192,7 @@ mkdir -p $RPM_BUILD_ROOT%{_datadir}/uboot/
 for board in $(cat %{_arch}-boards)
 do
 mkdir -p $RPM_BUILD_ROOT%{_datadir}/uboot/$(echo $board)/
- for file in u-boot.bin u-boot.dtb u-boot.img u-boot-dtb.img u-boot.itb u-boot-sunxi-with-spl.bin u-boot-rockchip.bin idbloader.img spl/boot.bin spl/sunxi-spl.bin
+ for file in u-boot.bin u-boot.dtb u-boot.img u-boot-dtb.img u-boot.itb u-boot-sunxi-with-spl.bin spl_sd.img spl_spi.img idbloader.img spl/boot.bin spl/arndale-spl.bin spl/sunxi-spl.bin
 do
  if [ -f builds/$(echo $board)/$(echo $file) ]; then
    install -p -m 0644 builds/$(echo $board)/$(echo $file) $RPM_BUILD_ROOT%{_datadir}/uboot/$(echo $board)/
@ -159,7 +205,7 @@ done
 for board in $(cat %{_arch}-boards)
 do
 mkdir -p $RPM_BUILD_ROOT%{_datadir}/uboot/$(echo $board)/
- for file in MLO SPL spl/arndale-spl.bin spl/origen-spl.bin spl/*spl.bin u-boot.bin u-boot.dtb u-boot-dtb-tegra.bin u-boot.img u-boot.imx u-boot-spl.kwb u-boot-rockchip.bin u-boot-sunxi-with-spl.bin spl/boot.bin
+ for file in MLO SPL spl/arndale-spl.bin spl/origen-spl.bin spl/*spl.bin u-boot.bin u-boot.dtb u-boot-dtb-tegra.bin u-boot.img u-boot.imx u-boot-spl.kwb u-boot-sunxi-with-spl.bin spl/boot.bin
 do
  if [ -f builds/$(echo $board)/$(echo $file) ]; then
    install -p -m 0644 builds/$(echo $board)/$(echo $file) $RPM_BUILD_ROOT%{_datadir}/uboot/$(echo $board)/
@ -186,6 +232,19 @@ do
 done
 %endif

+%ifarch riscv64
+for board in $(cat %{_arch}-boards)
+do
+mkdir -p $RPM_BUILD_ROOT%{_datadir}/uboot/$(echo $board)/
+ for file in u-boot.bin u-boot-nodtb.bin
+ do
+  if [ -f builds/$(echo $board)/$(echo $file) ]; then
+    install -p -m 0644 builds/$(echo $board)/$(echo $file) $RPM_BUILD_ROOT%{_datadir}/uboot/$(echo $board)/
+  fi
+ done
+done
+%endif
+
 for tool in bmp_logo dumpimage env/fw_printenv fit_check_sign fit_info gdb/gdbcont gdb/gdbsend gen_eth_addr gen_ethaddr_crc img2srec mkenvimage mkimage mksunxiboot ncb proftool sunxi-spl-image-builder ubsha1 xway-swap-bytes
 do
 install -p -m 0755 builds/tools/$tool $RPM_BUILD_ROOT%{_bindir}
@ -197,8 +256,13 @@ install -p -m 0755 builds/tools/env/fw_printenv $RPM_BUILD_ROOT%{_bindir}

 install -p -m 0644 tools/env/fw_env.config $RPM_BUILD_ROOT%{_sysconfdir}

+# systemd kernel-install script for device tree
+mkdir -p $RPM_BUILD_ROOT/lib/kernel/install.d/
+install -p -m 0755 %{SOURCE5} $RPM_BUILD_ROOT/lib/kernel/install.d/
+
 # Copy sone useful docs over
 mkdir -p builds/docs
+cp -p board/amlogic/p200/README.odroid-c2 builds/docs/README.odroid-c2
 cp -p board/hisilicon/hikey/README builds/docs/README.hikey
 cp -p board/hisilicon/hikey/README builds/docs/README.hikey
 cp -p board/Marvell/db-88f6820-gp/README builds/docs/README.mvebu-db-88f6820
@ -218,9 +282,9 @@ cp -p board/warp7/README builds/docs/README.warp7
 %doc README doc/README.kwbimage doc/README.distro doc/README.gpt
 %doc doc/README.odroid doc/README.rockchip doc/uefi doc/uImage.FIT doc/arch/arm64.rst
 %doc doc/README.chromium builds/docs/*
-%doc doc/board/amlogic/ doc/board/rockchip/
 %{_bindir}/*
 %{_mandir}/man1/mkimage.1*
+/lib/kernel/install.d/10-devicetree.install
 %dir %{_datadir}/uboot/
 %config(noreplace) %{_sysconfdir}/fw_env.config

@ -234,116 +298,270 @@ cp -p board/warp7/README builds/docs/README.warp7
 %{_datadir}/uboot/*
 %endif

+%ifarch riscv64
+%files -n uboot-images-riscv64
+%{_datadir}/uboot/*
+%endif
+
 %changelog
-* Sun Dec 27 2020 Peter Robinson <pbrobinson@fedoraproject.org> - 2021.01-0.4.rc4
- Update to 2021.01 RC4
- Latest RPi-400/CM4 support patch
-
-* Tue Dec 15 2020 Peter Robinson <pbrobinson@fedoraproject.org> - 2021.01-0.3.rc3
- Update to 2021.01 RC3
- Latest RPi-400/CM4 support patch
- Re-enable previously disabled device support
-
-* Mon Dec 14 2020 Javier Martinez Canillas <javierm@redhat.com> - 2021.01-0.2.rc2
- Fix a "scan_dev_for_efi" not defined error
-
-* Sun Nov 22 2020 Peter Robinson <pbrobinson@fedoraproject.org> - 2021.01-0.1.rc2
- Update to 2021.01 RC2
- Latest Pinebook Pro display patches
- Initial RPi-400 support patch
- Update Fedora specific patches
-
-* Sun Nov  8 2020 Peter Robinson <pbrobinson@fedoraproject.org> - 2020.10-3
- Fix SPI on Rockchip devices
- Latest Pinebook Pro display patches
- Fix Keyboard and USB-A ports on Pinebook Pro
-
-* Wed Oct 28 2020 Peter Robinson <pbrobinson@fedoraproject.org> - 2020.10-2
- Fix kernel installs for non EBBR systems
- Fix for wired networks on some Allwinner devices
-
-* Tue Oct 06 2020 Peter Robinson <pbrobinson@fedoraproject.org> - 2020.10-1
- Update to 2020.10
-
-* Sun Sep 27 2020 Peter Robinson <pbrobinson@fedoraproject.org> - 2020.10-0.6.rc5
- Initial support for display output on Pinebook Pro
-
-* Tue Sep 22 2020 Peter Robinson <pbrobinson@fedoraproject.org> - 2020.10-0.5.rc5
- Update to 2020.10 RC5
-
-* Wed Sep 09 2020 Peter Robinson <pbrobinson@fedoraproject.org> - 2020.10-0.4.rc4
- Update to 2020.10 RC4
-
-* Wed Aug 19 2020 Peter Robinson <pbrobinson@fedoraproject.org> - 2020.10-0.3.rc2
- Enable a number of new Rockchip devices
-
-* Mon Aug 10 2020 Peter Robinson <pbrobinson@fedoraproject.org> - 2020.10-0.2.rc2
- Update to 2020.10 RC2
-
-* Tue Jul 28 2020 Peter Robinson <pbrobinson@fedoraproject.org> - 2020.10-0.1.rc1
- 2020.10 RC1
-
-* Tue Jul 14 2020 Tom Stellard <tstellar@redhat.com> - 2020.07-2
- Use make macros
- https://fedoraproject.org/wiki/Changes/UseMakeBuildInstallMacro
-
-* Mon Jul 06 2020 Peter Robinson <pbrobinson@fedoraproject.org> - 2020.07-1
- 2020.07 GA
-
-* Tue Jun 23 2020 Peter Robinson <pbrobinson@fedoraproject.org> - 2020.07-0.5.rc5
- 2020.07 RC5
-
-* Thu Jun 18 2020 Peter Robinson <pbrobinson@fedoraproject.org> - 2020.07-0.4.rc4
- Update various patches to latest upstream
-
-* Wed Jun 10 2020 Peter Robinson <pbrobinson@fedoraproject.org> - 2020.07-0.3.rc4
- 2020.07 RC4
- Minor updates and other fixes
-
-* Tue May 12 2020 Peter Robinson <pbrobinson@fedoraproject.org> - 2020.07-0.2.rc2
- 2020.07 RC2
- Minor device updates
-
-* Wed Apr 29 2020 Peter Robinson <pbrobinson@fedoraproject.org> - 2020.07-0.1.rc1
- 2020.07 RC1
-
-* Tue Apr 21 2020 Peter Robinson <pbrobinson@fedoraproject.org> - 2020.04-4
- Initial support for USB on Rasperry Pi 4
-
-* Tue Apr 21 2020 Peter Robinson <pbrobinson@fedoraproject.org> - 2020.04-3
- Ship u-boot-rockchip.bin for SPI flash
-
-* Mon Apr 20 2020 Peter Robinson <pbrobinson@fedoraproject.org> - 2020.04-2
- Fix ATF for new aarch64 devices
- Fix Wandboard board detection (rhbz 1825247)
- Fix mSD card on RockPro64
- Enable (inital) Pinebook Pro
-
-* Tue Apr 14 2020 Peter Robinson <pbrobinson@fedoraproject.org> - 2020.04-1
- 2020.04
-
-* Tue Apr  7 2020 Peter Robinson <pbrobinson@fedoraproject.org> 2020.04-0.7-rc5
- 2020.04 RC5
-
-* Tue Mar 31 2020 Peter Robinson <pbrobinson@fedoraproject.org> 2020.04-0.6-rc4
- 2020.04 RC4
- Updates for NVIDIA Jetson platforms
- Support RNG for random seed for KASLR on some Rockchip devices
-
-* Thu Mar 26 2020 Peter Robinson <pbrobinson@fedoraproject.org> 2020.04-0.5-rc3
- Fix ext4 alignment issue seen on some NXP i.MX devices
-
-* Wed Feb 26 2020 Peter Robinson <pbrobinson@fedoraproject.org> 2020.04-0.4-rc3
- 2020.04 RC3
-
-* Thu Feb 13 2020 Peter Robinson <pbrobinson@fedoraproject.org> 2020.04-0.3-rc2
- 2020.04 RC2
-
-* Sun Feb  2 2020 Peter Robinson <pbrobinson@fedoraproject.org> 2020.04-0.2-rc1
- Update genet NIC driver
-
-* Wed Jan 29 2020 Peter Robinson <pbrobinson@fedoraproject.org> 2020.04-0.1-rc1
- 2020.04 RC1
+* Tue Jan  7 2020 David Abdurachmanov <david.abdurachmanov@sifive.com> 2020.01-1.0.riscv64
+- Add support for RISC-V (riscv64)
+- Define filesize and kernel_comp_addr_r for QEMU virt and SiFive FU540 boards
+  to support Image.gz with booti
+- Add 'addappend' label to PXE/EXTLINUX configuration
+- Match CONFIG_NR_CPUS to Linux configuration (32)

 * Tue Jan  7 2020 Peter Robinson <pbrobinson@fedoraproject.org> 2020.01-1
 - 2020.01
+
+* Tue Dec 17 2019 Peter Robinson <pbrobinson@fedoraproject.org> 2020.01-0.9-rc5
+- 2020.01 RC5
+
+* Thu Dec 12 2019 Peter Robinson <pbrobinson@fedoraproject.org> 2020.01-0.8-rc4
+- Fixes for Raspberry Pi
+
+* Thu Dec  5 2019 Peter Robinson <pbrobinson@fedoraproject.org> 2020.01-0.7-rc4
+- Enable the Khadas Edge and VIM series of devices
+- Minor other fixes
+
+* Tue Dec  3 2019 Peter Robinson <pbrobinson@fedoraproject.org> 2020.01-0.6-rc4
+- Fixes for AllWinner, Raspberry Pi, Rockchip, Xilinx ZynqMP
+
+* Tue Dec  3 2019 Peter Robinson <pbrobinson@fedoraproject.org> 2020.01-0.5-rc4
+- 2020.01 RC4
+
+* Tue Nov 19 2019 Peter Robinson <pbrobinson@fedoraproject.org> 2020.01-0.4-rc3
+- 2020.01 RC3
+
+* Tue Nov 12 2019 Peter Robinson <pbrobinson@fedoraproject.org> 2020.01-0.3-rc2
+- 2020.01 RC2
+
+* Tue Nov  5 2019 Peter Robinson <pbrobinson@fedoraproject.org> 2020.01-0.2-rc1
+- Include new ATF 2.2
+
+* Wed Oct 30 2019 Peter Robinson <pbrobinson@fedoraproject.org> 2020.01-0.1-rc1
+- 2020.01 RC1
+- Initial migration to python3
+
+* Wed Oct  9 2019 Peter Robinson <pbrobinson@fedoraproject.org> 2019.10-2
+- Fixes for Rockchips rk3328 and rk3399 platforms
+
+* Mon Oct  7 2019 Peter Robinson <pbrobinson@fedoraproject.org> 2019.10-1
+- 2019.10
+
+* Mon Sep 23 2019 Peter Robinson <pbrobinson@fedoraproject.org> 2019.10-0.5-rc4
+- 2019.10 RC4
+
+* Wed Sep 11 2019 Peter Robinson <pbrobinson@fedoraproject.org> 2019.10-0.4-rc3
+- Minor fixes
+
+* Tue Aug 27 2019 Peter Robinson <pbrobinson@fedoraproject.org> 2019.10-0.3-rc3
+- 2019.10 RC3
+
+* Mon Aug 26 2019 Peter Robinson <pbrobinson@fedoraproject.org> 2019.10-0.2-rc2
+- Temporarily disable Chrome devices due to unexpected retirement of vboot-utils
+
+* Wed Aug 14 2019 Peter Robinson <pbrobinson@fedoraproject.org> 2019.10-0.1-rc2
+- 2019.10 RC2
+
+* Sun Aug  4 2019 Peter Robinson <pbrobinson@fedoraproject.org> 2019.07-3
+- Fixes for Rock960
+- Iniital Raspberry Pi 4 support
+
+* Sat Jul 27 2019 Fedora Release Engineering <releng@fedoraproject.org> - 2019.07-2
+- Rebuilt for https://fedoraproject.org/wiki/Fedora_31_Mass_Rebuild
+
+* Mon Jul  8 2019 Peter Robinson <pbrobinson@fedoraproject.org> 2019.07-1
+- 2019.07
+- Enable Rock64
+- Rock960 enhancements
+
+* Fri Jun 28 2019 Peter Robinson <pbrobinson@fedoraproject.org> 2019.07-0.2-rc4
+- Fix build with explicit python2
+- Drop a couple of unused boards
+
+* Tue Jun 18 2019 Peter Robinson <pbrobinson@fedoraproject.org> 2019.07-0.1-rc4
+- 2019.07 RC4
+- Obsolete unused elf packages
+- A number of new rk3399 devices
+
+* Sat May  4 2019 Peter Robinson <pbrobinson@fedoraproject.org> 2019.04-2
+- Build and ship pre built SD/SPI SPL bits for all rk3399 boards
+
+* Sun Apr 14 2019 Peter Robinson <pbrobinson@fedoraproject.org> 2019.04-1
+- 2019.04
+- Fixes for AllWinner and NVIDIA Jetson devices
+
+* Thu Apr  4 2019 Peter Robinson <pbrobinson@fedoraproject.org> 2019.04-0.9-rc4
+- Latest Tegra patch revision
+
+* Sun Mar 31 2019 Peter Robinson <pbrobinson@fedoraproject.org> 2019.04-0.8-rc4
+- Add ability to make creation of boot/dtb symlink configurable
+
+* Sun Mar 24 2019 Peter Robinson <pbrobinson@fedoraproject.org> 2019.04-0.7-rc4
+- Minor UEFI fixes, Tegra Jetson TX series rebase
+
+* Wed Mar 20 2019 Peter Robinson <pbrobinson@fedoraproject.org> 2019.04-0.6-rc4
+- Tegra Jetson TX-series improvements
+
+* Tue Mar 19 2019 Peter Robinson <pbrobinson@fedoraproject.org> 2019.04-0.5-rc4
+- 2019.04 RC4
+
+* Tue Mar  5 2019 Peter Robinson <pbrobinson@fedoraproject.org> 2019.04-0.4-rc3
+- 2019.04 RC3
+
+* Tue Feb 19 2019 Peter Robinson <pbrobinson@fedoraproject.org> 2019.04-0.3-rc2
+- 2019.04 RC2
+
+* Sat Feb  9 2019 Peter Robinson <pbrobinson@fedoraproject.org> 2019.04-0.2-rc1
+- Build against new ATF snapshot
+
+* Fri Feb  8 2019 Peter Robinson <pbrobinson@fedoraproject.org> 2019.04-0.1-rc1
+- 2019.04 RC1
+
+* Sun Feb 03 2019 Fedora Release Engineering <releng@fedoraproject.org> - 2019.01-2
+- Rebuilt for https://fedoraproject.org/wiki/Fedora_30_Mass_Rebuild
+
+* Tue Jan 15 2019 Peter Robinson <pbrobinson@fedoraproject.org> 2019.01-1
+- 2019.01
+
+* Tue Jan  8 2019 Peter Robinson <pbrobinson@fedoraproject.org> 2019.01-0.4-rc3
+- 2019.01 RC3
+
+* Tue Dec 18 2018 Peter Robinson <pbrobinson@fedoraproject.org> 2019.01-0.3-rc2
+- 2019.01 RC2
+
+* Wed Dec 12 2018 Peter Robinson <pbrobinson@fedoraproject.org> 2019.01-0.2-rc1
+- ATF tweaks and fixes
+- Enable amarula_a64_relic, nanopi_a64, puma-rk3399
+
+* Tue Dec  4 2018 Peter Robinson <pbrobinson@fedoraproject.org> 2019.01-0.1-rc1
+- 2019.01 RC1
+- Enable new devices
+
+* Tue Dec  4 2018 Peter Robinson <pbrobinson@fedoraproject.org> 2018.11-1
+- 2018.11
+- Build with ATF 2.0
+- Fix Hummingboard and CuBox-i devices
+
+* Tue Oct 30 2018 Peter Robinson <pbrobinson@fedoraproject.org> 2018.11-0.1.rc3
+- 2018.11 RC3
+
+* Sun Sep 30 2018 Pablo Greco <pablo@fliagreco.com.ar>
+- Added conditional to enable devtoolset-7-gcc for .el7 build (Arrfab)
+- Added conditional BR, python2-pyelftools is python-pyelftools in .el7 (Arrfab)
+
+* Sun Sep 23 2018 Peter Robinson <pbrobinson@fedoraproject.org>
+- Update Rock960 patches, enable Rock960 Enterprise Edition (ficus)
+
+* Mon Sep 10 2018 Peter Robinson <pbrobinson@fedoraproject.org> 2018.09-1
+- 2018.09
+
+* Tue Sep  4 2018 Peter Robinson <pbrobinson@fedoraproject.org> 2018.09-0.4.rc3
+- 2018.09 RC3
+- Enable nanopi_neo_plus2, pine_h64, rock960-rk3399, a64-olinuxino
+- Build against new upstream AllWinner ATF support
+- Use firmware provided DT on Raspberry Pi
+- Support for Pine64-LTS
+
+* Tue Aug 14 2018 Peter Robinson <pbrobinson@fedoraproject.org> 2018.09-0.2.rc2
+- 2018.09 RC2
+- Improve Jetson TX1 support
+- Enable OrangePi 1+ and Avnet Ultra96
+
+* Tue Jul 31 2018 Peter Robinson <pbrobinson@fedoraproject.org> 2018.09-0.1.rc1
+- 2018.09 RC1
+
+* Sat Jul 14 2018 Fedora Release Engineering <releng@fedoraproject.org> - 2018.07-2
+- Rebuilt for https://fedoraproject.org/wiki/Fedora_29_Mass_Rebuild
+
+* Mon Jul  9 2018 Peter Robinson <pbrobinson@fedoraproject.org> 2018.07-1
+- 2018.07
+
+* Tue Jul  3 2018 Peter Robinson <pbrobinson@fedoraproject.org> 2018.07-0.4.rc3
+- 2018.07 RC3
+
+* Wed Jun 20 2018 Peter Robinson <pbrobinson@fedoraproject.org> 2018.07-0.3.rc2
+- 2018.07 RC2
+- Enable Helios4
+
+* Fri Jun  8 2018 Peter Robinson <pbrobinson@fedoraproject.org> 2018.07-0.2.rc1
+- Update sunxi MMC patch series, Tegra Nyan patch, SolidRun i.MX6 SoM rev 1.5 patch
+
+* Tue Jun  5 2018 Peter Robinson <pbrobinson@fedoraproject.org> 2018.07-0.1.rc1
+- 2018.07 RC1
+- Enable Turris Mox, BananaPi m2 Berry, some Libretech boards
+
+* Mon May  7 2018 Peter Robinson <pbrobinson@fedoraproject.org> 2018.05-1
+- 2018.05 GA
+
+* Wed May  2 2018 Peter Robinson <pbrobinson@fedoraproject.org> 2018.05-0.5.rc3
+- Build Xilnix ZynqMP zcu100 (96boards Ultra96)
+
+* Tue May  1 2018 Peter Robinson <pbrobinson@fedoraproject.org> 2018.05-0.4.rc3
+- 2018.05 RC3
+
+* Thu Apr 26 2018 Peter Robinson <pbrobinson@fedoraproject.org> 2018.05-0.3.rc2
+- uEFI improvements
+- Fixes for Rockchips rk33xx 64 bit devices
+- Build AllWinner 64 bit devices against new ATF
+
+* Tue Apr 17 2018 Peter Robinson <pbrobinson@fedoraproject.org> 2018.05-0.2.rc2
+- 2018.05 RC2
+- Enable Raspberry Pi option to use firmware DT
+
+* Sun Apr  8 2018 Peter Robinson <pbrobinson@fedoraproject.org> 2018.05-0.1.rc1
+- 2018.05 RC1
+
+* Fri Apr  6 2018 Peter Robinson <pbrobinson@fedoraproject.org> 2018.03-4
+- Improvements for Raspberry Pi, AllWinner MMC perf, mvebu devices
+
+* Tue Mar 20 2018 Peter Robinson <pbrobinson@fedoraproject.org> 2018.03-3
+- Fix issue with certain MMC cards on Raspberry Pi
+
+* Fri Mar 16 2018 Peter Robinson <pbrobinson@fedoraproject.org> 2018.03-2
+- Add support for Raspberry Pi 3+
+
+* Tue Mar 13 2018 Peter Robinson <pbrobinson@fedoraproject.org> 2018.03-1
+- 2018.03 GA
+
+* Fri Mar  9 2018 Peter Robinson <pbrobinson@fedoraproject.org> 2018.03-0.11.rc4
+- Enable support for Jetson TX2
+
+* Thu Mar  8 2018 Peter Robinson <pbrobinson@fedoraproject.org> 2018.03-0.10.rc4
+- Fix for Raspberry Pi 2 boot
+
+* Wed Mar  7 2018 Peter Robinson <pbrobinson@fedoraproject.org> 2018.03-0.9.rc4
+- 2018.03 RC4
+- Fixes for Raspberry Pi 3 boot
+- Minor kernel install fixes
+- Enable am335x_evm_usbspl for Beagle Pocket
+- DragonBoard patch rebase
+
+* Sun Mar  4 2018 Peter Robinson <pbrobinson@fedoraproject.org> 2018.03-0.8.rc3
+- Add support for SoM rev 1.5 to mx6cuboxi
+- Rebuild for new ATF 1.5 rc0 release
+
+* Sun Feb 25 2018 Peter Robinson <pbrobinson@fedoraproject.org> 2018.03-0.7.rc3
+- Build 64 bit Rockchips FIT images with ARM Trusted Firmware
+
+* Tue Feb 20 2018 Peter Robinson <pbrobinson@fedoraproject.org> 2018.03-0.6.rc3
+- 2018.03 RC3
+
+* Fri Feb 16 2018 Peter Robinson <pbrobinson@fedoraproject.org> 2018.03-0.5.rc2
+- A few upstream fixes
+
+* Thu Feb 15 2018 Peter Robinson <pbrobinson@fedoraproject.org> 2018.03-0.4.rc2
+- Fix for GBps network on some AllWinner devices
+
+* Tue Feb 13 2018 Peter Robinson <pbrobinson@fedoraproject.org> 2018.03-0.3.rc2
+- 2018.03 RC2
+
+* Wed Feb  7 2018 Peter Robinson <pbrobinson@fedoraproject.org> 2018.03-0.2.rc1
+- Update uEFI patches
+
+* Tue Jan 30 2018 Peter Robinson <pbrobinson@fedoraproject.org> 2018.03-0.1.rc1
+- 2018.03 RC1
+
+* Tue Jan  9 2018 Peter Robinson <pbrobinson@fedoraproject.org> 2018.01-1
+- 2018.01
--- a/uefi-distro-load-FDT-from-any-partition-on-boot-device.patch
+++ b/uefi-distro-load-FDT-from-any-partition-on-boot-device.patch
@ -1,6 +1,6 @@
-From cc3700b5c65494547308df395fe63166ff48a1e3 Mon Sep 17 00:00:00 2001
+From 67c05a07288ef24b3ac9d013f35a0868d26a34c7 Mon Sep 17 00:00:00 2001
 From: Peter Robinson <pbrobinson@gmail.com>
-Date: Tue, 24 Nov 2020 10:35:48 +0000
+Date: Tue, 18 Jun 2019 11:51:21 +0100
 Subject: [PATCH 1/2] distro: load FDT from any partition on boot device

 In the EFI_LOADER boot path, we were only checking the FAT partition
@ -22,17 +22,19 @@ knows) and SoC/board specific ${fdtfile} (which grub does not know).
 Signed-off-by: Rob Clark <robdclark@gmail.com>
 Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
 ---
- include/config_distro_bootcmd.h | 33 +++++++++++++++++++++++----------
- 1 file changed, 23 insertions(+), 10 deletions(-)
+ include/config_distro_bootcmd.h | 34 ++++++++++++++++++++++-----------
+ 1 file changed, 23 insertions(+), 11 deletions(-)

 diff --git a/include/config_distro_bootcmd.h b/include/config_distro_bootcmd.h
-index ff29ef5a905..769477cd80e 100644
+index 4993303f4d..f4b3b62fca 100644
 --- a/include/config_distro_bootcmd.h
 +++ b/include/config_distro_bootcmd.h
-@@ -142,24 +142,37 @@
+@@ -138,25 +138,37 @@
+ 		"fi\0"                                                    \
+ 	\
 	"load_efi_dtb="                                                   \
- 		"load ${devtype} ${devnum}:${distro_bootpart} "           \
- 			"${fdt_addr_r} ${prefix}${efi_fdtfile}\0"         \
+-		"load ${devtype} ${devnum}:${distro_bootpart} "           \
+-			"${fdt_addr_r} ${prefix}${efi_fdtfile}\0"         \
 +		"load ${devtype} ${devnum}:${dtb_devp} "                  \
 +			"${fdt_addr_r} ${prefix}${efi_fdtfile} && "       \
 +		"run boot_efi_binary\0"                                   \
@ -49,7 +51,6 @@ index ff29ef5a905..769477cd80e 100644
 -				"run load_efi_dtb; "                      \
 -			"fi;"                                             \
 -		"done;"                                                   \
-		"run boot_efi_bootmgr;"                                   \
 +		"part list ${devtype} ${devnum} dtb_devplist; "           \
 +		"env exists dtb_devplist || setenv dtb_devplist "         \
 +			"${distro_bootpart}; "                            \
@ -66,7 +67,7 @@ index ff29ef5a905..769477cd80e 100644
 +				"fi;"                                     \
 +			"done; "                                          \
 +		"done; "                                                  \
-+		"run boot_efi_bootmgr\0"                                  \
+		"run boot_efi_binary\0"                                   \
 +	"scan_dev_for_efi="                                               \
 		"if test -e ${devtype} ${devnum}:${distro_bootpart} "     \
 					"efi/boot/"BOOTEFI_NAME"; then "  \
@ -78,5 +79,5 @@ index ff29ef5a905..769477cd80e 100644
 		"fi; "                                                    \
 		"setenv efi_fdtfile\0"
 -- 
-2.29.2
+2.21.0

--- a/uefi-use-Fedora-specific-path-name.patch
+++ b/uefi-use-Fedora-specific-path-name.patch
@ -1,6 +1,6 @@
-From d8fcb72d566b0ebca1613555ac13c0798817487e Mon Sep 17 00:00:00 2001
+From 3cc3f7de06dcf9614554d63b159f0cd6710b96b0 Mon Sep 17 00:00:00 2001
 From: Peter Robinson <pbrobinson@gmail.com>
-Date: Tue, 24 Nov 2020 10:37:28 +0000
+Date: Tue, 18 Jun 2019 12:08:57 +0100
 Subject: [PATCH 2/2] use Fedora specific EFI path/name

 Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
@ -9,7 +9,7 @@ Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
 1 file changed, 5 insertions(+), 5 deletions(-)

 diff --git a/include/config_distro_bootcmd.h b/include/config_distro_bootcmd.h
-index 769477cd80e..22ce3685758 100644
+index f4b3b62fca..2dc8be9815 100644
 --- a/include/config_distro_bootcmd.h
 +++ b/include/config_distro_bootcmd.h
@@ -92,9 +92,9 @@
@ -24,27 +24,27 @@ index 769477cd80e..22ce3685758 100644
 #elif defined(CONFIG_X86_RUN_32BIT)
 #define BOOTEFI_NAME "bootia32.efi"
 #elif defined(CONFIG_X86_RUN_64BIT)
-@@ -132,7 +132,7 @@
- 	\
- 	"boot_efi_binary="                                                \
+@@ -130,7 +130,7 @@
+ 			"bootefi bootmgr ${fdtcontroladdr};"              \
+ 		"fi;"                                                     \
 		"load ${devtype} ${devnum}:${distro_bootpart} "           \
 -			"${kernel_addr_r} efi/boot/"BOOTEFI_NAME"; "      \
 +			"${kernel_addr_r} efi/fedora/"BOOTEFI_NAME"; "      \
 		"if fdt addr ${fdt_addr_r}; then "                        \
 			"bootefi ${kernel_addr_r} ${fdt_addr_r};"         \
 		"else "                                                   \
-@@ -169,9 +169,9 @@
-		"run boot_efi_bootmgr\0"                                  \
+@@ -165,9 +165,9 @@
+ 		"run boot_efi_binary\0"                                   \
 	"scan_dev_for_efi="                                               \
 		"if test -e ${devtype} ${devnum}:${distro_bootpart} "     \
 -					"efi/boot/"BOOTEFI_NAME"; then "  \
-+					"efi/fedora/"BOOTEFI_NAME"; then " \
+					"efi/fedora/"BOOTEFI_NAME"; then "  \
 				"echo Found EFI removable media binary "  \
 -					"efi/boot/"BOOTEFI_NAME"; "       \
-+					"efi/fedora/"BOOTEFI_NAME"; "     \
+					"efi/fedora/"BOOTEFI_NAME"; "       \
 				"run scan_dev_for_dtb; "                  \
 				"echo EFI LOAD FAILED: continuing...; "   \
 		"fi; "                                                    \
 -- 
-2.29.2
+2.21.0

--- a/zynqmp-Add-support-for-u-boot.itb-generation-with-ATF.patch
+++ b/zynqmp-Add-support-for-u-boot.itb-generation-with-ATF.patch
@ -0,0 +1,286 @@
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+To: u-boot@lists.denx.de,
+	git@xilinx.com,
+	pbrobinson@gmail.com
+Subject: [PATCH v2] arm64: zynqmp: Add support for u-boot.itb generation with
+ ATF
+Date: Thu,  5 Dec 2019 09:46:57 +0100
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+
+Follow i.MX, Sunxi, RISC-V and Rockchip to generate u-boot.itb which
+includes U-Boot proper, ATF and DTBs in FIT format. ZynqMP supports FIT for
+quite a long time but with using out of tree solution. The patch is filling
+this gap.
+
+Tested on zcu102, zcu104 and zcu100/Ultra96.
+
+zcu100/Ultra96 v2.2 ATF build by:
+make DEBUG=0 ZYNQMP_CONSOLE=cadence1 RESET_TO_BL31=1 PLAT=zynqmp bl31
+
+Signed-off-by: Michal Simek <michal.simek@xilinx.com>
+---
+
+Changes in v2:
+- Exchange u-boot/atf in config section
+- Use default ATF baseaddr from mainline
+- Update commit message
+
+ Kconfig                                 |  3 +-
+ arch/arm/mach-zynqmp/mkimage_fit_atf.sh | 99 +++++++++++++++++++++++++
+ include/configs/xilinx_zynqmp.h         |  6 +-
+ 3 files changed, 106 insertions(+), 2 deletions(-)
+ create mode 100755 arch/arm/mach-zynqmp/mkimage_fit_atf.sh
+
+diff --git a/Kconfig b/Kconfig
+index e22417ec4471..7efafffec0a4 100644
+--- a/Kconfig
+++ b/Kconfig
+@@ -253,7 +253,7 @@ config BUILD_TARGET
+ 	default "u-boot-spl.kwb" if ARCH_MVEBU && SPL
+ 	default "u-boot-elf.srec" if RCAR_GEN3
+ 	default "u-boot.itb" if SPL_LOAD_FIT && (ARCH_ROCKCHIP || \
+-				ARCH_SUNXI || RISCV)
+				ARCH_SUNXI || RISCV || ARCH_ZYNQMP)
+ 	default "u-boot.kwb" if KIRKWOOD
+ 	default "u-boot-with-spl.bin" if ARCH_AT91 && SPL_NAND_SUPPORT
+ 	default "u-boot-with-spl.imx" if ARCH_MX6 && SPL
+@@ -481,6 +481,7 @@ config SPL_FIT_GENERATOR
+ 	depends on SPL_FIT
+ 	default "board/sunxi/mksunxi_fit_atf.sh" if SPL_LOAD_FIT && ARCH_SUNXI
+ 	default "arch/arm/mach-rockchip/make_fit_atf.py" if SPL_LOAD_FIT && ARCH_ROCKCHIP
+	default "arch/arm/mach-zynqmp/mkimage_fit_atf.sh" if SPL_LOAD_FIT && ARCH_ZYNQMP
+ 	default "arch/riscv/lib/mkimage_fit_opensbi.sh" if SPL_LOAD_FIT && RISCV
+ 	help
+ 	  Specifies a (platform specific) script file to generate the FIT
+diff --git a/arch/arm/mach-zynqmp/mkimage_fit_atf.sh b/arch/arm/mach-zynqmp/mkimage_fit_atf.sh
+new file mode 100755
+index 000000000000..c50aba45ca5c
+--- /dev/null
+++ b/arch/arm/mach-zynqmp/mkimage_fit_atf.sh
+@@ -0,0 +1,99 @@
+#!/bin/sh
+# SPDX-License-Identifier: GPL-2.0+
+#
+# script to generate FIT image source for Xilinx ZynqMP boards with
+# ARM Trusted Firmware and multiple device trees (given on the command line)
+#
+# usage: $0 <dt_name> [<dt_name> [<dt_name] ...]
+
+BL33="u-boot-nodtb.bin"
+[ -z "$BL31" ] && BL31="bl31.bin"
+[ -z "$ATF_LOAD_ADDR" ] && ATF_LOAD_ADDR="0xfffea000"
+[ -z "$BL33_LOAD_ADDR" ] && BL33_LOAD_ADDR="0x8000000"
+
+if [ ! -f $BL31 ]; then
+	echo "ERROR: BL31 file $BL31 NOT found" >&2
+else
+	echo "$BL31 size: " >&2
+	ls -lct $BL31 | awk '{print $5}' >&2
+fi
+
+
+
+cat << __HEADER_EOF
+/dts-v1/;
+
+/ {
+	description = "Configuration to load ATF before U-Boot";
+
+	images {
+		uboot {
+			description = "U-Boot (64-bit)";
+			data = /incbin/("$BL33");
+			type = "firmware";
+			os = "u-boot";
+			arch = "arm64";
+			compression = "none";
+			load = <$BL33_LOAD_ADDR>;
+			hash {
+				algo = "md5";
+			};
+		};
+		atf {
+			description = "ARM Trusted Firmware";
+			data = /incbin/("$BL31");
+			type = "firmware";
+			os = "arm-trusted-firmware";
+			arch = "arm64";
+			compression = "none";
+			load = <$ATF_LOAD_ADDR>;
+			entry = <$ATF_LOAD_ADDR>;
+			hash {
+				algo = "md5";
+			};
+		};
+__HEADER_EOF
+
+cnt=1
+for dtname in $*
+do
+	cat << __FDT_IMAGE_EOF
+		fdt_$cnt {
+			description = "$(basename $dtname .dtb)";
+			data = /incbin/("$dtname");
+			type = "flat_dt";
+			arch = "arm64";
+			compression = "none";
+			hash {
+				algo = "md5";
+			};
+		};
+__FDT_IMAGE_EOF
+cnt=$((cnt+1))
+done
+
+cat << __CONF_HEADER_EOF
+	};
+	configurations {
+		default = "config_1";
+
+__CONF_HEADER_EOF
+
+cnt=1
+for dtname in $*
+do
+cat << __CONF_SECTION1_EOF
+		config_$cnt {
+			description = "$(basename $dtname .dtb)";
+			firmware = "atf";
+			loadables = "uboot";
+			fdt = "fdt_$cnt";
+		};
+__CONF_SECTION1_EOF
+cnt=$((cnt+1))
+done
+
+cat << __ITS_EOF
+	};
+};
+__ITS_EOF
+diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h
+index ee1ceebf1291..e7eb8dbfcb45 100644
+--- a/include/configs/xilinx_zynqmp.h
+++ b/include/configs/xilinx_zynqmp.h
+@@ -243,7 +243,11 @@
+ # define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR	0 /* unused */
+ # define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS	0 /* unused */
+ # define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR	0 /* unused */
+-# define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME	"u-boot.img"
+# if defined(CONFIG_SPL_LOAD_FIT)
+#  define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME	"u-boot.itb"
+# else
+#  define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME	"u-boot.img"
+# endif
+ #endif
+ 
+ #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_DFU)
--- a/zynqmp-Do-not-assing-MIO34-that-early-on-zcu100.patch
+++ b/zynqmp-Do-not-assing-MIO34-that-early-on-zcu100.patch
@ -0,0 +1,199 @@
+From patchwork Tue Dec  3 15:33:26 2019
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+ Tue, 03 Dec 2019 07:33:27 -0800 (PST)
+From: Michal Simek <michal.simek@xilinx.com>
+To: u-boot@lists.denx.de,
+	git@xilinx.com,
+	pbrobinson@gmail.com
+Subject: [PATCH v2] arm64: zynqmp: Do not assing MIO34 that early on zcu100
+Date: Tue,  3 Dec 2019 16:33:26 +0100
+Message-Id: <175608f69633f3876bebdde1c2f7b9cf54b61716.1575387200.git.michal.simek@xilinx.com>
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+
+MIO34 is connected to POWER_KILL signal. When MIO configuration is done in
+psu_init() and this pin is assigned to PMU but PMU configuration is not
+loaded yet. PMU gpio output is high that means board is powered off
+immediately.
+The patch is fixing this sequence that MIO34 stays assing to ps gpio IP.
+PMU config is loaded in SPL and then pin assigned to PMU through
+psu_post_config_data().
+
+Signed-off-by: Michal Simek <michal.simek@xilinx.com>
+---
+
+Changes in v2:
+- add missing declaration in header
+
+ arch/arm/mach-zynqmp/include/mach/psu_init_gpl.h      | 1 +
+ arch/arm/mach-zynqmp/psu_spl_init.c                   | 9 +++++++++
+ arch/arm/mach-zynqmp/spl.c                            | 1 +
+ board/xilinx/zynqmp/zynqmp-zcu100-revC/psu_init_gpl.c | 7 ++++++-
+ 4 files changed, 17 insertions(+), 1 deletion(-)
+
+diff --git a/arch/arm/mach-zynqmp/include/mach/psu_init_gpl.h b/arch/arm/mach-zynqmp/include/mach/psu_init_gpl.h
+index 15e54c049387..e37acda2f89e 100644
+--- a/arch/arm/mach-zynqmp/include/mach/psu_init_gpl.h
+++ b/arch/arm/mach-zynqmp/include/mach/psu_init_gpl.h
+@@ -21,5 +21,6 @@ void prog_reg(unsigned long addr, unsigned long mask,
+ 	      unsigned long shift, unsigned long value);
+ 
+ int psu_init(void);
+unsigned long psu_post_config_data(void);
+ 
+ #endif /* _PSU_INIT_GPL_H_ */
+diff --git a/arch/arm/mach-zynqmp/psu_spl_init.c b/arch/arm/mach-zynqmp/psu_spl_init.c
+index b357de32358c..b6abdfd608ee 100644
+--- a/arch/arm/mach-zynqmp/psu_spl_init.c
+++ b/arch/arm/mach-zynqmp/psu_spl_init.c
+@@ -77,3 +77,12 @@ __weak int psu_init(void)
+ 	 */
+ 	return -1;
+ }
+
+__weak unsigned long psu_post_config_data(void)
+{
+	/*
+	 * This function is overridden by the one in
+	 * board/xilinx/zynqmp/(platform)/psu_init_gpl.c, if it exists.
+	 */
+	return 0;
+}
+diff --git a/arch/arm/mach-zynqmp/spl.c b/arch/arm/mach-zynqmp/spl.c
+index 6ba42bb42f62..6551b33f42d0 100644
+--- a/arch/arm/mach-zynqmp/spl.c
+++ b/arch/arm/mach-zynqmp/spl.c
+@@ -60,6 +60,7 @@ void spl_board_init(void)
+ 	preloader_console_init();
+ 	ps_mode_reset(MODE_RESET);
+ 	board_init();
+	psu_post_config_data();
+ }
+ #endif
+ 
+diff --git a/board/xilinx/zynqmp/zynqmp-zcu100-revC/psu_init_gpl.c b/board/xilinx/zynqmp/zynqmp-zcu100-revC/psu_init_gpl.c
+index e1fdabaeb9d1..585b3afc218a 100644
+--- a/board/xilinx/zynqmp/zynqmp-zcu100-revC/psu_init_gpl.c
+++ b/board/xilinx/zynqmp/zynqmp-zcu100-revC/psu_init_gpl.c
+@@ -409,7 +409,6 @@ static unsigned long psu_mio_init_data(void)
+ 	psu_mask_write(0xFF18007C, 0x000000FEU, 0x00000000U);
+ 	psu_mask_write(0xFF180080, 0x000000FEU, 0x00000008U);
+ 	psu_mask_write(0xFF180084, 0x000000FEU, 0x00000008U);
+-	psu_mask_write(0xFF180088, 0x000000FEU, 0x00000008U);
+ 	psu_mask_write(0xFF18008C, 0x000000FEU, 0x00000000U);
+ 	psu_mask_write(0xFF180090, 0x000000FEU, 0x00000000U);
+ 	psu_mask_write(0xFF180094, 0x000000FEU, 0x00000000U);
+@@ -990,3 +989,9 @@ int psu_init(void)
+ 		return 1;
+ 	return 0;
+ }
+
+unsigned long psu_post_config_data(void)
+{
+	psu_mask_write(0xFF180088, 0x000000FEU, 0x00000008U);
+	return 0;
+}
Author	SHA1	Message	Date
David Abdurachmanov	cc7e05b47a	Merge remote-tracking branch 'up/master' into master-riscv64 Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>	2020-01-07 10:37:47 +02:00
David Abdurachmanov	35bf0004b6	Fix riscv patches - missing addappend (emtpy patch) - failing to find DTB on QEMU Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>	2020-01-02 17:35:57 +02:00
David Abdurachmanov	6848b8c211	Rebase patches to RC5 Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>	2019-12-29 21:20:25 +02:00
David Abdurachmanov	d354a60762	Remove obsolete patches These have landed in RC5. Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>	2019-12-29 20:52:34 +02:00
David Abdurachmanov	8f589f71e3	Merge remote-tracking branch 'up/master' into master-riscv64 Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>	2019-12-28 20:08:05 +02:00
David Abdurachmanov	c05c9a2db0	Merge remote-tracking branch 'up/master' into master-riscv64 Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>	2019-12-14 16:36:40 +02:00
David Abdurachmanov	fe367fe99a	Revert "Disable most of RISC-V patches for debugging" This reverts commit `70d2045031`.	2019-12-14 16:32:50 +02:00
David Abdurachmanov	70d2045031	Disable most of RISC-V patches for debugging Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>	2019-12-09 10:06:43 +02:00
David Abdurachmanov	964c83d011	Match CONFIG_NR_CPUS to Linux configuration (32) Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>	2019-12-05 22:20:29 +02:00
David Abdurachmanov	ec8b6389cf	Rebase riscv64 patches for RC4 Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>	2019-12-05 11:22:37 +02:00
David Abdurachmanov	fbdd0d0c77	Merge remote-tracking branch 'up/master' into master-riscv64 Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>	2019-12-05 10:56:56 +02:00
David Abdurachmanov	5186624912	Incl. patch to fix booting on SiFive FU540 See: https://patchwork.ozlabs.org/patch/1196837/ Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>	2019-11-19 12:35:19 +02:00
David Abdurachmanov	cb2612aa04	Merge remote-tracking branch 'up/master' into master-riscv64 Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>	2019-11-19 12:32:49 +02:00
David Abdurachmanov	81fcb577f1	Rename kernel_gz_addr_r to kernel_comp_addr_r I missed this while pulling in a new version of patchset. Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>	2019-11-16 08:25:43 +02:00
David Abdurachmanov	47f52c146b	Rebase all RISCV patches on top of RC2 Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>	2019-11-13 14:40:25 +02:00
David Abdurachmanov	bb6b35ba8b	Merge remote-tracking branch 'up/master' into master-riscv64 Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>	2019-11-13 13:47:47 +02:00
David Abdurachmanov	4ac22964ab	Fix bogus date in changelog Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>	2019-11-01 08:36:22 +02:00
David Abdurachmanov	12e45d3b64	Merge remote-tracking branch 'up/master' into master-riscv64 Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>	2019-11-01 05:45:44 +02:00
David Abdurachmanov	8fbcc5a382	Define kernel_gz_addr_r and kernel_gz_size for RISC-V boards This allows us to use Image.gz with booti command. This saves ~50% of kernel size. Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>	2019-10-30 16:33:37 +02:00
David Abdurachmanov	ad3de44704	Fix addappend patch Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>	2019-10-29 12:03:24 +02:00
David Abdurachmanov	1abb99241a	Update addappend patch Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>	2019-10-28 17:03:44 +02:00
David Abdurachmanov	d2cc99b787	Add 'addappend' label to PXE/EXTLINUX configuration Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>	2019-10-28 11:36:07 +02:00
David Abdurachmanov	0600cc956f	Incl. misc not upstream patches for RISC-V 1. Increase default stack size from 8KiB to 16KiB to avoid illegal instruction panics while bringing up harts online. Not posted yet online. 2. Add Image.gz booti support (RFC/RFT) for testing. Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>	2019-10-17 10:30:05 +03:00
David Abdurachmanov	2b10fe613a	Merge remote-tracking branch 'up/f31' into master-riscv64 Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>	2019-10-17 10:18:30 +03:00
David Abdurachmanov	c026d2881e	Misc. RISCV fixes - Align boot image header format - Set preboot for QEMU to copy DTB in expected location - Set default bootargs for the boards Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>	2019-10-09 15:08:23 +03:00
David Abdurachmanov	27068a5bf6	Merge remote-tracking branch 'up/f31' into master-riscv64 Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>	2019-10-09 13:43:51 +03:00
David Abdurachmanov	4caac69d44	Set fdt_addr to fdt_addr_r value for PXE/EXTLINUX Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>	2019-09-26 19:10:33 +02:00
David Abdurachmanov	2499c1d49a	Remove all custom patches and start fresh CONFIG_PREBOOT might need re-work, thus let's start fresh to see check uboot environment before changes. Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>	2019-09-24 07:53:22 +03:00
David Abdurachmanov	b37aa919da	Merge remote-tracking branch 'up/f31' into master-riscv64 Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>	2019-09-24 07:49:48 +03:00
David Abdurachmanov	39828c439d	Remove CONFIG_PREBOOT for SiFive FU540 fdtcontroladdr points to a wrong location for FDT and 5.3 kernel fails to boot. Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>	2019-08-30 10:08:31 -07:00
David Abdurachmanov	96ba5aabb5	Remove easylogo/easylogo Tool was removed upstream. Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>	2019-08-27 09:52:43 -07:00
David Abdurachmanov	c2f204c668	Boot from MMC and PXE SiFive FU540 Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>	2019-08-27 01:07:02 -07:00
David Abdurachmanov	aaf7235ecb	Update to 2019.10 RC3 Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>	2019-08-26 18:15:03 -07:00
David Abdurachmanov	e3b3eec4c9	Remove some README.* files Some README.* files were converted to reST to be used with Sphinx and places in different locations. BUILDSTDERR: error: File not found: /builddir/build/BUILDROOT/uboot-tools-2019.10-0.1.rc2.0.riscv64.fc31.riscv64/usr/share/doc/uboot-tools/README.uefi BUILDSTDERR: error: File not found: /builddir/build/BUILDROOT/uboot-tools-2019.10-0.1.rc2.0.riscv64.fc31.riscv64/usr/share/doc/uboot-tools/README.arm64 RPM build errors: BUILDSTDERR: error: File not found: /builddir/build/BUILDROOT/uboot-tools-2019.10-0.1.rc2.0.riscv64.fc31.riscv64/usr/share/doc/uboot-tools/README.qemu-riscv BUILDSTDERR: error: File not found: /builddir/build/BUILDROOT/uboot-tools-2019.10-0.1.rc2.0.riscv64.fc31.riscv64/usr/share/doc/uboot-tools/README.sifive-fu540 BUILDSTDERR: error: File not found: /builddir/build/BUILDROOT/uboot-tools-2019.10-0.1.rc2.0.riscv64.fc31.riscv64/usr/share/doc/uboot-tools/README.ae350 BUILDSTDERR: File not found: /builddir/build/BUILDROOT/uboot-tools-2019.10-0.1.rc2.0.riscv64.fc31.riscv64/usr/share/doc/uboot-tools/README.uefi BUILDSTDERR: File not found: /builddir/build/BUILDROOT/uboot-tools-2019.10-0.1.rc2.0.riscv64.fc31.riscv64/usr/share/doc/uboot-tools/README.arm64 BUILDSTDERR: File not found: /builddir/build/BUILDROOT/uboot-tools-2019.10-0.1.rc2.0.riscv64.fc31.riscv64/usr/share/doc/uboot-tools/README.qemu-riscv BUILDSTDERR: File not found: /builddir/build/BUILDROOT/uboot-tools-2019.10-0.1.rc2.0.riscv64.fc31.riscv64/usr/share/doc/uboot-tools/README.sifive-fu540 BUILDSTDERR: File not found: /builddir/build/BUILDROOT/uboot-tools-2019.10-0.1.rc2.0.riscv64.fc31.riscv64/usr/share/doc/uboot-tools/README.ae350 Child return code was: 1 Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>	2019-08-24 09:58:42 -07:00
David Abdurachmanov	70e5155e0a	Fix envtools build errors Patchset from https://patchwork.ozlabs.org/cover/1152432/ Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>	2019-08-24 08:22:28 -07:00
David Abdurachmanov	24e8ba91b7	Update RISC-V (riscv64) patch Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>	2019-08-23 16:44:13 -07:00
David Abdurachmanov	dd5b903d3b	Clean up RISC-V (riscv64) patches Old patches are upstreamed, but upstream was broken while converting PREBOOT stuff to Kconfig. Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>	2019-08-23 14:30:19 -07:00
David Abdurachmanov	27c9eecc4a	Merge remote-tracking branch 'up/master' into master-riscv64 Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>	2019-08-23 14:18:58 -07:00
David Abdurachmanov	5d662178ca	Rebase patch for RC4 Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>	2019-07-04 16:22:03 +03:00
David Abdurachmanov	a29ada2896	Update VirtIO PCI patches Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>	2019-07-04 15:10:52 +03:00
David Abdurachmanov	2602a671e9	Merge remote-tracking branch 'up/master' into master-riscv64 Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>	2019-07-02 14:28:07 +03:00
David Abdurachmanov	b62e49859d	Call pci enum before virtio scan Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>	2019-06-29 12:10:48 +03:00
David Abdurachmanov	c7647e64da	Bump Release Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>	2019-06-29 11:08:12 +03:00
David Abdurachmanov	de3f529caf	Update patch to use setenv instead of local variable Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>	2019-06-29 11:06:55 +03:00
David Abdurachmanov	a87326e86a	Run virtio scan before booting from VirtIO Block Device over PCIe Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>	2019-06-28 16:57:06 +03:00
David Abdurachmanov	8a5a414e3c	Add VIRTIO_PCI to RISC-V QEMU emulation Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>	2019-06-26 09:55:27 +03:00
David Abdurachmanov	b8d8a2c629	Remove obsolete patch for RISC-V The changes were merged upstream. Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>	2019-06-21 18:02:00 +03:00
David Abdurachmanov	85b660c788	Merge remote-tracking branch 'up/master' into master-riscv64 Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>	2019-06-21 17:31:11 +03:00
David Abdurachmanov	2e821a1b29	Fix path for README.odroid-c2 Signed-off-by: David Abdurachmanov <david.abdurachmanov@gmail.com>	2019-05-05 17:00:30 +03:00
David Abdurachmanov	5ca523f5a9	Remove ARM Tegra patch (needs rebasing, not upstreamed) Signed-off-by: David Abdurachmanov <david.abdurachmanov@gmail.com>	2019-05-05 16:15:29 +03:00
David Abdurachmanov	f8612e71c8	Remove upstreamed patches Signed-off-by: David Abdurachmanov <david.abdurachmanov@gmail.com>	2019-05-05 16:14:46 +03:00
David Abdurachmanov	2fc7774edf	Update to 2019.07 RC1 Signed-off-by: David Abdurachmanov <david.abdurachmanov@gmail.com>	2019-05-05 15:32:55 +03:00
David Abdurachmanov	f0e754c7e3	Merge remote-tracking branch 'up/master' into master-riscv64 Signed-off-by: David Abdurachmanov <david.abdurachmanov@gmail.com>	2019-05-05 15:29:23 +03:00
David Abdurachmanov	162c2f023b	Apply pull request which incl. SMP support for RISC-V See: https://lists.denx.de/pipermail/u-boot/2019-April/364281.html Signed-off-by: David Abdurachmanov <david.abdurachmanov@gmail.com>	2019-04-08 15:19:27 +02:00
David Abdurachmanov	2225e1aa63	Update RISC-V offsets again Memory starts at 0x80000000, but kernel entry point is at 0x80200000, i.e. 2MB aligned memory address. Also modify kernel_addr_r to be 64MB away to give enough space for kernel. Also we can ignore rule that kernel should be mapped into the 1st 128MB of memory because of CONFIG_AUTO_ZRELADDR. That's ARMv7 specific bit. Signed-off-by: David Abdurachmanov <david.abdurachmanov@gmail.com>	2019-04-06 15:39:54 +02:00
David Abdurachmanov	af139e3d4c	Update RISC-V patch to allow kernels up to 64MB 5.1-rc3+ passed 16MB threshold. 64MB was picked based on some ARM boards. Signed-off-by: David Abdurachmanov <david.abdurachmanov@gmail.com>	2019-04-05 18:01:35 +02:00
David Abdurachmanov	92694119a7	Add CONFIG_REBOOT to set fdt_addr This is needed for PXE/extlinux boot to find FDT (Device Tree Blob) otherwise we don't boot. Also configure fdt command with FDT address so we could use it out-of-the-box in U-Boot prompt. Signed-off-by: David Abdurachmanov <david.abdurachmanov@gmail.com>	2019-03-30 20:31:09 +01:00
David Abdurachmanov	60e6ad3bb8	Bump release Signed-off-by: David Abdurachmanov <david.abdurachmanov@gmail.com>	2019-03-26 13:47:49 +01:00
David Abdurachmanov	073d9f7cdf	qemu-riscv64_smode_defconfig: enable fat and bootz commands Signed-off-by: David Abdurachmanov <david.abdurachmanov@gmail.com>	2019-03-26 13:45:15 +01:00
David Abdurachmanov	b39fdd19d6	Add support for RISC-V (riscv64) Signed-off-by: David Abdurachmanov <david.abdurachmanov@gmail.com>	2019-03-25 20:15:51 +01:00