Backport fix for binutils 2.38+

Signed-off-by: David Abdurachmanov <davidlt@rivosinc.com>

0001-Fix-BeagleAI-detection.patch

@@ -1,29 +0,0 @@
-From 1849ef423238aeb1732eb3b8e67eb46bc21401c7 Mon Sep 17 00:00:00 2001
-From: Peter Robinson <pbrobinson@gmail.com>
-Date: Thu, 10 Sep 2020 14:24:12 +0100
-Subject: [PATCH] Fix BeagleAI detection
-
-Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
----
- board/ti/am57xx/board.c | 4 +++-
- 1 file changed, 3 insertions(+), 1 deletion(-)
-
-diff --git a/board/ti/am57xx/board.c b/board/ti/am57xx/board.c
-index 7809875510..3232812a97 100644
---- a/board/ti/am57xx/board.c
-+++ b/board/ti/am57xx/board.c
-@@ -527,8 +527,10 @@ void do_board_detect(void)
- 
- 	rc = ti_i2c_eeprom_am_get(CONFIG_EEPROM_BUS_ADDRESS,
- 				  CONFIG_EEPROM_CHIP_ADDRESS);
--	if (rc)
-+	if (rc) {
- 		printf("ti_i2c_eeprom_init failed %d\n", rc);
-+		ti_i2c_eeprom_am_set("BBONE-AI", "A");
-+	}
- 
- #ifdef CONFIG_SUPPORT_EMMC_BOOT
- 	rc = board_bootmode_has_emmc();
--- 
-2.26.2
-

0001-Fixes-for-AllWinner-ethernet-network-interfaces.patch

@@ -1,518 +0,0 @@
-From 25ce28126444900b7b3efef36c6b9d15a6ab9af1 Mon Sep 17 00:00:00 2001
-From: Peter Robinson <pbrobinson@gmail.com>
-Date: Wed, 28 Oct 2020 10:08:44 +0000
-Subject: [PATCH] Fixes for AllWinner ethernet network interfaces
-
-The upstream kernel in fixing stuff has broken stuff.
-
-Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
----
- arch/arm/dts/sun50i-a64-bananapi-m64.dts        | 2 +-
- arch/arm/dts/sun50i-a64-nanopi-a64.dts          | 2 +-
- arch/arm/dts/sun50i-a64-oceanic-5205-5inmfd.dts | 2 +-
- arch/arm/dts/sun50i-a64-olinuxino.dts           | 2 +-
- arch/arm/dts/sun50i-a64-orangepi-win.dts        | 2 +-
- arch/arm/dts/sun50i-a64-pine64-plus.dts         | 2 +-
- arch/arm/dts/sun50i-a64-sopine-baseboard.dts    | 2 +-
- arch/arm/dts/sun50i-h5-libretech-all-h5-cc.dts  | 2 +-
- arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts     | 2 +-
- arch/arm/dts/sun50i-h5-nanopi-neo2.dts          | 2 +-
- arch/arm/dts/sun50i-h5-orangepi-pc2.dts         | 2 +-
- arch/arm/dts/sun50i-h5-orangepi-prime.dts       | 2 +-
- arch/arm/dts/sun50i-h5-orangepi-zero-plus.dts   | 2 +-
- arch/arm/dts/sun50i-h6-beelink-gs1.dts          | 2 +-
- arch/arm/dts/sun50i-h6-pine-h64.dts             | 2 +-
- arch/arm/dts/sun7i-a20-bananapi-m1-plus.dts     | 2 +-
- arch/arm/dts/sun7i-a20-bananapi.dts             | 2 +-
- arch/arm/dts/sun7i-a20-bananapro.dts            | 2 +-
- arch/arm/dts/sun7i-a20-cubietruck.dts           | 2 +-
- arch/arm/dts/sun7i-a20-hummingbird.dts          | 2 +-
- arch/arm/dts/sun7i-a20-lamobo-r1.dts            | 2 +-
- arch/arm/dts/sun7i-a20-olimex-som-evb.dts       | 2 +-
- arch/arm/dts/sun7i-a20-olimex-som204-evb.dts    | 2 +-
- arch/arm/dts/sun7i-a20-olinuxino-lime2.dts      | 2 +-
- arch/arm/dts/sun7i-a20-orangepi-mini.dts        | 2 +-
- arch/arm/dts/sun7i-a20-orangepi.dts             | 2 +-
- arch/arm/dts/sun7i-a20-pcduino3-nano.dts        | 2 +-
- arch/arm/dts/sun7i-a20-wits-pro-a20-dkt.dts     | 2 +-
- arch/arm/dts/sun8i-a83t-bananapi-m3.dts         | 2 +-
- arch/arm/dts/sun8i-a83t-cubietruck-plus.dts     | 2 +-
- arch/arm/dts/sun8i-h3-nanopi-m1-plus.dts        | 2 +-
- arch/arm/dts/sun8i-h3-orangepi-plus.dts         | 2 +-
- arch/arm/dts/sun8i-h3-orangepi-plus2e.dts       | 2 +-
- arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts    | 2 +-
- arch/arm/dts/sun8i-v40-bananapi-m2-berry.dts    | 2 +-
- arch/arm/dts/sunxi-bananapi-m2-plus.dtsi        | 2 +-
- 36 files changed, 36 insertions(+), 36 deletions(-)
-
-diff --git a/arch/arm/dts/sun50i-a64-bananapi-m64.dts b/arch/arm/dts/sun50i-a64-bananapi-m64.dts
-index ef1c90401b..e1c22aeb29 100644
---- a/arch/arm/dts/sun50i-a64-bananapi-m64.dts
-+++ b/arch/arm/dts/sun50i-a64-bananapi-m64.dts
-@@ -112,7 +112,7 @@
- &emac {
- 	pinctrl-names = "default";
- 	pinctrl-0 = <&rgmii_pins>;
--	phy-mode = "rgmii";
-+	phy-mode = "rgmii-id";
- 	phy-handle = <&ext_rgmii_phy>;
- 	phy-supply = <&reg_dc1sw>;
- 	status = "okay";
-diff --git a/arch/arm/dts/sun50i-a64-nanopi-a64.dts b/arch/arm/dts/sun50i-a64-nanopi-a64.dts
-index 31884dbc88..03ebe3e44b 100644
---- a/arch/arm/dts/sun50i-a64-nanopi-a64.dts
-+++ b/arch/arm/dts/sun50i-a64-nanopi-a64.dts
-@@ -102,7 +102,7 @@
- &emac {
- 	pinctrl-names = "default";
- 	pinctrl-0 = <&rgmii_pins>;
--	phy-mode = "rgmii";
-+	phy-mode = "rgmii-id";
- 	phy-handle = <&ext_rgmii_phy>;
- 	phy-supply = <&reg_dcdc1>;
- 	status = "okay";
-diff --git a/arch/arm/dts/sun50i-a64-oceanic-5205-5inmfd.dts b/arch/arm/dts/sun50i-a64-oceanic-5205-5inmfd.dts
-index 6a2154525d..94caf110ab 100644
---- a/arch/arm/dts/sun50i-a64-oceanic-5205-5inmfd.dts
-+++ b/arch/arm/dts/sun50i-a64-oceanic-5205-5inmfd.dts
-@@ -30,7 +30,7 @@
- &emac {
- 	pinctrl-names = "default";
- 	pinctrl-0 = <&rgmii_pins>;
--	phy-mode = "rgmii";
-+	phy-mode = "rgmii-id";
- 	phy-handle = <&ext_rgmii_phy>;
- 	phy-supply = <&reg_dc1sw>;
- 	allwinner,tx-delay-ps = <600>;
-diff --git a/arch/arm/dts/sun50i-a64-olinuxino.dts b/arch/arm/dts/sun50i-a64-olinuxino.dts
-index f7a4bccaa5..2396d9b797 100644
---- a/arch/arm/dts/sun50i-a64-olinuxino.dts
-+++ b/arch/arm/dts/sun50i-a64-olinuxino.dts
-@@ -102,7 +102,7 @@
- &emac {
- 	pinctrl-names = "default";
- 	pinctrl-0 = <&rgmii_pins>;
--	phy-mode = "rgmii";
-+	phy-mode = "rgmii-id";
- 	phy-handle = <&ext_rgmii_phy>;
- 	phy-supply = <&reg_dcdc1>;
- 	allwinner,tx-delay-ps = <600>;
-diff --git a/arch/arm/dts/sun50i-a64-orangepi-win.dts b/arch/arm/dts/sun50i-a64-orangepi-win.dts
-index b0c64f7579..5b5d4f31b6 100644
---- a/arch/arm/dts/sun50i-a64-orangepi-win.dts
-+++ b/arch/arm/dts/sun50i-a64-orangepi-win.dts
-@@ -127,7 +127,7 @@
- &emac {
- 	pinctrl-names = "default";
- 	pinctrl-0 = <&rgmii_pins>;
--	phy-mode = "rgmii";
-+	phy-mode = "rgmii-id";
- 	phy-handle = <&ext_rgmii_phy>;
- 	phy-supply = <&reg_gmac_3v3>;
- 	status = "okay";
-diff --git a/arch/arm/dts/sun50i-a64-pine64-plus.dts b/arch/arm/dts/sun50i-a64-pine64-plus.dts
-index 24f1aac366..b09b4276f1 100644
---- a/arch/arm/dts/sun50i-a64-pine64-plus.dts
-+++ b/arch/arm/dts/sun50i-a64-pine64-plus.dts
-@@ -52,7 +52,7 @@
- &emac {
- 	pinctrl-names = "default";
- 	pinctrl-0 = <&rgmii_pins>;
--	phy-mode = "rgmii";
-+	phy-mode = "rgmii-txid";
- 	phy-handle = <&ext_rgmii_phy>;
- 	status = "okay";
- };
-diff --git a/arch/arm/dts/sun50i-a64-sopine-baseboard.dts b/arch/arm/dts/sun50i-a64-sopine-baseboard.dts
-index 53fcc9098d..4a50a18128 100644
---- a/arch/arm/dts/sun50i-a64-sopine-baseboard.dts
-+++ b/arch/arm/dts/sun50i-a64-sopine-baseboard.dts
-@@ -95,7 +95,7 @@
- &emac {
- 	pinctrl-names = "default";
- 	pinctrl-0 = <&rgmii_pins>;
--	phy-mode = "rgmii";
-+	phy-mode = "rgmii-id";
- 	phy-handle = <&ext_rgmii_phy>;
- 	phy-supply = <&reg_dc1sw>;
- 	status = "okay";
-diff --git a/arch/arm/dts/sun50i-h5-libretech-all-h5-cc.dts b/arch/arm/dts/sun50i-h5-libretech-all-h5-cc.dts
-index df1b9263ad..6e30a564c8 100644
---- a/arch/arm/dts/sun50i-h5-libretech-all-h5-cc.dts
-+++ b/arch/arm/dts/sun50i-h5-libretech-all-h5-cc.dts
-@@ -36,7 +36,7 @@
- 	pinctrl-0 = <&emac_rgmii_pins>;
- 	phy-supply = <&reg_gmac_3v3>;
- 	phy-handle = <&ext_rgmii_phy>;
--	phy-mode = "rgmii";
-+	phy-mode = "rgmii-id";
- 	/delete-property/ allwinner,leds-active-low;
- 	status = "okay";
- };
-diff --git a/arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts b/arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts
-index 4f9ba53ffa..9d93fe1536 100644
---- a/arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts
-+++ b/arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts
-@@ -96,7 +96,7 @@
- 	pinctrl-0 = <&emac_rgmii_pins>;
- 	phy-supply = <&reg_gmac_3v3>;
- 	phy-handle = <&ext_rgmii_phy>;
--	phy-mode = "rgmii";
-+	phy-mode = "rgmii-id";
- 	status = "okay";
- };
- 
-diff --git a/arch/arm/dts/sun50i-h5-nanopi-neo2.dts b/arch/arm/dts/sun50i-h5-nanopi-neo2.dts
-index b059e20813..e8ab8c2df5 100644
---- a/arch/arm/dts/sun50i-h5-nanopi-neo2.dts
-+++ b/arch/arm/dts/sun50i-h5-nanopi-neo2.dts
-@@ -75,7 +75,7 @@
- 	pinctrl-0 = <&emac_rgmii_pins>;
- 	phy-supply = <&reg_gmac_3v3>;
- 	phy-handle = <&ext_rgmii_phy>;
--	phy-mode = "rgmii";
-+	phy-mode = "rgmii-id";
- 	status = "okay";
- };
- 
-diff --git a/arch/arm/dts/sun50i-h5-orangepi-pc2.dts b/arch/arm/dts/sun50i-h5-orangepi-pc2.dts
-index 70b5f09984..6cc567ea99 100644
---- a/arch/arm/dts/sun50i-h5-orangepi-pc2.dts
-+++ b/arch/arm/dts/sun50i-h5-orangepi-pc2.dts
-@@ -118,7 +118,7 @@
- 	pinctrl-0 = <&emac_rgmii_pins>;
- 	phy-supply = <&reg_gmac_3v3>;
- 	phy-handle = <&ext_rgmii_phy>;
--	phy-mode = "rgmii";
-+	phy-mode = "rgmii-id";
- 	status = "okay";
- };
- 
-diff --git a/arch/arm/dts/sun50i-h5-orangepi-prime.dts b/arch/arm/dts/sun50i-h5-orangepi-prime.dts
-index cb44bfa598..33ab44072e 100644
---- a/arch/arm/dts/sun50i-h5-orangepi-prime.dts
-+++ b/arch/arm/dts/sun50i-h5-orangepi-prime.dts
-@@ -124,7 +124,7 @@
- 	pinctrl-0 = <&emac_rgmii_pins>;
- 	phy-supply = <&reg_gmac_3v3>;
- 	phy-handle = <&ext_rgmii_phy>;
--	phy-mode = "rgmii";
-+	phy-mode = "rgmii-id";
- 	status = "okay";
- };
- 
-diff --git a/arch/arm/dts/sun50i-h5-orangepi-zero-plus.dts b/arch/arm/dts/sun50i-h5-orangepi-zero-plus.dts
-index ef5ca64442..de448ca51e 100644
---- a/arch/arm/dts/sun50i-h5-orangepi-zero-plus.dts
-+++ b/arch/arm/dts/sun50i-h5-orangepi-zero-plus.dts
-@@ -69,7 +69,7 @@
- 	pinctrl-0 = <&emac_rgmii_pins>;
- 	phy-supply = <&reg_gmac_3v3>;
- 	phy-handle = <&ext_rgmii_phy>;
--	phy-mode = "rgmii";
-+	phy-mode = "rgmii-id";
- 	status = "okay";
- };
- 
-diff --git a/arch/arm/dts/sun50i-h6-beelink-gs1.dts b/arch/arm/dts/sun50i-h6-beelink-gs1.dts
-index 0dc33c90dd..024035d36e 100644
---- a/arch/arm/dts/sun50i-h6-beelink-gs1.dts
-+++ b/arch/arm/dts/sun50i-h6-beelink-gs1.dts
-@@ -64,7 +64,7 @@
- &emac {
- 	pinctrl-names = "default";
- 	pinctrl-0 = <&ext_rgmii_pins>;
--	phy-mode = "rgmii";
-+	phy-mode = "rgmii-id";
- 	phy-handle = <&ext_rgmii_phy>;
- 	phy-supply = <&reg_aldo2>;
- 	status = "okay";
-diff --git a/arch/arm/dts/sun50i-h6-pine-h64.dts b/arch/arm/dts/sun50i-h6-pine-h64.dts
-index 1898345183..13fbf26817 100644
---- a/arch/arm/dts/sun50i-h6-pine-h64.dts
-+++ b/arch/arm/dts/sun50i-h6-pine-h64.dts
-@@ -66,7 +66,7 @@
- &emac {
- 	pinctrl-names = "default";
- 	pinctrl-0 = <&ext_rgmii_pins>;
--	phy-mode = "rgmii";
-+	phy-mode = "rgmii-id";
- 	phy-handle = <&ext_rgmii_phy>;
- 	phy-supply = <&reg_aldo2>;
- 	allwinner,rx-delay-ps = <200>;
-diff --git a/arch/arm/dts/sun7i-a20-bananapi-m1-plus.dts b/arch/arm/dts/sun7i-a20-bananapi-m1-plus.dts
-index e2bfe00588..4dbcad1343 100644
---- a/arch/arm/dts/sun7i-a20-bananapi-m1-plus.dts
-+++ b/arch/arm/dts/sun7i-a20-bananapi-m1-plus.dts
-@@ -130,7 +130,7 @@
- 	pinctrl-names = "default";
- 	pinctrl-0 = <&gmac_rgmii_pins>;
- 	phy = <&phy1>;
--	phy-mode = "rgmii";
-+	phy-mode = "rgmii-id";
- 	phy-supply = <&reg_gmac_3v3>;
- 	status = "okay";
- 
-diff --git a/arch/arm/dts/sun7i-a20-bananapi.dts b/arch/arm/dts/sun7i-a20-bananapi.dts
-index 81bc85d398..33040c43bc 100644
---- a/arch/arm/dts/sun7i-a20-bananapi.dts
-+++ b/arch/arm/dts/sun7i-a20-bananapi.dts
-@@ -132,7 +132,7 @@
- 	pinctrl-names = "default";
- 	pinctrl-0 = <&gmac_rgmii_pins>;
- 	phy = <&phy1>;
--	phy-mode = "rgmii";
-+	phy-mode = "rgmii-id";
- 	phy-supply = <&reg_gmac_3v3>;
- 	status = "okay";
- 
-diff --git a/arch/arm/dts/sun7i-a20-bananapro.dts b/arch/arm/dts/sun7i-a20-bananapro.dts
-index 0176e9de01..8a75545e22 100644
---- a/arch/arm/dts/sun7i-a20-bananapro.dts
-+++ b/arch/arm/dts/sun7i-a20-bananapro.dts
-@@ -110,7 +110,7 @@
- 	pinctrl-names = "default";
- 	pinctrl-0 = <&gmac_rgmii_pins>;
- 	phy = <&phy1>;
--	phy-mode = "rgmii";
-+	phy-mode = "rgmii-id";
- 	phy-supply = <&reg_gmac_3v3>;
- 	status = "okay";
- 
-diff --git a/arch/arm/dts/sun7i-a20-cubietruck.dts b/arch/arm/dts/sun7i-a20-cubietruck.dts
-index 99f531b8d2..46a9f4669e 100644
---- a/arch/arm/dts/sun7i-a20-cubietruck.dts
-+++ b/arch/arm/dts/sun7i-a20-cubietruck.dts
-@@ -151,7 +151,7 @@
- 	pinctrl-names = "default";
- 	pinctrl-0 = <&gmac_rgmii_pins>;
- 	phy = <&phy1>;
--	phy-mode = "rgmii";
-+	phy-mode = "rgmii-id";
- 	status = "okay";
- 
- 	phy1: ethernet-phy@1 {
-diff --git a/arch/arm/dts/sun7i-a20-hummingbird.dts b/arch/arm/dts/sun7i-a20-hummingbird.dts
-index fd0153f656..5c3d107094 100644
---- a/arch/arm/dts/sun7i-a20-hummingbird.dts
-+++ b/arch/arm/dts/sun7i-a20-hummingbird.dts
-@@ -101,7 +101,7 @@
- 	pinctrl-names = "default";
- 	pinctrl-0 = <&gmac_rgmii_pins>;
- 	phy = <&phy1>;
--	phy-mode = "rgmii";
-+	phy-mode = "rgmii-id";
- 	phy-supply = <&reg_gmac_vdd>;
- 	/* phy reset config */
- 	snps,reset-gpio = <&pio 0 17 GPIO_ACTIVE_HIGH>; /* PA17 */
-diff --git a/arch/arm/dts/sun7i-a20-lamobo-r1.dts b/arch/arm/dts/sun7i-a20-lamobo-r1.dts
-index f91e1bee44..8173d77c12 100644
---- a/arch/arm/dts/sun7i-a20-lamobo-r1.dts
-+++ b/arch/arm/dts/sun7i-a20-lamobo-r1.dts
-@@ -120,7 +120,7 @@
- &gmac {
- 	pinctrl-names = "default";
- 	pinctrl-0 = <&gmac_rgmii_pins>;
--	phy-mode = "rgmii";
-+	phy-mode = "rgmii-id";
- 	phy-supply = <&reg_gmac_3v3>;
- 	status = "okay";
- 	/delete-property/#address-cells;
-diff --git a/arch/arm/dts/sun7i-a20-olimex-som-evb.dts b/arch/arm/dts/sun7i-a20-olimex-som-evb.dts
-index f0e6a96e57..f0c5160ff8 100644
---- a/arch/arm/dts/sun7i-a20-olimex-som-evb.dts
-+++ b/arch/arm/dts/sun7i-a20-olimex-som-evb.dts
-@@ -112,7 +112,7 @@
- 	pinctrl-names = "default";
- 	pinctrl-0 = <&gmac_rgmii_pins>;
- 	phy = <&phy1>;
--	phy-mode = "rgmii";
-+	phy-mode = "rgmii-id";
- 	status = "okay";
- 
- 	phy1: ethernet-phy@1 {
-diff --git a/arch/arm/dts/sun7i-a20-olimex-som204-evb.dts b/arch/arm/dts/sun7i-a20-olimex-som204-evb.dts
-index 823aabce04..ff42708137 100644
---- a/arch/arm/dts/sun7i-a20-olimex-som204-evb.dts
-+++ b/arch/arm/dts/sun7i-a20-olimex-som204-evb.dts
-@@ -106,7 +106,7 @@
- 	pinctrl-names = "default";
- 	pinctrl-0 = <&gmac_rgmii_pins>;
- 	phy = <&phy3>;
--	phy-mode = "rgmii";
-+	phy-mode = "rgmii-id";
- 	phy-supply = <&reg_vcc3v3>;
- 
- 	snps,reset-gpio = <&pio 0 17 GPIO_ACTIVE_HIGH>;
-diff --git a/arch/arm/dts/sun7i-a20-olinuxino-lime2.dts b/arch/arm/dts/sun7i-a20-olinuxino-lime2.dts
-index 4e1c590eb0..996201665b 100644
---- a/arch/arm/dts/sun7i-a20-olinuxino-lime2.dts
-+++ b/arch/arm/dts/sun7i-a20-olinuxino-lime2.dts
-@@ -112,7 +112,7 @@
- 	pinctrl-names = "default";
- 	pinctrl-0 = <&gmac_rgmii_pins>;
- 	phy = <&phy1>;
--	phy-mode = "rgmii";
-+	phy-mode = "rgmii-id";
- 	status = "okay";
- 
- 	phy1: ethernet-phy@1 {
-diff --git a/arch/arm/dts/sun7i-a20-orangepi-mini.dts b/arch/arm/dts/sun7i-a20-orangepi-mini.dts
-index 15881081ca..b80215c61c 100644
---- a/arch/arm/dts/sun7i-a20-orangepi-mini.dts
-+++ b/arch/arm/dts/sun7i-a20-orangepi-mini.dts
-@@ -121,7 +121,7 @@
- 	pinctrl-names = "default";
- 	pinctrl-0 = <&gmac_rgmii_pins>;
- 	phy = <&phy1>;
--	phy-mode = "rgmii";
-+	phy-mode = "rgmii-id";
- 	phy-supply = <&reg_gmac_3v3>;
- 	status = "okay";
- 
-diff --git a/arch/arm/dts/sun7i-a20-orangepi.dts b/arch/arm/dts/sun7i-a20-orangepi.dts
-index d64de2e73a..66efb7d1ab 100644
---- a/arch/arm/dts/sun7i-a20-orangepi.dts
-+++ b/arch/arm/dts/sun7i-a20-orangepi.dts
-@@ -97,7 +97,7 @@
- 	pinctrl-names = "default";
- 	pinctrl-0 = <&gmac_rgmii_pins>;
- 	phy = <&phy1>;
--	phy-mode = "rgmii";
-+	phy-mode = "rgmii-id";
- 	phy-supply = <&reg_gmac_3v3>;
- 	status = "okay";
- 
-diff --git a/arch/arm/dts/sun7i-a20-pcduino3-nano.dts b/arch/arm/dts/sun7i-a20-pcduino3-nano.dts
-index 538ea15fa3..205eaae44a 100644
---- a/arch/arm/dts/sun7i-a20-pcduino3-nano.dts
-+++ b/arch/arm/dts/sun7i-a20-pcduino3-nano.dts
-@@ -115,7 +115,7 @@
- 	pinctrl-names = "default";
- 	pinctrl-0 = <&gmac_rgmii_pins>;
- 	phy = <&phy1>;
--	phy-mode = "rgmii";
-+	phy-mode = "rgmii-id";
- 	status = "okay";
- 
- 	phy1: ethernet-phy@1 {
-diff --git a/arch/arm/dts/sun7i-a20-wits-pro-a20-dkt.dts b/arch/arm/dts/sun7i-a20-wits-pro-a20-dkt.dts
-index c27e56091f..56cc5791c4 100644
---- a/arch/arm/dts/sun7i-a20-wits-pro-a20-dkt.dts
-+++ b/arch/arm/dts/sun7i-a20-wits-pro-a20-dkt.dts
-@@ -82,7 +82,7 @@
- 	pinctrl-names = "default";
- 	pinctrl-0 = <&gmac_rgmii_pins>;
- 	phy = <&phy1>;
--	phy-mode = "rgmii";
-+	phy-mode = "rgmii-id";
- 	status = "okay";
- 
- 	phy1: ethernet-phy@1 {
-diff --git a/arch/arm/dts/sun8i-a83t-bananapi-m3.dts b/arch/arm/dts/sun8i-a83t-bananapi-m3.dts
-index eaff6fa401..2beafe3a31 100644
---- a/arch/arm/dts/sun8i-a83t-bananapi-m3.dts
-+++ b/arch/arm/dts/sun8i-a83t-bananapi-m3.dts
-@@ -123,7 +123,7 @@
- 	pinctrl-0 = <&emac_rgmii_pins>;
- 	phy-supply = <&reg_sw>;
- 	phy-handle = <&rgmii_phy>;
--	phy-mode = "rgmii";
-+	phy-mode = "rgmii-id";
- 	allwinner,rx-delay-ps = <700>;
- 	allwinner,tx-delay-ps = <700>;
- 	status = "okay";
-diff --git a/arch/arm/dts/sun8i-a83t-cubietruck-plus.dts b/arch/arm/dts/sun8i-a83t-cubietruck-plus.dts
-index 5dba4fc310..ecd9ff38a8 100644
---- a/arch/arm/dts/sun8i-a83t-cubietruck-plus.dts
-+++ b/arch/arm/dts/sun8i-a83t-cubietruck-plus.dts
-@@ -160,7 +160,7 @@
- 	pinctrl-0 = <&emac_rgmii_pins>;
- 	phy-supply = <&reg_dldo4>;
- 	phy-handle = <&rgmii_phy>;
--	phy-mode = "rgmii";
-+	phy-mode = "rgmii-id";
- 	status = "okay";
- };
- 
-diff --git a/arch/arm/dts/sun8i-h3-nanopi-m1-plus.dts b/arch/arm/dts/sun8i-h3-nanopi-m1-plus.dts
-index 4ba533b034..bc370d4ea1 100644
---- a/arch/arm/dts/sun8i-h3-nanopi-m1-plus.dts
-+++ b/arch/arm/dts/sun8i-h3-nanopi-m1-plus.dts
-@@ -96,7 +96,7 @@
- 	pinctrl-0 = <&emac_rgmii_pins>;
- 	phy-supply = <&reg_gmac_3v3>;
- 	phy-handle = <&ext_rgmii_phy>;
--	phy-mode = "rgmii";
-+	phy-mode = "rgmii-id";
- 
- 	status = "okay";
- };
-diff --git a/arch/arm/dts/sun8i-h3-orangepi-plus.dts b/arch/arm/dts/sun8i-h3-orangepi-plus.dts
-index 97f497854e..d05fa679dc 100644
---- a/arch/arm/dts/sun8i-h3-orangepi-plus.dts
-+++ b/arch/arm/dts/sun8i-h3-orangepi-plus.dts
-@@ -85,7 +85,7 @@
- 	pinctrl-0 = <&emac_rgmii_pins>;
- 	phy-supply = <&reg_gmac_3v3>;
- 	phy-handle = <&ext_rgmii_phy>;
--	phy-mode = "rgmii";
-+	phy-mode = "rgmii-id";
- 
- 	status = "okay";
- };
-diff --git a/arch/arm/dts/sun8i-h3-orangepi-plus2e.dts b/arch/arm/dts/sun8i-h3-orangepi-plus2e.dts
-index 6dbf7b2e0c..b6ca45d18e 100644
---- a/arch/arm/dts/sun8i-h3-orangepi-plus2e.dts
-+++ b/arch/arm/dts/sun8i-h3-orangepi-plus2e.dts
-@@ -67,7 +67,7 @@
- 	pinctrl-0 = <&emac_rgmii_pins>;
- 	phy-supply = <&reg_gmac_3v3>;
- 	phy-handle = <&ext_rgmii_phy>;
--	phy-mode = "rgmii";
-+	phy-mode = "rgmii-id";
- 	status = "okay";
- };
- 
-diff --git a/arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts b/arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts
-index c488aaacbd..9c20245eef 100644
---- a/arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts
-+++ b/arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts
-@@ -129,7 +129,7 @@
- 	pinctrl-names = "default";
- 	pinctrl-0 = <&gmac_rgmii_pins>;
- 	phy-handle = <&phy1>;
--	phy-mode = "rgmii";
-+	phy-mode = "rgmii-id";
- 	phy-supply = <&reg_dc1sw>;
- 	status = "okay";
- };
-diff --git a/arch/arm/dts/sun8i-v40-bananapi-m2-berry.dts b/arch/arm/dts/sun8i-v40-bananapi-m2-berry.dts
-index 15c22b06fc..3ab6f47cea 100644
---- a/arch/arm/dts/sun8i-v40-bananapi-m2-berry.dts
-+++ b/arch/arm/dts/sun8i-v40-bananapi-m2-berry.dts
-@@ -120,7 +120,7 @@
- 	pinctrl-names = "default";
- 	pinctrl-0 = <&gmac_rgmii_pins>;
- 	phy-handle = <&phy1>;
--	phy-mode = "rgmii";
-+	phy-mode = "rgmii-id";
- 	phy-supply = <&reg_dc1sw>;
- 	status = "okay";
- };
-diff --git a/arch/arm/dts/sunxi-bananapi-m2-plus.dtsi b/arch/arm/dts/sunxi-bananapi-m2-plus.dtsi
-index 39263e74fb..8e5cb3b3fd 100644
---- a/arch/arm/dts/sunxi-bananapi-m2-plus.dtsi
-+++ b/arch/arm/dts/sunxi-bananapi-m2-plus.dtsi
-@@ -126,7 +126,7 @@
- 	pinctrl-0 = <&emac_rgmii_pins>;
- 	phy-supply = <&reg_gmac_3v3>;
- 	phy-handle = <&ext_rgmii_phy>;
--	phy-mode = "rgmii";
-+	phy-mode = "rgmii-id";
- 
- 	status = "okay";
- };
--- 
-2.28.0
-

0001-Revert-power-pmic-rk8xx-Support-sysreset-shutdown-me.patch

@@ -0,0 +1,92 @@
+From 17096f20920205200b88d6d8facdbef0d3d3d3e8 Mon Sep 17 00:00:00 2001
+From: Peter Robinson <pbrobinson@gmail.com>
+Date: Sun, 4 Sep 2022 22:22:50 +0100
+Subject: [PATCH] Revert "power: pmic: rk8xx: Support sysreset shutdown method"
+
+This reverts commit ad607512f5757f4485968efd5bcf2c0245a8a235.
+---
+ drivers/power/pmic/rk8xx.c | 50 +-------------------------------------
+ 1 file changed, 1 insertion(+), 49 deletions(-)
+
+diff --git a/drivers/power/pmic/rk8xx.c b/drivers/power/pmic/rk8xx.c
+index 25ef621f8df..8d703112c38 100644
+--- a/drivers/power/pmic/rk8xx.c
++++ b/drivers/power/pmic/rk8xx.c
+@@ -6,50 +6,10 @@
+ 
+ #include <common.h>
+ #include <dm.h>
+-#include <dm/lists.h>
+ #include <errno.h>
+ #include <log.h>
+ #include <power/rk8xx_pmic.h>
+ #include <power/pmic.h>
+-#include <sysreset.h>
+-
+-static int rk8xx_sysreset_request(struct udevice *dev, enum sysreset_t type)
+-{
+-	struct rk8xx_priv *priv = dev_get_priv(dev->parent);
+-
+-	if (type != SYSRESET_POWER_OFF)
+-		return -EPROTONOSUPPORT;
+-
+-	switch (priv->variant) {
+-	case RK805_ID:
+-	case RK808_ID:
+-	case RK816_ID:
+-	case RK818_ID:
+-		pmic_clrsetbits(dev->parent, REG_DEVCTRL, 0, BIT(0));
+-		break;
+-	case RK809_ID:
+-	case RK817_ID:
+-		pmic_clrsetbits(dev->parent, RK817_REG_SYS_CFG3, 0,
+-				BIT(0));
+-		break;
+-	default:
+-		printf("Unknown PMIC RK%x: Cannot shutdown\n",
+-		       priv->variant);
+-		return -EPROTONOSUPPORT;
+-	};
+-
+-	return -EINPROGRESS;
+-}
+-
+-static struct sysreset_ops rk8xx_sysreset_ops = {
+-	.request	= rk8xx_sysreset_request,
+-};
+-
+-U_BOOT_DRIVER(rk8xx_sysreset) = {
+-	.name		= "rk8xx_sysreset",
+-	.id		= UCLASS_SYSRESET,
+-	.ops		= &rk8xx_sysreset_ops,
+-};
+ 
+ /* In the event of a plug-in and the appropriate option has been
+  * selected, we simply shutdown instead of continue the normal boot
+@@ -133,7 +93,7 @@ static int rk8xx_read(struct udevice *dev, uint reg, uint8_t *buff, int len)
+ static int rk8xx_bind(struct udevice *dev)
+ {
+ 	ofnode regulators_node;
+-	int children, ret;
++	int children;
+ 
+ 	regulators_node = dev_read_subnode(dev, "regulators");
+ 	if (!ofnode_valid(regulators_node)) {
+@@ -144,14 +104,6 @@ static int rk8xx_bind(struct udevice *dev)
+ 
+ 	debug("%s: '%s' - found regulators subnode\n", __func__, dev->name);
+ 
+-	if (CONFIG_IS_ENABLED(SYSRESET)) {
+-		ret = device_bind_driver_to_node(dev, "rk8xx_sysreset",
+-						 "rk8xx_sysreset",
+-						 dev_ofnode(dev), NULL);
+-		if (ret)
+-			return ret;
+-	}
+-
+ 	children = pmic_bind_children(dev, regulators_node, pmic_children_info);
+ 	if (!children)
+ 		debug("%s: %s - no child found\n", __func__, dev->name);
+-- 
+2.37.3
+

0001-board-sifive-spl-Initialized-the-PWM-setting-in-the-.patch

@@ -0,0 +1,104 @@
+From f6c0dda1c82c6abb108e3511497e37c54ccb8e59 Mon Sep 17 00:00:00 2001
+From: Vincent Chen <vincent.chen@sifive.com>
+Date: Mon, 15 Nov 2021 03:31:04 -0800
+Subject: [PATCH 1/3] board: sifive: spl: Initialized the PWM setting in the
+ SPL stage
+
+LEDs and multiple fans can be controlled by SPL. This patch ensures
+that all fans have been enabled in the SPL stage. In addition, the
+LED's color will be set to yellow.
+---
+ board/sifive/unmatched/Makefile |  1 +
+ board/sifive/unmatched/pwm.c    | 57 +++++++++++++++++++++++++++++++++
+ board/sifive/unmatched/spl.c    |  2 ++
+ 3 files changed, 60 insertions(+)
+ create mode 100644 board/sifive/unmatched/pwm.c
+
+diff --git a/board/sifive/unmatched/Makefile b/board/sifive/unmatched/Makefile
+index 13453300..5df01982 100644
+--- a/board/sifive/unmatched/Makefile
++++ b/board/sifive/unmatched/Makefile
+@@ -9,3 +9,4 @@ obj-y += spl.o
+ else
+ obj-y += unmatched.o
+ endif
++obj-y += pwm.o
+diff --git a/board/sifive/unmatched/pwm.c b/board/sifive/unmatched/pwm.c
+new file mode 100644
+index 00000000..e1cc0231
+--- /dev/null
++++ b/board/sifive/unmatched/pwm.c
+@@ -0,0 +1,57 @@
++// SPDX-License-Identifier: GPL-2.0+
++/*
++ * Copyright (c) 2021, SiFive Inc
++ *
++ * Authors:
++ *   Vincent Chen <vincent.chen@sifive.com>
++ *   David Abdurachmanov <david.abdurachmanov@sifive.com>
++ */
++
++#include <linux/io.h>
++#include <asm/arch/eeprom.h>
++
++struct pwm_sifive_regs {
++	unsigned int cfg;	/* PWM configuration register */
++	unsigned int pad0;	/* Reserved */
++	unsigned int cnt;	/* PWM count register */
++	unsigned int pad1;	/* Reserved */
++	unsigned int pwms;	/* Scaled PWM count register */
++	unsigned int pad2;	/* Reserved */
++	unsigned int pad3;	/* Reserved */
++	unsigned int pad4;	/* Reserved */
++	unsigned int cmp0;	/* PWM 0 compare register */
++	unsigned int cmp1;	/* PWM 1 compare register */
++	unsigned int cmp2;	/* PWM 2 compare register */
++	unsigned int cmp3;	/* PWM 3 compare register */
++};
++
++#define PWM0_BASE		0x10020000
++#define PWM1_BASE		0x10021000
++#define PWM_CFG_INIT		0x1000
++#define PWM_CMP_ENABLE_VAL	0x0
++#define PWM_CMP_DISABLE_VAL	0xffff
++
++void pwm_device_init(void)
++{
++	struct pwm_sifive_regs *pwm0, *pwm1;
++	pwm0 = (struct pwm_sifive_regs *)PWM0_BASE;
++	pwm1 = (struct pwm_sifive_regs *)PWM1_BASE;
++	writel(PWM_CMP_DISABLE_VAL, (void *)&pwm0->cmp0);
++	/* Set the 3-color PWM LEDs to yellow in SPL */
++	writel(PWM_CMP_ENABLE_VAL, (void *)&pwm0->cmp1);
++	writel(PWM_CMP_ENABLE_VAL, (void *)&pwm0->cmp2);
++	writel(PWM_CMP_DISABLE_VAL, (void *)&pwm0->cmp3);
++	writel(PWM_CFG_INIT, (void *)&pwm0->cfg);
++
++	writel(PWM_CMP_DISABLE_VAL, (void *)&pwm0->cmp3);
++	/* Turn on all the fans, (J21), (J23) and (J24), on the unmatched board */
++	/* The SoC fan(J21) on the rev3 board cannot be controled by PWM_COMP0,
++	   so here sets the initial value of PWM_COMP0 as DISABLE */
++	if (get_pcb_revision_from_eeprom() == PCB_REVISION_REV3)
++		writel(PWM_CMP_DISABLE_VAL, (void *)&pwm1->cmp1);
++	else
++		writel(PWM_CMP_ENABLE_VAL, (void *)&pwm1->cmp1);
++	writel(PWM_CMP_ENABLE_VAL, (void *)&pwm1->cmp2);
++	writel(PWM_CMP_ENABLE_VAL, (void *)&pwm1->cmp3);
++	writel(PWM_CFG_INIT, (void *)&pwm1->cfg);
++}
+diff --git a/board/sifive/unmatched/spl.c b/board/sifive/unmatched/spl.c
+index 7c0beedc..f3a661a8 100644
+--- a/board/sifive/unmatched/spl.c
++++ b/board/sifive/unmatched/spl.c
+@@ -90,6 +90,8 @@ int spl_board_init_f(void)
+ 		goto end;
+ 	}
+ 
++	pwm_device_init();
++
+ 	ret = spl_gemgxl_init();
+ 	if (ret) {
+ 		debug("Gigabit ethernet PHY (VSC8541) init failed: %d\n", ret);
+-- 
+2.37.3
+

0002-board-sifive-spl-Set-remote-thermal-of-TMP451-to-85-.patch

@@ -0,0 +1,120 @@
+From 918c6f91b146aabb74d7d721da8747827a873f8a Mon Sep 17 00:00:00 2001
+From: Vincent Chen <vincent.chen@sifive.com>
+Date: Thu, 17 Nov 2022 13:13:03 +0200
+Subject: [PATCH 2/3] board: sifive: spl: Set remote thermal of TMP451 to 85
+ deg C for the unmatched board
+
+For TMP451 on the unmatched board, the default value of the remote
+thermal threshold is 108 deg C. This commit initilizes it to 85 deg C at SPL.
+---
+ board/sifive/unmatched/spl.c       | 29 +++++++++++++++++++++++++++++
+ drivers/misc/Kconfig               | 10 ++++++++++
+ include/configs/sifive-unmatched.h |  4 ++++
+ scripts/config_whitelist.txt       |  1 +
+ 4 files changed, 44 insertions(+)
+
+diff --git a/board/sifive/unmatched/spl.c b/board/sifive/unmatched/spl.c
+index f3a661a8..05ba5916 100644
+--- a/board/sifive/unmatched/spl.c
++++ b/board/sifive/unmatched/spl.c
+@@ -10,6 +10,8 @@
+ #include <spl.h>
+ #include <misc.h>
+ #include <log.h>
++#include <config.h>
++#include <i2c.h>
+ #include <linux/delay.h>
+ #include <linux/io.h>
+ #include <asm/gpio.h>
+@@ -26,6 +28,27 @@
+ #define MODE_SELECT_SD		0xb
+ #define MODE_SELECT_MASK	GENMASK(3, 0)
+ 
++#define TMP451_REMOTE_THERM_LIMIT_REG_OFFSET	0x19
++#define TMP451_REMOTE_THERM_LIMIT_INIT_VALUE	0x55
++
++static inline int init_tmp451_remote_therm_limit(void)
++{
++	struct udevice *dev;
++	unsigned char r_therm_limit = TMP451_REMOTE_THERM_LIMIT_INIT_VALUE;
++	int ret;
++
++	ret = i2c_get_chip_for_busnum(CONFIG_SYS_TMP451_BUS_NUM,
++				      CONFIG_SYS_I2C_TMP451_ADDR,
++				      CONFIG_SYS_I2C_TMP451_ADDR_LEN,
++				      &dev);
++
++	if (!ret)
++		ret = dm_i2c_write(dev, TMP451_REMOTE_THERM_LIMIT_REG_OFFSET,
++				   &r_therm_limit,
++				   sizeof(unsigned char));
++	return ret;
++}
++
+ static inline int spl_reset_device_by_gpio(const char *label, int pin, int low_width)
+ {
+ 	int ret;
+@@ -92,6 +115,12 @@ int spl_board_init_f(void)
+ 
+ 	pwm_device_init();
+ 
++	ret = init_tmp451_remote_therm_limit();
++	if (ret) {
++		debug("TMP451 remote THERM limit init failed: %d\n", ret);
++		goto end;
++	}
++
+ 	ret = spl_gemgxl_init();
+ 	if (ret) {
+ 		debug("Gigabit ethernet PHY (VSC8541) init failed: %d\n", ret);
+diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
+index a6da6e21..f166de4c 100644
+--- a/drivers/misc/Kconfig
++++ b/drivers/misc/Kconfig
+@@ -538,6 +538,16 @@ config SYS_I2C_EEPROM_ADDR
+ 
+ if I2C_EEPROM
+ 
++config SYS_I2C_TMP451_ADDR
++	hex "Chip address of the TMP451 device"
++	default 0
++
++config SYS_I2C_TMP451_ADDR_LEN
++	int "Length in bytes of the TMP451 memory array address"
++	default 1
++	help
++	  Note: This is NOT the chip address length!
++
+ config SYS_I2C_EEPROM_ADDR_OVERFLOW
+ 	hex "EEPROM Address Overflow"
+ 	default 0x0
+diff --git a/include/configs/sifive-unmatched.h b/include/configs/sifive-unmatched.h
+index 9923f3d9..96c6e8df 100644
+--- a/include/configs/sifive-unmatched.h
++++ b/include/configs/sifive-unmatched.h
+@@ -15,6 +15,10 @@
+ 
+ #define CONFIG_STANDALONE_LOAD_ADDR	0x80200000
+ 
++#define CONFIG_SYS_TMP451_BUS_NUM	0
++#define CONFIG_SYS_I2C_TMP451_ADDR	0x4c
++#define CONFIG_SYS_I2C_TMP451_ADDR_LEN	0x1
++
+ /* Environment options */
+ 
+ #define BOOT_TARGET_DEVICES(func) \
+diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
+index f505722f..032126d8 100644
+--- a/scripts/config_whitelist.txt
++++ b/scripts/config_whitelist.txt
+@@ -1268,6 +1268,7 @@ CONFIG_SYS_TIMER_BASE
+ CONFIG_SYS_TIMER_COUNTER
+ CONFIG_SYS_TIMER_COUNTS_DOWN
+ CONFIG_SYS_TIMER_RATE
++CONFIG_SYS_TMP451_BUS_NUM
+ CONFIG_SYS_TMPVIRT
+ CONFIG_SYS_TSEC1_OFFSET
+ CONFIG_SYS_TX_ETH_BUFFER
+-- 
+2.37.3
+

0003-Enable-sbi-command-and-SBI-sysreset.patch

@@ -0,0 +1,68 @@
+From 9fba4e75ae1b09bd9d58bf09b3dab02d25f85b30 Mon Sep 17 00:00:00 2001
+From: David Abdurachmanov <davidlt@rivosinc.com>
+Date: Thu, 17 Nov 2022 13:16:58 +0200
+Subject: [PATCH 3/3] Enable "sbi" command and SBI sysreset
+
+Signed-off-by: David Abdurachmanov <davidlt@rivosinc.com>
+---
+ configs/qemu-riscv64_defconfig       | 5 +++++
+ configs/qemu-riscv64_smode_defconfig | 5 +++++
+ configs/sifive_unleashed_defconfig   | 5 +++++
+ configs/sifive_unmatched_defconfig   | 5 +++++
+ 4 files changed, 20 insertions(+)
+
+diff --git a/configs/qemu-riscv64_defconfig b/configs/qemu-riscv64_defconfig
+index d5eae95c..611d5eb3 100644
+--- a/configs/qemu-riscv64_defconfig
++++ b/configs/qemu-riscv64_defconfig
+@@ -21,3 +21,8 @@ CONFIG_CMD_NVEDIT_EFI=y
+ CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+ CONFIG_DM_MTD=y
+ CONFIG_SYS_MAX_FLASH_BANKS=2
++CONFIG_CMD_SBI=y
++CONFIG_SYSRESET=y
++CONFIG_SYSRESET_SBI=y
++CONFIG_CMD_POWEROFF=y
++CONFIG_SYSRESET_CMD_POWEROFF=y
+diff --git a/configs/qemu-riscv64_smode_defconfig b/configs/qemu-riscv64_smode_defconfig
+index 1cb06b4b..26f9f632 100644
+--- a/configs/qemu-riscv64_smode_defconfig
++++ b/configs/qemu-riscv64_smode_defconfig
+@@ -24,3 +24,8 @@ CONFIG_CMD_NVEDIT_EFI=y
+ CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+ CONFIG_DM_MTD=y
+ CONFIG_SYS_MAX_FLASH_BANKS=2
++CONFIG_CMD_SBI=y
++CONFIG_SYSRESET=y
++CONFIG_SYSRESET_SBI=y
++CONFIG_CMD_POWEROFF=y
++CONFIG_SYSRESET_CMD_POWEROFF=y
+diff --git a/configs/sifive_unleashed_defconfig b/configs/sifive_unleashed_defconfig
+index 99faabaa..e85877bc 100644
+--- a/configs/sifive_unleashed_defconfig
++++ b/configs/sifive_unleashed_defconfig
+@@ -40,3 +40,8 @@ CONFIG_SPL_DM_SEQ_ALIAS=y
+ CONFIG_SPL_CLK=y
+ CONFIG_DM_MTD=y
+ CONFIG_DM_RESET=y
++CONFIG_CMD_SBI=y
++CONFIG_SYSRESET=y
++CONFIG_SYSRESET_SBI=y
++CONFIG_CMD_POWEROFF=y
++CONFIG_SYSRESET_CMD_POWEROFF=y
+diff --git a/configs/sifive_unmatched_defconfig b/configs/sifive_unmatched_defconfig
+index c390af26..4dd545fa 100644
+--- a/configs/sifive_unmatched_defconfig
++++ b/configs/sifive_unmatched_defconfig
+@@ -62,3 +62,8 @@ CONFIG_DM_SCSI=y
+ CONFIG_USB=y
+ CONFIG_USB_XHCI_HCD=y
+ CONFIG_USB_XHCI_PCI=y
++CONFIG_CMD_SBI=y
++CONFIG_SYSRESET=y
++CONFIG_SYSRESET_SBI=y
++CONFIG_CMD_POWEROFF=y
++CONFIG_SYSRESET_CMD_POWEROFF=y
+-- 
+2.37.3
+

1dde977518f13824b847e23275001191139bc384.patch

@@ -0,0 +1,52 @@
+From 1dde977518f13824b847e23275001191139bc384 Mon Sep 17 00:00:00 2001
+From: Alexandre Ghiti <alexandre.ghiti@canonical.com>
+Date: Mon, 3 Oct 2022 18:07:54 +0200
+Subject: [PATCH] riscv: Fix build against binutils 2.38
+
+The following description is copied from the equivalent patch for the
+Linux Kernel proposed by Aurelien Jarno:
+
+>From version 2.38, binutils default to ISA spec version 20191213. This
+means that the csr read/write (csrr*/csrw*) instructions and fence.i
+instruction has separated from the `I` extension, become two standalone
+extensions: Zicsr and Zifencei. As the kernel uses those instruction,
+this causes the following build failure:
+
+arch/riscv/cpu/mtrap.S: Assembler messages:
+arch/riscv/cpu/mtrap.S:65: Error: unrecognized opcode `csrr a0,scause'
+arch/riscv/cpu/mtrap.S:66: Error: unrecognized opcode `csrr a1,sepc'
+arch/riscv/cpu/mtrap.S:67: Error: unrecognized opcode `csrr a2,stval'
+arch/riscv/cpu/mtrap.S:70: Error: unrecognized opcode `csrw sepc,a0'
+
+Signed-off-by: Alexandre Ghiti <alexandre.ghiti@canonical.com>
+Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
+Tested-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
+Tested-by: Heiko Stuebner <heiko@sntech.de>
+Tested-by: Christian Stewart <christian@paral.in>
+Reviewed-by: Rick Chen <rick@andestech.com>
+---
+ arch/riscv/Makefile | 11 ++++++++++-
+ 1 file changed, 10 insertions(+), 1 deletion(-)
+
+diff --git a/arch/riscv/Makefile b/arch/riscv/Makefile
+index 0b80eb8d8645..53d1194ffb64 100644
+--- a/arch/riscv/Makefile
++++ b/arch/riscv/Makefile
+@@ -24,7 +24,16 @@ ifeq ($(CONFIG_CMODEL_MEDANY),y)
+ 	CMODEL = medany
+ endif
+ 
+-ARCH_FLAGS = -march=$(ARCH_BASE)$(ARCH_A)$(ARCH_C) -mabi=$(ABI) \
++RISCV_MARCH = $(ARCH_BASE)$(ARCH_A)$(ARCH_C)
++
++# Newer binutils versions default to ISA spec version 20191213 which moves some
++# instructions from the I extension to the Zicsr and Zifencei extensions.
++toolchain-need-zicsr-zifencei := $(call cc-option-yn, -mabi=$(ABI) -march=$(RISCV_MARCH)_zicsr_zifencei)
++ifeq ($(toolchain-need-zicsr-zifencei),y)
++	RISCV_MARCH := $(RISCV_MARCH)_zicsr_zifencei
++endif
++
++ARCH_FLAGS = -march=$(RISCV_MARCH) -mabi=$(ABI) \
+ 	     -mcmodel=$(CMODEL)
+ 
+ PLATFORM_CPPFLAGS	+= $(ARCH_FLAGS)

AllWinner-PineTab.patch

@@ -1,45 +0,0 @@
-From 6bf15552c2b6becb48ce7732120e0ddb2078cb1a Mon Sep 17 00:00:00 2001
-From: Peter Robinson <pbrobinson@gmail.com>
-Date: Tue, 14 Apr 2020 09:53:07 +0100
-Subject: [PATCH 9/9] initial pinetab support
-
-Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
----
- configs/pinetab_defconfig | 26 ++++++++++++++++++++++++++
- 1 file changed, 26 insertions(+)
- create mode 100644 configs/pinetab_defconfig
-
-diff --git a/configs/pinetab_defconfig b/configs/pinetab_defconfig
-new file mode 100644
-index 0000000000..5b9620f3e5
---- /dev/null
-+++ b/configs/pinetab_defconfig
-@@ -0,0 +1,26 @@
-+CONFIG_ARM=y
-+CONFIG_ARCH_SUNXI=y
-+CONFIG_SPL=y
-+CONFIG_MACH_SUN50I=y
-+CONFIG_SUNXI_DRAM_LPDDR3_STOCK=y
-+CONFIG_DRAM_CLK=552
-+CONFIG_DRAM_ZQ=3881949
-+CONFIG_MMC_SUNXI_SLOT_EXTRA=2
-+CONFIG_R_I2C_ENABLE=y
-+CONFIG_SPL_SPI_SUNXI=y
-+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-+CONFIG_USE_PREBOOT=y
-+# CONFIG_SPL_DOS_PARTITION is not set
-+# CONFIG_SPL_EFI_PARTITION is not set
-+CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-pinetab"
-+CONFIG_OF_LIST="sun50i-a64-pinetab"
-+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-+CONFIG_DM_REGULATOR=y
-+CONFIG_DM_REGULATOR_FIXED=y
-+CONFIG_DM_PWM=y
-+CONFIG_PWM_SUNXI=y
-+CONFIG_LED=y
-+CONFIG_LED_GPIO=y
-+CONFIG_USB_EHCI_HCD=y
-+CONFIG_USB_OHCI_HCD=y
-+CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
--- 
-2.26.0

aarch64-boards

@@ -1,10 +1,12 @@
 a64-olinuxino
 amarula_a64_relic
+apple_m1
 bananapi_m2_plus_h5
 bananapi_m64
+beelink_gs1
 dragonboard410c
 dragonboard820c
-espresso7420
+dragonboard845c
 evb-rk3328
 evb-rk3399
 ficus-rk3399
@@ -12,12 +14,13 @@ firefly-rk3399
 geekbox
 hikey
 khadas-edge-captain-rk3399
-khadas-edge-v-rk3399
 khadas-edge-rk3399
+khadas-edge-v-rk3399
 khadas-vim
 khadas-vim2
 khadas-vim3
 khadas-vim3l
+leez-rk3399
 libretech-ac
 libretech_all_h3_cc_h5
 libretech_all_h3_it_h5
@@ -28,18 +31,24 @@ mvebu_mcbin-88f8040
 nanopc-t4-rk3399
 nanopi_a64
 nanopi-k2
-nanopi-m4-rk3399
 nanopi-m4-2gb-rk3399
+nanopi-m4b-rk3399
+nanopi-m4-rk3399
 nanopi_neo2
 nanopi-neo4-rk3399
 nanopi_neo_plus2
+nanopi_r1s_h5
+nanopi-r2s-rk3328
+nanopi-r4s-rk3399
 odroid-c2
+orangepi_3
 orangepi_lite2
 orangepi_one_plus
 orangepi_pc2
 orangepi_prime
 orangepi-rk3399
 orangepi_win
+orangepi_zero2
 orangepi_zero_plus
 orangepi_zero_plus2
 p212
@@ -50,25 +59,27 @@ pine64-lts
 pine64_plus
 pinebook
 pinebook-pro-rk3399
+pine_h64
 pinephone
 pinetab
-pine_h64
 poplar
 puma-rk3399
+roc-cc-rk3328
 rock64-rk3328
 rock960-rk3399
-rock-pi-4-rk3399
 rock-pi-4c-rk3399
+rock-pi-4-rk3399
 rock-pi-e-rk3328
 rock-pi-n10-rk3399pro
 rockpro64-rk3399
-roc-cc-rk3328
-roc-pc-rk3399
 roc-pc-mezzanine-rk3399
+roc-pc-rk3399
 rpi_3
 rpi_4
 rpi_arm64
+starqltechn
 sopine_baseboard
+tanix_tx6
 teres_i
 turris_mox
 vexpress_aemv8a_juno

arm-boards

@@ -1,143 +0,0 @@
-A10-OLinuXino-Lime
-A10s-OLinuXino-M
-A13-OLinuXino
-A13-OLinuXinoM
-A20-Olimex-SOM-EVB
-A20-OLinuXino-Lime
-A20-OLinuXino-Lime2
-A20-OLinuXino_MICRO
-am335x_evm
-am57xx_evm
-Ampe_A76
-apalis_imx6
-arndale
-Auxtek-T003
-Auxtek-T004
-ba10_tv_box
-Bananapi
-bananapi_m1_plus
-bananapi_m2_berry
-Bananapi_m2m
-bananapi_m2_plus_h3
-Bananapi_M2_Ultra
-bananapi_m2_zero
-Bananapro
-chiliboard
-CHIP
-Chuwi_V7_CW0825
-clearfog
-cm_fx6
-Colombus
-colorfly_e708_q1
-CSQ_CS908
-Cubieboard
-Cubieboard2
-Cubieboard4
-Cubietruck
-Cubietruck_plus
-db-mv784mp-gp
-difrnce_dit4350
-dserve_dsrv9703c
-evb-rk3229
-firefly-rk3288
-helios4
-Hummingbird_A31
-Hyundai_A7HD
-i12-tvbox
-icnova-a20-swac
-inet1
-iNet_3F
-iNet_3W
-inet86dz
-iNet_86VS
-inet97fv2
-inet98v_rev2
-inet9f_rev03
-inet_q972
-Itead_Ibox_A20
-jesurun_q5
-jetson-tk1
-kc1
-Lamobo_R1
-libretech_all_h3_cc_h2_plus
-Linksprite_pcDuino
-Linksprite_pcDuino3
-Linksprite_pcDuino3_Nano
-liteboard
-marsboard
-Marsboard_A10
-Mele_A1000
-Mele_A1000G_quad
-Mele_I7
-Mele_M3
-Mele_M5
-Mele_M9
-Mini-X
-mk802
-mk802_a10s
-mk802ii
-MK808C
-MSI_Primo73
-MSI_Primo81
-mx6cuboxi
-nanopi_m1
-nanopi_m1_plus
-nanopi_neo
-novena
-odroid
-odroid-xu3
-omap3_beagle
-omap4_panda
-omap5_uevm
-Orangepi
-orangepi_2
-orangepi_lite
-Orangepi_mini
-orangepi_one
-orangepi_pc
-orangepi_pc_plus
-orangepi_plus
-orangepi_plus2e
-orangepi_r1
-orangepi_zero
-origen
-paz00
-pinecube
-polaroid_mid2809pxe04
-pov_protab2_ips9
-q8_a13_tablet
-q8_a23_tablet_800x480
-q8_a33_tablet_1024x600
-q8_a33_tablet_800x480
-qemu_arm
-r7-tv-dongle
-riotboard
-rock
-rock-pi-n8-rk3288
-rock2
-rpi_2
-rpi_3_32b
-rpi_4_32b
-Sinlinx_SinA31s
-Sinovoip_BPI_M2
-Sinovoip_BPI_M3
-stih410-b2260
-stm32mp15_basic
-sunxi_Gemei_G9
-tbs_a711
-tinker-rk3288
-tinker-s-rk3288
-trimslice
-udoo
-udoo_neo
-usbarmory
-UTOO_P66
-vexpress_ca15_tc2
-vexpress_ca9x4
-wandboard
-warp
-warp7
-Wexler_TAB7200
-Wits_Pro_A20_DKT
-Yones_Toptech_BS1078_V2
-xilinx_zynq_virt

arm-chromebooks

@@ -1,8 +0,0 @@
-chromebit_mickey_defconfig
-chromebook_jerry_defconfig
-chromebook_minnie_defconfig
-nyan-big_defconfig
-peach-pi_defconfig
-peach-pit_defconfig
-snow_defconfig
-spring_defconfig

arm-rk3399-enable-rng-on-rock960-and-firefly3399.patch

@@ -1,135 +0,0 @@
-From 5cb3ca7ebd46c1983d0929b5ba027a03c1f5e51e Mon Sep 17 00:00:00 2001
-From: Peter Robinson <pbrobinson@gmail.com>
-Date: Wed, 16 Dec 2020 15:22:34 +0000
-Subject: [PATCH 1/2] arm: dts: rockchip: rk3399: enable rng at the SoC level
-
-The rng is embedded in the SoC so enable it in the device tree
-universally, the use of it can be controlled by enabling/disabling
-at the device config level.
-
-Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
----
- arch/arm/dts/rk3399-evb-u-boot.dtsi          | 4 ----
- arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi | 4 ----
- arch/arm/dts/rk3399-rockpro64-u-boot.dtsi    | 4 ----
- arch/arm/dts/rk3399-u-boot.dtsi              | 2 +-
- 4 files changed, 1 insertion(+), 13 deletions(-)
-
-diff --git a/arch/arm/dts/rk3399-evb-u-boot.dtsi b/arch/arm/dts/rk3399-evb-u-boot.dtsi
-index 8056dc843e..398b205ec2 100644
---- a/arch/arm/dts/rk3399-evb-u-boot.dtsi
-+++ b/arch/arm/dts/rk3399-evb-u-boot.dtsi
-@@ -13,10 +13,6 @@
- 	};
- };
- 
--&rng {
--	status = "okay";
--};
--
- &i2c0 {
- 	u-boot,dm-pre-reloc;
- };
-diff --git a/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi b/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi
-index ded7db0aef..c3e866a779 100644
---- a/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi
-+++ b/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi
-@@ -28,10 +28,6 @@
- 	u-boot,dm-pre-reloc;
- };
- 
--&rng {
--	status = "okay";
--};
--
- &sdhci {
- 	max-frequency = <25000000>;
- 	u-boot,dm-pre-reloc;
-diff --git a/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi b/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi
-index 6317b47e41..37dff04adf 100644
---- a/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi
-+++ b/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi
-@@ -15,10 +15,6 @@
- 	};
- };
- 
--&rng {
--	status = "okay";
--};
--
- &spi1 {
- 	spi_flash: flash@0 {
- 		u-boot,dm-pre-reloc;
-diff --git a/arch/arm/dts/rk3399-u-boot.dtsi b/arch/arm/dts/rk3399-u-boot.dtsi
-index ecd230c720..73922c328a 100644
---- a/arch/arm/dts/rk3399-u-boot.dtsi
-+++ b/arch/arm/dts/rk3399-u-boot.dtsi
-@@ -32,7 +32,7 @@
- 	rng: rng@ff8b8000 {
- 		compatible = "rockchip,cryptov1-rng";
- 		reg = <0x0 0xff8b8000 0x0 0x1000>;
--		status = "disabled";
-+		status = "okay";
- 	};
- 
- 	dmc: dmc {
--- 
-2.29.2
-
-From 62093137fcbe760d009cf2757feda7ccf328fbb7 Mon Sep 17 00:00:00 2001
-From: Peter Robinson <pbrobinson@gmail.com>
-Date: Wed, 16 Dec 2020 15:37:21 +0000
-Subject: [PATCH 2/2] configs: rk3399: enable rng on firefly/rock960/rockpro64
-
-Enable the RNG on the Firefly, rock960 and RockPro64 devices
-to enable KASLR on devices that support it.
-
-Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
----
- configs/firefly-rk3399_defconfig   | 2 ++
- configs/rock960-rk3399_defconfig   | 2 ++
- configs/rockpro64-rk3399_defconfig | 2 ++
- 3 files changed, 6 insertions(+)
-
-diff --git a/configs/firefly-rk3399_defconfig b/configs/firefly-rk3399_defconfig
-index c453b82dc5..cfbaae40aa 100644
---- a/configs/firefly-rk3399_defconfig
-+++ b/configs/firefly-rk3399_defconfig
-@@ -35,6 +35,8 @@ CONFIG_MMC_DW=y
- CONFIG_MMC_DW_ROCKCHIP=y
- CONFIG_MMC_SDHCI=y
- CONFIG_MMC_SDHCI_ROCKCHIP=y
-+CONFIG_DM_RNG=y
-+CONFIG_RNG_ROCKCHIP=y
- CONFIG_SF_DEFAULT_SPEED=20000000
- CONFIG_DM_ETH=y
- CONFIG_ETH_DESIGNWARE=y
-diff --git a/configs/rock960-rk3399_defconfig b/configs/rock960-rk3399_defconfig
-index 65dce3cd73..aadbc55f57 100644
---- a/configs/rock960-rk3399_defconfig
-+++ b/configs/rock960-rk3399_defconfig
-@@ -39,6 +39,8 @@ CONFIG_MMC_DW_ROCKCHIP=y
- CONFIG_MMC_SDHCI=y
- CONFIG_MMC_SDHCI_SDMA=y
- CONFIG_MMC_SDHCI_ROCKCHIP=y
-+CONFIG_DM_RNG=y
-+CONFIG_RNG_ROCKCHIP=y
- CONFIG_DM_ETH=y
- CONFIG_NVME=y
- CONFIG_PCI=y
-diff --git a/configs/rockpro64-rk3399_defconfig b/configs/rockpro64-rk3399_defconfig
-index 575b7a20d5..f78dfcc8f7 100644
---- a/configs/rockpro64-rk3399_defconfig
-+++ b/configs/rockpro64-rk3399_defconfig
-@@ -42,6 +42,8 @@ CONFIG_MMC_DW=y
- CONFIG_MMC_DW_ROCKCHIP=y
- CONFIG_MMC_SDHCI=y
- CONFIG_MMC_SDHCI_ROCKCHIP=y
-+CONFIG_DM_RNG=y
-+CONFIG_RNG_ROCKCHIP=y
- CONFIG_SF_DEFAULT_BUS=1
- CONFIG_SPI_FLASH_GIGADEVICE=y
- CONFIG_DM_ETH=y
--- 
-2.29.2
-

dragonboard-fixes.patch

@@ -1,115 +0,0 @@
-From 8b0274a733cd1ce39ad9ad18e1bd8efdd02a40b7 Mon Sep 17 00:00:00 2001
-From: Rob Clark <robdclark@gmail.com>
-Date: Wed, 21 Jun 2017 14:21:15 -0400
-Subject: [PATCH 1/3] WIP: fix usb
-
----
- common/usb_storage.c | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/common/usb_storage.c b/common/usb_storage.c
-index d92ebb6eb19..9df3c3daaf4 100644
---- a/common/usb_storage.c
-+++ b/common/usb_storage.c
-@@ -1016,7 +1016,7 @@ static int usb_request_sense(struct scsi_cmd *srb, struct us_data *ss)
- 
- static int usb_test_unit_ready(struct scsi_cmd *srb, struct us_data *ss)
- {
--	int retries = 10;
-+	int retries = 20;
- 
- 	do {
- 		memset(&srb->cmd[0], 0, 12);
-@@ -1039,7 +1039,7 @@ static int usb_test_unit_ready(struct scsi_cmd *srb, struct us_data *ss)
- 		if ((srb->sense_buf[2] == 0x02) &&
- 		    (srb->sense_buf[12] == 0x3a))
- 			return -1;
--		mdelay(100);
-+		mdelay(250);
- 	} while (retries--);
- 
- 	return -1;
--- 
-2.19.1
-
-From 7bf41d74ca9d58bc2243b7688f8987c1d373ea56 Mon Sep 17 00:00:00 2001
-From: Rob Clark <robdclark@gmail.com>
-Date: Mon, 3 Jul 2017 08:34:37 -0400
-Subject: [PATCH 2/3] HACK: disable emmc
-
-Hitting some timeout which makes boot take much longer.  And
-uefi/boot/rootfs partitions will be on sd-card or usb disk, etc,
-so we can just ignore emmc.
----
- arch/arm/dts/dragonboard410c.dts | 2 ++
- 1 file changed, 2 insertions(+)
-
-diff --git a/arch/arm/dts/dragonboard410c.dts b/arch/arm/dts/dragonboard410c.dts
-index fa348bc621e..bfe7f15d5ed 100644
---- a/arch/arm/dts/dragonboard410c.dts
-+++ b/arch/arm/dts/dragonboard410c.dts
-@@ -106,6 +106,7 @@
- 			#phy-cells = <0>;
- 		};
- 
-+/*
- 		sdhci@07824000 {
- 			compatible = "qcom,sdhci-msm-v4";
- 			reg = <0x7824900 0x11c 0x7824000 0x800>;
-@@ -115,6 +116,7 @@
- 			clock = <&clkc 0>;
- 			clock-frequency = <100000000>;
- 		};
-+*/
- 
- 		sdhci@07864000 {
- 			compatible = "qcom,sdhci-msm-v4";
--- 
-2.19.1
-
-From 871fe802cf3ab593b9332c4f36ab2b3f179d51ae Mon Sep 17 00:00:00 2001
-From: Peter Robinson <pbrobinson@gmail.com>
-Date: Tue, 4 Sep 2018 12:21:59 +0100
-Subject: [PATCH 3/3] add options for dm410c config
-
----
- configs/dragonboard410c_defconfig | 10 ++++++++++
- 1 file changed, 10 insertions(+)
-
-diff --git a/configs/dragonboard410c_defconfig b/configs/dragonboard410c_defconfig
-index a55abaf8df5..4ece0cafbe4 100644
---- a/configs/dragonboard410c_defconfig
-+++ b/configs/dragonboard410c_defconfig
-@@ -7,6 +7,8 @@ CONFIG_NR_DRAM_BANKS=1
- # CONFIG_ANDROID_BOOT_IMAGE is not set
- CONFIG_FIT=y
- CONFIG_OF_BOARD_SETUP=y
-+CONFIG_FAT_WRITE=y
-+CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
- CONFIG_MISC_INIT_R=y
- # CONFIG_DISPLAY_CPUINFO is not set
- # CONFIG_DISPLAY_BOARDINFO is not set
-@@ -41,6 +43,13 @@ CONFIG_DM_PMIC=y
- CONFIG_PMIC_PM8916=y
- CONFIG_MSM_SERIAL=y
- CONFIG_SPMI_MSM=y
-+CONFIG_DM_ETH=y
-+CONFIG_DM_KEYBOARD=y
-+CONFIG_DM_VIDEO=y
-+# CONFG_VIDEO_BPP8 is not set
-+CONFIG_NO_FB_CLEAR=y
-+CONFIG_VIDEO_SIMPLE=y
-+CONFIG_USB_KEYBOARD=y
- CONFIG_USB=y
- CONFIG_DM_USB=y
- CONFIG_USB_EHCI_HCD=y
-@@ -57,5 +66,6 @@ CONFIG_USB_HOST_ETHER=y
- CONFIG_USB_ETHER_ASIX=y
- CONFIG_USB_ETHER_ASIX88179=y
- CONFIG_USB_ETHER_MCS7830=y
-+CONFIG_USB_ETHER_RTL8152=y
- CONFIG_USB_ETHER_SMSC95XX=y
- CONFIG_OF_LIBFDT_OVERLAY=y
--- 
-2.19.1
-

riscv64-boards

@@ -0,0 +1,5 @@
+qemu-riscv64
+qemu-riscv64_smode
+qemu-riscv64_spl
+sifive_unleashed
+sifive_unmatched

rng-Add-iProc-RNG200-driver.patch

@@ -1,450 +0,0 @@
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-	Matthias Brugger <mbrugger@suse.com>
-Subject: [PATCH v2 1/2] rng: Add iProc RNG200 driver
-Date: Tue, 15 Dec 2020 10:49:23 +0100
-Message-Id: <20201215094924.30072-1-matthias.bgg@kernel.org>
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-From: Matthias Brugger <mbrugger@suse.com>
-
-Add support for random number generator RNG200.
-This is for example found on RPi4.
-
-Signed-off-by: Matthias Brugger <mbrugger@suse.com>
-Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
----
-
-Changes in v2: None
-
- drivers/rng/Kconfig        |   6 ++
- drivers/rng/Makefile       |   1 +
- drivers/rng/iproc_rng200.c | 186 +++++++++++++++++++++++++++++++++++++
- 3 files changed, 193 insertions(+)
- create mode 100644 drivers/rng/iproc_rng200.c
-
-diff --git a/drivers/rng/Kconfig b/drivers/rng/Kconfig
-index 11001c8ae7..94915d45b3 100644
---- a/drivers/rng/Kconfig
-+++ b/drivers/rng/Kconfig
-@@ -46,4 +46,10 @@ config RNG_ROCKCHIP
- 	  Enable random number generator for rockchip.This driver is
- 	  support rng module of crypto v1 and crypto v2.
- 
-+config RNG_IPROC200
-+	bool "Broadcom iProc RNG200 random number generator"
-+	depends on DM_RNG
-+	default n
-+	help
-+	  Enable random number generator for RPI4.
- endif
-diff --git a/drivers/rng/Makefile b/drivers/rng/Makefile
-index 8953406882..39f7ee3f03 100644
---- a/drivers/rng/Makefile
-+++ b/drivers/rng/Makefile
-@@ -9,3 +9,4 @@ obj-$(CONFIG_RNG_SANDBOX) += sandbox_rng.o
- obj-$(CONFIG_RNG_MSM) += msm_rng.o
- obj-$(CONFIG_RNG_STM32MP1) += stm32mp1_rng.o
- obj-$(CONFIG_RNG_ROCKCHIP) += rockchip_rng.o
-+obj-$(CONFIG_RNG_IPROC200) += iproc_rng200.o
-diff --git a/drivers/rng/iproc_rng200.c b/drivers/rng/iproc_rng200.c
-new file mode 100644
-index 0000000000..1063f43953
---- /dev/null
-+++ b/drivers/rng/iproc_rng200.c
-@@ -0,0 +1,186 @@
-+// SPDX-License-Identifier: GPL-2.0-or-later
-+/*
-+ * Copyright 2020, Matthias Brugger <mbrugger@suse.com>
-+ *
-+ * Driver for Raspberry Pi hardware random number generator
-+ */
-+
-+#include <common.h>
-+#include <dm.h>
-+#include <linux/delay.h>
-+#include <rng.h>
-+#include <asm/io.h>
-+
-+#define usleep_range(a, b) udelay((b))
-+
-+#define RNG_CTRL_OFFSET					0x00
-+#define RNG_CTRL_RNG_RBGEN_MASK				0x00001FFF
-+#define RNG_CTRL_RNG_RBGEN_ENABLE			0x00000001
-+#define RNG_CTRL_RNG_RBGEN_DISABLE			0x00000000
-+
-+#define RNG_SOFT_RESET_OFFSET				0x04
-+#define RNG_SOFT_RESET					0x00000001
-+
-+#define RBG_SOFT_RESET_OFFSET				0x08
-+#define RBG_SOFT_RESET					0x00000001
-+
-+#define RNG_INT_STATUS_OFFSET				0x18
-+#define RNG_INT_STATUS_MASTER_FAIL_LOCKOUT_IRQ_MASK	0x80000000
-+#define RNG_INT_STATUS_NIST_FAIL_IRQ_MASK		0x00000020
-+
-+#define RNG_FIFO_DATA_OFFSET				0x20
-+
-+#define RNG_FIFO_COUNT_OFFSET				0x24
-+#define RNG_FIFO_COUNT_RNG_FIFO_COUNT_MASK		0x000000FF
-+
-+struct iproc_rng200_platdata {
-+	fdt_addr_t base;
-+};
-+
-+static void iproc_rng200_enable(struct iproc_rng200_platdata *pdata, bool enable)
-+{
-+	fdt_addr_t rng_base = pdata->base;
-+	u32 val;
-+
-+	val = readl(rng_base + RNG_CTRL_OFFSET);
-+	val &= ~RNG_CTRL_RNG_RBGEN_MASK;
-+	if (enable)
-+		val |= RNG_CTRL_RNG_RBGEN_ENABLE;
-+	else
-+		val &= ~RNG_CTRL_RNG_RBGEN_ENABLE;
-+
-+	writel(val, rng_base + RNG_CTRL_OFFSET);
-+
-+}
-+
-+static void iproc_rng200_restart(struct iproc_rng200_platdata *pdata)
-+{
-+	fdt_addr_t rng_base = pdata->base;
-+	u32 val;
-+
-+	iproc_rng200_enable(pdata, false);
-+
-+	/* Clear all interrupt status */
-+	writel(0xFFFFFFFFUL, rng_base + RNG_INT_STATUS_OFFSET);
-+
-+	/* Reset RNG and RBG */
-+	val = readl(rng_base + RBG_SOFT_RESET_OFFSET);
-+	val |= RBG_SOFT_RESET;
-+	writel(val, rng_base + RBG_SOFT_RESET_OFFSET);
-+
-+	val = readl(rng_base + RNG_SOFT_RESET_OFFSET);
-+	val |= RNG_SOFT_RESET;
-+	writel(val, rng_base + RNG_SOFT_RESET_OFFSET);
-+
-+	val = readl(rng_base + RNG_SOFT_RESET_OFFSET);
-+	val &= ~RNG_SOFT_RESET;
-+	writel(val, rng_base + RNG_SOFT_RESET_OFFSET);
-+
-+	val = readl(rng_base + RBG_SOFT_RESET_OFFSET);
-+	val &= ~RBG_SOFT_RESET;
-+	writel(val, rng_base + RBG_SOFT_RESET_OFFSET);
-+
-+	iproc_rng200_enable(pdata, true);
-+}
-+
-+static int iproc_rng200_read(struct udevice *dev, void *data, size_t len)
-+{
-+	struct iproc_rng200_platdata *priv = dev_get_platdata(dev);
-+	char *buf = (char *)data;
-+	u32 num_remaining = len;
-+	u32 status;
-+
-+	#define MAX_RESETS_PER_READ	1
-+	u32 num_resets = 0;
-+
-+	while (num_remaining > 0) {
-+
-+		/* Is RNG sane? If not, reset it. */
-+		status = readl(priv->base + RNG_INT_STATUS_OFFSET);
-+		if ((status & (RNG_INT_STATUS_MASTER_FAIL_LOCKOUT_IRQ_MASK |
-+			RNG_INT_STATUS_NIST_FAIL_IRQ_MASK)) != 0) {
-+
-+			if (num_resets >= MAX_RESETS_PER_READ)
-+				return len - num_remaining;
-+
-+			iproc_rng200_restart(priv);
-+			num_resets++;
-+		}
-+
-+		/* Are there any random numbers available? */
-+		if ((readl(priv->base + RNG_FIFO_COUNT_OFFSET) &
-+				RNG_FIFO_COUNT_RNG_FIFO_COUNT_MASK) > 0) {
-+
-+			if (num_remaining >= sizeof(u32)) {
-+				/* Buffer has room to store entire word */
-+				*(u32 *)buf = readl(priv->base +
-+							RNG_FIFO_DATA_OFFSET);
-+				buf += sizeof(u32);
-+				num_remaining -= sizeof(u32);
-+			} else {
-+				/* Buffer can only store partial word */
-+				u32 rnd_number = readl(priv->base +
-+							RNG_FIFO_DATA_OFFSET);
-+				memcpy(buf, &rnd_number, num_remaining);
-+				buf += num_remaining;
-+				num_remaining = 0;
-+			}
-+
-+		} else {
-+			/* Can wait, give others chance to run */
-+			usleep_range(min(num_remaining * 10, 500U), 500);
-+		}
-+	}
-+
-+	return 0;
-+}
-+
-+static int iproc_rng200_probe(struct udevice *dev)
-+{
-+	struct iproc_rng200_platdata *priv = dev_get_platdata(dev);
-+
-+	iproc_rng200_enable(priv, true);
-+
-+	return 0;
-+}
-+
-+static int iproc_rng200_remove(struct udevice *dev)
-+{
-+	struct iproc_rng200_platdata *priv = dev_get_platdata(dev);
-+
-+	iproc_rng200_enable(priv, false);
-+
-+	return 0;
-+}
-+
-+static int iproc_rng200_ofdata_to_platdata(struct udevice *dev)
-+{
-+	struct iproc_rng200_platdata *pdata = dev_get_platdata(dev);
-+
-+	pdata->base = dev_read_addr(dev);
-+	if (!pdata->base)
-+		return -ENODEV;
-+
-+	return 0;
-+}
-+
-+static const struct dm_rng_ops iproc_rng200_ops = {
-+	.read = iproc_rng200_read,
-+};
-+
-+static const struct udevice_id iproc_rng200_rng_match[] = {
-+	{ .compatible = "brcm,bcm2711-rng200", },
-+	{ .compatible = "brcm,iproc-rng200", },
-+	{},
-+};
-+
-+U_BOOT_DRIVER(iproc_rng200_rng) = {
-+	.name = "iproc_rng200-rng",
-+	.id = UCLASS_RNG,
-+	.of_match = iproc_rng200_rng_match,
-+	.ops = &iproc_rng200_ops,
-+	.probe = iproc_rng200_probe,
-+	.remove = iproc_rng200_remove,
-+	.platdata_auto_alloc_size = sizeof(struct iproc_rng200_platdata),
-+	.ofdata_to_platdata = iproc_rng200_ofdata_to_platdata,
-+};
-
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-Cc: u-boot@lists.denx.de,
-	Matthias Brugger <mbrugger@suse.com>
-Subject: [PATCH v2 2/2] config: Enable iProc RNG200 driver in RPi4 configs
-Date: Tue, 15 Dec 2020 10:49:24 +0100
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-
-From: Matthias Brugger <mbrugger@suse.com>
-
-We find the iProc RNG200 in the Raspberry Pi 4. Add it to all it's
-config so that it can be used.
-
-Signed-off-by: Matthias Brugger <mbrugger@suse.com>
----
-
-Changes in v2:
-- fix defconfigs using savedefconfig (Heinrich)
-
- configs/rpi_4_32b_defconfig | 2 ++
- configs/rpi_4_defconfig     | 2 ++
- configs/rpi_arm64_defconfig | 2 ++
- drivers/rng/iproc_rng200.c  | 1 -
- 4 files changed, 6 insertions(+), 1 deletion(-)
-
-diff --git a/configs/rpi_4_32b_defconfig b/configs/rpi_4_32b_defconfig
-index 5ddd838fd5..4039e46c81 100644
---- a/configs/rpi_4_32b_defconfig
-+++ b/configs/rpi_4_32b_defconfig
-@@ -36,6 +36,8 @@ CONFIG_PCI_BRCMSTB=y
- CONFIG_PINCTRL=y
- # CONFIG_PINCTRL_GENERIC is not set
- CONFIG_DM_RESET=y
-+CONFIG_DM_RNG=y
-+CONFIG_RNG_IPROC200=y
- # CONFIG_REQUIRE_SERIAL_CONSOLE is not set
- CONFIG_USB=y
- CONFIG_DM_USB=y
-diff --git a/configs/rpi_4_defconfig b/configs/rpi_4_defconfig
-index 2590d0a696..46b6cc3046 100644
---- a/configs/rpi_4_defconfig
-+++ b/configs/rpi_4_defconfig
-@@ -36,6 +36,8 @@ CONFIG_PCI_BRCMSTB=y
- CONFIG_PINCTRL=y
- # CONFIG_PINCTRL_GENERIC is not set
- CONFIG_DM_RESET=y
-+CONFIG_DM_RNG=y
-+CONFIG_RNG_IPROC200=y
- # CONFIG_REQUIRE_SERIAL_CONSOLE is not set
- CONFIG_USB=y
- CONFIG_DM_USB=y
-diff --git a/configs/rpi_arm64_defconfig b/configs/rpi_arm64_defconfig
-index 2639219a1a..b75144036d 100644
---- a/configs/rpi_arm64_defconfig
-+++ b/configs/rpi_arm64_defconfig
-@@ -33,6 +33,8 @@ CONFIG_PCI_BRCMSTB=y
- CONFIG_PINCTRL=y
- # CONFIG_PINCTRL_GENERIC is not set
- CONFIG_DM_RESET=y
-+CONFIG_DM_RNG=y
-+CONFIG_RNG_IPROC200=y
- # CONFIG_REQUIRE_SERIAL_CONSOLE is not set
- CONFIG_USB=y
- CONFIG_DM_USB=y
-diff --git a/drivers/rng/iproc_rng200.c b/drivers/rng/iproc_rng200.c
-index 1063f43953..378f6cf48d 100644
---- a/drivers/rng/iproc_rng200.c
-+++ b/drivers/rng/iproc_rng200.c
-@@ -50,7 +50,6 @@ static void iproc_rng200_enable(struct iproc_rng200_platdata *pdata, bool enable
- 		val &= ~RNG_CTRL_RNG_RBGEN_ENABLE;
- 
- 	writel(val, rng_base + RNG_CTRL_OFFSET);
--
- }
- 
- static void iproc_rng200_restart(struct iproc_rng200_platdata *pdata)

rockchip-Add-initial-support-for-the-PinePhone-Pro.patch

@@ -0,0 +1,886 @@
+From: Martijn Braam <martijn@brixit.nl>
+Subject: [PATCH] rockchip: Add initial support for the PinePhone Pro
+Date: Thu, 21 Oct 2021 19:18:43 +0200
+
+This is a new device by PINE64 that's very similar to the Pinebook Pro
+that's already supported.
+
+Specification:
+- Rockchip RK3399
+- 4GB Dual-Channel LPDDR4
+- 128GB eMMC
+- mSD card slot
+- AP6255 for 802.11ac WiFi and Bluetooth
+- 6 inch 720*1440 DSI display
+- Quectel EG25g usb modem
+- Type-C port with alt-mode display (DP 1.2) and PD charging.
+
+Signed-off-by: Martijn Braam <martijn@brixit.nl>
+---
+
+ arch/arm/dts/Makefile                         |   1 +
+ arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi |  44 ++
+ arch/arm/dts/rk3399-pinephone-pro.dts         | 520 ++++++++++++++++++
+ arch/arm/mach-rockchip/rk3399/Kconfig         |   8 +
+ board/pine64/pinephone-pro-rk3399/Kconfig     |  15 +
+ board/pine64/pinephone-pro-rk3399/MAINTAINERS |   8 +
+ board/pine64/pinephone-pro-rk3399/Makefile    |   1 +
+ .../pinephone-pro-rk3399.c                    |  57 ++
+ configs/pinephone-pro-rk3399_defconfig        |  92 ++++
+ include/configs/pinephone-pro-rk3399.h        |  23 +
+ 10 files changed, 769 insertions(+)
+ create mode 100644 arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi
+ create mode 100644 arch/arm/dts/rk3399-pinephone-pro.dts
+ create mode 100644 board/pine64/pinephone-pro-rk3399/Kconfig
+ create mode 100644 board/pine64/pinephone-pro-rk3399/MAINTAINERS
+ create mode 100644 board/pine64/pinephone-pro-rk3399/Makefile
+ create mode 100644 board/pine64/pinephone-pro-rk3399/pinephone-pro-rk3399.c
+ create mode 100644 configs/pinephone-pro-rk3399_defconfig
+ create mode 100644 include/configs/pinephone-pro-rk3399.h
+ 
+diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
+index ed3d360bb1..3206370226 100644
+--- a/arch/arm/dts/Makefile
++++ b/arch/arm/dts/Makefile
+@@ -137,6 +137,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3399) += \
+ 	rk3399-nanopi-r4s.dtb \
+ 	rk3399-orangepi.dtb \
+ 	rk3399-pinebook-pro.dtb \
++	rk3399-pinephone-pro.dtb \
+ 	rk3399-puma-haikou.dtb \
+ 	rk3399-roc-pc.dtb \
+ 	rk3399-roc-pc-mezzanine.dtb \
+diff --git a/arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi b/arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi
+new file mode 100644
+index 0000000000..9d44db5978
+--- /dev/null
++++ b/arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi
+@@ -0,0 +1,44 @@
++// SPDX-License-Identifier: GPL-2.0+
++/*
++ * Copyright (C) 2019 Peter Robinson <pbrobinson at gmail.com>
++ * Copyright (C) 2021 Martijn Braam <martijn at brixit.nl>
++ */
++
++#include "rk3399-u-boot.dtsi"
++#include "rk3399-sdram-lpddr4-100.dtsi"
++
++/ {
++	aliases {
++		spi0 = &spi1;
++	};
++
++	chosen {
++		u-boot,spl-boot-order = "same-as-spl", &sdhci, &sdmmc;
++	};
++
++	config {
++		u-boot,spl-payload-offset = <0x60000>; /* @ 384KB */
++	};
++};
++
++&i2c0 {
++	u-boot,dm-pre-reloc;
++};
++
++&rk818 {
++	u-boot,dm-pre-reloc;
++};
++
++&rng {
++	status = "okay";
++};
++
++&sdhci {
++	max-frequency = <25000000>;
++	u-boot,dm-pre-reloc;
++};
++
++&sdmmc {
++	max-frequency = <20000000>;
++	u-boot,dm-pre-reloc;
++};
+diff --git a/arch/arm/dts/rk3399-pinephone-pro.dts b/arch/arm/dts/rk3399-pinephone-pro.dts
+new file mode 100644
+index 0000000000..3fe1845ced
+--- /dev/null
++++ b/arch/arm/dts/rk3399-pinephone-pro.dts
+@@ -0,0 +1,520 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++/*
++ * Copyright (c) 2021 Martijn Braam <martijn@brixit.nl>
++ */
++
++/dts-v1/;
++#include "rk3399.dtsi"
++#include "rk3399-opp.dtsi"
++
++/ {
++	model = "Pine64 PinePhone Pro";
++	compatible = "pine64,pinephone-pro", "rockchip,rk3399";
++
++	chosen {
++		stdout-path = "serial2:1500000n8";
++	};
++
++	sdio_pwrseq: sdio-pwrseq {
++		compatible = "mmc-pwrseq-simple";
++		pinctrl-names = "default";
++	};
++
++	/* Power tree */
++	/* Root power source */
++	vcc_sysin: vcc-sysin {
++		compatible = "regulator-fixed";
++		regulator-name = "vcc_sysin";
++		regulator-always-on;
++		regulator-boot-on;
++	};
++
++	/* Main 3.3v supply */
++	vcc3v3_sys: vcc3v3-sys {
++		compatible = "regulator-fixed";
++		regulator-name = "vcc3v3_sys";
++		regulator-always-on;
++		regulator-boot-on;
++		regulator-min-microvolt = <3300000>;
++		regulator-max-microvolt = <3300000>;
++		vin-supply = <&vcc_sysin>;
++
++		regulator-state-mem {
++			regulator-on-in-suspend;
++		};
++	};
++};
++
++&cpu_l0 {
++	cpu-supply = <&vdd_cpu_l>;
++};
++
++&cpu_l1 {
++	cpu-supply = <&vdd_cpu_l>;
++};
++
++&cpu_l2 {
++	cpu-supply = <&vdd_cpu_l>;
++};
++
++&cpu_l3 {
++	cpu-supply = <&vdd_cpu_l>;
++};
++
++&cpu_b0 {
++	cpu-supply = <&vdd_cpu_b>;
++};
++
++&cpu_b1 {
++	cpu-supply = <&vdd_cpu_b>;
++};
++
++&emmc_phy {
++	status = "okay";
++};
++
++&gpu {
++	mali-supply = <&vdd_gpu>;
++	status = "okay";
++};
++
++&i2c0 {
++	clock-frequency = <400000>;
++	i2c-scl-rising-time-ns = <168>;
++	i2c-scl-falling-time-ns = <4>;
++	status = "okay";
++
++	rk818: pmic@1c {
++		compatible = "rockchip,rk818";
++		reg = <0x1c>;
++		interrupt-parent = <&gpio1>;
++		interrupts = <RK_PC5 IRQ_TYPE_LEVEL_LOW>;
++		#clock-cells = <1>;
++		clock-output-names = "xin32k", "rk808-clkout2";
++		pinctrl-names = "default";
++		pinctrl-0 = <&pmic_int_l>;
++		rockchip,system-power-controller;
++		wakeup-source;
++
++		vcc1-supply = <&vcc_sysin>;
++		vcc2-supply = <&vcc_sysin>;
++		vcc3-supply = <&vcc_sysin>;
++		vcc4-supply = <&vcc_sysin>;
++		vcc6-supply = <&vcc_sysin>;
++		vcc7-supply = <&vcc3v3_sys>;
++		vcc8-supply = <&vcc_sysin>;
++		vcc9-supply = <&vcc3v3_sys>;
++
++		regulators {
++			vdd_cpu_l: DCDC_REG1 {
++				regulator-name = "vdd_cpu_1";
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <750000>;
++				regulator-max-microvolt = <1350000>;
++				regulator-ramp-delay = <6001>;
++				regulator-state-mem {
++					regulator-off-in-suspend;
++				};
++			};
++
++			vdd_center: DCDC_REG2 {
++				regulator-name = "vdd_center";
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <800000>;
++				regulator-max-microvolt = <1350000>;
++				regulator-ramp-delay = <6001>;
++				regulator-state-mem {
++					regulator-off-in-suspend;
++				};
++			};
++
++			vcc_ddr: DCDC_REG3 {
++				regulator-name = "vcc_ddr";
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-state-mem {
++					regulator-on-in-suspend;
++				};
++			};
++
++			vcc_1v8: DCDC_REG4 {
++				regulator-name = "vcc_1v8";
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <1800000>;
++				regulator-max-microvolt = <1800000>;
++				regulator-state-mem {
++					regulator-on-in-suspend;
++					regulator-suspend-microvolt = <1800000>;
++				};
++			};
++
++			vcca3v0_codec: LDO_REG1 {
++				regulator-name = "vcca3v0_codec";
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <3000000>;
++				regulator-max-microvolt = <3000000>;
++				regulator-state-mem {
++					regulator-off-in-suspend;
++				};
++			};
++
++			vcc3v0_touch: LDO_REG2 {
++				regulator-name = "vcc3v0_touch";
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <3000000>;
++				regulator-max-microvolt = <3000000>;
++				regulator-state-mem {
++					regulator-off-in-suspend;
++				};
++			};
++
++			vcca1v8_codec: LDO_REG3 {
++				regulator-name = "vcca1v8_codec";
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <1800000>;
++				regulator-max-microvolt = <1800000>;
++				regulator-state-mem {
++					regulator-off-in-suspend;
++				};
++			};
++
++			vcc_power_on: LDO_REG4 {
++				regulator-name = "vcc_power_on";
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <3300000>;
++				regulator-max-microvolt = <3300000>;
++				regulator-state-mem {
++					regulator-on-in-suspend;
++					regulator-suspend-microvolt = <3300000>;
++				};
++			};
++
++			vcc_3v0: LDO_REG5 {
++				regulator-name = "vcc_3v0";
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <3000000>;
++				regulator-max-microvolt = <3000000>;
++				regulator-state-mem {
++					regulator-on-in-suspend;
++					regulator-suspend-microvolt = <3000000>;
++				};
++			};
++
++			vcc_1v5: LDO_REG6 {
++				regulator-name = "vcc_1v5";
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <1500000>;
++				regulator-max-microvolt = <1500000>;
++				regulator-state-mem {
++					regulator-on-in-suspend;
++					regulator-suspend-microvolt = <1500000>;
++				};
++			};
++
++			vcc1v8_dvp: LDO_REG7 {
++				regulator-name = "vcc1v8_dvp";
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <1800000>;
++				regulator-max-microvolt = <1800000>;
++				regulator-state-mem {
++					regulator-off-in-suspend;
++				};
++			};
++
++			vcc3v3_s3: LDO_REG8 {
++				regulator-name = "vcc3v3_s3";
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <3300000>;
++				regulator-max-microvolt = <3300000>;
++				regulator-state-mem {
++					regulator-off-in-suspend;
++				};
++			};
++
++			vcc_sd: LDO_REG9 {
++				regulator-name = "vcc_sd";
++				regulator-min-microvolt = <1800000>;
++				regulator-max-microvolt = <3300000>;
++				regulator-state-mem {
++					regulator-on-in-suspend;
++					regulator-suspend-microvolt = <3300000>;
++				};
++			};
++
++			vcc3v3_s0: SWITCH_REG {
++				regulator-name = "vcc3v3_s0";
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-state-mem {
++					regulator-on-in-suspend;
++				};
++			};
++
++			boost_otg: DCDC_BOOST {
++				regulator-name = "boost_otg";
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <5000000>;
++				regulator-max-microvolt = <5000000>;
++				regulator-state-mem {
++					regulator-on-in-suspend;
++					regulator-suspend-microvolt = <5000000>;
++				};
++			};
++
++			otg_switch: OTG_SWITCH {
++				regulator-name = "otg_switch";
++			};
++		};
++	};
++
++	vdd_cpu_b: regulator@40 {
++		compatible = "silergy,syr827";
++		reg = <0x40>;
++		fcs,suspend-voltage-selector = <1>;
++		pinctrl-names = "default";
++		pinctrl-0 = <&vsel1_pin>;
++		regulator-name = "vdd_cpu_b";
++		regulator-min-microvolt = <712500>;
++		regulator-max-microvolt = <1500000>;
++		regulator-ramp-delay = <1000>;
++		regulator-always-on;
++		regulator-boot-on;
++
++		regulator-state-mem {
++			regulator-off-in-suspend;
++		};
++	};
++
++	vdd_gpu: regulator@41 {
++		compatible = "silergy,syr828";
++		reg = <0x41>;
++		fcs,suspend-voltage-selector = <1>;
++		pinctrl-names = "default";
++		pinctrl-0 = <&vsel2_pin>;
++		regulator-name = "vdd_gpu";
++		regulator-min-microvolt = <712500>;
++		regulator-max-microvolt = <1500000>;
++		regulator-ramp-delay = <1000>;
++		regulator-always-on;
++		regulator-boot-on;
++
++		regulator-state-mem {
++			regulator-off-in-suspend;
++		};
++	};
++};
++
++&i2c1 {
++	i2c-scl-rising-time-ns = <300>;
++	i2c-scl-falling-time-ns = <15>;
++	status = "okay";
++};
++
++&i2c3 {
++	i2c-scl-rising-time-ns = <450>;
++	i2c-scl-falling-time-ns = <15>;
++	status = "okay";
++};
++
++&i2c4 {
++	i2c-scl-rising-time-ns = <600>;
++	i2c-scl-falling-time-ns = <20>;
++	status = "okay";
++
++	fusb0: typec-portc@22 {
++		compatible = "fcs,fusb302";
++		reg = <0x22>;
++		interrupt-parent = <&gpio1>;
++		interrupts = <RK_PA2 IRQ_TYPE_LEVEL_LOW>;
++		pinctrl-names = "default";
++		pinctrl-0 = <&fusb0_int>;
++		status = "okay";
++	};
++};
++
++&io_domains {
++	status = "okay";
++
++	bt656-supply = <&vcc1v8_dvp>;
++	audio-supply = <&vcca1v8_codec>;
++	sdmmc-supply = <&vcc_sd>;
++	gpio1830-supply = <&vcc_3v0>;
++};
++
++&pmu_io_domains {
++	pmu1830-supply = <&vcc_3v0>;
++	status = "okay";
++};
++
++&pinctrl {
++	bt {
++		bt_enable_h: bt-enable-h {
++			rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
++		};
++
++		bt_host_wake_l: bt-host-wake-l {
++			rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_down>;
++		};
++
++		bt_wake_l: bt-wake-l {
++			rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
++		};
++	};
++
++	buttons {
++		pwrbtn: pwrbtn {
++			rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
++		};
++	};
++
++	fusb302x {
++		fusb0_int: fusb0-int {
++			rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
++		};
++	};
++
++	leds {
++		work_led_pin: work-led-pin {
++			rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
++		};
++
++		diy_led_pin: diy-led-pin {
++			rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
++		};
++	};
++
++	pcie {
++		pcie_perst: pcie-perst {
++			rockchip,pins = <2 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
++		};
++
++		pcie_pwr_en: pcie-pwr-en {
++			rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>;
++		};
++	};
++
++	pmic {
++		pmic_int_l: pmic-int-l {
++			rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
++		};
++
++		vsel1_pin: vsel1-pin {
++			rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>;
++		};
++
++		vsel2_pin: vsel2-pin {
++			rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
++		};
++	};
++
++	sdcard {
++		sdmmc0_pwr_h: sdmmc0-pwr-h {
++			rockchip,pins = <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
++		};
++
++	};
++
++	sdio-pwrseq {
++		wifi_enable_h: wifi-enable-h {
++			rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
++		};
++	};
++
++	usb-typec {
++		vcc5v0_typec_en: vcc5v0_typec_en {
++			rockchip,pins = <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
++		};
++	};
++
++	usb2 {
++		vcc5v0_host_en: vcc5v0-host-en {
++			rockchip,pins = <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
++		};
++	};
++};
++
++&pwm0 {
++	status = "okay";
++};
++
++&pwm1 {
++	status = "okay";
++};
++
++&pwm2 {
++	status = "okay";
++};
++
++&sdio0 {
++	bus-width = <4>;
++	cap-sd-highspeed;
++	cap-sdio-irq;
++	disable-wp;
++	keep-power-in-suspend;
++	mmc-pwrseq = <&sdio_pwrseq>;
++	non-removable;
++	pinctrl-names = "default";
++	pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
++	sd-uhs-sdr104;
++	status = "okay";
++};
++
++&sdmmc {
++	bus-width = <4>;
++	cap-sd-highspeed;
++	cd-gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
++	disable-wp;
++	max-frequency = <150000000>;
++	pinctrl-names = "default";
++	pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>;
++	vmmc-supply = <&vcc3v3_s3>;
++	vqmmc-supply = <&vcc_1v8>;
++	status = "okay";
++};
++
++&sdhci {
++	bus-width = <8>;
++	mmc-hs200-1_8v;
++	non-removable;
++	status = "okay";
++};
++
++&tsadc {
++	/* tshut mode 0:CRU 1:GPIO */
++	rockchip,hw-tshut-mode = <1>;
++	/* tshut polarity 0:LOW 1:HIGH */
++	rockchip,hw-tshut-polarity = <1>;
++	status = "okay";
++};
++
++&uart2 {
++	status = "okay";
++};
++
++&vopb {
++	status = "okay";
++};
++
++&vopb_mmu {
++	status = "okay";
++};
++
++&vopl {
++	status = "okay";
++};
++
++&vopl_mmu {
++	status = "okay";
++};
+diff --git a/arch/arm/mach-rockchip/rk3399/Kconfig b/arch/arm/mach-rockchip/rk3399/Kconfig
+index 17628f9171..3ba603ca80 100644
+--- a/arch/arm/mach-rockchip/rk3399/Kconfig
++++ b/arch/arm/mach-rockchip/rk3399/Kconfig
+@@ -28,6 +28,13 @@ config TARGET_PINEBOOK_PRO_RK3399
+ 	  with 4Gb RAM, onboard eMMC, USB-C, a USB3 and USB2 port,
+ 	  1920*1080 screen and all the usual laptop features.
+ 
++config TARGET_PINEPHONE_PRO_RK3399
++	bool "PinePhone Pro"
++	help
++	  PinePhone Pro is a phone based on the Rockchip rk3399 SoC
++	  with 4Gb RAM, onboard eMMC, USB-C, a headphone jack,
++	  720x1440 screen and an external Quectel USB modem.
++
+ config TARGET_PUMA_RK3399
+ 	bool "Theobroma Systems RK3399-Q7 (Puma)"
+ 	help
+@@ -154,6 +161,7 @@ endif # BOOTCOUNT_LIMIT
+ source "board/firefly/roc-pc-rk3399/Kconfig"
+ source "board/google/gru/Kconfig"
+ source "board/pine64/pinebook-pro-rk3399/Kconfig"
++source "board/pine64/pinephone-pro-rk3399/Kconfig"
+ source "board/pine64/rockpro64_rk3399/Kconfig"
+ source "board/rockchip/evb_rk3399/Kconfig"
+ source "board/theobroma-systems/puma_rk3399/Kconfig"
+diff --git a/board/pine64/pinephone-pro-rk3399/Kconfig b/board/pine64/pinephone-pro-rk3399/Kconfig
+new file mode 100644
+index 0000000000..13d6465ae6
+--- /dev/null
++++ b/board/pine64/pinephone-pro-rk3399/Kconfig
+@@ -0,0 +1,15 @@
++if TARGET_PINEPHONE_PRO_RK3399
++
++config SYS_BOARD
++	default "pinephone-pro-rk3399"
++
++config SYS_VENDOR
++	default "pine64"
++
++config SYS_CONFIG_NAME
++	default "pinephone-pro-rk3399"
++
++config BOARD_SPECIFIC_OPTIONS
++	def_bool y
++
++endif
+diff --git a/board/pine64/pinephone-pro-rk3399/MAINTAINERS b/board/pine64/pinephone-pro-rk3399/MAINTAINERS
+new file mode 100644
+index 0000000000..9ca4fc4cbe
+--- /dev/null
++++ b/board/pine64/pinephone-pro-rk3399/MAINTAINERS
+@@ -0,0 +1,8 @@
++PINEPHONE_PRO
++M:	Martijn Braam <martijn@brixit.nl>
++S:	Maintained
++F:	board/pine64/rk3399-pinephone-pro/
++F:	include/configs/rk3399-pinephone-pro.h
++F:	arch/arm/dts/rk3399-pinephone-pro.dts
++F:	arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi
++F:	configs/pinephone-pro-rk3399_defconfig
+diff --git a/board/pine64/pinephone-pro-rk3399/Makefile b/board/pine64/pinephone-pro-rk3399/Makefile
+new file mode 100644
+index 0000000000..8d9203053e
+--- /dev/null
++++ b/board/pine64/pinephone-pro-rk3399/Makefile
+@@ -0,0 +1 @@
++obj-y	+= pinephone-pro-rk3399.o
+diff --git a/board/pine64/pinephone-pro-rk3399/pinephone-pro-rk3399.c b/board/pine64/pinephone-pro-rk3399/pinephone-pro-rk3399.c
+new file mode 100644
+index 0000000000..8efeb6ea3d
+--- /dev/null
++++ b/board/pine64/pinephone-pro-rk3399/pinephone-pro-rk3399.c
+@@ -0,0 +1,57 @@
++// SPDX-License-Identifier: GPL-2.0+
++/*
++ * (C) Copyright 2019 Vasily Khoruzhick <anarsoul@gmail.com>
++ * (C) Copyright 2021 Martijn Braam <martijn@brixit.nl>
++ */
++
++#include <common.h>
++#include <dm.h>
++#include <init.h>
++#include <syscon.h>
++#include <asm/io.h>
++#include <asm/arch-rockchip/clock.h>
++#include <asm/arch-rockchip/grf_rk3399.h>
++#include <asm/arch-rockchip/hardware.h>
++#include <asm/arch-rockchip/misc.h>
++
++#define GRF_IO_VSEL_BT565_SHIFT 0
++#define PMUGRF_CON0_VSEL_SHIFT 8
++
++#ifdef CONFIG_MISC_INIT_R
++static void setup_iodomain(void)
++{
++	struct rk3399_grf_regs *grf =
++	    syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
++	struct rk3399_pmugrf_regs *pmugrf =
++	    syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF);
++
++	/* BT565 is in 1.8v domain */
++	rk_setreg(&grf->io_vsel, 1 << GRF_IO_VSEL_BT565_SHIFT);
++
++	/* Set GPIO1 1.8v/3.0v source select to PMU1830_VOL */
++	rk_setreg(&pmugrf->soc_con0, 1 << PMUGRF_CON0_VSEL_SHIFT);
++}
++
++int misc_init_r(void)
++{
++	const u32 cpuid_offset = 0x7;
++	const u32 cpuid_length = 0x10;
++	u8 cpuid[cpuid_length];
++	int ret;
++
++	setup_iodomain();
++
++	ret = rockchip_cpuid_from_efuse(cpuid_offset, cpuid_length, cpuid);
++	if (ret)
++		return ret;
++
++	ret = rockchip_cpuid_set(cpuid, cpuid_length);
++	if (ret)
++		return ret;
++
++	ret = rockchip_setup_macaddr();
++
++	return ret;
++}
++
++#endif
+diff --git a/configs/pinephone-pro-rk3399_defconfig b/configs/pinephone-pro-rk3399_defconfig
+new file mode 100644
+index 0000000000..2cf80f7d35
+--- /dev/null
++++ b/configs/pinephone-pro-rk3399_defconfig
+@@ -0,0 +1,92 @@
++CONFIG_ARM=y
++CONFIG_SKIP_LOWLEVEL_INIT=y
++CONFIG_ARCH_ROCKCHIP=y
++CONFIG_SYS_TEXT_BASE=0x00200000
++CONFIG_NR_DRAM_BANKS=1
++CONFIG_ENV_SIZE=0x8000
++CONFIG_ROCKCHIP_RK3399=y
++CONFIG_TARGET_PINEPHONE_PRO_RK3399=y
++CONFIG_DEBUG_UART_BASE=0xFF1A0000
++CONFIG_DEBUG_UART_CLOCK=24000000
++CONFIG_SPL_SPI_FLASH_SUPPORT=y
++CONFIG_SPL_SPI_SUPPORT=y
++CONFIG_DEFAULT_DEVICE_TREE="rk3399-pinephone-pro"
++CONFIG_DEBUG_UART=y
++CONFIG_SYS_LOAD_ADDR=0x800800
++CONFIG_BOOTDELAY=3
++CONFIG_USE_PREBOOT=y
++CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-pinephone-pro.dtb"
++CONFIG_DISPLAY_BOARDINFO_LATE=y
++CONFIG_MISC_INIT_R=y
++# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
++CONFIG_SPL_STACK_R=y
++CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
++CONFIG_SPL_MTD_SUPPORT=y
++CONFIG_SPL_SPI_LOAD=y
++CONFIG_TPL=y
++CONFIG_CMD_BOOTZ=y
++CONFIG_CMD_GPIO=y
++CONFIG_CMD_GPT=y
++CONFIG_CMD_I2C=y
++CONFIG_CMD_MMC=y
++CONFIG_CMD_PCI=y
++CONFIG_CMD_USB=y
++# CONFIG_CMD_SETEXPR is not set
++CONFIG_CMD_TIME=y
++CONFIG_CMD_PMIC=y
++CONFIG_CMD_REGULATOR=y
++CONFIG_SPL_OF_CONTROL=y
++CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
++CONFIG_ENV_IS_IN_SPI_FLASH=y
++CONFIG_SYS_RELOC_GD_ENV_ADDR=y
++CONFIG_ROCKCHIP_GPIO=y
++CONFIG_SYS_I2C_ROCKCHIP=y
++CONFIG_DM_KEYBOARD=y
++CONFIG_LED=y
++CONFIG_LED_GPIO=y
++CONFIG_MISC=y
++CONFIG_ROCKCHIP_EFUSE=y
++CONFIG_MMC_DW=y
++CONFIG_MMC_DW_ROCKCHIP=y
++CONFIG_MMC_SDHCI=y
++CONFIG_MMC_SDHCI_SDMA=y
++CONFIG_MMC_SDHCI_ROCKCHIP=y
++CONFIG_SF_DEFAULT_SPEED=20000000
++CONFIG_SPI_FLASH_GIGADEVICE=y
++CONFIG_SPI_FLASH_WINBOND=y
++CONFIG_DM_ETH=y
++CONFIG_PHY_ROCKCHIP_INNO_USB2=y
++CONFIG_PHY_ROCKCHIP_TYPEC=y
++CONFIG_DM_PMIC_FAN53555=y
++CONFIG_PMIC_RK8XX=y
++CONFIG_REGULATOR_PWM=y
++CONFIG_REGULATOR_RK8XX=y
++CONFIG_PWM_ROCKCHIP=y
++CONFIG_RAM_RK3399_LPDDR4=y
++CONFIG_DM_RESET=y
++CONFIG_DM_RNG=y
++CONFIG_RNG_ROCKCHIP=y
++CONFIG_BAUDRATE=1500000
++CONFIG_DEBUG_UART_SHIFT=2
++CONFIG_ROCKCHIP_SPI=y
++CONFIG_SYSRESET=y
++CONFIG_USB=y
++CONFIG_USB_XHCI_HCD=y
++CONFIG_USB_XHCI_DWC3=y
++CONFIG_USB_EHCI_HCD=y
++CONFIG_USB_EHCI_GENERIC=y
++CONFIG_USB_OHCI_HCD=y
++CONFIG_USB_OHCI_GENERIC=y
++CONFIG_USB_DWC3=y
++CONFIG_USB_DWC3_GENERIC=y
++CONFIG_USB_KEYBOARD=y
++CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
++CONFIG_USB_HOST_ETHER=y
++CONFIG_USB_ETHER_ASIX=y
++CONFIG_USB_ETHER_RTL8152=y
++CONFIG_DM_VIDEO=y
++CONFIG_DISPLAY=y
++CONFIG_VIDEO_ROCKCHIP=y
++CONFIG_DISPLAY_ROCKCHIP_EDP=y
++CONFIG_SPL_TINY_MEMSET=y
++CONFIG_ERRNO_STR=y
+diff --git a/include/configs/pinephone-pro-rk3399.h b/include/configs/pinephone-pro-rk3399.h
+new file mode 100644
+index 0000000000..fefa793fdd
+--- /dev/null
++++ b/include/configs/pinephone-pro-rk3399.h
+@@ -0,0 +1,23 @@
++/* SPDX-License-Identifier: GPL-2.0+ */
++/*
++ * Copyright (C) 2016 Rockchip Electronics Co., Ltd
++ * Copyright (C) 2020 Peter Robinson <pbrobinson at gmail.com>
++ * Copyright (C) 2021 Martijn Braam <martijn@brixit.nl>
++ */
++
++#ifndef __PINEPHONE_PRO_RK3399_H
++#define __PINEPHONE_PRO_RK3399_H
++
++#define ROCKCHIP_DEVICE_SETTINGS \
++		"stdin=serial,usbkbd\0" \
++		"stdout=serial,vidconsole\0" \
++		"stderr=serial,vidconsole\0"
++
++#include <configs/rk3399_common.h>
++
++#define SDRAM_BANK_SIZE			(2UL << 30)
++
++#define CONFIG_USB_OHCI_NEW
++#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS     2
++
++#endif

rockchip-general-fixes.patch

@@ -0,0 +1,136 @@
+From 2d9350c50a9659cc2a247cdea07f0eacffa3cb32 Mon Sep 17 00:00:00 2001
+From: Peter Robinson <pbrobinson@gmail.com>
+Date: Sun, 12 Jun 2022 14:44:44 +0100
+Subject: [PATCH] rockchip: pinebook-pro: minor SPI flash fixes
+
+Set a default offset for environment so it doesn't write it to
+unexpected locations, drop unneeded mtd config option.
+
+Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
+---
+ configs/pinebook-pro-rk3399_defconfig | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/configs/pinebook-pro-rk3399_defconfig b/configs/pinebook-pro-rk3399_defconfig
+index 8ca1d0708f9..aaa52c6ea70 100644
+--- a/configs/pinebook-pro-rk3399_defconfig
++++ b/configs/pinebook-pro-rk3399_defconfig
+@@ -5,6 +5,7 @@ CONFIG_ARCH_ROCKCHIP=y
+ CONFIG_SYS_TEXT_BASE=0x00200000
+ CONFIG_NR_DRAM_BANKS=1
+ CONFIG_ENV_SIZE=0x8000
++CONFIG_ENV_OFFSET=0x3F8000
+ CONFIG_DEFAULT_DEVICE_TREE="rk3399-pinebook-pro"
+ CONFIG_ROCKCHIP_RK3399=y
+ CONFIG_TARGET_PINEBOOK_PRO_RK3399=y
+@@ -22,7 +23,6 @@ CONFIG_MISC_INIT_R=y
+ # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+ CONFIG_SPL_STACK_R=y
+ CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
+-CONFIG_SPL_MTD_SUPPORT=y
+ CONFIG_SPL_SPI_LOAD=y
+ CONFIG_TPL=y
+ CONFIG_CMD_BOOTZ=y
+-- 
+2.36.1
+
+From 27ba8e2f904063aec5196f86dd0332bf58a60259 Mon Sep 17 00:00:00 2001
+From: Peter Robinson <pbrobinson@gmail.com>
+Date: Sun, 12 Jun 2022 14:50:42 +0100
+Subject: [PATCH] rockchip: rockpro64: enable leds
+
+The Rockpro64 has some GPIO leds so let's enable them so the
+user gets some output in early boot.
+
+Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
+---
+ configs/rockpro64-rk3399_defconfig | 2 ++
+ 1 file changed, 2 insertions(+)
+
+diff --git a/configs/rockpro64-rk3399_defconfig b/configs/rockpro64-rk3399_defconfig
+index e6f7a8469a3..b0c3527fab0 100644
+--- a/configs/rockpro64-rk3399_defconfig
++++ b/configs/rockpro64-rk3399_defconfig
+@@ -42,6 +42,8 @@ CONFIG_AHCI_PCI=y
+ CONFIG_SATA_SIL=y
+ CONFIG_ROCKCHIP_GPIO=y
+ CONFIG_SYS_I2C_ROCKCHIP=y
++CONFIG_LED=y
++CONFIG_LED_GPIO=y
+ CONFIG_MISC=y
+ CONFIG_ROCKCHIP_EFUSE=y
+ CONFIG_MMC_DW=y
+-- 
+2.36.1
+
+From 8bca90472e0d71e5344711b6f5fe8dc95e19af5a Mon Sep 17 00:00:00 2001
+From: Peter Robinson <pbrobinson@gmail.com>
+Date: Sun, 12 Jun 2022 15:12:47 +0100
+Subject: [PATCH] rockchip: pinebook-pro: sync PBP dtb to 5.18
+
+Sync the pinebook pro to upstream 5.18, in particular this brings
+brings in a fix so the DP is disabled so Linux will actually boot.
+
+Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
+---
+ arch/arm/dts/rk3399-pinebook-pro.dts | 11 +++--------
+ 1 file changed, 3 insertions(+), 8 deletions(-)
+
+diff --git a/arch/arm/dts/rk3399-pinebook-pro.dts b/arch/arm/dts/rk3399-pinebook-pro.dts
+index 2b5f001ff4a..d6b68d77d63 100644
+--- a/arch/arm/dts/rk3399-pinebook-pro.dts
++++ b/arch/arm/dts/rk3399-pinebook-pro.dts
+@@ -17,6 +17,7 @@
+ / {
+ 	model = "Pine64 Pinebook Pro";
+ 	compatible = "pine64,pinebook-pro", "rockchip,rk3399";
++	chassis-type = "laptop";
+ 
+ 	aliases {
+ 		mmc0 = &sdio0;
+@@ -242,12 +243,12 @@
+ 	vdd_log: vdd-log {
+ 		compatible = "pwm-regulator";
+ 		pwms = <&pwm2 0 25000 1>;
++		pwm-supply = <&vcc_sysin>;
+ 		regulator-name = "vdd_log";
+ 		regulator-always-on;
+ 		regulator-boot-on;
+ 		regulator-min-microvolt = <800000>;
+ 		regulator-max-microvolt = <1400000>;
+-		vin-supply = <&vcc_sysin>;
+ 
+ 		regulator-state-mem {
+ 			regulator-on-in-suspend;
+@@ -385,10 +386,6 @@
+ 	};
+ };
+ 
+-&cdn_dp {
+-	status = "okay";
+-};
+-
+ &cpu_b0 {
+ 	cpu-supply = <&vdd_cpu_b>;
+ };
+@@ -475,8 +472,6 @@
+ 		vcc10-supply = <&vcc_sysin>;
+ 		vcc11-supply = <&vcc_sysin>;
+ 		vcc12-supply = <&vcc3v3_sys>;
+-		vcc13-supply = <&vcc_sysin>;
+-		vcc14-supply = <&vcc_sysin>;
+ 
+ 		regulators {
+ 			/* rk3399 center logic supply */
+@@ -711,7 +706,7 @@
+ 
+ 		connector {
+ 			compatible = "usb-c-connector";
+-			data-role = "host";
++			data-role = "dual";
+ 			label = "USB-C";
+ 			op-sink-microwatt = <1000000>;
+ 			power-role = "dual";
+-- 
+2.36.1
+

rockchip-spl-u-boot-itb-offset.patch

@@ -1,11 +0,0 @@
---- u-boot-2020.10/common/spl/Kconfig.orig	2020-10-07 12:08:54.972632715 +0100
-+++ u-boot-2020.10/common/spl/Kconfig	2020-10-07 12:08:59.100672506 +0100
-@@ -324,7 +324,7 @@
- 	default 0x200 if ARCH_SOCFPGA || ARCH_AT91
- 	default 0x300 if ARCH_ZYNQ || ARCH_KEYSTONE || OMAP34XX || OMAP44XX || \
- 		         OMAP54XX || AM33XX || AM43XX || ARCH_K3
--	default 0x4000 if ARCH_ROCKCHIP
-+	default 0x200 if ARCH_ROCKCHIP
- 	default 0x822 if TARGET_SIFIVE_FU540
- 	help
- 	  Address on the MMC to load U-Boot from, when the MMC is being used

rpi-Copy-properties-from-firmware-DT-to-loaded-DT.patch

@@ -0,0 +1,296 @@
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+Cc: Antoine Mazeas <antoine@karthanis.net>,
+ Sjoerd Simons <sjoerd@collabora.com>
+Subject: [PATCH 1/2] rpi: Copy properties from firmware dtb to the loaded dtb
+Date: Wed, 10 Aug 2022 14:39:26 +0200
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+
+The RPI firmware adjusts several property values in the dtb it passes
+to u-boot depending on the board/SoC revision. Inherit some of these
+when u-boot loads a dtb itself. Specificaly copy:
+
+* /model: The firmware provides a more specific string
+* /memreserve: The firmware defines a reserved range, better keep it
+* emmc2bus and pcie0 dma-ranges: The C0T revision of the bcm2711 Soc (as
+  present on rpi 400 and some rpi 4B boards) has different values for
+  these then the B0T revision. So these need to be adjusted to boot on
+  these boards
+* blconfig: The firmware defines the memory area where the blconfig
+  stored. Copy those over so it can be enabled.
+* /chosen/kaslr-seed: The firmware generates a kaslr seed, take advantage
+  of that.
+
+Signed-off-by: Sjoerd Simons <sjoerd@collabora.com>
+---
+ board/raspberrypi/rpi/rpi.c | 48 +++++++++++++++++++++++++++++++++++++
+ 1 file changed, 48 insertions(+)
+
+diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c
+index 17b8108cc8..28b6f52506 100644
+--- a/board/raspberrypi/rpi/rpi.c
++++ b/board/raspberrypi/rpi/rpi.c
+@@ -504,10 +504,58 @@ void *board_fdt_blob_setup(int *err)
+ 	return (void *)fw_dtb_pointer;
+ }
+ 
++int copy_property(void *dst, void *src, char *path, char *property)
++{
++	int dst_offset, src_offset;
++	const fdt32_t *prop;
++	int len;
++
++	src_offset = fdt_path_offset(src, path);
++	dst_offset = fdt_path_offset(dst, path);
++
++	if (src_offset < 0 || dst_offset < 0)
++		return -1;
++
++	prop = fdt_getprop(src, src_offset, property, &len);
++	if (!prop)
++		return -1;
++
++	return fdt_setprop(dst, dst_offset, property, prop, len);
++}
++
++/* Copy tweaks from the firmware dtb to the loaded dtb */
++void  update_fdt_from_fw(void *fdt, void *fw_fdt)
++{
++	/* Using dtb from firmware directly; leave it alone */
++	if (fdt == fw_fdt)
++		return;
++
++	/* The firmware provides a more precie model; so copy that */
++	copy_property(fdt, fw_fdt, "/", "model");
++
++	/* memory reserve as suggested by the firmware */
++	copy_property(fdt, fw_fdt, "/", "memreserve");
++
++	/* Adjust dma-ranges for the SD card and PCI bus as they can depend on
++	 * the SoC revision
++	 */
++	copy_property(fdt, fw_fdt, "emmc2bus", "dma-ranges");
++	copy_property(fdt, fw_fdt, "pcie0", "dma-ranges");
++
++	/* Bootloader configuration template exposes as nvmem */
++	if (copy_property(fdt, fw_fdt, "blconfig", "reg") == 0)
++		copy_property(fdt, fw_fdt, "blconfig", "status");
++
++	/* kernel address randomisation seed as provided by the firmware */
++	copy_property(fdt, fw_fdt, "/chosen", "kaslr-seed");
++}
++
+ int ft_board_setup(void *blob, struct bd_info *bd)
+ {
+ 	int node;
+ 
++	update_fdt_from_fw(blob, (void *)fw_dtb_pointer);
++
+ 	node = fdt_node_offset_by_compatible(blob, -1, "simple-framebuffer");
+ 	if (node < 0)
+ 		fdt_simplefb_add_node(blob);
+
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+From: Antoine Mazeas <antoine@karthanis.net>
+To: u-boot@lists.denx.de
+Cc: Antoine Mazeas <antoine@karthanis.net>
+Subject: [PATCH 2/2] rpi: Copy eth PHY address from fw DT to loaded DT
+Date: Wed, 10 Aug 2022 14:39:27 +0200
+Message-Id: <20220810123927.2567677-3-antoine@karthanis.net>
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+
+Some Raspberry Pi 400 boards, specifically rev 1.1, have a different address for the ethernet PHY device than what is provided by the kernel DTB. The correct address is provided by the firmware, so we should carry it over into the loaded device tree so that ethernet works on such boards.
+
+Signed-off-by: Antoine Mazeas <antoine@karthanis.net>
+---
+ board/raspberrypi/rpi/rpi.c | 3 +++
+ 1 file changed, 3 insertions(+)
+
+diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c
+index 28b6f52506..793fd1aa30 100644
+--- a/board/raspberrypi/rpi/rpi.c
++++ b/board/raspberrypi/rpi/rpi.c
+@@ -548,6 +548,9 @@ void  update_fdt_from_fw(void *fdt, void *fw_fdt)
+ 
+ 	/* kernel address randomisation seed as provided by the firmware */
+ 	copy_property(fdt, fw_fdt, "/chosen", "kaslr-seed");
++
++	/* address of the PHY device as provided by the firmware  */
++	copy_property(fdt, fw_fdt, "ethernet0/mdio@e14/ethernet-phy@1", "reg");
+ }
+ 
+ int ft_board_setup(void *blob, struct bd_info *bd)

rpi-bcm2835_sdhost-firmware-managed-clock.patch

@@ -0,0 +1,228 @@
+From f3a870bfa075fb880f5e018a0a5ae6f27ca8be49 Mon Sep 17 00:00:00 2001
+From: Vincent Fazio <vfazio@xes-inc.com>
+Date: Mon, 13 Sep 2021 13:34:45 -0500
+Subject: [PATCH] mmc: bcm2835-host: let firmware manage the clock
+
+Newer firmware supports managing the sdhost clock divisor, so leverage
+this feature if it is available.
+
+SET_SDHOST_CLOCK is largely undocumented except for its usage within the
+Linux kernel, which this change is based on.
+
+https://github.com/raspberrypi/linux/commit/3cd16c39c718e2dda7885c4ed7a20118aed12524
+
+Signed-off-by: Vincent Fazio <vfazio@xes-inc.com>
+---
+ arch/arm/mach-bcm283x/include/mach/mbox.h | 18 ++++++++
+ arch/arm/mach-bcm283x/include/mach/msg.h  | 10 +++++
+ arch/arm/mach-bcm283x/msg.c               | 30 +++++++++++++
+ drivers/mmc/bcm2835_sdhost.c              | 53 ++++++++++++++---------
+ 4 files changed, 90 insertions(+), 21 deletions(-)
+
+diff --git a/arch/arm/mach-bcm283x/include/mach/mbox.h b/arch/arm/mach-bcm283x/include/mach/mbox.h
+index 7dcac583cc4..9b1943fcfc4 100644
+--- a/arch/arm/mach-bcm283x/include/mach/mbox.h
++++ b/arch/arm/mach-bcm283x/include/mach/mbox.h
+@@ -252,6 +252,24 @@ struct bcm2835_mbox_tag_get_clock_rate {
+ 	} body;
+ };
+ 
++#define BCM2835_MBOX_TAG_SET_SDHOST_CLOCK	0x00038042
++
++struct bcm2835_mbox_tag_set_sdhost_clock {
++	struct bcm2835_mbox_tag_hdr tag_hdr;
++	union {
++		struct {
++			u32 rate_hz;
++			u32 rate_1;
++			u32 rate_2;
++		} req;
++		struct {
++			u32 rate_hz;
++			u32 rate_1;
++			u32 rate_2;
++		} resp;
++	} body;
++};
++
+ #define BCM2835_MBOX_TAG_ALLOCATE_BUFFER	0x00040001
+ 
+ struct bcm2835_mbox_tag_allocate_buffer {
+diff --git a/arch/arm/mach-bcm283x/include/mach/msg.h b/arch/arm/mach-bcm283x/include/mach/msg.h
+index e45c1bf010f..ab37abdb6c6 100644
+--- a/arch/arm/mach-bcm283x/include/mach/msg.h
++++ b/arch/arm/mach-bcm283x/include/mach/msg.h
+@@ -22,6 +22,16 @@ int bcm2835_power_on_module(u32 module);
+  */
+ int bcm2835_get_mmc_clock(u32 clock_id);
+ 
++/**
++ * bcm2835_set_sdhost_clock() - determine if firmware controls sdhost cdiv
++ *
++ * @rate_hz: Input clock frequency
++ * @rate_1: Returns a clock frequency
++ * @rate_2: Returns a clock frequency
++ * @return 0 of OK, -EIO on error
++ */
++int bcm2835_set_sdhost_clock(u32 rate_hz, u32 *rate_1, u32 *rate_2);
++
+ /**
+  * bcm2835_get_video_size() - get the current display size
+  *
+diff --git a/arch/arm/mach-bcm283x/msg.c b/arch/arm/mach-bcm283x/msg.c
+index e2badfecb09..8c1c36a5f15 100644
+--- a/arch/arm/mach-bcm283x/msg.c
++++ b/arch/arm/mach-bcm283x/msg.c
+@@ -21,6 +21,12 @@ struct msg_get_clock_rate {
+ 	u32 end_tag;
+ };
+ 
++struct msg_set_sdhost_clock {
++	struct bcm2835_mbox_hdr hdr;
++	struct bcm2835_mbox_tag_set_sdhost_clock set_sdhost_clock;
++	u32 end_tag;
++};
++
+ struct msg_query {
+ 	struct bcm2835_mbox_hdr hdr;
+ 	struct bcm2835_mbox_tag_physical_w_h physical_w_h;
+@@ -111,6 +117,30 @@ int bcm2835_get_mmc_clock(u32 clock_id)
+ 	return clock_rate;
+ }
+ 
++int bcm2835_set_sdhost_clock(u32 rate_hz, u32 *rate_1, u32 *rate_2)
++{
++	ALLOC_CACHE_ALIGN_BUFFER(struct msg_set_sdhost_clock, msg_sdhost_clk, 1);
++	int ret;
++
++	BCM2835_MBOX_INIT_HDR(msg_sdhost_clk);
++	BCM2835_MBOX_INIT_TAG(&msg_sdhost_clk->set_sdhost_clock, SET_SDHOST_CLOCK);
++
++	msg_sdhost_clk->set_sdhost_clock.body.req.rate_hz = rate_hz;
++	msg_sdhost_clk->set_sdhost_clock.body.req.rate_1 = *rate_1;
++	msg_sdhost_clk->set_sdhost_clock.body.req.rate_2 = *rate_2;
++
++	ret = bcm2835_mbox_call_prop(BCM2835_MBOX_PROP_CHAN, &msg_sdhost_clk->hdr);
++	if (ret) {
++		printf("bcm2835: Could not query sdhost clock rate\n");
++		return -EIO;
++	}
++
++	*rate_1 = msg_sdhost_clk->set_sdhost_clock.body.resp.rate_1;
++	*rate_2 = msg_sdhost_clk->set_sdhost_clock.body.resp.rate_2;
++
++	return 0;
++}
++
+ int bcm2835_get_video_size(int *widthp, int *heightp)
+ {
+ 	ALLOC_CACHE_ALIGN_BUFFER(struct msg_query, msg_query, 1);
+diff --git a/drivers/mmc/bcm2835_sdhost.c b/drivers/mmc/bcm2835_sdhost.c
+index 894dbdd6861..3a9cd6f1eb2 100644
+--- a/drivers/mmc/bcm2835_sdhost.c
++++ b/drivers/mmc/bcm2835_sdhost.c
+@@ -181,6 +181,7 @@ struct bcm2835_host {
+ 	struct udevice		*dev;
+ 	struct mmc		*mmc;
+ 	struct bcm2835_plat	*plat;
++	unsigned int 		firmware_sets_cdiv:1;
+ };
+ 
+ static void bcm2835_dumpregs(struct bcm2835_host *host)
+@@ -233,7 +234,7 @@ static void bcm2835_reset_internal(struct bcm2835_host *host)
+ 	msleep(20);
+ 	host->clock = 0;
+ 	writel(host->hcfg, host->ioaddr + SDHCFG);
+-	writel(host->cdiv, host->ioaddr + SDCDIV);
++	writel(SDCDIV_MAX_CDIV, host->ioaddr + SDCDIV);
+ }
+ 
+ static int bcm2835_wait_transfer_complete(struct bcm2835_host *host)
+@@ -598,6 +599,7 @@ static int bcm2835_transmit(struct bcm2835_host *host)
+ static void bcm2835_set_clock(struct bcm2835_host *host, unsigned int clock)
+ {
+ 	int div;
++	u32 clock_rate[2] = { 0 };
+ 
+ 	/* The SDCDIV register has 11 bits, and holds (div - 2).  But
+ 	 * in data mode the max is 50MHz wihout a minimum, and only
+@@ -620,26 +622,34 @@ static void bcm2835_set_clock(struct bcm2835_host *host, unsigned int clock)
+ 	 * clock divisor at all times.
+ 	 */
+ 
+-	if (clock < 100000) {
+-		/* Can't stop the clock, but make it as slow as possible
+-		 * to show willing
+-		 */
+-		host->cdiv = SDCDIV_MAX_CDIV;
+-		writel(host->cdiv, host->ioaddr + SDCDIV);
+-		return;
+-	}
++	if (host->firmware_sets_cdiv) {
++		bcm2835_set_sdhost_clock(clock, &clock_rate[0], &clock_rate[1]);
++		clock = max(clock_rate[0], clock_rate[1]);
++	} else {
++		if (clock < 100000) {
++			/* Can't stop the clock, but make it as slow as possible
++			* to show willing
++			*/
++			host->cdiv = SDCDIV_MAX_CDIV;
++			writel(host->cdiv, host->ioaddr + SDCDIV);
++			return;
++		}
+ 
+-	div = host->max_clk / clock;
+-	if (div < 2)
+-		div = 2;
+-	if ((host->max_clk / div) > clock)
+-		div++;
+-	div -= 2;
++		div = host->max_clk / clock;
++		if (div < 2)
++			div = 2;
++		if ((host->max_clk / div) > clock)
++			div++;
++		div -= 2;
+ 
+-	if (div > SDCDIV_MAX_CDIV)
+-		div = SDCDIV_MAX_CDIV;
++		if (div > SDCDIV_MAX_CDIV)
++			div = SDCDIV_MAX_CDIV;
++
++		clock = host->max_clk / (div + 2);
++		host->cdiv = div;
++		writel(host->cdiv, host->ioaddr + SDCDIV);
++	}
+ 
+-	clock = host->max_clk / (div + 2);
+ 	host->mmc->clock = clock;
+ 
+ 	/* Calibrate some delays */
+@@ -647,9 +657,6 @@ static void bcm2835_set_clock(struct bcm2835_host *host, unsigned int clock)
+ 	host->ns_per_fifo_word = (1000000000 / clock) *
+ 		((host->mmc->card_caps & MMC_MODE_4BIT) ? 8 : 32);
+ 
+-	host->cdiv = div;
+-	writel(host->cdiv, host->ioaddr + SDCDIV);
+-
+ 	/* Set the timeout to 500ms */
+ 	writel(host->mmc->clock / 2, host->ioaddr + SDTOUT);
+ }
+@@ -759,6 +766,7 @@ static int bcm2835_probe(struct udevice *dev)
+ 	struct bcm2835_host *host = dev_get_priv(dev);
+ 	struct mmc *mmc = mmc_get_mmc_dev(dev);
+ 	struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
++	u32 clock_rate[2] = { ~0 };
+ 
+ 	host->dev = dev;
+ 	host->mmc = mmc;
+@@ -776,6 +784,9 @@ static int bcm2835_probe(struct udevice *dev)
+ 
+ 	host->max_clk = bcm2835_get_mmc_clock(BCM2835_MBOX_CLOCK_ID_CORE);
+ 
++	bcm2835_set_sdhost_clock(0, &clock_rate[0], &clock_rate[1]);
++	host->firmware_sets_cdiv = (clock_rate[0] != ~0);
++
+ 	bcm2835_add_host(host);
+ 
+ 	dev_dbg(dev, "%s -> OK\n", __func__);

rpi-fallback-to-max-clock-for-mmc.patch

@@ -0,0 +1,77 @@
+From 71ba043e5c5575f3d86536acade70dab6599489b Mon Sep 17 00:00:00 2001
+From: Vincent Fazio <vfazio@xes-inc.com>
+Date: Mon, 13 Sep 2021 11:22:30 -0500
+Subject: [PATCH] arm: rpi: fallback to max clock rate for MMC clock
+
+In rpi-firmware 25e2b597ebfb2495eab4816a276758dcc6ea21f1 and later,
+the GET_CLOCK_RATE mailbox property was changed to return the last
+value set by SET_CLOCK_RATE.
+
+https://github.com/raspberrypi/firmware/issues/1619#issuecomment-917025502
+
+U-Boot does not call SET_CLOCK_RATE so bcm2835_get_mmc_clock will
+return zero and can cause degraded MMC performance.
+
+Calling SET_CLOCK_RATE fixes the frequency of the clock to a specific
+value and disables the firmware's clock scaling so is not an option.
+
+Instead, fallback to GET_MAX_CLOCK_RATE in bcm2835_get_mmc_clock if
+GET_CLOCK_RATE returns zero.
+
+Signed-off-by: Vincent Fazio <vfazio@xes-inc.com>
+---
+ arch/arm/mach-bcm283x/include/mach/mbox.h |  2 ++
+ arch/arm/mach-bcm283x/msg.c               | 20 +++++++++++++++++++-
+ 2 files changed, 21 insertions(+), 1 deletion(-)
+
+diff --git a/arch/arm/mach-bcm283x/include/mach/mbox.h b/arch/arm/mach-bcm283x/include/mach/mbox.h
+index 2ae2d3d97c3..7dcac583cc4 100644
+--- a/arch/arm/mach-bcm283x/include/mach/mbox.h
++++ b/arch/arm/mach-bcm283x/include/mach/mbox.h
+@@ -224,6 +224,8 @@ struct bcm2835_mbox_tag_set_power_state {
+ };
+ 
+ #define BCM2835_MBOX_TAG_GET_CLOCK_RATE	0x00030002
++#define BCM2835_MBOX_TAG_GET_MAX_CLOCK_RATE	0x00030004
++#define BCM2835_MBOX_TAG_GET_MIN_CLOCK_RATE	0x00030007
+ 
+ #define BCM2835_MBOX_CLOCK_ID_EMMC	1
+ #define BCM2835_MBOX_CLOCK_ID_UART	2
+diff --git a/arch/arm/mach-bcm283x/msg.c b/arch/arm/mach-bcm283x/msg.c
+index 347aece3cd8..e2badfecb09 100644
+--- a/arch/arm/mach-bcm283x/msg.c
++++ b/arch/arm/mach-bcm283x/msg.c
+@@ -75,6 +75,7 @@ int bcm2835_get_mmc_clock(u32 clock_id)
+ {
+ 	ALLOC_CACHE_ALIGN_BUFFER(struct msg_get_clock_rate, msg_clk, 1);
+ 	int ret;
++	u32 clock_rate = 0;
+ 
+ 	ret = bcm2835_power_on_module(BCM2835_MBOX_POWER_DEVID_SDHCI);
+ 	if (ret)
+@@ -90,7 +91,24 @@ int bcm2835_get_mmc_clock(u32 clock_id)
+ 		return -EIO;
+ 	}
+ 
+-	return msg_clk->get_clock_rate.body.resp.rate_hz;
++	clock_rate = msg_clk->get_clock_rate.body.resp.rate_hz;
++
++	if (clock_rate == 0)
++	{
++		BCM2835_MBOX_INIT_HDR(msg_clk);
++		BCM2835_MBOX_INIT_TAG(&msg_clk->get_clock_rate, GET_MAX_CLOCK_RATE);
++		msg_clk->get_clock_rate.body.req.clock_id = clock_id;
++
++		ret = bcm2835_mbox_call_prop(BCM2835_MBOX_PROP_CHAN, &msg_clk->hdr);
++		if (ret) {
++			printf("bcm2835: Could not query max eMMC clock rate\n");
++			return -EIO;
++		}
++
++		clock_rate = msg_clk->get_clock_rate.body.resp.rate_hz;
++	}
++
++	return clock_rate;
+ }
+ 
+ int bcm2835_get_video_size(int *widthp, int *heightp)

smbios-Simplify-reporting-of-unknown-values.patch

@@ -0,0 +1,544 @@
+From patchwork Tue Sep  6 13:44:25 2022
+Content-Type: text/plain; charset="utf-8"
+MIME-Version: 1.0
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+From: Ilias Apalodimas <ilias.apalodimas@linaro.org>
+To: u-boot@lists.denx.de
+Cc: trini@konsulko.com, sjg@chromium.org, heinrich.schuchardt@canonical.com,
+ pbrobinson@gmail.com, Ilias Apalodimas <ilias.apalodimas@linaro.org>
+Subject: [PATCH 1/2] smbios: Simplify reporting of unknown values
+Date: Tue,  6 Sep 2022 16:44:25 +0300
+Message-Id: <20220906134426.53748-1-ilias.apalodimas@linaro.org>
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+
+If a value is not valid during the DT or SYSINFO parsing,  we explicitly
+set that to "Unknown Product" and "Unknown" for the product and
+manufacturer respectively.  It's cleaner if we move the checks insisde
+smbios_add_string() and always report "Unknown" regardless of the missing
+field.
+
+pre-patch dmidecode
+<snip>
+Handle 0x0001, DMI type 1, 27 bytes
+System Information
+        Manufacturer: Unknown
+        Product Name: Unknown Product
+        Version: Not Specified
+        Serial Number: Not Specified
+        UUID: Not Settable
+        Wake-up Type: Reserved
+        SKU Number: Not Specified
+        Family: Not Specified
+
+Handle 0x0002, DMI type 2, 14 bytes
+Base Board Information
+        Manufacturer: Unknown
+        Product Name: Unknown Product
+        Version: Not Specified
+        Serial Number: Not Specified
+        Asset Tag: Not Specified
+        Features:
+                Board is a hosting board
+        Location In Chassis: Not Specified
+        Chassis Handle: 0x0000
+        Type: Motherboard
+<snip>
+
+post-patch dmidecode:
+
+Handle 0x0001, DMI type 1, 27 bytes
+System Information
+        Manufacturer: Unknown
+        Product Name: Unknown
+        Version: Unknown
+        Serial Number: Unknown
+        UUID: Not Settable
+        Wake-up Type: Reserved
+        SKU Number: Unknown
+        Family: Unknown
+
+Handle 0x0002, DMI type 2, 14 bytes
+Base Board Information
+        Manufacturer: Unknown
+        Product Name: Unknown
+        Version: Unknown
+        Serial Number: Not Specified
+        Asset Tag: Unknown
+        Features:
+                Board is a hosting board
+        Location In Chassis: Not Specified
+        Chassis Handle: 0x0000
+        Type: Motherboard
+
+Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
+---
+ lib/smbios.c | 17 +++--------------
+ 1 file changed, 3 insertions(+), 14 deletions(-)
+
+diff --git a/lib/smbios.c b/lib/smbios.c
+index d7f4999e8b2a..fcc8686993ef 100644
+--- a/lib/smbios.c
++++ b/lib/smbios.c
+@@ -102,7 +102,7 @@ static int smbios_add_string(struct smbios_ctx *ctx, const char *str)
+ 	int i = 1;
+ 	char *p = ctx->eos;
+ 
+-	if (!*str)
++	if (!str || !*str)
+ 		str = "Unknown";
+ 
+ 	for (;;) {
+@@ -151,8 +151,7 @@ static int smbios_add_prop_si(struct smbios_ctx *ctx, const char *prop,
+ 		const char *str;
+ 
+ 		str = ofnode_read_string(ctx->node, prop);
+-		if (str)
+-			return smbios_add_string(ctx, str);
++		return smbios_add_string(ctx, str);
+ 	}
+ 
+ 	return 0;
+@@ -231,7 +230,7 @@ static int smbios_write_type0(ulong *current, int handle,
+ 	t->vendor = smbios_add_string(ctx, "U-Boot");
+ 
+ 	t->bios_ver = smbios_add_prop(ctx, "version");
+-	if (!t->bios_ver)
++	if (!strcmp(ctx->last_str, "Unknown"))
+ 		t->bios_ver = smbios_add_string(ctx, PLAIN_VERSION);
+ 	if (t->bios_ver)
+ 		gd->smbios_version = ctx->last_str;
+@@ -281,11 +280,7 @@ static int smbios_write_type1(ulong *current, int handle,
+ 	fill_smbios_header(t, SMBIOS_SYSTEM_INFORMATION, len, handle);
+ 	smbios_set_eos(ctx, t->eos);
+ 	t->manufacturer = smbios_add_prop(ctx, "manufacturer");
+-	if (!t->manufacturer)
+-		t->manufacturer = smbios_add_string(ctx, "Unknown");
+ 	t->product_name = smbios_add_prop(ctx, "product");
+-	if (!t->product_name)
+-		t->product_name = smbios_add_string(ctx, "Unknown Product");
+ 	t->version = smbios_add_prop_si(ctx, "version",
+ 					SYSINFO_ID_SMBIOS_SYSTEM_VERSION);
+ 	if (serial_str) {
+@@ -315,11 +310,7 @@ static int smbios_write_type2(ulong *current, int handle,
+ 	fill_smbios_header(t, SMBIOS_BOARD_INFORMATION, len, handle);
+ 	smbios_set_eos(ctx, t->eos);
+ 	t->manufacturer = smbios_add_prop(ctx, "manufacturer");
+-	if (!t->manufacturer)
+-		t->manufacturer = smbios_add_string(ctx, "Unknown");
+ 	t->product_name = smbios_add_prop(ctx, "product");
+-	if (!t->product_name)
+-		t->product_name = smbios_add_string(ctx, "Unknown Product");
+ 	t->version = smbios_add_prop_si(ctx, "version",
+ 					SYSINFO_ID_SMBIOS_BASEBOARD_VERSION);
+ 	t->asset_tag_number = smbios_add_prop(ctx, "asset-tag");
+@@ -344,8 +335,6 @@ static int smbios_write_type3(ulong *current, int handle,
+ 	fill_smbios_header(t, SMBIOS_SYSTEM_ENCLOSURE, len, handle);
+ 	smbios_set_eos(ctx, t->eos);
+ 	t->manufacturer = smbios_add_prop(ctx, "manufacturer");
+-	if (!t->manufacturer)
+-		t->manufacturer = smbios_add_string(ctx, "Unknown");
+ 	t->chassis_type = SMBIOS_ENCLOSURE_DESKTOP;
+ 	t->bootup_state = SMBIOS_STATE_SAFE;
+ 	t->power_supply_state = SMBIOS_STATE_SAFE;
+
+From patchwork Tue Sep  6 13:44:26 2022
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+ Tue, 06 Sep 2022 06:44:48 -0700 (PDT)
+From: Ilias Apalodimas <ilias.apalodimas@linaro.org>
+To: u-boot@lists.denx.de
+Cc: trini@konsulko.com, sjg@chromium.org, heinrich.schuchardt@canonical.com,
+ pbrobinson@gmail.com, Ilias Apalodimas <ilias.apalodimas@linaro.org>
+Subject: [PATCH 2/2] smbios: Fallback to the default DT if sysinfo nodes are
+ missing
+Date: Tue,  6 Sep 2022 16:44:26 +0300
+Message-Id: <20220906134426.53748-2-ilias.apalodimas@linaro.org>
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+
+In order to fill in the SMBIOS tables U-Boot currently relies on a
+"u-boot,sysinfo-smbios" compatible node.  This is fine for the boards
+that already include such nodes.  However with some recent EFI changes,
+the majority of boards can boot up distros, which usually rely on
+things like dmidecode etc for their reporting.  For boards that
+lack this special node the SMBIOS output looks like:
+
+System Information
+        Manufacturer: Unknown
+        Product Name: Unknown
+        Version: Unknown
+        Serial Number: Unknown
+        UUID: Not Settable
+        Wake-up Type: Reserved
+        SKU Number: Unknown
+        Family: Unknown
+
+This looks problematic since most of the info are "Unknown".  The DT spec
+specifies standard properties containing relevant information like
+'model' and 'compatible' for which the suggested format is
+<manufacturer,model>.  So let's add a last resort to our current
+smbios parsing.  If none of the sysinfo properties are found,  we can
+scan the root node for 'model' and 'compatible'.
+
+pre-patch dmidecode:
+<snip>
+Handle 0x0001, DMI type 1, 27 bytes
+System Information
+        Manufacturer: Unknown
+        Product Name: Unknown
+        Version: Unknown
+        Serial Number: Unknown
+        UUID: Not Settable
+        Wake-up Type: Reserved
+        SKU Number: Unknown
+        Family: Unknown
+
+Handle 0x0002, DMI type 2, 14 bytes
+Base Board Information
+        Manufacturer: Unknown
+        Product Name: Unknown
+        Version: Unknown
+        Serial Number: Not Specified
+        Asset Tag: Unknown
+        Features:
+                Board is a hosting board
+        Location In Chassis: Not Specified
+        Chassis Handle: 0x0000
+        Type: Motherboard
+
+Handle 0x0003, DMI type 3, 21 bytes
+Chassis Information
+        Manufacturer: Unknown
+        Type: Desktop
+        Lock: Not Present
+        Version: Not Specified
+        Serial Number: Not Specified
+        Asset Tag: Not Specified
+        Boot-up State: Safe
+        Power Supply State: Safe
+        Thermal State: Safe
+        Security Status: None
+        OEM Information: 0x00000000
+        Height: Unspecified
+        Number Of Power Cords: Unspecified
+        Contained Elements: 0
+<snip>
+
+post-pastch dmidecode:
+<snip>
+Handle 0x0001, DMI type 1, 27 bytes
+System Information
+        Manufacturer: socionext,developer-box
+        Product Name: Socionext Developer Box
+        Version: Unknown
+        Serial Number: Unknown
+        UUID: Not Settable
+        Wake-up Type: Reserved
+        SKU Number: Unknown
+        Family: Unknown
+
+Handle 0x0002, DMI type 2, 14 bytes
+Base Board Information
+        Manufacturer: socionext,developer-box
+        Product Name: Socionext Developer Box
+        Version: Unknown
+        Serial Number: Not Specified
+        Asset Tag: Unknown
+        Features:
+                Board is a hosting board
+        Location In Chassis: Not Specified
+        Chassis Handle: 0x0000
+        Type: Motherboard
+
+Handle 0x0003, DMI type 3, 21 bytes
+Chassis Information
+        Manufacturer: socionext,developer-box
+        Type: Desktop
+        Lock: Not Present
+        Version: Not Specified
+        Serial Number: Not Specified
+        Asset Tag: Not Specified
+        Boot-up State: Safe
+        Power Supply State: Safe
+        Thermal State: Safe
+        Security Status: None
+        OEM Information: 0x00000000
+        Height: Unspecified
+        Number Of Power Cords: Unspecified
+        Contained Elements: 0
+<snip>
+
+Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
+---
+ lib/smbios.c | 41 +++++++++++++++++++++++++++++++++++++++--
+ 1 file changed, 39 insertions(+), 2 deletions(-)
+
+diff --git a/lib/smbios.c b/lib/smbios.c
+index fcc8686993ef..f2eb961f514b 100644
+--- a/lib/smbios.c
++++ b/lib/smbios.c
+@@ -43,6 +43,20 @@
+ 
+ DECLARE_GLOBAL_DATA_PTR;
+ 
++/**
++ * struct sysifno_to_dt - Mapping of sysinfo strings to DT
++ *
++ * @sysinfo_str: sysinfo string
++ * @dt_str: DT string
++ */
++static const struct {
++	const char *sysinfo_str;
++	const char *dt_str;
++} sysifno_to_dt[] = {
++	{ .sysinfo_str = "product", .dt_str = "model" },
++	{ .sysinfo_str = "manufacturer", .dt_str = "compatible" },
++};
++
+ /**
+  * struct smbios_ctx - context for writing SMBIOS tables
+  *
+@@ -87,6 +101,18 @@ struct smbios_write_method {
+ 	const char *subnode_name;
+ };
+ 
++static const char *convert_sysinfo_to_dt(const char *sysinfo_str)
++{
++	int i;
++
++	for (i = 0; i < ARRAY_SIZE(sysifno_to_dt); i++) {
++		if (!strcmp(sysinfo_str, sysifno_to_dt[i].sysinfo_str))
++			return sysifno_to_dt[i].dt_str;
++	}
++
++	return NULL;
++}
++
+ /**
+  * smbios_add_string() - add a string to the string area
+  *
+@@ -148,9 +174,20 @@ static int smbios_add_prop_si(struct smbios_ctx *ctx, const char *prop,
+ 			return smbios_add_string(ctx, val);
+ 	}
+ 	if (IS_ENABLED(CONFIG_OF_CONTROL)) {
+-		const char *str;
++		const char *str = NULL;
+ 
+-		str = ofnode_read_string(ctx->node, prop);
++		/*
++		 * If the node is not valid fallback and try the entire DT
++		 * so we can at least fill in maufacturer and board type
++		 */
++		if (!ofnode_valid(ctx->node)) {
++			const char *nprop = convert_sysinfo_to_dt(prop);
++
++			if (nprop)
++				str = ofnode_read_string(ofnode_root(), nprop);
++		} else {
++			str = ofnode_read_string(ctx->node, prop);
++		}
+ 		return smbios_add_string(ctx, str);
+ 	}
+ 

sources

@@ -1 +1 @@
-SHA512 (u-boot-2021.01-rc4.tar.bz2) = 6de2c60d02276f4eed31b5baf2d8239ad0af30c9d341339a4cd7fa0786068cb5faa1ab8bd0b4155e536962e1a4869906f60f1d2a1e50b0ed15e98c2e84d6a97b
+SHA512 (u-boot-2022.10.tar.bz2) = 95bc1f915a3349f6045e59f46d8514485ca0de1d62303f7026b8e59f3ac539b9545895e0dd736ed7b26f28239db31672ecad2accc3fd99356a55269697039147

sunxi-add-PineCube-board.patch

@@ -1,222 +0,0 @@
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-Cc: u-boot@lists.denx.de, linux-sunxi@googlegroups.com,
- Icenowy Zheng <icenowy@aosc.io>
-Subject: [PATCH v3] sunxi: add PineCube board
-Date: Wed, 18 Nov 2020 18:27:17 +0800
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-
-PineCube is an IP camera development kit released by Pine64.
-
-It comes with the following compoents:
-
-- A mainboard with Sochip S3 SoC, a 16MByte SPI Flash, AXP209 PMIC,
-a power-only microUSB connector, a USB Type-A connector, a 10/100Mbps
-Ethernet port and FPC connectors for camera and daughter board.
-- An OV5640-based camera module which is connected to the parallel CSI
-bus of the mainboard.
-- A daughterboard with several buttons, a SD slot, some IR LEDs, a
-microphone and a speaker connector.
-
-As the device tree is synchronized in a previous commit, just add it to
-Makefile, create a new MAINTAINER item and provide a defconfig.
-
-Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
-Reviewed-by: Andre Przywara <andre.przywara@arm.com>
----
-Changes since v2:
-- Add Makefile reference to DT.
-Changes since v1:
-- Dropped LDO3 quirk.
-
- arch/arm/dts/Makefile      |  1 +
- board/sunxi/MAINTAINERS    |  5 +++++
- configs/pinecube_defconfig | 15 +++++++++++++++
- 3 files changed, 21 insertions(+)
- create mode 100644 configs/pinecube_defconfig
-
-diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
-index 7d1a369845..e6993733b0 100644
---- a/arch/arm/dts/Makefile
-+++ b/arch/arm/dts/Makefile
-@@ -587,6 +587,7 @@ dtb-$(CONFIG_MACH_SUN8I_R40) += \
- 	sun8i-r40-bananapi-m2-ultra.dtb \
- 	sun8i-v40-bananapi-m2-berry.dtb
- dtb-$(CONFIG_MACH_SUN8I_V3S) += \
-+	sun8i-s3-pinecube.dtb \
- 	sun8i-v3s-licheepi-zero.dtb
- dtb-$(CONFIG_MACH_SUN50I_H5) += \
- 	sun50i-h5-bananapi-m2-plus.dtb \
-diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS
-index d3755ae41a..735801ae1d 100644
---- a/board/sunxi/MAINTAINERS
-+++ b/board/sunxi/MAINTAINERS
-@@ -440,6 +440,11 @@ M:	Vasily Khoruzhick <anarsoul@gmail.com>
- S:	Maintained
- F:	configs/pinebook_defconfig
- 
-+PINECUBE BOARD:
-+M:	Icenowy Zheng <icenowy@aosc.io>
-+S:	Maintained
-+F:	configs/pinecube_defconfig
-+
- PINE64 BOARDS
- M:	Andre Przywara <andre.przywara@arm.com>
- S:	Maintained
-diff --git a/configs/pinecube_defconfig b/configs/pinecube_defconfig
-new file mode 100644
-index 0000000000..a8c404f6b1
---- /dev/null
-+++ b/configs/pinecube_defconfig
-@@ -0,0 +1,15 @@
-+CONFIG_ARM=y
-+CONFIG_ARCH_SUNXI=y
-+CONFIG_SPL=y
-+CONFIG_MACH_SUN8I_V3S=y
-+CONFIG_SUNXI_DRAM_DDR3_1333=y
-+CONFIG_DRAM_CLK=504
-+CONFIG_DRAM_ODT_EN=y
-+CONFIG_I2C0_ENABLE=y
-+CONFIG_DEFAULT_DEVICE_TREE="sun8i-s3-pinecube"
-+CONFIG_SPL_I2C_SUPPORT=y
-+# CONFIG_NETDEVICES is not set
-+CONFIG_AXP209_POWER=y
-+CONFIG_AXP_DCDC2_VOLT=1250
-+CONFIG_AXP_DCDC3_VOLT=3300
-+CONFIG_CONS_INDEX=3

uboot-tools.spec

@@ -1,74 +1,75 @@
-%global candidate rc4
+#global candidate rc1
+%if !0%{?rhel}
+%bcond_without toolsonly
+%else
+%bcond_with toolsonly
+%endif
+
+# Set it to "opensbi" (stable) or opensbi-unstable (unstable, git)
+%global opensbi opensbi-unstable
 
 Name:     uboot-tools
-Version:  2021.01
-Release:  0.4%{?candidate:.%{candidate}}%{?dist}
+Version:  2022.10
+Release:  1%{?candidate:.%{candidate}}.1.riscv64%{?dist}
 Summary:  U-Boot utilities
 License:  GPLv2+ BSD LGPL-2.1+ LGPL-2.0+
 URL:      http://www.denx.de/wiki/U-Boot
 
-Source0:  ftp://ftp.denx.de/pub/u-boot/u-boot-%{version}%{?candidate:-%{candidate}}.tar.bz2
-Source1:  arm-boards
-Source2:  arm-chromebooks
-Source3:  aarch64-boards
-Source4:  aarch64-chromebooks
+ExcludeArch: s390x
+Source0:  https://ftp.denx.de/pub/u-boot/u-boot-%{version}%{?candidate:-%{candidate}}.tar.bz2
+Source1:  aarch64-boards
+Source2:  riscv64-boards
 
 # Fedoraisms patches
 # Needed to find DT on boot partition that's not the first partition
 Patch1:   uefi-distro-load-FDT-from-any-partition-on-boot-device.patch
-# Needed due to issues with shim
-Patch2:   uefi-use-Fedora-specific-path-name.patch
-# RPi - uses RPI firmware device tree for HAT support
-Patch3:   rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch
-# Ajust the U-Boot offsets in SPL to take less space
-#Patch4:   rockchip-spl-u-boot-itb-offset.patch
+Patch2:   smbios-Simplify-reporting-of-unknown-values.patch
 
 # Board fixes and enablement
-Patch5:   Raspberry-Pi-400-Compute-Module-4-support.patch
-Patch6:   rng-Add-iProc-RNG200-driver.patch
-# AllWinner improvements
-Patch10:  AllWinner-PineTab.patch
-Patch11:  sunxi-add-PineCube-board.patch
-Patch12:  0001-Fixes-for-AllWinner-ethernet-network-interfaces.patch
-# TI fixes
-Patch13:  0001-Fix-BeagleAI-detection.patch
+# RPi - uses RPI firmware device tree for HAT support
+Patch3:   rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch
+Patch4:   rpi-fallback-to-max-clock-for-mmc.patch
+Patch5:   rpi-bcm2835_sdhost-firmware-managed-clock.patch
+Patch6:   rpi-Copy-properties-from-firmware-DT-to-loaded-DT.patch
 # Rockchips improvements
-Patch14:  arm-rk3399-enable-rng-on-rock960-and-firefly3399.patch
-Patch15:  rk3399-Pinebook-pro-EDP-support.patch
+Patch7:   rockchip-Add-initial-support-for-the-PinePhone-Pro.patch
+Patch8:   0001-Revert-power-pmic-rk8xx-Support-sysreset-shutdown-me.patch
+
+# RISC-V (riscv64) patches
+Patch20:  0001-board-sifive-spl-Initialized-the-PWM-setting-in-the-.patch
+Patch21:  0002-board-sifive-spl-Set-remote-thermal-of-TMP451-to-85-.patch
+Patch22:  0003-Enable-sbi-command-and-SBI-sysreset.patch
+Patch23:  1dde977518f13824b847e23275001191139bc384.patch
 
 BuildRequires:  bc
+BuildRequires:  bison
 BuildRequires:  dtc
-BuildRequires:  make
-# Requirements for building on el7
-%if 0%{?rhel} == 7
-BuildRequires:  devtoolset-7-build
-BuildRequires:  devtoolset-7-binutils
-BuildRequires:  devtoolset-7-gcc
-BuildRequires:  python2-devel
-BuildRequires:  python2-setuptools
-BuildRequires:  python2-libfdt
-%else
+BuildRequires:  flex
 BuildRequires:  gcc
+BuildRequires:  gnutls-devel
+BuildRequires:  libuuid-devel
+BuildRequires:  make
+BuildRequires:  ncurses-devel
+BuildRequires:  openssl-devel
+BuildRequires:  perl-interpreter
 BuildRequires:  python3-devel
 BuildRequires:  python3-setuptools
 BuildRequires:  python3-libfdt
-%endif
-BuildRequires:  flex bison
-BuildRequires:  openssl-devel
 BuildRequires:  SDL-devel
 BuildRequires:  swig
-%ifarch %{arm} aarch64
-BuildRequires:  vboot-utils
-%endif
 %ifarch aarch64
 BuildRequires:  arm-trusted-firmware-armv8
 %endif
 Requires:       dtc
+%ifarch riscv64
+BuildRequires:  %{opensbi}
+%endif
 
 %description
 This package contains a few U-Boot utilities - mkimage for creating boot images
 and fw_printenv/fw_setenv for manipulating the boot environment variables.
 
+%if %{with toolsonly}
 %ifarch aarch64
 %package     -n uboot-images-armv8
 Summary:     U-Boot firmware images for aarch64 boards
@@ -78,163 +79,376 @@ BuildArch:   noarch
 U-Boot firmware binaries for aarch64 boards
 %endif
 
-%ifarch %{arm}
-%package     -n uboot-images-armv7
-Summary:     U-Boot firmware images for armv7 boards
+%ifarch riscv64
+%package     -n uboot-images-riscv64
+Summary:     u-boot bootloader images for riscv64 boards
+Requires:    uboot-tools
 BuildArch:   noarch
 
-%description -n uboot-images-armv7
-U-Boot firmware binaries for armv7 boards
+%description -n uboot-images-riscv64
+u-boot bootloader binaries for riscv64 boards
+%endif
 %endif
 
 %prep
 %autosetup -p1 -n u-boot-%{version}%{?candidate:-%{candidate}}
 
-cp %SOURCE1 %SOURCE2 %SOURCE3 %SOURCE4 .
+cp %SOURCE1 %SOURCE2 .
 
 %build
 mkdir builds
 
-%if 0%{?rhel} == 7
-#Enabling DTS for .el7
-%{?enable_devtoolset7:%{enable_devtoolset7}}
+%make_build HOSTCC="gcc $RPM_OPT_FLAGS" CROSS_COMPILE="" tools-only_defconfig O=builds/
+%make_build HOSTCC="gcc $RPM_OPT_FLAGS" CROSS_COMPILE="" tools-all O=builds/
+
+%if %{with toolsonly}
+%ifarch riscv64
+export OPENSBI=%{_datadir}/%{opensbi}/generic/firmware/fw_dynamic.bin
 %endif
 
-%ifarch aarch64 %{arm}
+%ifarch aarch64 riscv64
 for board in $(cat %{_arch}-boards)
 do
   echo "Building board: $board"
   mkdir builds/$(echo $board)/
+
   # ATF selection, needs improving, suggestions of ATF SoC to Board matrix welcome
   sun50i=(a64-olinuxino amarula_a64_relic bananapi_m2_plus_h5 bananapi_m64 libretech_all_h3_cc_h5 nanopi_a64 nanopi_neo2 nanopi_neo_plus2 orangepi_pc2 orangepi_prime orangepi_win orangepi_zero_plus orangepi_zero_plus2 pine64-lts pine64_plus pinebook pinephone pinetab sopine_baseboard teres_i)
   if [[ " ${sun50i[*]} " == *" $board "* ]]; then
     echo "Board: $board using sun50i_a64"
     cp /usr/share/arm-trusted-firmware/sun50i_a64/* builds/$(echo $board)/
   fi
-  sun50h6=(orangepi_lite2 orangepi_one_plus pine_h64)
+  sun50h6=(beelink_gs1 orangepi_3 orangepi_lite2 orangepi_one_plus orangepi_zero2 pine_h64 tanix_tx6)
   if [[ " ${sun50h6[*]} " == *" $board "* ]]; then
     echo "Board: $board using sun50i_h6"
     cp /usr/share/arm-trusted-firmware/sun50i_h6/* builds/$(echo $board)/
   fi
-  rk3328=(evb-rk3328 rock64-rk3328 rock-pi-e-rk3328 roc-cc-rk3328)
+  rk3328=(evb-rk3328 nanopi-r2s-rk3328 rock64-rk3328 rock-pi-e-rk3328 roc-cc-rk3328)
   if [[ " ${rk3328[*]} " == *" $board "* ]]; then
     echo "Board: $board using rk3328"
     cp /usr/share/arm-trusted-firmware/rk3328/* builds/$(echo $board)/
   fi
-  rk3399=(evb-rk3399 ficus-rk3399 firefly-rk3399 khadas-edge-captain-rk3399 khadas-edge-rk3399 khadas-edge-v-rk3399 nanopc-t4-rk3399 nanopi-m4-2gb-rk3399 nanopi-m4-rk3399 nanopi-neo4-rk3399 orangepi-rk3399 pinebook-pro-rk3399 puma-rk3399 rock960-rk3399 rock-pi-4c-rk3399 rock-pi-4-rk3399 rock-pi-n10-rk3399pro rockpro64-rk3399 roc-pc-mezzanine-rk3399 roc-pc-rk3399)
+  rk3399=(evb-rk3399 ficus-rk3399 firefly-rk3399 khadas-edge-captain-rk3399 khadas-edge-rk3399 khadas-edge-v-rk3399 leez-rk3399 nanopc-t4-rk3399 nanopi-m4-2gb-rk3399 nanopi-m4b-rk3399 nanopi-m4-rk3399 nanopi-neo4-rk3399 nanopi-r4s-rk3399 orangepi-rk3399 pinebook-pro-rk3399 pinephone-pro-rk3399 puma-rk3399 rock960-rk3399 rock-pi-4c-rk3399 rock-pi-4-rk3399 rock-pi-n10-rk3399pro rockpro64-rk3399 roc-pc-mezzanine-rk3399 roc-pc-rk3399)
   if [[ " ${rk3399[*]} " == *" $board "* ]]; then
     echo "Board: $board using rk3399"
     cp /usr/share/arm-trusted-firmware/rk3399/* builds/$(echo $board)/
   fi
   # End ATF
+
   make $(echo $board)_defconfig O=builds/$(echo $board)/
   %make_build HOSTCC="gcc $RPM_OPT_FLAGS" CROSS_COMPILE="" O=builds/$(echo $board)/
+
+  # build spi images for rockchip boards with SPI flash
+  rkspi=(rock64-rk3328)
+  if [[ " ${rkspi[*]} " == *" $board "* ]]; then
+    echo "Board: $board with SPI flash"
+    builds/$(echo $board)/tools/mkimage -n rk3328 -T rkspi -d builds/$(echo $board)/tpl/u-boot-tpl.bin:builds/$(echo $board)/spl/u-boot-spl.bin builds/$(echo $board)/idbloader.spi
+  fi
+  rkspi=(evb-rk3399 khadas-edge-captain-rk3399 khadas-edge-rk3399 khadas-edge-v-rk3399 nanopc-t4-rk3399 pinebook-pro-rk3399 pinephone-pro-rk3399 rockpro64-rk3399 roc-pc-mezzanine-rk3399 roc-pc-rk3399)
+  if [[ " ${rkspi[*]} " == *" $board "* ]]; then
+    echo "Board: $board with SPI flash"
+    builds/$(echo $board)/tools/mkimage -n rk3399 -T rkspi -d builds/$(echo $board)/tpl/u-boot-tpl.bin:builds/$(echo $board)/spl/u-boot-spl.bin builds/$(echo $board)/idbloader.spi
+  fi
 done
 
 %endif
-
-%make_build HOSTCC="gcc $RPM_OPT_FLAGS" CROSS_COMPILE="" tools-only_defconfig O=builds/
-%make_build HOSTCC="gcc $RPM_OPT_FLAGS" CROSS_COMPILE="" tools-all O=builds/
+%endif
 
 %install
-mkdir -p $RPM_BUILD_ROOT%{_bindir}
-mkdir -p $RPM_BUILD_ROOT%{_sysconfdir}
-mkdir -p $RPM_BUILD_ROOT%{_mandir}/man1
-mkdir -p $RPM_BUILD_ROOT%{_datadir}/uboot/
+mkdir -p %{buildroot}%{_bindir}
+mkdir -p %{buildroot}%{_mandir}/man1
+mkdir -p %{buildroot}%{_datadir}/uboot/
 
+%if %{with toolsonly}
 %ifarch aarch64
-for board in $(cat %{_arch}-boards)
+for board in $(ls builds)
 do
-mkdir -p $RPM_BUILD_ROOT%{_datadir}/uboot/$(echo $board)/
- for file in u-boot.bin u-boot.dtb u-boot.img u-boot-dtb.img u-boot.itb u-boot-sunxi-with-spl.bin u-boot-rockchip.bin idbloader.img spl/boot.bin spl/sunxi-spl.bin
+ mkdir -p %{buildroot}%{_datadir}/uboot/$(echo $board)/
+ for file in u-boot.bin u-boot.dtb u-boot.img u-boot-dtb.img u-boot.itb u-boot-sunxi-with-spl.bin u-boot-rockchip.bin idbloader.img idbloader.spi spl/boot.bin spl/sunxi-spl.bin
  do
   if [ -f builds/$(echo $board)/$(echo $file) ]; then
-    install -p -m 0644 builds/$(echo $board)/$(echo $file) $RPM_BUILD_ROOT%{_datadir}/uboot/$(echo $board)/
+    install -p -m 0644 builds/$(echo $board)/$(echo $file) %{buildroot}%{_datadir}/uboot/$(echo $board)/
+  fi
+ done
+done
+
+# For Apple M1 we also need the nodtb variant
+install -p -m 0644 builds/apple_m1/u-boot-nodtb.bin %{buildroot}%{_datadir}/uboot/apple_m1/u-boot-nodtb.bin
+%endif
+
+%ifarch riscv64
+for board in $(ls builds)
+do
+mkdir -p %{buildroot}%{_datadir}/uboot/$(echo $board)/
+ for file in u-boot.bin u-boot.dtb u-boot.img u-boot-nodtb.bin u-boot-dtb.bin u-boot.itb u-boot-dtb.img u-boot.its spl/u-boot-spl.bin spl/u-boot-spl-nodtb.bin spl/u-boot-spl.dtb spl/u-boot-spl-dtb.bin
+ do
+  if [ -f builds/$(echo $board)/$(echo $file) ]; then
+    install -p -m 0644 builds/$(echo $board)/$(echo $file) %{buildroot}%{_datadir}/uboot/$(echo $board)/
   fi
  done
 done
 %endif
 
-%ifarch %{arm}
-for board in $(cat %{_arch}-boards)
-do
-mkdir -p $RPM_BUILD_ROOT%{_datadir}/uboot/$(echo $board)/
- for file in MLO SPL spl/arndale-spl.bin spl/origen-spl.bin spl/*spl.bin u-boot.bin u-boot.dtb u-boot-dtb-tegra.bin u-boot.img u-boot.imx u-boot-spl.kwb u-boot-rockchip.bin u-boot-sunxi-with-spl.bin spl/boot.bin
- do
-  if [ -f builds/$(echo $board)/$(echo $file) ]; then
-    install -p -m 0644 builds/$(echo $board)/$(echo $file) $RPM_BUILD_ROOT%{_datadir}/uboot/$(echo $board)/
-  fi
- done
-
-done
-
 # Bit of a hack to remove binaries we don't use as they're large
-for board in $(cat %{_arch}-boards)
+%ifarch aarch64
+for board in $(ls builds)
 do
-  if [ -f $RPM_BUILD_ROOT%{_datadir}/uboot/$(echo $board)/u-boot-sunxi-with-spl.bin ]; then
-    rm -f $RPM_BUILD_ROOT%{_datadir}/uboot/$(echo $board)/u-boot.*
+  rm -f %{buildroot}%{_datadir}/uboot/$(echo $board)/u-boot.dtb
+  if [ -f %{buildroot}%{_datadir}/uboot/$(echo $board)/u-boot-sunxi-with-spl.bin ]; then
+    rm -f %{buildroot}%{_datadir}/uboot/$(echo $board)/u-boot{,-dtb}.*
   fi
-  if [ -f $RPM_BUILD_ROOT%{_datadir}/uboot/$(echo $board)/MLO ]; then
-    rm -f $RPM_BUILD_ROOT%{_datadir}/uboot/$(echo $board)/u-boot.bin
+  if [ -f %{buildroot}%{_datadir}/uboot/$(echo $board)/MLO ]; then
+    rm -f %{buildroot}%{_datadir}/uboot/$(echo $board)/u-boot.bin
   fi
-  if [ -f $RPM_BUILD_ROOT%{_datadir}/uboot/$(echo $board)/SPL ]; then
-    rm -f $RPM_BUILD_ROOT%{_datadir}/uboot/$(echo $board)/u-boot.bin
+  if [ -f %{buildroot}%{_datadir}/uboot/$(echo $board)/SPL ]; then
+    rm -f %{buildroot}%{_datadir}/uboot/$(echo $board)/u-boot.bin
   fi
-  if [ -f $RPM_BUILD_ROOT%{_datadir}/uboot/$(echo $board)/u-boot.imx ]; then
-    rm -f $RPM_BUILD_ROOT%{_datadir}/uboot/$(echo $board)/u-boot.bin
+  if [ -f %{buildroot}%{_datadir}/uboot/$(echo $board)/u-boot.imx ]; then
+    rm -f %{buildroot}%{_datadir}/uboot/$(echo $board)/u-boot.bin
+  fi
+  if [ -f %{buildroot}%{_datadir}/uboot/$(echo $board)/u-boot-spl.kwb ]; then
+    rm -f %{buildroot}%{_datadir}/uboot/$(echo $board)/u-boot.*
+    rm -f %{buildroot}%{_datadir}/uboot/$(echo $board)/u-boot-spl.bin
+  fi
+  if [ -f %{buildroot}%{_datadir}/uboot/$(echo $board)/idbloader.img ]; then
+    rm -f %{buildroot}%{_datadir}/uboot/$(echo $board)/u-boot.bin
+    rm -f %{buildroot}%{_datadir}/uboot/$(echo $board)/u-boot{,-dtb}.img
   fi
 done
 %endif
+%endif
 
-for tool in bmp_logo dumpimage env/fw_printenv fit_check_sign fit_info gdb/gdbcont gdb/gdbsend gen_eth_addr gen_ethaddr_crc img2srec mkenvimage mkimage mksunxiboot ncb proftool sunxi-spl-image-builder ubsha1 xway-swap-bytes
+for tool in bmp_logo dumpimage env/fw_printenv fit_check_sign fit_info gdb/gdbcont gdb/gdbsend gen_eth_addr gen_ethaddr_crc img2srec mkenvimage mkimage mksunxiboot ncb proftool sunxi-spl-image-builder ubsha1 xway-swap-bytes kwboot
 do
-install -p -m 0755 builds/tools/$tool $RPM_BUILD_ROOT%{_bindir}
+install -p -m 0755 builds/tools/$tool %{buildroot}%{_bindir}
 done
-install -p -m 0644 doc/mkimage.1 $RPM_BUILD_ROOT%{_mandir}/man1
+install -p -m 0644 doc/mkimage.1 %{buildroot}%{_mandir}/man1
 
-install -p -m 0755 builds/tools/env/fw_printenv $RPM_BUILD_ROOT%{_bindir}
-( cd $RPM_BUILD_ROOT%{_bindir}; ln -sf fw_printenv fw_setenv )
+install -p -m 0755 builds/tools/env/fw_printenv %{buildroot}%{_bindir}
+( cd %{buildroot}%{_bindir}; ln -sf fw_printenv fw_setenv )
 
-install -p -m 0644 tools/env/fw_env.config $RPM_BUILD_ROOT%{_sysconfdir}
-
-# Copy sone useful docs over
+# Copy some useful docs over
 mkdir -p builds/docs
 cp -p board/hisilicon/hikey/README builds/docs/README.hikey
-cp -p board/hisilicon/hikey/README builds/docs/README.hikey
-cp -p board/Marvell/db-88f6820-gp/README builds/docs/README.mvebu-db-88f6820
 cp -p board/rockchip/evb_rk3399/README builds/docs/README.evb_rk3399
-cp -p board/solidrun/clearfog/README builds/docs/README.clearfog
-cp -p board/solidrun/mx6cuboxi/README builds/docs/README.mx6cuboxi
 cp -p board/sunxi/README.sunxi64 builds/docs/README.sunxi64
 cp -p board/sunxi/README.nand builds/docs/README.sunxi-nand
-cp -p board/ti/am335x/README builds/docs/README.am335x
-cp -p board/ti/omap5_uevm/README builds/docs/README.omap5_uevm
-cp -p board/udoo/README builds/docs/README.udoo
-cp -p board/wandboard/README builds/docs/README.wandboard
-cp -p board/warp/README builds/docs/README.warp
-cp -p board/warp7/README builds/docs/README.warp7
 
 %files
-%doc README doc/README.kwbimage doc/README.distro doc/README.gpt
-%doc doc/README.odroid doc/README.rockchip doc/uefi doc/uImage.FIT doc/arch/arm64.rst
-%doc doc/README.chromium builds/docs/*
-%doc doc/board/amlogic/ doc/board/rockchip/
+%doc README doc/develop/distro.rst doc/README.gpt
+%doc doc/README.rockchip doc/develop/uefi doc/uImage.FIT doc/arch/arm64.rst
+%doc builds/docs/* doc/board/amlogic/ doc/board/rockchip/
 %{_bindir}/*
 %{_mandir}/man1/mkimage.1*
 %dir %{_datadir}/uboot/
-%config(noreplace) %{_sysconfdir}/fw_env.config
 
+%if %{with toolsonly}
 %ifarch aarch64
 %files -n uboot-images-armv8
 %{_datadir}/uboot/*
 %endif
 
-%ifarch %{arm}
-%files -n uboot-images-armv7
+%ifarch riscv64
+%files -n uboot-images-riscv64
 %{_datadir}/uboot/*
 %endif
+%endif
 
 %changelog
+* Sun Nov 20 2022 David Abdurachmanov <davidlt@rivosinc.com> - 2022.10-1.1.riscv64
+- Actually build riscv64 binaries
+
+* Thu Nov 17 2022 David Abdurachmanov <davidlt@rivosinc.com> - 2022.10-1.0.riscv64
+- Add support for riscv64
+
+* Mon Oct 10 2022 Peter Robinson <pbrobinson@fedoraproject.org> - 2022.10-1
+- Update to 2022.10 GA
+
+* Tue Sep 06 2022 Peter Robinson <pbrobinson@fedoraproject.org> - 2022.10-0.6.rc4
+- Update SMBIOS patch
+
+* Tue Sep 06 2022 Peter Robinson <pbrobinson@fedoraproject.org> - 2022.10-0.5.rc4
+- Update to 2022.10 RC4
+- Fix for booting Rockchip devices from NVME
+
+* Tue Aug 23 2022 Peter Robinson <pbrobinson@fedoraproject.org> - 2022.10-0.4.rc3
+- Update to 2022.10 RC3
+
+* Mon Aug 22 2022 Davide Cavalca <dcavalca@fedoraproject.org> - 2022.10-0.3.rc1
+- Install nodtb variant for Apple M1 (rhbz#2068958)
+
+* Tue Aug 16 2022 Peter Robinson <pbrobinson@fedoraproject.org> - 2022.10-0.2.rc1
+- Fix for DT property propogation via firmware
+
+* Thu Jul 28 2022 Peter Robinson <pbrobinson@fedoraproject.org> - 2022.10-0.1.rc1
+- Update to 2022.10 RC1
+- Enable LTO for firmware builds
+
+* Sat Jul 23 2022 Fedora Release Engineering <releng@fedoraproject.org> - 2022.07-2
+- Rebuilt for https://fedoraproject.org/wiki/Fedora_37_Mass_Rebuild
+
+* Sun Jul 17 2022 Peter Robinson <pbrobinson@fedoraproject.org> - 2022.07-1
+- Update to 2022.07 GA
+
+* Mon Jul 04 2022 Peter Robinson <pbrobinson@fedoraproject.org> - 2022.07-0.6.rc6
+- Update to 2022.07 RC6
+
+* Mon Jun 20 2022 Peter Robinson <pbrobinson@fedoraproject.org> - 2022.07-0.5.rc5
+- Update to 2022.07 RC5
+
+* Sun Jun 12 2022 Peter Robinson <pbrobinson@fedoraproject.org> - 2022.07-0.4.rc4
+- Update to 2022.07 RC4
+- Some minor Rockchips device fixes
+
+* Wed May 25 2022 Peter Robinson <pbrobinson@fedoraproject.org> - 2022.07-0.3.rc3
+- Update to 2022.07 RC3
+
+* Sat May 14 2022 Peter Robinson <pbrobinson@fedoraproject.org> - 2022.07-0.2.rc2
+- Update to 2022.07 RC2
+
+* Tue Apr 26 2022 Peter Robinson <pbrobinson@fedoraproject.org> - 2022.07-0.1.rc1
+- Update to 2022.07 RC1
+
+* Mon Apr 04 2022 Peter Robinson <pbrobinson@fedoraproject.org> - 2022.04-1
+- Update to 2022.04 GA
+
+* Mon Mar 28 2022 Peter Robinson <pbrobinson@fedoraproject.org> - 2022.04-0.4.rc5
+- Update to 2022.04 RC5
+
+* Tue Mar 08 2022 Peter Robinson <pbrobinson@fedoraproject.org> - 2022.04-0.3.rc3
+- Update to 2022.04 RC3
+- Enable new Rockchip devices
+
+* Tue Feb 15 2022 Peter Robinson <pbrobinson@fedoraproject.org> - 2022.04-0.2.rc2
+- Update to 2022.04 RC2
+
+* Wed Feb 02 2022 Peter Robinson <pbrobinson@fedoraproject.org> - 2022.04-0.1.rc1
+- Update to 2022.04 RC1
+
+* Sat Jan 22 2022 Fedora Release Engineering <releng@fedoraproject.org> - 2022.01-2
+- Rebuilt for https://fedoraproject.org/wiki/Fedora_36_Mass_Rebuild
+
+* Mon Jan 10 2022 Peter Robinson <pbrobinson@fedoraproject.org> - 2022.01-1
+- Update to 2022.01
+
+* Wed Jan 05 2022 Peter Robinson <pbrobinson@fedoraproject.org> - 2022.01-0.3.rc4
+- Upstream fixes for PHY and UEFI
+
+* Mon Dec 20 2021 Peter Robinson <pbrobinson@fedoraproject.org> - 2022.01-0.2.rc4
+- Update to 2022.01 RC4
+
+* Mon Nov 15 2021 Peter Robinson <pbrobinson@fedoraproject.org> - 2022.01-0.1.rc2
+- Update to 2022.01 RC2
+
+* Mon Nov 15 2021 Peter Robinson <pbrobinson@fedoraproject.org> - 2021.10-3
+- Fixes for rk3399 devices
+
+* Thu Oct 14 2021 Peter Robinson <pbrobinson@fedoraproject.org> - 2021.10-2
+- Fix booting from MMC for Rockchip 3399 (rhbz #2014182)
+- Enable new rk3399 devices (Leez, NanoPi-M4B, NanoPi-4S, NanoPi-T4) (rhbz #2009126)
+
+* Mon Oct 04 2021 Peter Robinson <pbrobinson@fedoraproject.org> - 2021.10-1
+- Update to 2021.10
+
+* Mon Sep 27 2021 Peter Robinson <pbrobinson@fedoraproject.org> - 2021.10-0.7.rc5
+- Update to 2021.10 RC5
+
+* Wed Sep 15 2021 Peter Robinson <pbrobinson@fedoraproject.org> - 2021.10-0.6.rc4
+- Update to 2021.10 RC4
+- Proposed fix for RPi MMC clock issue
+
+* Tue Sep 14 2021 Sahana Prasad <sahana@redhat.com> - 2021.10-0.6.rc3
+- Rebuilt with OpenSSL 3.0.0
+
+* Mon Aug 30 2021 Peter Robinson <pbrobinson@fedoraproject.org> - 2021.10-0.5.rc3
+- Update to 2021.10 RC3
+
+* Tue Aug 24 2021 Peter Robinson <pbrobinson@fedoraproject.org> - 2021.10-0.4.rc2
+- Fix for Raspberry Pi firmware properties
+
+* Mon Aug 23 2021 Peter Robinson <pbrobinson@fedoraproject.org> - 2021.10-0.3.rc2
+- Fix for rockchip SPI
+
+* Mon Aug 16 2021 Peter Robinson <pbrobinson@fedoraproject.org> - 2021.10-0.2.rc2
+- Update to 2021.10 RC2
+
+* Sun Aug 08 2021 Peter Robinson <pbrobinson@fedoraproject.org> - 2021.10-0.1.rc1
+- Update to 2021.10 RC1
+
+* Thu Jul 22 2021 Peter Robinson <pbrobinson@fedoraproject.org> - 2021.07-2
+- Fix regression for Rockchip devices running firmware from SPI flash
+
+* Mon Jul 05 2021 Peter Robinson <pbrobinson@fedoraproject.org> - 2021.07-1
+- Update to 2021.07 GA
+
+* Mon Jun 28 2021 Peter Robinson <pbrobinson@fedoraproject.org> - 2021.07-0.6.rc5
+- Update to 2021.07 RC5
+- Build SPI fash images for ROC-PC-RK3399
+
+* Mon Jun 07 2021 Peter Robinson <pbrobinson@fedoraproject.org> - 2021.07-0.5.rc4
+- Update to 2021.07 RC4
+
+* Sat Jun 05 2021 Peter Robinson <pbrobinson@fedoraproject.org> - 2021.07-0.4.rc3
+- Fix AllWinner devices booting from mSD/MMC
+
+* Tue May 25 2021 Peter Robinson <pbrobinson@fedoraproject.org> - 2021.07-0.3.rc3
+- Update to 2021.07 RC3
+- Build against ATF 2.5 GA
+
+* Thu May 13 2021 Peter Robinson <pbrobinson@fedoraproject.org> - 2021.07-0.2.rc2
+- Build against new ATF 2.5-rc1
+
+* Mon May 10 2021 Peter Robinson <pbrobinson@fedoraproject.org> - 2021.07-0.1.rc2
+- Update to 2021.07 RC2
+
+* Wed Apr 28 2021 Peter Robinson <pbrobinson@fedoraproject.org> - 2021.04-3
+- Upstream fix for console regression (rhbz 1946278)
+- Fix for fallback.efi crash (rhbz 1733817)
+
+* Wed Apr 21 2021 Peter Robinson <pbrobinson@fedoraproject.org> - 2021.04-2
+- Revert keyboard console regression change (rhbz 1946278)
+
+* Sun Apr 18 2021 Peter Robinson <pbrobinson@fedoraproject.org> - 2021.04-1
+- Update to 2021.04 GA
+- Fix DTB load check (rhbz 1946278)
+- Build Rockchip SPI support as idbloader.spi
+- Fixes for Rockchip devices
+- Build Turris Omnia for MMC/SPI/UART
+
+* Wed Mar 17 2021 Peter Robinson <pbrobinson@fedoraproject.org> - 2021.04-0.6.rc4
+- Update to 2021.04 RC4
+- Move to upstream fix for SMP on RPi3B and RPi3B+
+
+* Sat Mar 13 2021 Peter Robinson <pbrobinson@fedoraproject.org> - 2021.04-0.5.rc3
+- Fix for SMP on RPi3B and RPi3B+
+- Initial support for Pinephone 3Gb edition
+
+* Mon Mar 08 2021 Peter Robinson <pbrobinson@fedoraproject.org> - 2021.04-0.4.rc3
+- Update to 2021.04 RC3
+
+* Tue Feb 16 2021 Peter Robinson <pbrobinson@fedoraproject.org> - 2021.04-0.3.rc2
+- Update to 2021.04 RC2
+
+* Mon Feb 15 2021 Dennis Gilmore <dennis@ausil.us>
+- build spi and uart images in addition to mmc for helios4 and clearfog
+
+* Wed Feb 10 2021 Peter Robinson <pbrobinson@fedoraproject.org> - 2021.04-0.2.rc1
+- Fixes for network issues on some Allwinner devices
+
+* Mon Feb 01 2021 Peter Robinson <pbrobinson@fedoraproject.org> - 2021.04-0.1.rc1
+- Update to 2021.04 RC1
+- Add new upstream devices
+
+* Wed Jan 27 2021 Fedora Release Engineering <releng@fedoraproject.org> - 2021.01-2
+- Rebuilt for https://fedoraproject.org/wiki/Fedora_34_Mass_Rebuild
+
+* Mon Jan 11 2021 Peter Robinson <pbrobinson@fedoraproject.org> - 2021.01-1
+- Update to 2021.01 GA
+- Updates for Raspberry Pi 4 Series of devices
+
+* Tue Jan  5 2021 Peter Robinson <pbrobinson@fedoraproject.org> - 2021.01-0.5.rc5
+- Update to 2021.01 RC5
+
 * Sun Dec 27 2020 Peter Robinson <pbrobinson@fedoraproject.org> - 2021.01-0.4.rc4
 - Update to 2021.01 RC4
 - Latest RPi-400/CM4 support patch

uefi-distro-load-FDT-from-any-partition-on-boot-device.patch

@@ -1,7 +1,7 @@
-From cc3700b5c65494547308df395fe63166ff48a1e3 Mon Sep 17 00:00:00 2001
+From fd3434c754b3b8dddb345352a2434b6b8445343a Mon Sep 17 00:00:00 2001
 From: Peter Robinson <pbrobinson@gmail.com>
-Date: Tue, 24 Nov 2020 10:35:48 +0000
-Subject: [PATCH 1/2] distro: load FDT from any partition on boot device
+Date: Sun, 18 Apr 2021 14:05:45 +0100
+Subject: [PATCH] distro: load FDT from any partition on boot device
 
 In the EFI_LOADER boot path, we were only checking the FAT partition
 containing the EFI payload for dtb files.  But this is somewhat of a
@@ -22,17 +22,19 @@ knows) and SoC/board specific ${fdtfile} (which grub does not know).
 Signed-off-by: Rob Clark <robdclark@gmail.com>
 Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
 ---
- include/config_distro_bootcmd.h | 33 +++++++++++++++++++++++----------
- 1 file changed, 23 insertions(+), 10 deletions(-)
+ include/config_distro_bootcmd.h | 35 ++++++++++++++++++++++-----------
+ 1 file changed, 23 insertions(+), 12 deletions(-)
 
 diff --git a/include/config_distro_bootcmd.h b/include/config_distro_bootcmd.h
-index ff29ef5a905..769477cd80e 100644
+index 2627c2a6a5..eadd1080b3 100644
 --- a/include/config_distro_bootcmd.h
 +++ b/include/config_distro_bootcmd.h
-@@ -142,24 +142,37 @@
+@@ -148,26 +148,37 @@
+ 		"fi\0"                                                    \
+ 	\
  	"load_efi_dtb="                                                   \
- 		"load ${devtype} ${devnum}:${distro_bootpart} "           \
- 			"${fdt_addr_r} ${prefix}${efi_fdtfile}\0"         \
+-		"load ${devtype} ${devnum}:${distro_bootpart} "           \
+-			"${fdt_addr_r} ${prefix}${efi_fdtfile}\0"         \
 +		"load ${devtype} ${devnum}:${dtb_devp} "                  \
 +			"${fdt_addr_r} ${prefix}${efi_fdtfile} && "       \
 +		"run boot_efi_binary\0"                                   \
@@ -66,7 +68,7 @@ index ff29ef5a905..769477cd80e 100644
 +				"fi;"                                     \
 +			"done; "                                          \
 +		"done; "                                                  \
-+		"run boot_efi_bootmgr\0"                                  \
++		"run boot_efi_binary\0"                                   \
 +	"scan_dev_for_efi="                                               \
  		"if test -e ${devtype} ${devnum}:${distro_bootpart} "     \
  					"efi/boot/"BOOTEFI_NAME"; then "  \
@@ -78,5 +80,5 @@ index ff29ef5a905..769477cd80e 100644
  		"fi; "                                                    \
  		"setenv efi_fdtfile\0"
 -- 
-2.29.2
+2.31.1
 

uefi-use-Fedora-specific-path-name.patch

@@ -1,50 +0,0 @@
-From d8fcb72d566b0ebca1613555ac13c0798817487e Mon Sep 17 00:00:00 2001
-From: Peter Robinson <pbrobinson@gmail.com>
-Date: Tue, 24 Nov 2020 10:37:28 +0000
-Subject: [PATCH 2/2] use Fedora specific EFI path/name
-
-Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
----
- include/config_distro_bootcmd.h | 10 +++++-----
- 1 file changed, 5 insertions(+), 5 deletions(-)
-
-diff --git a/include/config_distro_bootcmd.h b/include/config_distro_bootcmd.h
-index 769477cd80e..22ce3685758 100644
---- a/include/config_distro_bootcmd.h
-+++ b/include/config_distro_bootcmd.h
-@@ -92,9 +92,9 @@
- 
- #ifdef CONFIG_EFI_LOADER
- #if defined(CONFIG_ARM64)
--#define BOOTEFI_NAME "bootaa64.efi"
-+#define BOOTEFI_NAME "grubaa64.efi"
- #elif defined(CONFIG_ARM)
--#define BOOTEFI_NAME "bootarm.efi"
-+#define BOOTEFI_NAME "grubarm.efi"
- #elif defined(CONFIG_X86_RUN_32BIT)
- #define BOOTEFI_NAME "bootia32.efi"
- #elif defined(CONFIG_X86_RUN_64BIT)
-@@ -132,7 +132,7 @@
- 	\
- 	"boot_efi_binary="                                                \
- 		"load ${devtype} ${devnum}:${distro_bootpart} "           \
--			"${kernel_addr_r} efi/boot/"BOOTEFI_NAME"; "      \
-+			"${kernel_addr_r} efi/fedora/"BOOTEFI_NAME"; "      \
- 		"if fdt addr ${fdt_addr_r}; then "                        \
- 			"bootefi ${kernel_addr_r} ${fdt_addr_r};"         \
- 		"else "                                                   \
-@@ -169,9 +169,9 @@
-		"run boot_efi_bootmgr\0"                                  \
- 	"scan_dev_for_efi="                                               \
- 		"if test -e ${devtype} ${devnum}:${distro_bootpart} "     \
--					"efi/boot/"BOOTEFI_NAME"; then "  \
-+					"efi/fedora/"BOOTEFI_NAME"; then " \
- 				"echo Found EFI removable media binary "  \
--					"efi/boot/"BOOTEFI_NAME"; "       \
-+					"efi/fedora/"BOOTEFI_NAME"; "     \
- 				"run scan_dev_for_dtb; "                  \
- 				"echo EFI LOAD FAILED: continuing...; "   \
- 		"fi; "                                                    \
--- 
-2.29.2
-

usb-kbd-fixes.patch

@@ -1,115 +0,0 @@
-From a49845f198af088c4e5e0019edbf519344d78c97 Mon Sep 17 00:00:00 2001
-From: Peter Robinson <pbrobinson@gmail.com>
-Date: Tue, 4 Dec 2018 15:29:14 +0000
-Subject: [PATCH] usb kbd fixes
-
-Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
----
- common/usb_kbd.c  | 66 +++++++++++++++++++++++++++++++++++------------
- include/console.h |  2 --
- 2 files changed, 50 insertions(+), 18 deletions(-)
-
-diff --git a/common/usb_kbd.c b/common/usb_kbd.c
-index 020f0d4117f..47674ce4458 100644
---- a/common/usb_kbd.c
-+++ b/common/usb_kbd.c
-@@ -518,25 +518,59 @@ static int probe_usb_keyboard(struct usb_device *dev)
- 		return error;
- 
- 	stdinname = env_get("stdin");
--#if CONFIG_IS_ENABLED(CONSOLE_MUX)
--	error = iomux_doenv(stdin, stdinname);
--	if (error)
--		return error;
--#else
--	/* Check if this is the standard input device. */
--	if (strcmp(stdinname, DEVNAME))
--		return 1;
-+	if (CONFIG_IS_ENABLED(CONSOLE_MUX)) {
-+		char *devname = DEVNAME;
-+		char *newstdin = NULL;
-+		/*
-+		 * stdin might not be set yet.. either way, with console-
-+		 * mux the sensible thing to do is add ourselves to the
-+		 * list of stdio devices:
-+		 */
-+		if (stdinname && !strstr(stdinname, DEVNAME)) {
-+			newstdin = malloc(strlen(stdinname) +
-+					strlen(","DEVNAME) + 1);
-+			sprintf(newstdin, "%s,"DEVNAME, stdinname);
-+			stdinname = newstdin;
-+		} else if (!stdinname) {
-+			stdinname = devname;
-+		}
-+		error = iomux_doenv(stdin, stdinname);
-+		free(newstdin);
-+		if (error)
-+			goto unregister_stdio;
-+	} else {
-+		/* Check if this is the standard input device. */
-+		if (strcmp(stdinname, DEVNAME)) {
-+			error = -1;
-+			goto unregister_stdio;
-+		}
- 
--	/* Reassign the console */
--	if (overwrite_console())
--		return 1;
-+		/* Reassign the console */
-+		if (overwrite_console()) {
-+			error = -1;
-+			goto unregister_stdio;
-+		}
- 
--	error = console_assign(stdin, DEVNAME);
--	if (error)
--		return error;
--#endif
-+		error = console_assign(stdin, DEVNAME);
-+		if (error)
-+			goto unregister_stdio;
-+	}
-+
-+	return 0;
- 
-+unregister_stdio:
-+	/*
-+	 * If probe fails, the device will be removed.. leaving dangling
-+	 * pointers if the stdio device is not unregistered.  If u-boot
-+	 * is built without stdio_deregister(), just pretend to succeed
-+	 * in order to avoid dangling pointers.
-+	 */
-+#if CONFIG_IS_ENABLED(SYS_STDIO_DEREGISTER)
-+	stdio_deregister(DEVNAME, 1);
-+	return error;
-+#else
- 	return 0;
-+#endif
- }
- 
- #if !CONFIG_IS_ENABLED(DM_USB)
-@@ -642,7 +676,7 @@ static int usb_kbd_remove(struct udevice *dev)
- 
- 	return 0;
- err:
--	printf("%s: warning, ret=%d", __func__, ret);
-+	printf("%s: warning, ret=%d\n", __func__, ret);
- 	return ret;
- }
- 
-diff --git a/include/console.h b/include/console.h
-index e935c601f12..6382ec8e0d6 100644
---- a/include/console.h
-+++ b/include/console.h
-@@ -56,8 +56,6 @@ int console_announce_r(void);
- /*
-  * CONSOLE multiplexing.
-  */
--#ifdef CONFIG_CONSOLE_MUX
- #include <iomux.h>
--#endif
- 
- #endif
--- 
-2.19.2
-