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2020.07 RC5

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Peter Robinson 2020-06-23 23:07:29 +01:00
parent aea19bdfee
commit f6357946c0
4 changed files with 264 additions and 602 deletions
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300
firmware-PSCI-Fix-PSCI-support-for-OF-live-trees.patch
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@ -1,300 +0,0 @@
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Subject: [PATCH 1/2] firmware: PSCI: Fix PSCI support for OF live trees
Date: Thu, 18 Jun 2020 12:54:38 +0100
Message-ID: <20200618115439.25100-1-jonathanh@nvidia.com>
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When CONFIG_OF_LIVE is enabled, dev_of_offset() cannot be used and
if used returns an invalid offset. This causes the call to
fdt_stringlist_get() in the psci_probe() to fail to read the 'method'
property from the PSCI node for the device and hence prevents PSCI
from working. Fix this by using the ofnode_read_string() API instead
of the fdt_stringlist_get() because this will handle reading the
property both when CONFIG_OF_LIVE is enabled or disabled.
Due to the above problem and since commit 81ea00838c68 ("efi_loader:
PSCI reset and shutdown") was added, the EFI system reset has been
broken for Tegra210 and Tegra196 platforms. This also fixes the EFI
system reset for these Tegra platforms.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
---
drivers/firmware/psci.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/firmware/psci.c b/drivers/firmware/psci.c
index e0d66d74f54d..23cf807591c4 100644
--- a/drivers/firmware/psci.c
+++ b/drivers/firmware/psci.c
@@ -67,11 +67,9 @@ static int psci_bind(struct udevice *dev)
static int psci_probe(struct udevice *dev)
{
- DECLARE_GLOBAL_DATA_PTR;
const char *method;
- method = fdt_stringlist_get(gd->fdt_blob, dev_of_offset(dev), "method",
- 0, NULL);
+ method = ofnode_read_string(dev_ofnode(dev), "method");
if (!method) {
pr_warn("missing \"method\" property\n");
return -ENXIO;
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Subject: [PATCH 2/2] ARM: tegra: Enable PSCI support for Tegra210 and Tegra186
Date: Thu, 18 Jun 2020 12:54:39 +0100
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The PSCI nodes are currently not populated for the Tegra210 and Tegra186
devices. This prevents the PSCI driver from being able to identify the
PSCI method used by these devices and causes the probe of the PSCI
driver to fail.
Since commit 81ea00838c68 ("efi_loader: PSCI reset and shutdown") was
added, which moves the PSCI EFI system reset handler into the PSCI
driver, this has prevented the EFI system reset from working for
Tegra210 and Tegra186. Therefore, populating these nodes is necessary
to fix the EFI system reset for Tegra210 and Tegra186.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
---
arch/arm/dts/tegra186.dtsi | 5 +++++
arch/arm/dts/tegra210.dtsi | 5 +++++
2 files changed, 10 insertions(+)
diff --git a/arch/arm/dts/tegra186.dtsi b/arch/arm/dts/tegra186.dtsi
index 0a9db9825b85..edcb7aacb8ee 100644
--- a/arch/arm/dts/tegra186.dtsi
+++ b/arch/arm/dts/tegra186.dtsi
@@ -335,4 +335,9 @@
status = "disabled";
};
};
+
+ psci {
+ compatible = "arm,psci-1.0";
+ method = "smc";
+ };
};
diff --git a/arch/arm/dts/tegra210.dtsi b/arch/arm/dts/tegra210.dtsi
index 3ec54b11c43f..a521a43d6cfd 100644
--- a/arch/arm/dts/tegra210.dtsi
+++ b/arch/arm/dts/tegra210.dtsi
@@ -867,6 +867,11 @@
};
};
+ psci {
+ compatible = "arm,psci-1.0";
+ method = "smc";
+ };
+
timer {
compatible = "arm,armv8-timer";
interrupts = <GIC_PPI 13

2
sources
View File

@ -1 +1 @@
SHA512 (u-boot-2020.07-rc4.tar.bz2) = 81fb2cfaabe2e20addc174798fa7f6506d51bd32aafac6698758417575bd85bb95d476b619e8d78480c0ccef6424f8b6de59c76bc48a555b7b4105acf194f3f8 SHA512 (u-boot-2020.07-rc5.tar.bz2) = a0a1d4749d29d2c86d4ba0d4c04ec6b0515ce2c7e3f335a1e9e2c9833ce6286f572b70be63d3e72cbb0fe3238ea0e0809152a83760f22cf1edf2de54075870b8

9
uboot-tools.spec
View File

@ -1,9 +1,9 @@
%global candidate rc4 %global candidate rc5
%global _default_patch_fuzz 2 %global _default_patch_fuzz 2
Name: uboot-tools Name: uboot-tools
Version: 2020.07 Version: 2020.07
Release: 0.4%{?candidate:.%{candidate}}%{?dist} Release: 0.5%{?candidate:.%{candidate}}%{?dist}
Summary: U-Boot utilities Summary: U-Boot utilities
License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+
URL: http://www.denx.de/wiki/U-Boot URL: http://www.denx.de/wiki/U-Boot
@ -26,8 +26,6 @@ Patch4: usb-kbd-fixes.patch
Patch5: dragonboard-fixes.patch Patch5: dragonboard-fixes.patch
# mmc fix # mmc fix
Patch6: mmc-sdhci-Fix-HISPD-bit-handling.patch Patch6: mmc-sdhci-Fix-HISPD-bit-handling.patch
# Fix PSCI on at least tegra
Patch7: firmware-PSCI-Fix-PSCI-support-for-OF-live-trees.patch
# Tegra improvements # Tegra improvements
Patch10: arm-tegra-define-fdtfile-option-for-distro-boot.patch Patch10: arm-tegra-define-fdtfile-option-for-distro-boot.patch
@ -254,6 +252,9 @@ cp -p board/warp7/README builds/docs/README.warp7
%endif %endif
%changelog %changelog
* Tue Jun 23 2020 Peter Robinson <pbrobinson@fedoraproject.org> - 2020.07-0.5.rc5
- 2020.07 RC5
* Thu Jun 18 2020 Peter Robinson <pbrobinson@fedoraproject.org> - 2020.07-0.4.rc4 * Thu Jun 18 2020 Peter Robinson <pbrobinson@fedoraproject.org> - 2020.07-0.4.rc4
- Update various patches to latest upstream - Update various patches to latest upstream

555
usb-xhci-Load-Raspberry-Pi-4-VL805-s-firmware.patch
View File

@ -1,33 +1,35 @@
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From: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> From: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
To: mbrugger@suse.com, u-boot@lists.denx.de, bmeng.cn@gmail.com, marex@denx.de, To: mbrugger@suse.com, u-boot@lists.denx.de, bmeng.cn@gmail.com,
linux-kernel@vger.kernel.org sjg@chromium.org, marex@denx.de
Cc: sjg@chromium.org, m.szyprowski@samsung.com, s.nawrocki@samsung.com, Cc: m.szyprowski@samsung.com, s.nawrocki@samsung.com,
mark.kettenis@xs4all.nl, Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Subject: [PATCH v4 1/5] arm: rpi: Add function to trigger VL805's firmware load Subject: [PATCH v5 1/4] arm: rpi: Add function to trigger VL805's firmware load
Date: Fri, 12 Jun 2020 18:46:29 +0200 Date: Mon, 22 Jun 2020 17:30:48 +0200
Message-Id: <20200612164632.25648-2-nsaenzjulienne@suse.de> Message-Id: <20200622153050.23193-2-nsaenzjulienne@suse.de>
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@ -82,7 +84,7 @@ Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
--- ---
Changes since v1: Changes since v1:
- Rename function so it's not mistaken with regular firmware loading - Rename function so it's not mistaken with regular firmware loading
---
arch/arm/mach-bcm283x/include/mach/mbox.h | 13 +++++++ arch/arm/mach-bcm283x/include/mach/mbox.h | 13 +++++++
arch/arm/mach-bcm283x/include/mach/msg.h | 7 ++++ arch/arm/mach-bcm283x/include/mach/msg.h | 7 ++++
arch/arm/mach-bcm283x/msg.c | 46 +++++++++++++++++++++++ arch/arm/mach-bcm283x/msg.c | 46 +++++++++++++++++++++++
@ -197,12 +199,13 @@ index 94b75283f8..347aece3cd 100644
+} +}
+ +
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From: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> From: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
To: mbrugger@suse.com, u-boot@lists.denx.de, bmeng.cn@gmail.com, marex@denx.de, To: mbrugger@suse.com, u-boot@lists.denx.de, bmeng.cn@gmail.com,
linux-kernel@vger.kernel.org sjg@chromium.org, marex@denx.de
Cc: sjg@chromium.org, m.szyprowski@samsung.com, s.nawrocki@samsung.com, Cc: m.szyprowski@samsung.com, s.nawrocki@samsung.com,
mark.kettenis@xs4all.nl, Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Subject: [PATCH v4 2/5] reset: Add Raspberry Pi 4 firmware reset controller Subject: [PATCH v5 2/4] reset: Add Raspberry Pi 4 firmware reset controller
Date: Fri, 12 Jun 2020 18:46:30 +0200 Date: Mon, 22 Jun 2020 17:30:49 +0200
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@ -402,12 +405,13 @@ index 0000000000..1a4f4c7927
+ +
+#endif +#endif
From patchwork Fri Jun 12 16:46:32 2020 From patchwork Mon Jun 22 15:30:50 2020
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From: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
To: mbrugger@suse.com, u-boot@lists.denx.de, bmeng.cn@gmail.com, marex@denx.de,
linux-kernel@vger.kernel.org
Cc: sjg@chromium.org, m.szyprowski@samsung.com, s.nawrocki@samsung.com,
mark.kettenis@xs4all.nl, Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Subject: [PATCH v4 4/5] dm: pci: Assign controller device node to root bridge
Date: Fri, 12 Jun 2020 18:46:32 +0200
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There is no distinction in DT between the PCI controller device and the
root bridge, whereas such distinction exists from dm's perspective. Make
sure the root bridge ofnode is assigned to the controller's platform
device node.
This permits setups like this to work correctly:
pcie {
compatible = "...";
...
dev {
reg = <0 0 0 0 0>;
...
};
};
Without this the dev node is assigned to the root bridge and the
actual device search starts one level lower than expected.
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
---
drivers/pci/pci-uclass.c | 15 ++++++++++++++-
1 file changed, 14 insertions(+), 1 deletion(-)
diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c
index 9ab3539a49..ea27e78465 100644
--- a/drivers/pci/pci-uclass.c
+++ b/drivers/pci/pci-uclass.c
@@ -762,7 +762,20 @@ static int pci_find_and_bind_driver(struct udevice *parent,
str = strdup(name);
if (!str)
return -ENOMEM;
- drv = bridge ? "pci_bridge_drv" : "pci_generic_drv";
+
+ if (bridge) {
+ drv = "pci_bridge_drv";
+
+ /*
+ * If we're dealing with the root bridge pass the parent device
+ * node, as there isn't a distinction in device tree between
+ * that and the actual controller platform device.
+ */
+ if (!PCI_MASK_BUS(bdf))
+ node = parent->node;
+ } else {
+ drv = "pci_generic_drv";
+ }
ret = device_bind_driver_to_node(parent, drv, str, node, devp);
if (ret) {
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From: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> From: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
To: mbrugger@suse.com, u-boot@lists.denx.de, bmeng.cn@gmail.com, marex@denx.de, To: mbrugger@suse.com, u-boot@lists.denx.de, bmeng.cn@gmail.com,
linux-kernel@vger.kernel.org sjg@chromium.org, marex@denx.de
Cc: sjg@chromium.org, m.szyprowski@samsung.com, s.nawrocki@samsung.com, Cc: m.szyprowski@samsung.com, s.nawrocki@samsung.com,
mark.kettenis@xs4all.nl, Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Subject: [PATCH v4 5/5] usb: xhci-pci: Add reset controller support Subject: [PATCH v5 3/4] configs: Enable support for reset controllers on RPi4
Date: Fri, 12 Jun 2020 18:46:33 +0200 Date: Mon, 22 Jun 2020 17:30:50 +0200
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@ -604,101 +482,10 @@ Sender: "U-Boot" <u-boot-bounces@lists.denx.de>
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Some atypical users of xhci-pci might need to manually reset their xHCI
controller before starting the HCD setup. Check if a reset controller
device is available to the PCI bus and trigger a reset.
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
---
drivers/usb/host/xhci-pci.c | 38 +++++++++++++++++++++++++++++++++++--
1 file changed, 36 insertions(+), 2 deletions(-)
diff --git a/drivers/usb/host/xhci-pci.c b/drivers/usb/host/xhci-pci.c
index 9fb6d2f763..710524fbb1 100644
--- a/drivers/usb/host/xhci-pci.c
+++ b/drivers/usb/host/xhci-pci.c
@@ -10,9 +10,14 @@
#include <init.h>
#include <log.h>
#include <pci.h>
+#include <reset.h>
#include <usb.h>
#include <usb/xhci.h>
+struct xhci_pci_platdata {
+ struct reset_ctl reset;
+};
+
static void xhci_pci_init(struct udevice *dev, struct xhci_hccr **ret_hccr,
struct xhci_hcor **ret_hcor)
{
@@ -39,14 +44,43 @@ static void xhci_pci_init(struct udevice *dev, struct xhci_hccr **ret_hccr,
static int xhci_pci_probe(struct udevice *dev)
{
+ struct xhci_pci_platdata *plat = dev_get_platdata(dev);
struct xhci_hccr *hccr;
struct xhci_hcor *hcor;
+ int ret;
+
+ ret = reset_get_by_index(dev, 0, &plat->reset);
+ if (ret && ret != -ENOENT) {
+ dev_err(dev, "failed to get reset\n");
+ return ret;
+ }
+
+ if (reset_valid(&plat->reset)) {
+ ret = reset_assert(&plat->reset);
+ if (ret)
+ return ret;
+
+ ret = reset_deassert(&plat->reset);
+ if (ret)
+ return ret;
+ }
xhci_pci_init(dev, &hccr, &hcor);
return xhci_register(dev, hccr, hcor);
}
+static int xhci_pci_remove(struct udevice *dev)
+{
+ struct xhci_pci_platdata *plat = dev_get_platdata(dev);
+
+ xhci_deregister(dev);
+ if (reset_valid(&plat->reset))
+ reset_free(&plat->reset);
+
+ return 0;
+}
+
static const struct udevice_id xhci_pci_ids[] = {
{ .compatible = "xhci-pci" },
{ }
@@ -56,10 +90,10 @@ U_BOOT_DRIVER(xhci_pci) = {
.name = "xhci_pci",
.id = UCLASS_USB,
.probe = xhci_pci_probe,
- .remove = xhci_deregister,
+ .remove = xhci_pci_remove,
.of_match = xhci_pci_ids,
.ops = &xhci_usb_ops,
- .platdata_auto_alloc_size = sizeof(struct usb_platdata),
+ .platdata_auto_alloc_size = sizeof(struct xhci_pci_platdata),
.priv_auto_alloc_size = sizeof(struct xhci_ctrl),
.flags = DM_FLAG_ALLOC_PRIV_DMA,
};
From f9dfaab9a697f7e1c6456bf7e05eaba39394688c Mon Sep 17 00:00:00 2001
From: Peter Robinson <pbrobinson@gmail.com>
Date: Thu, 18 Jun 2020 14:24:13 +0100
Subject: [PATCH] configs: Enable support for reset controllers on RPi4
This is required in order to access the reset controller used to This is required in order to access the reset controller used to
initialize the board's xHCI chip. initialize the board's xHCI chip.
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
--- ---
configs/rpi_4_32b_defconfig | 1 + configs/rpi_4_32b_defconfig | 1 +
configs/rpi_4_defconfig | 1 + configs/rpi_4_defconfig | 1 +
@ -706,11 +493,11 @@ Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
3 files changed, 3 insertions(+) 3 files changed, 3 insertions(+)
diff --git a/configs/rpi_4_32b_defconfig b/configs/rpi_4_32b_defconfig diff --git a/configs/rpi_4_32b_defconfig b/configs/rpi_4_32b_defconfig
index a36a249540..0df5c17d6e 100644 index b0797373b5..00c8d963ab 100644
--- a/configs/rpi_4_32b_defconfig --- a/configs/rpi_4_32b_defconfig
+++ b/configs/rpi_4_32b_defconfig +++ b/configs/rpi_4_32b_defconfig
@@ -28,6 +28,7 @@ CONFIG_DM_ETH=y @@ -35,6 +35,7 @@ CONFIG_DM_PCI=y
CONFIG_BCMGENET=y CONFIG_PCI_BRCMSTB=y
CONFIG_PINCTRL=y CONFIG_PINCTRL=y
# CONFIG_PINCTRL_GENERIC is not set # CONFIG_PINCTRL_GENERIC is not set
+CONFIG_DM_RESET=y +CONFIG_DM_RESET=y
@ -718,11 +505,11 @@ index a36a249540..0df5c17d6e 100644
CONFIG_USB=y CONFIG_USB=y
CONFIG_DM_USB=y CONFIG_DM_USB=y
diff --git a/configs/rpi_4_defconfig b/configs/rpi_4_defconfig diff --git a/configs/rpi_4_defconfig b/configs/rpi_4_defconfig
index f0301dc8bc..7034eb439b 100644 index 932b768164..c73eccb61c 100644
--- a/configs/rpi_4_defconfig --- a/configs/rpi_4_defconfig
+++ b/configs/rpi_4_defconfig +++ b/configs/rpi_4_defconfig
@@ -28,6 +28,7 @@ CONFIG_DM_ETH=y @@ -35,6 +35,7 @@ CONFIG_DM_PCI=y
CONFIG_BCMGENET=y CONFIG_PCI_BRCMSTB=y
CONFIG_PINCTRL=y CONFIG_PINCTRL=y
# CONFIG_PINCTRL_GENERIC is not set # CONFIG_PINCTRL_GENERIC is not set
+CONFIG_DM_RESET=y +CONFIG_DM_RESET=y
@ -730,17 +517,191 @@ index f0301dc8bc..7034eb439b 100644
CONFIG_USB=y CONFIG_USB=y
CONFIG_DM_USB=y CONFIG_DM_USB=y
diff --git a/configs/rpi_arm64_defconfig b/configs/rpi_arm64_defconfig diff --git a/configs/rpi_arm64_defconfig b/configs/rpi_arm64_defconfig
index d16c2388af..3663a17048 100644 index 855afcf1cf..800b51e6f5 100644
--- a/configs/rpi_arm64_defconfig --- a/configs/rpi_arm64_defconfig
+++ b/configs/rpi_arm64_defconfig +++ b/configs/rpi_arm64_defconfig
@@ -28,6 +28,7 @@ CONFIG_DM_ETH=y @@ -32,6 +32,7 @@ CONFIG_DM_PCI=y
CONFIG_BCMGENET=y CONFIG_PCI_BRCMSTB=y
CONFIG_PINCTRL=y CONFIG_PINCTRL=y
# CONFIG_PINCTRL_GENERIC is not set # CONFIG_PINCTRL_GENERIC is not set
+CONFIG_DM_RESET=y +CONFIG_DM_RESET=y
# CONFIG_REQUIRE_SERIAL_CONSOLE is not set # CONFIG_REQUIRE_SERIAL_CONSOLE is not set
CONFIG_USB=y CONFIG_USB=y
CONFIG_DM_USB=y CONFIG_DM_USB=y
--
2.26.2
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From: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
To: mbrugger@suse.com, u-boot@lists.denx.de, bmeng.cn@gmail.com,
sjg@chromium.org, marex@denx.de
Cc: m.szyprowski@samsung.com, s.nawrocki@samsung.com,
Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Subject: [PATCH v5 4/4] usb: xhci: Add reset controller support
Date: Mon, 22 Jun 2020 17:30:51 +0200
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Some atypical users of xhci might need to manually reset their xHCI
controller before starting the HCD setup. Check if a reset controller
device is available to the PCI bus and trigger a reset.
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
---
Changes since v3:
- Move reset support to xchi core
drivers/usb/host/xhci-mem.c | 2 ++
drivers/usb/host/xhci.c | 33 +++++++++++++++++++++++++++++++++
include/usb/xhci.h | 2 ++
3 files changed, 37 insertions(+)
diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c
index f446520528..108f4bd8cf 100644
--- a/drivers/usb/host/xhci-mem.c
+++ b/drivers/usb/host/xhci-mem.c
@@ -180,6 +180,8 @@ void xhci_cleanup(struct xhci_ctrl *ctrl)
xhci_free_virt_devices(ctrl);
free(ctrl->erst.entries);
free(ctrl->dcbaa);
+ if (reset_valid(&ctrl->reset))
+ reset_free(&ctrl->reset);
memset(ctrl, '\0', sizeof(struct xhci_ctrl));
}
diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c
index ebd2954571..03b41cc855 100644
--- a/drivers/usb/host/xhci.c
+++ b/drivers/usb/host/xhci.c
@@ -190,6 +190,35 @@ static int xhci_start(struct xhci_hcor *hcor)
return ret;
}
+/**
+ * Resets XHCI Hardware
+ *
+ * @param ctrl pointer to host controller
+ * @return 0 if OK, or a negative error code.
+ */
+static int xhci_reset_hw(struct xhci_ctrl *ctrl)
+{
+ int ret;
+
+ ret = reset_get_by_index(ctrl->dev, 0, &ctrl->reset);
+ if (ret && ret != -ENOENT) {
+ dev_err(ctrl->dev, "failed to get reset\n");
+ return ret;
+ }
+
+ if (reset_valid(&ctrl->reset)) {
+ ret = reset_assert(&ctrl->reset);
+ if (ret)
+ return ret;
+
+ ret = reset_deassert(&ctrl->reset);
+ if (ret)
+ return ret;
+ }
+
+ return 0;
+}
+
/**
* Resets the XHCI Controller
*
@@ -1508,6 +1537,10 @@ int xhci_register(struct udevice *dev, struct xhci_hccr *hccr,
ctrl->dev = dev;
+ ret = xhci_reset_hw(ctrl);
+ if (ret)
+ goto err;
+
/*
* XHCI needs to issue a Address device command to setup
* proper device context structures, before it can interact
diff --git a/include/usb/xhci.h b/include/usb/xhci.h
index 1170c0ac69..7d34103fd5 100644
--- a/include/usb/xhci.h
+++ b/include/usb/xhci.h
@@ -16,6 +16,7 @@
#ifndef HOST_XHCI_H_
#define HOST_XHCI_H_
+#include <reset.h>
#include <asm/types.h>
#include <asm/cache.h>
#include <asm/io.h>
@@ -1209,6 +1210,7 @@ struct xhci_ctrl {
#if CONFIG_IS_ENABLED(DM_USB)
struct udevice *dev;
#endif
+ struct reset_ctl reset;
struct xhci_hccr *hccr; /* R/O registers, not need for volatile */
struct xhci_hcor *hcor;
struct xhci_doorbell_array *dba;