diff --git a/rockchip-Fix-SPI-boot-on-Pinebook-Pro-Puma-and-RK3399-ROC-PC.patch b/rockchip-Fix-SPI-boot-on-Pinebook-Pro-Puma-and-RK3399-ROC-PC.patch new file mode 100644 index 0000000..39f9bb5 --- /dev/null +++ b/rockchip-Fix-SPI-boot-on-Pinebook-Pro-Puma-and-RK3399-ROC-PC.patch @@ -0,0 +1,517 @@ +From patchwork Sun Nov 22 13:03:44 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Hugh Cole-Baker +X-Patchwork-Id: 1404474 +X-Patchwork-Delegate: ykai007@gmail.com +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; + spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de + (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; receiver=) +Authentication-Results: ozlabs.org; + dmarc=pass (p=none dis=none) header.from=gmail.com +Authentication-Results: ozlabs.org; + dkim=pass (2048-bit key; + unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 + header.s=20161025 header.b=P6CnMO7U; + dkim-atps=neutral +Received: from phobos.denx.de (phobos.denx.de + [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) + (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) + key-exchange X25519 server-signature RSA-PSS (4096 bits)) + (No client certificate requested) + by ozlabs.org (Postfix) with ESMTPS id 4Cf9VN30jjz9sT6 + for ; Mon, 23 Nov 2020 00:04:41 +1100 (AEDT) +Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) + by phobos.denx.de (Postfix) with ESMTP id CE775825A1; + Sun, 22 Nov 2020 14:04:18 +0100 (CET) +Authentication-Results: phobos.denx.de; + dmarc=pass (p=none dis=none) header.from=gmail.com +Authentication-Results: phobos.denx.de; + spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de +Authentication-Results: phobos.denx.de; + dkim=pass (2048-bit key; + unprotected) header.d=gmail.com header.i=@gmail.com header.b="P6CnMO7U"; + dkim-atps=neutral +Received: by phobos.denx.de (Postfix, from userid 109) + id 74E088257F; Sun, 22 Nov 2020 14:04:13 +0100 (CET) +X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de +X-Spam-Level: +X-Spam-Status: No, score=-2.0 required=5.0 tests=BAYES_00,DKIM_SIGNED, + DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FROM,SPF_HELO_NONE,URIBL_BLOCKED + autolearn=ham autolearn_force=no version=3.4.2 +Received: from mail-wr1-x441.google.com (mail-wr1-x441.google.com + [IPv6:2a00:1450:4864:20::441]) + (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) + (No client certificate requested) + by phobos.denx.de (Postfix) with ESMTPS id 898AE82564 + for ; Sun, 22 Nov 2020 14:04:09 +0100 (CET) +Authentication-Results: phobos.denx.de; + dmarc=pass (p=none dis=none) header.from=gmail.com +Authentication-Results: phobos.denx.de; + spf=pass smtp.mailfrom=sigmaris@gmail.com +Received: by mail-wr1-x441.google.com with SMTP id l1so15714256wrb.9 + for ; Sun, 22 Nov 2020 05:04:09 -0800 (PST) +DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; + h=from:to:cc:subject:date:message-id:in-reply-to:references + :mime-version:content-transfer-encoding; + bh=6SYQmHVr0D0O3wWmxMfhj7ZKtMAcYMPC+fsr+GotKTs=; + b=P6CnMO7Up+Z5K5CbVzKd4H/2QN8yjMOXmyDou0LODbNDm9Bk5yNIT7IPUTNgCi7OHU + MCkWj1sA/Y0Vy7be+3ft1nvEIh1fY6E44ffw6tGcvGUf7rDXyQvyAZ6zSd8IHyqI44Xq + dzs/KERwAULCzSHt9OQNGYDnv3bKJAfGhh5t+nfR8z8/9ssONR3q18wKQEJ1X5eFO/IK + butM9Dq2sfJ0e15aYShs2Ku0k641pHX6ur5zSujD46MVhPApRhbHN9pbTAdmBmFb5cpk + taUyiQmhmHxj8oclIibEwDHS/0ygI7OmaEfDZRoYa5K8U6dp7hqDb9iZHasNsyBYRHs+ + Iuyg== +X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; + d=1e100.net; s=20161025; + h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to + :references:mime-version:content-transfer-encoding; + bh=6SYQmHVr0D0O3wWmxMfhj7ZKtMAcYMPC+fsr+GotKTs=; + b=mQwI4z7mnmNifc4yfgZj/vpgd1vQW9IOxjw2r3+sk+pRuJ6SjrjPsFmnfU8d1CfA5X + /IgzqDbWRhYtjMPiXe0VbrS8HfI5Fqps/BFq2BjN+zrER/ZUKC0MSkv7XsYQmM3UoFgo + ysyImd1T8hkM2fcsg0idMJ1AAY2Mtol2oKwHm+F5kW054bkSUo2mWpGRJE/RUTGMJYzP + oGu6T7V/CLjZCuWNJkpzwzCY7BoyLnirZ+EH4mMGkxJgZ4NdZIl+DVP0kcbSgNLTDMhy + JTF57D+dog/31smuIZ38Xtiee9OlTyoaTQzEN8+1zfHSevwQyUD48xyKcLFA2DVAYtYP + X4wQ== +X-Gm-Message-State: AOAM533BH77QNc2JvGEEMb3O1vShAryk75TxbZD57eNvHYZ5XNi0l3Nd + Hi9Vz0PAFdp4uFVQjchxkUeQHvOpOpzcpA== +X-Google-Smtp-Source: + ABdhPJzsTBCcXrYUm/5t74Gtg0n/vpUspyjdh6Ua796/vUxpSvKtaPDvdYxfFz+jaI/Ujmpb8WJFOw== +X-Received: by 2002:a5d:5183:: with SMTP id k3mr5107660wrv.62.1606050248908; + Sun, 22 Nov 2020 05:04:08 -0800 (PST) +Received: from apple.sigmaris.info (ebrouter.sigmaris.info. [82.69.107.165]) + by smtp.gmail.com with ESMTPSA id i6sm10968566wma.42.2020.11.22.05.04.08 + (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); + Sun, 22 Nov 2020 05:04:08 -0800 (PST) +From: Hugh Cole-Baker +To: U-Boot Mailing List +Cc: Hugh Cole-Baker , Simon Glass , + Kever Yang , + Peter Robinson , + Philipp Tomsich +Subject: [PATCH v2 1/3] rockchip: pinebook-pro: default to SPI bus 1 for + SPI-flash +Date: Sun, 22 Nov 2020 13:03:44 +0000 +Message-Id: <20201122130346.11621-2-sigmaris@gmail.com> +X-Mailer: git-send-email 2.24.3 (Apple Git-128) +In-Reply-To: <20201122130346.11621-1-sigmaris@gmail.com> +References: <20201122130346.11621-1-sigmaris@gmail.com> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.34 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de +X-Virus-Status: Clean + +SPI flash on this machine is located on bus 1, default to using bus 1 +for SPI flash and stop aliasing it to bus 0. + +Signed-off-by: Hugh Cole-Baker +Suggested-by: Simon Glass +Fixes: c4cea2bb ("rockchip: Enable building a SPI ROM image on bob") +--- + +(no changes since v1) + + arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi | 4 ---- + configs/pinebook-pro-rk3399_defconfig | 2 ++ + 2 files changed, 2 insertions(+), 4 deletions(-) + +diff --git a/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi b/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi +index ded7db0aeff..ee3b98698e6 100644 +--- a/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi ++++ b/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi +@@ -7,10 +7,6 @@ + #include "rk3399-sdram-lpddr4-100.dtsi" + + / { +- aliases { +- spi0 = &spi1; +- }; +- + chosen { + u-boot,spl-boot-order = "same-as-spl", &sdhci, &spiflash, &sdmmc; + }; +diff --git a/configs/pinebook-pro-rk3399_defconfig b/configs/pinebook-pro-rk3399_defconfig +index 1ed54ad0eda..ef00ad92c45 100644 +--- a/configs/pinebook-pro-rk3399_defconfig ++++ b/configs/pinebook-pro-rk3399_defconfig +@@ -37,6 +37,7 @@ CONFIG_SPL_OF_CONTROL=y + CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" + CONFIG_ENV_IS_IN_SPI_FLASH=y + CONFIG_SYS_RELOC_GD_ENV_ADDR=y ++CONFIG_SPL_DM_SEQ_ALIAS=y + CONFIG_ROCKCHIP_GPIO=y + CONFIG_SYS_I2C_ROCKCHIP=y + CONFIG_DM_KEYBOARD=y +@@ -49,6 +50,7 @@ CONFIG_MMC_DW_ROCKCHIP=y + CONFIG_MMC_SDHCI=y + CONFIG_MMC_SDHCI_SDMA=y + CONFIG_MMC_SDHCI_ROCKCHIP=y ++CONFIG_SF_DEFAULT_BUS=1 + CONFIG_SF_DEFAULT_SPEED=20000000 + CONFIG_SPI_FLASH_GIGADEVICE=y + CONFIG_SPI_FLASH_WINBOND=y + +From patchwork Sun Nov 22 13:03:45 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Hugh Cole-Baker +X-Patchwork-Id: 1404476 +X-Patchwork-Delegate: ykai007@gmail.com +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; 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[82.69.107.165]) + by smtp.gmail.com with ESMTPSA id i6sm10968566wma.42.2020.11.22.05.04.11 + (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); + Sun, 22 Nov 2020 05:04:11 -0800 (PST) +From: Hugh Cole-Baker +To: U-Boot Mailing List +Cc: Hugh Cole-Baker , Simon Glass , + Jagan Teki , + Kever Yang , Levin Du , + Philipp Tomsich , + Suniel Mahesh +Subject: [PATCH v2 2/3] rockchip: rk3399-roc-pc: default to SPI bus 1 for + SPI-flash +Date: Sun, 22 Nov 2020 13:03:45 +0000 +Message-Id: <20201122130346.11621-3-sigmaris@gmail.com> +X-Mailer: git-send-email 2.24.3 (Apple Git-128) +In-Reply-To: <20201122130346.11621-1-sigmaris@gmail.com> +References: <20201122130346.11621-1-sigmaris@gmail.com> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.34 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de +X-Virus-Status: Clean + +SPI flash on this board is located on bus 1, default to using bus 1 for +SPI flash on both rk3399-roc-pc and -mezzanine, and stop aliasing it to +bus 0. + +Signed-off-by: Hugh Cole-Baker +Suggested-by: Simon Glass +Fixes: c4cea2bb ("rockchip: Enable building a SPI ROM image on bob") +--- + +(no changes since v1) + + arch/arm/dts/rk3399-roc-pc-u-boot.dtsi | 4 ---- + configs/roc-pc-mezzanine-rk3399_defconfig | 1 + + configs/roc-pc-rk3399_defconfig | 1 + + 3 files changed, 2 insertions(+), 4 deletions(-) + +diff --git a/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi b/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi +index fc155e69036..e3c9364e359 100644 +--- a/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi ++++ b/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi +@@ -7,10 +7,6 @@ + #include "rk3399-sdram-lpddr4-100.dtsi" + + / { +- aliases { +- spi0 = &spi1; +- }; +- + chosen { + u-boot,spl-boot-order = "same-as-spl", &spi_flash, &sdhci, &sdmmc; + }; +diff --git a/configs/roc-pc-mezzanine-rk3399_defconfig b/configs/roc-pc-mezzanine-rk3399_defconfig +index ae16f3558a3..8aa5a155180 100644 +--- a/configs/roc-pc-mezzanine-rk3399_defconfig ++++ b/configs/roc-pc-mezzanine-rk3399_defconfig +@@ -42,6 +42,7 @@ CONFIG_MMC_DW=y + CONFIG_MMC_DW_ROCKCHIP=y + CONFIG_MMC_SDHCI=y + CONFIG_MMC_SDHCI_ROCKCHIP=y ++CONFIG_SF_DEFAULT_BUS=1 + CONFIG_SPI_FLASH_WINBOND=y + CONFIG_DM_ETH=y + CONFIG_ETH_DESIGNWARE=y +diff --git a/configs/roc-pc-rk3399_defconfig b/configs/roc-pc-rk3399_defconfig +index 774707b115b..927b57685d9 100644 +--- a/configs/roc-pc-rk3399_defconfig ++++ b/configs/roc-pc-rk3399_defconfig +@@ -41,6 +41,7 @@ CONFIG_MMC_DW=y + CONFIG_MMC_DW_ROCKCHIP=y + CONFIG_MMC_SDHCI=y + CONFIG_MMC_SDHCI_ROCKCHIP=y ++CONFIG_SF_DEFAULT_BUS=1 + CONFIG_SPI_FLASH_WINBOND=y + CONFIG_DM_ETH=y + CONFIG_ETH_DESIGNWARE=y + +From patchwork Sun Nov 22 13:03:46 2020 +Content-Type: text/plain; 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[82.69.107.165]) + by smtp.gmail.com with ESMTPSA id i6sm10968566wma.42.2020.11.22.05.04.15 + (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); + Sun, 22 Nov 2020 05:04:15 -0800 (PST) +From: Hugh Cole-Baker +To: U-Boot Mailing List +Cc: Hugh Cole-Baker , + Kever Yang , + Heiko Stuebner , + Jagan Teki , + Klaus Goger , + Peter Robinson , + Philipp Tomsich , + Simon Glass +Subject: [PATCH v2 3/3] rockchip: puma-haikou: default to SPI bus 1 for + SPI-flash +Date: Sun, 22 Nov 2020 13:03:46 +0000 +Message-Id: <20201122130346.11621-4-sigmaris@gmail.com> +X-Mailer: git-send-email 2.24.3 (Apple Git-128) +In-Reply-To: <20201122130346.11621-1-sigmaris@gmail.com> +References: <20201122130346.11621-1-sigmaris@gmail.com> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.34 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de +X-Virus-Status: Clean + +SPI flash on this machine is located on bus 1, default to using bus 1 +for SPI flash and stop aliasing it to bus 0. Formerly the alias spi1 +pointed to &spi5, use an alias spi5 for this instead. + +Signed-off-by: Hugh Cole-Baker +Suggested-by: Kever Yang +--- + +Changes in v2: +New patch. + + arch/arm/dts/rk3399-puma-haikou-u-boot.dtsi | 3 +-- + configs/puma-rk3399_defconfig | 2 ++ + 2 files changed, 3 insertions(+), 2 deletions(-) + +diff --git a/arch/arm/dts/rk3399-puma-haikou-u-boot.dtsi b/arch/arm/dts/rk3399-puma-haikou-u-boot.dtsi +index 29846c4b001..e7a1aea3a56 100644 +--- a/arch/arm/dts/rk3399-puma-haikou-u-boot.dtsi ++++ b/arch/arm/dts/rk3399-puma-haikou-u-boot.dtsi +@@ -28,8 +28,7 @@ + }; + + aliases { +- spi0 = &spi1; +- spi1 = &spi5; ++ spi5 = &spi5; + }; + + /* +diff --git a/configs/puma-rk3399_defconfig b/configs/puma-rk3399_defconfig +index 60178e3754c..0f15936c2d6 100644 +--- a/configs/puma-rk3399_defconfig ++++ b/configs/puma-rk3399_defconfig +@@ -44,6 +44,7 @@ CONFIG_ENV_OVERWRITE=y + CONFIG_ENV_IS_IN_MMC=y + CONFIG_SYS_RELOC_GD_ENV_ADDR=y + CONFIG_SYS_MMC_ENV_DEV=1 ++CONFIG_SPL_DM_SEQ_ALIAS=y + CONFIG_ROCKCHIP_GPIO=y + CONFIG_SYS_I2C_ROCKCHIP=y + CONFIG_MISC=y +@@ -53,6 +54,7 @@ CONFIG_MMC_DW_ROCKCHIP=y + CONFIG_MMC_SDHCI=y + CONFIG_MMC_SDHCI_SDMA=y + CONFIG_MMC_SDHCI_ROCKCHIP=y ++CONFIG_SF_DEFAULT_BUS=1 + CONFIG_SF_DEFAULT_SPEED=20000000 + CONFIG_SPI_FLASH_GIGADEVICE=y + CONFIG_SPI_FLASH_WINBOND=y diff --git a/sources b/sources index bd7ffdd..7215d7b 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2021.01-rc4.tar.bz2) = 6de2c60d02276f4eed31b5baf2d8239ad0af30c9d341339a4cd7fa0786068cb5faa1ab8bd0b4155e536962e1a4869906f60f1d2a1e50b0ed15e98c2e84d6a97b +SHA512 (u-boot-2021.01-rc5.tar.bz2) = bfc9524860c9557777048350c4081d6068a4bddb354b1896240f415a17559df4dd403609b244adfe23316e8c68ae1ed1fce3412649413a2cccd9033f23b5390a diff --git a/uboot-tools.spec b/uboot-tools.spec index 768452c..6c5bdbd 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,8 +1,8 @@ -%global candidate rc4 +%global candidate rc5 Name: uboot-tools Version: 2021.01 -Release: 0.4%{?candidate:.%{candidate}}%{?dist} +Release: 0.5%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -24,8 +24,6 @@ Patch3: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch #Patch4: rockchip-spl-u-boot-itb-offset.patch # Board fixes and enablement -Patch5: Raspberry-Pi-400-Compute-Module-4-support.patch -Patch6: rng-Add-iProc-RNG200-driver.patch # AllWinner improvements Patch10: AllWinner-PineTab.patch Patch11: sunxi-add-PineCube-board.patch @@ -35,6 +33,10 @@ Patch13: 0001-Fix-BeagleAI-detection.patch # Rockchips improvements Patch14: arm-rk3399-enable-rng-on-rock960-and-firefly3399.patch Patch15: rk3399-Pinebook-pro-EDP-support.patch +Patch16: rockchip-Fix-SPI-boot-on-Pinebook-Pro-Puma-and-RK3399-ROC-PC.patch +# Raspberry Pi improvements +Patch17: Raspberry-Pi-400-Compute-Module-4-support.patch +Patch18: rng-Add-iProc-RNG200-driver.patch BuildRequires: bc BuildRequires: dtc @@ -235,6 +237,9 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Tue Jan 5 2021 Peter Robinson - 2021.01-0.5.rc5 +- Update to 2021.01 RC5 + * Sun Dec 27 2020 Peter Robinson - 2021.01-0.4.rc4 - Update to 2021.01 RC4 - Latest RPi-400/CM4 support patch