2021.04 RC3

This commit is contained in:
Peter Robinson 2021-03-08 14:59:13 +00:00
parent 3fb46c33cd
commit f458c5418f
6 changed files with 1006 additions and 1908 deletions

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@ -1,64 +0,0 @@
From ced27461c009f208f880fa6bbc34c216e103eca6 Mon Sep 17 00:00:00 2001
From: Peter Robinson <pbrobinson@gmail.com>
Date: Mon, 1 Feb 2021 21:39:36 +0000
Subject: [PATCH] Raspberry Pi 4 PCIe handover
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
---
drivers/pci/pcie_brcmstb.c | 19 +++++++++++++++++++
drivers/usb/host/xhci-pci.c | 2 +-
2 files changed, 20 insertions(+), 1 deletion(-)
diff --git a/drivers/pci/pcie_brcmstb.c b/drivers/pci/pcie_brcmstb.c
index bd645d7896..398d7e1849 100644
--- a/drivers/pci/pcie_brcmstb.c
+++ b/drivers/pci/pcie_brcmstb.c
@@ -577,6 +577,24 @@ static int brcm_pcie_probe(struct udevice *dev)
return 0;
}
+static int brcm_pcie_remove(struct udevice *dev)
+{
+ struct brcm_pcie *pcie = dev_get_priv(dev);
+ void __iomem *base = pcie->base;
+
+ /* Assert fundamental reset */
+ setbits_le32(base + PCIE_RGR1_SW_INIT_1, RGR1_SW_INIT_1_PERST_MASK);
+
+ /* Turn off SerDes */
+ setbits_le32(base + PCIE_MISC_HARD_PCIE_HARD_DEBUG,
+ PCIE_HARD_DEBUG_SERDES_IDDQ_MASK);
+
+ /* Shutdown bridge */
+ setbits_le32(base + PCIE_RGR1_SW_INIT_1, RGR1_SW_INIT_1_INIT_MASK);
+
+ return 0;
+}
+
static int brcm_pcie_of_to_plat(struct udevice *dev)
{
struct brcm_pcie *pcie = dev_get_priv(dev);
@@ -616,6 +634,7 @@ U_BOOT_DRIVER(pcie_brcm_base) = {
.ops = &brcm_pcie_ops,
.of_match = brcm_pcie_ids,
.probe = brcm_pcie_probe,
+ .remove = brcm_pcie_remove,
.of_to_plat = brcm_pcie_of_to_plat,
.priv_auto = sizeof(struct brcm_pcie),
};
diff --git a/drivers/usb/host/xhci-pci.c b/drivers/usb/host/xhci-pci.c
index 2b445f21b5..d626929953 100644
--- a/drivers/usb/host/xhci-pci.c
+++ b/drivers/usb/host/xhci-pci.c
@@ -61,7 +61,7 @@ U_BOOT_DRIVER(xhci_pci) = {
.ops = &xhci_usb_ops,
.plat_auto = sizeof(struct usb_plat),
.priv_auto = sizeof(struct xhci_ctrl),
- .flags = DM_FLAG_ALLOC_PRIV_DMA,
+ .flags = DM_FLAG_OS_PREPARE | DM_FLAG_ALLOC_PRIV_DMA,
};
static struct pci_device_id xhci_pci_supported[] = {
--
2.29.2

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Matthias Brugger <mbrugger@suse.com>
Subject: [PATCH v2 1/2] rng: Add iProc RNG200 driver
Date: Tue, 15 Dec 2020 10:49:23 +0100
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From: Matthias Brugger <mbrugger@suse.com>
Add support for random number generator RNG200.
This is for example found on RPi4.
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
---
Changes in v2: None
drivers/rng/Kconfig | 6 ++
drivers/rng/Makefile | 1 +
drivers/rng/iproc_rng200.c | 186 +++++++++++++++++++++++++++++++++++++
3 files changed, 193 insertions(+)
create mode 100644 drivers/rng/iproc_rng200.c
diff --git a/drivers/rng/Kconfig b/drivers/rng/Kconfig
index 11001c8ae7..94915d45b3 100644
--- a/drivers/rng/Kconfig
+++ b/drivers/rng/Kconfig
@@ -46,4 +46,10 @@ config RNG_ROCKCHIP
Enable random number generator for rockchip.This driver is
support rng module of crypto v1 and crypto v2.
+config RNG_IPROC200
+ bool "Broadcom iProc RNG200 random number generator"
+ depends on DM_RNG
+ default n
+ help
+ Enable random number generator for RPI4.
endif
diff --git a/drivers/rng/Makefile b/drivers/rng/Makefile
index 8953406882..39f7ee3f03 100644
--- a/drivers/rng/Makefile
+++ b/drivers/rng/Makefile
@@ -9,3 +9,4 @@ obj-$(CONFIG_RNG_SANDBOX) += sandbox_rng.o
obj-$(CONFIG_RNG_MSM) += msm_rng.o
obj-$(CONFIG_RNG_STM32MP1) += stm32mp1_rng.o
obj-$(CONFIG_RNG_ROCKCHIP) += rockchip_rng.o
+obj-$(CONFIG_RNG_IPROC200) += iproc_rng200.o
diff --git a/drivers/rng/iproc_rng200.c b/drivers/rng/iproc_rng200.c
new file mode 100644
index 0000000000..1063f43953
--- /dev/null
+++ b/drivers/rng/iproc_rng200.c
@@ -0,0 +1,186 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Copyright 2020, Matthias Brugger <mbrugger@suse.com>
+ *
+ * Driver for Raspberry Pi hardware random number generator
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <linux/delay.h>
+#include <rng.h>
+#include <asm/io.h>
+
+#define usleep_range(a, b) udelay((b))
+
+#define RNG_CTRL_OFFSET 0x00
+#define RNG_CTRL_RNG_RBGEN_MASK 0x00001FFF
+#define RNG_CTRL_RNG_RBGEN_ENABLE 0x00000001
+#define RNG_CTRL_RNG_RBGEN_DISABLE 0x00000000
+
+#define RNG_SOFT_RESET_OFFSET 0x04
+#define RNG_SOFT_RESET 0x00000001
+
+#define RBG_SOFT_RESET_OFFSET 0x08
+#define RBG_SOFT_RESET 0x00000001
+
+#define RNG_INT_STATUS_OFFSET 0x18
+#define RNG_INT_STATUS_MASTER_FAIL_LOCKOUT_IRQ_MASK 0x80000000
+#define RNG_INT_STATUS_NIST_FAIL_IRQ_MASK 0x00000020
+
+#define RNG_FIFO_DATA_OFFSET 0x20
+
+#define RNG_FIFO_COUNT_OFFSET 0x24
+#define RNG_FIFO_COUNT_RNG_FIFO_COUNT_MASK 0x000000FF
+
+struct iproc_rng200_plat {
+ fdt_addr_t base;
+};
+
+static void iproc_rng200_enable(struct iproc_rng200_plat *pdata, bool enable)
+{
+ fdt_addr_t rng_base = pdata->base;
+ u32 val;
+
+ val = readl(rng_base + RNG_CTRL_OFFSET);
+ val &= ~RNG_CTRL_RNG_RBGEN_MASK;
+ if (enable)
+ val |= RNG_CTRL_RNG_RBGEN_ENABLE;
+ else
+ val &= ~RNG_CTRL_RNG_RBGEN_ENABLE;
+
+ writel(val, rng_base + RNG_CTRL_OFFSET);
+
+}
+
+static void iproc_rng200_restart(struct iproc_rng200_plat *pdata)
+{
+ fdt_addr_t rng_base = pdata->base;
+ u32 val;
+
+ iproc_rng200_enable(pdata, false);
+
+ /* Clear all interrupt status */
+ writel(0xFFFFFFFFUL, rng_base + RNG_INT_STATUS_OFFSET);
+
+ /* Reset RNG and RBG */
+ val = readl(rng_base + RBG_SOFT_RESET_OFFSET);
+ val |= RBG_SOFT_RESET;
+ writel(val, rng_base + RBG_SOFT_RESET_OFFSET);
+
+ val = readl(rng_base + RNG_SOFT_RESET_OFFSET);
+ val |= RNG_SOFT_RESET;
+ writel(val, rng_base + RNG_SOFT_RESET_OFFSET);
+
+ val = readl(rng_base + RNG_SOFT_RESET_OFFSET);
+ val &= ~RNG_SOFT_RESET;
+ writel(val, rng_base + RNG_SOFT_RESET_OFFSET);
+
+ val = readl(rng_base + RBG_SOFT_RESET_OFFSET);
+ val &= ~RBG_SOFT_RESET;
+ writel(val, rng_base + RBG_SOFT_RESET_OFFSET);
+
+ iproc_rng200_enable(pdata, true);
+}
+
+static int iproc_rng200_read(struct udevice *dev, void *data, size_t len)
+{
+ struct iproc_rng200_plat *priv = dev_get_plat(dev);
+ char *buf = (char *)data;
+ u32 num_remaining = len;
+ u32 status;
+
+ #define MAX_RESETS_PER_READ 1
+ u32 num_resets = 0;
+
+ while (num_remaining > 0) {
+
+ /* Is RNG sane? If not, reset it. */
+ status = readl(priv->base + RNG_INT_STATUS_OFFSET);
+ if ((status & (RNG_INT_STATUS_MASTER_FAIL_LOCKOUT_IRQ_MASK |
+ RNG_INT_STATUS_NIST_FAIL_IRQ_MASK)) != 0) {
+
+ if (num_resets >= MAX_RESETS_PER_READ)
+ return len - num_remaining;
+
+ iproc_rng200_restart(priv);
+ num_resets++;
+ }
+
+ /* Are there any random numbers available? */
+ if ((readl(priv->base + RNG_FIFO_COUNT_OFFSET) &
+ RNG_FIFO_COUNT_RNG_FIFO_COUNT_MASK) > 0) {
+
+ if (num_remaining >= sizeof(u32)) {
+ /* Buffer has room to store entire word */
+ *(u32 *)buf = readl(priv->base +
+ RNG_FIFO_DATA_OFFSET);
+ buf += sizeof(u32);
+ num_remaining -= sizeof(u32);
+ } else {
+ /* Buffer can only store partial word */
+ u32 rnd_number = readl(priv->base +
+ RNG_FIFO_DATA_OFFSET);
+ memcpy(buf, &rnd_number, num_remaining);
+ buf += num_remaining;
+ num_remaining = 0;
+ }
+
+ } else {
+ /* Can wait, give others chance to run */
+ usleep_range(min(num_remaining * 10, 500U), 500);
+ }
+ }
+
+ return 0;
+}
+
+static int iproc_rng200_probe(struct udevice *dev)
+{
+ struct iproc_rng200_plat *priv = dev_get_plat(dev);
+
+ iproc_rng200_enable(priv, true);
+
+ return 0;
+}
+
+static int iproc_rng200_remove(struct udevice *dev)
+{
+ struct iproc_rng200_plat *priv = dev_get_plat(dev);
+
+ iproc_rng200_enable(priv, false);
+
+ return 0;
+}
+
+static int iproc_rng200_of_to_plat(struct udevice *dev)
+{
+ struct iproc_rng200_plat *pdata = dev_get_plat(dev);
+
+ pdata->base = dev_read_addr(dev);
+ if (!pdata->base)
+ return -ENODEV;
+
+ return 0;
+}
+
+static const struct dm_rng_ops iproc_rng200_ops = {
+ .read = iproc_rng200_read,
+};
+
+static const struct udevice_id iproc_rng200_rng_match[] = {
+ { .compatible = "brcm,bcm2711-rng200", },
+ { .compatible = "brcm,iproc-rng200", },
+ {},
+};
+
+U_BOOT_DRIVER(iproc_rng200_rng) = {
+ .name = "iproc_rng200-rng",
+ .id = UCLASS_RNG,
+ .of_match = iproc_rng200_rng_match,
+ .ops = &iproc_rng200_ops,
+ .probe = iproc_rng200_probe,
+ .remove = iproc_rng200_remove,
+ .priv_auto = sizeof(struct iproc_rng200_plat),
+ .of_to_plat = iproc_rng200_of_to_plat,
+};
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Matthias Brugger <mbrugger@suse.com>
Subject: [PATCH v2 2/2] config: Enable iProc RNG200 driver in RPi4 configs
Date: Tue, 15 Dec 2020 10:49:24 +0100
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From: Matthias Brugger <mbrugger@suse.com>
We find the iProc RNG200 in the Raspberry Pi 4. Add it to all it's
config so that it can be used.
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
---
Changes in v2:
- fix defconfigs using savedefconfig (Heinrich)
configs/rpi_4_32b_defconfig | 2 ++
configs/rpi_4_defconfig | 2 ++
configs/rpi_arm64_defconfig | 2 ++
drivers/rng/iproc_rng200.c | 1 -
4 files changed, 6 insertions(+), 1 deletion(-)
diff --git a/configs/rpi_4_32b_defconfig b/configs/rpi_4_32b_defconfig
index 5ddd838fd5..4039e46c81 100644
--- a/configs/rpi_4_32b_defconfig
+++ b/configs/rpi_4_32b_defconfig
@@ -36,6 +36,8 @@ CONFIG_PCI_BRCMSTB=y
CONFIG_PINCTRL=y
# CONFIG_PINCTRL_GENERIC is not set
CONFIG_DM_RESET=y
+CONFIG_DM_RNG=y
+CONFIG_RNG_IPROC200=y
# CONFIG_REQUIRE_SERIAL_CONSOLE is not set
CONFIG_USB=y
CONFIG_DM_USB=y
diff --git a/configs/rpi_4_defconfig b/configs/rpi_4_defconfig
index 2590d0a696..46b6cc3046 100644
--- a/configs/rpi_4_defconfig
+++ b/configs/rpi_4_defconfig
@@ -36,6 +36,8 @@ CONFIG_PCI_BRCMSTB=y
CONFIG_PINCTRL=y
# CONFIG_PINCTRL_GENERIC is not set
CONFIG_DM_RESET=y
+CONFIG_DM_RNG=y
+CONFIG_RNG_IPROC200=y
# CONFIG_REQUIRE_SERIAL_CONSOLE is not set
CONFIG_USB=y
CONFIG_DM_USB=y
diff --git a/configs/rpi_arm64_defconfig b/configs/rpi_arm64_defconfig
index 2639219a1a..b75144036d 100644
--- a/configs/rpi_arm64_defconfig
+++ b/configs/rpi_arm64_defconfig
@@ -33,6 +33,8 @@ CONFIG_PCI_BRCMSTB=y
CONFIG_PINCTRL=y
# CONFIG_PINCTRL_GENERIC is not set
CONFIG_DM_RESET=y
+CONFIG_DM_RNG=y
+CONFIG_RNG_IPROC200=y
# CONFIG_REQUIRE_SERIAL_CONSOLE is not set
CONFIG_USB=y
CONFIG_DM_USB=y
diff --git a/drivers/rng/iproc_rng200.c b/drivers/rng/iproc_rng200.c
index 1063f43953..378f6cf48d 100644
--- a/drivers/rng/iproc_rng200.c
+++ b/drivers/rng/iproc_rng200.c
@@ -50,7 +50,6 @@ static void iproc_rng200_enable(struct iproc_rng200_plat *pdata, bool enable
val &= ~RNG_CTRL_RNG_RBGEN_ENABLE;
writel(val, rng_base + RNG_CTRL_OFFSET);
-
}
static void iproc_rng200_restart(struct iproc_rng200_plat *pdata)

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@ -1 +1 @@
SHA512 (u-boot-2021.04-rc2.tar.bz2) = 7bf07f15e0c5f5e63ef8cb9568278ea7c209e484bbb599c47b22a8d2e5c007cc204eec365e5328dea3e7b016cd6ba0cb4c917330cc76163b1016f7c7762ad1bf
SHA512 (u-boot-2021.04-rc3.tar.bz2) = 0d6b46b791475ce21320fbc2b361235d09588a5b912d40b32a11d937adc7c0e7b75b893ba4e8dc55156cfd99f684fc56839c17d0b9c021f5cfaaf5e5997f93ba

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@ -1,8 +1,8 @@
%global candidate rc2
%global candidate rc3
Name: uboot-tools
Version: 2021.04
Release: 0.3%{?candidate:.%{candidate}}%{?dist}
Release: 0.4%{?candidate:.%{candidate}}%{?dist}
Summary: U-Boot utilities
License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+
URL: http://www.denx.de/wiki/U-Boot
@ -27,13 +27,9 @@ Patch10: AllWinner-PineTab.patch
# TI fixes
Patch11: 0001-Fix-BeagleAI-detection.patch
# Rockchips improvements
#Patch12: rk3399-Pinebook-pro-EDP-support.patch
# Raspberry Pi improvements
Patch13: Raspberry-Pi-400-Compute-Module-4-support.patch
Patch14: Raspberry-Pi-4-PCIe-handover.patch
Patch15: rng-Add-iProc-RNG200-driver.patch
Patch12: rk3399-Pinebook-pro-EDP-support.patch
# Fixes for Allwinner network issues
Patch16: 0001-arm-dts-allwinner-sync-from-linux-for-RGMII-RX-TX-de.patch
Patch13: 0001-arm-dts-allwinner-sync-from-linux-for-RGMII-RX-TX-de.patch
BuildRequires: bc
BuildRequires: dtc
@ -245,6 +241,9 @@ cp -p board/warp7/README builds/docs/README.warp7
%endif
%changelog
* Mon Mar 08 2021 Peter Robinson <pbrobinson@fedoraproject.org> - 2021.04-0.4.rc3
- Update to 2021.04 RC3
* Tue Feb 16 2021 Peter Robinson <pbrobinson@fedoraproject.org> - 2021.04-0.3.rc2
- Update to 2021.04 RC2