From d6082cf8542ab100decdff2e7bb447483395c50e Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Wed, 27 Mar 2019 15:54:54 +0000 Subject: [PATCH 1/6] Minor UEFI fixes, Tegra Jetson TX series rebase --- ...IA-Jetson-Nano-Developer-Kit-support.patch | 2459 -------------- ...dd-support-for-framebuffer-carveouts.patch | 1685 ++++++++++ ARM-tegra-Miscellaneous-improvements.patch | 2949 +++++++++++++++++ ...80-Build-position-independent-binary.patch | 37 - ...35x_evm-Enable-CONFIG_SPL_OF_CONTROL.patch | 183 + uboot-tools.spec | 14 +- uefi-rc5-fixes.patch | 245 ++ 7 files changed, 5071 insertions(+), 2501 deletions(-) create mode 100644 ARM-tegra-Add-support-for-framebuffer-carveouts.patch create mode 100644 ARM-tegra-Miscellaneous-improvements.patch delete mode 100644 tegra-p2371-2180-Build-position-independent-binary.patch create mode 100644 ti-am335x_evm-Enable-CONFIG_SPL_OF_CONTROL.patch create mode 100644 uefi-rc5-fixes.patch diff --git a/ARM-tegra-Add-NVIDIA-Jetson-Nano-Developer-Kit-support.patch b/ARM-tegra-Add-NVIDIA-Jetson-Nano-Developer-Kit-support.patch index 2f662b1..70bb946 100644 --- a/ARM-tegra-Add-NVIDIA-Jetson-Nano-Developer-Kit-support.patch +++ b/ARM-tegra-Add-NVIDIA-Jetson-Nano-Developer-Kit-support.patch @@ -1,2462 +1,3 @@ -From patchwork Mon Mar 18 23:24:08 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v2,01/15] ARM: tegra: Use common header for PMU declarations -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1058145 -X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190318232422.24404-2-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de, Stephen Warren -Date: Tue, 19 Mar 2019 00:24:08 +0100 -From: Thierry Reding -List-Id: U-Boot discussion - -From: Thierry Reding - -There's no need to replicate the pmu.h header file for every Tegra SoC -generation. Use a single header that is shared across generations. - -Signed-off-by: Thierry Reding ---- - .../include/asm/{arch-tegra20 => arch-tegra}/pmu.h | 6 +++--- - arch/arm/include/asm/arch-tegra114/pmu.h | 12 ------------ - arch/arm/include/asm/arch-tegra124/pmu.h | 13 ------------- - arch/arm/include/asm/arch-tegra210/pmu.h | 13 ------------- - arch/arm/include/asm/arch-tegra30/pmu.h | 12 ------------ - arch/arm/mach-tegra/board2.c | 2 +- - arch/arm/mach-tegra/emc.c | 2 +- - 7 files changed, 5 insertions(+), 55 deletions(-) - rename arch/arm/include/asm/{arch-tegra20 => arch-tegra}/pmu.h (73%) - delete mode 100644 arch/arm/include/asm/arch-tegra114/pmu.h - delete mode 100644 arch/arm/include/asm/arch-tegra124/pmu.h - delete mode 100644 arch/arm/include/asm/arch-tegra210/pmu.h - delete mode 100644 arch/arm/include/asm/arch-tegra30/pmu.h - -diff --git a/arch/arm/include/asm/arch-tegra20/pmu.h b/arch/arm/include/asm/arch-tegra/pmu.h -similarity index 73% -rename from arch/arm/include/asm/arch-tegra20/pmu.h -rename to arch/arm/include/asm/arch-tegra/pmu.h -index 18766dfed2bb..e850875d3166 100644 ---- a/arch/arm/include/asm/arch-tegra20/pmu.h -+++ b/arch/arm/include/asm/arch-tegra/pmu.h -@@ -4,10 +4,10 @@ - * NVIDIA Corporation - */ - --#ifndef _ARCH_PMU_H_ --#define _ARCH_PMU_H_ -+#ifndef _TEGRA_PMU_H_ -+#define _TEGRA_PMU_H_ - - /* Set core and CPU voltages to nominal levels */ - int pmu_set_nominal(void); - --#endif /* _ARCH_PMU_H_ */ -+#endif /* _TEGRA_PMU_H_ */ -diff --git a/arch/arm/include/asm/arch-tegra114/pmu.h b/arch/arm/include/asm/arch-tegra114/pmu.h -deleted file mode 100644 -index 1e571ee7b317..000000000000 ---- a/arch/arm/include/asm/arch-tegra114/pmu.h -+++ /dev/null -@@ -1,12 +0,0 @@ --/* SPDX-License-Identifier: GPL-2.0 */ --/* -- * Copyright (c) 2010-2013, NVIDIA CORPORATION. All rights reserved. -- */ -- --#ifndef _TEGRA114_PMU_H_ --#define _TEGRA114_PMU_H_ -- --/* Set core and CPU voltages to nominal levels */ --int pmu_set_nominal(void); -- --#endif /* _TEGRA114_PMU_H_ */ -diff --git a/arch/arm/include/asm/arch-tegra124/pmu.h b/arch/arm/include/asm/arch-tegra124/pmu.h -deleted file mode 100644 -index c38393edefda..000000000000 ---- a/arch/arm/include/asm/arch-tegra124/pmu.h -+++ /dev/null -@@ -1,13 +0,0 @@ --/* SPDX-License-Identifier: GPL-2.0+ */ --/* -- * (C) Copyright 2010-2013 -- * NVIDIA Corporation -- */ -- --#ifndef _TEGRA124_PMU_H_ --#define _TEGRA124_PMU_H_ -- --/* Set core and CPU voltages to nominal levels */ --int pmu_set_nominal(void); -- --#endif /* _TEGRA124_PMU_H_ */ -diff --git a/arch/arm/include/asm/arch-tegra210/pmu.h b/arch/arm/include/asm/arch-tegra210/pmu.h -deleted file mode 100644 -index 6ea36aa41876..000000000000 ---- a/arch/arm/include/asm/arch-tegra210/pmu.h -+++ /dev/null -@@ -1,13 +0,0 @@ --/* SPDX-License-Identifier: GPL-2.0+ */ --/* -- * (C) Copyright 2010-2015 -- * NVIDIA Corporation -- */ -- --#ifndef _TEGRA210_PMU_H_ --#define _TEGRA210_PMU_H_ -- --/* Set core and CPU voltages to nominal levels */ --int pmu_set_nominal(void); -- --#endif /* _TEGRA210_PMU_H_ */ -diff --git a/arch/arm/include/asm/arch-tegra30/pmu.h b/arch/arm/include/asm/arch-tegra30/pmu.h -deleted file mode 100644 -index a823f0fbfc61..000000000000 ---- a/arch/arm/include/asm/arch-tegra30/pmu.h -+++ /dev/null -@@ -1,12 +0,0 @@ --/* SPDX-License-Identifier: GPL-2.0 */ --/* -- * Copyright (c) 2010-2012, NVIDIA CORPORATION. All rights reserved. -- */ -- --#ifndef _TEGRA30_PMU_H_ --#define _TEGRA30_PMU_H_ -- --/* Set core and CPU voltages to nominal levels */ --int pmu_set_nominal(void); -- --#endif /* _TEGRA30_PMU_H_ */ -diff --git a/arch/arm/mach-tegra/board2.c b/arch/arm/mach-tegra/board2.c -index 12257a42b51b..b8d5ef0322cb 100644 ---- a/arch/arm/mach-tegra/board2.c -+++ b/arch/arm/mach-tegra/board2.c -@@ -15,6 +15,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -24,7 +25,6 @@ - #include - #include - #include --#include - #include - #ifdef CONFIG_TEGRA_CLOCK_SCALING - #include -diff --git a/arch/arm/mach-tegra/emc.c b/arch/arm/mach-tegra/emc.c -index 6697909d9a3e..66628933b653 100644 ---- a/arch/arm/mach-tegra/emc.c -+++ b/arch/arm/mach-tegra/emc.c -@@ -8,10 +8,10 @@ - #include - #include - #include --#include - #include - #include - #include -+#include - #include - - DECLARE_GLOBAL_DATA_PTR; - -From patchwork Mon Mar 18 23:24:09 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v2,02/15] ARM: tegra: Guard clock code with a Kconfig symbol -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1058147 -X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190318232422.24404-3-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de, Stephen Warren -Date: Tue, 19 Mar 2019 00:24:09 +0100 -From: Thierry Reding -List-Id: U-Boot discussion - -From: Thierry Reding - -Clock code is not relevant on all Tegra SoC generations, so guard it -with a Kconfig symbol that can be selected by the generations that need -it. - -This is in preparation for unifying Tegra186 code with the code used on -older generations. - -Signed-off-by: Thierry Reding ---- - arch/arm/mach-tegra/Kconfig | 5 +++++ - arch/arm/mach-tegra/Makefile | 2 +- - arch/arm/mach-tegra/board.c | 2 ++ - arch/arm/mach-tegra/board2.c | 12 ++++++++++-- - 4 files changed, 18 insertions(+), 3 deletions(-) - -diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig -index 86b1cd11f752..ee078fec9adc 100644 ---- a/arch/arm/mach-tegra/Kconfig -+++ b/arch/arm/mach-tegra/Kconfig -@@ -12,6 +12,9 @@ config SPL_LIBGENERIC_SUPPORT - config SPL_SERIAL_SUPPORT - default y - -+config TEGRA_CLKRST -+ bool -+ - config TEGRA_IVC - bool "Tegra IVC protocol" - help -@@ -55,6 +58,7 @@ config TEGRA_ARMV7_COMMON - select SPL - select SPL_BOARD_INIT if SPL - select SUPPORT_SPL -+ select TEGRA_CLKRST - select TEGRA_COMMON - select TEGRA_GPIO - select TEGRA_NO_BPMP -@@ -100,6 +104,7 @@ config TEGRA124 - config TEGRA210 - bool "Tegra210 family" - select TEGRA_ARMV8_COMMON -+ select TEGRA_CLKRST - select TEGRA_GPIO - select TEGRA_NO_BPMP - -diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile -index d4b4666fb1e2..0e812818d7a2 100644 ---- a/arch/arm/mach-tegra/Makefile -+++ b/arch/arm/mach-tegra/Makefile -@@ -16,7 +16,7 @@ endif - obj-y += ap.o - obj-y += board.o board2.o - obj-y += cache.o --obj-y += clock.o -+obj-$(CONFIG_TEGRA_CLKRST) += clock.o - obj-y += pinmux-common.o - obj-y += powergate.o - obj-y += xusb-padctl-dummy.o -diff --git a/arch/arm/mach-tegra/board.c b/arch/arm/mach-tegra/board.c -index f8fc042a1dcc..ecd5001de4c5 100644 ---- a/arch/arm/mach-tegra/board.c -+++ b/arch/arm/mach-tegra/board.c -@@ -9,7 +9,9 @@ - #include - #include - #include -+#if IS_ENABLED(CONFIG_TEGRA_CLKRST) - #include -+#endif - #include - #include - #include -diff --git a/arch/arm/mach-tegra/board2.c b/arch/arm/mach-tegra/board2.c -index b8d5ef0322cb..b94077221f77 100644 ---- a/arch/arm/mach-tegra/board2.c -+++ b/arch/arm/mach-tegra/board2.c -@@ -22,7 +22,9 @@ - #include - #include - #include -+#if IS_ENABLED(CONFIG_TEGRA_CLKRST) - #include -+#endif - #include - #include - #include -@@ -109,8 +111,10 @@ int board_init(void) - __maybe_unused int board_id; - - /* Do clocks and UART first so that printf() works */ -+#if IS_ENABLED(CONFIG_TEGRA_CLKRST) - clock_init(); - clock_verify(); -+#endif - - tegra_gpu_config(); - -@@ -181,8 +185,10 @@ void gpio_early_init(void) __attribute__((weak, alias("__gpio_early_init"))); - - int board_early_init_f(void) - { -+#if IS_ENABLED(CONFIG_TEGRA_CLKRST) - if (!clock_early_init_done()) - clock_early_init(); -+#endif - - #if defined(CONFIG_TEGRA_DISCONNECT_UDC_ON_BOOT) - #define USBCMD_FS2 (1 << 15) -@@ -193,10 +199,12 @@ int board_early_init_f(void) - #endif - - /* Do any special system timer/TSC setup */ --#if defined(CONFIG_TEGRA_SUPPORT_NON_SECURE) -+#if IS_ENABLED(CONFIG_TEGRA_CLKRST) -+# if defined(CONFIG_TEGRA_SUPPORT_NON_SECURE) - if (!tegra_cpu_is_non_secure()) --#endif -+# endif - arch_timer_init(); -+#endif - - pinmux_init(); - board_init_uart_f(); - -From patchwork Mon Mar 18 23:24:10 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot, v2, - 03/15] ARM: tegra: Guard GP pad control code with a Kconfig symbol -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1058148 -X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190318232422.24404-4-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de, Stephen Warren -Date: Tue, 19 Mar 2019 00:24:10 +0100 -From: Thierry Reding -List-Id: U-Boot discussion - -From: Thierry Reding - -The GP pad control code is not relevant on all Tegra SoC generations, so -guard it with a Kconfig symbol that can be selected by the generations -that need it. - -This is in preparation for unifying Tegra186 code with the code used on -older generations. - -Signed-off-by: Thierry Reding ---- - arch/arm/mach-tegra/Kconfig | 5 +++++ - arch/arm/mach-tegra/Makefile | 2 +- - arch/arm/mach-tegra/cache.c | 2 ++ - 3 files changed, 8 insertions(+), 1 deletion(-) - -diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig -index ee078fec9adc..265051b18aaf 100644 ---- a/arch/arm/mach-tegra/Kconfig -+++ b/arch/arm/mach-tegra/Kconfig -@@ -15,6 +15,9 @@ config SPL_SERIAL_SUPPORT - config TEGRA_CLKRST - bool - -+config TEGRA_GP_PADCTRL -+ bool -+ - config TEGRA_IVC - bool "Tegra IVC protocol" - help -@@ -61,6 +64,7 @@ config TEGRA_ARMV7_COMMON - select TEGRA_CLKRST - select TEGRA_COMMON - select TEGRA_GPIO -+ select TEGRA_GP_PADCTRL - select TEGRA_NO_BPMP - - config TEGRA_ARMV8_COMMON -@@ -106,6 +110,7 @@ config TEGRA210 - select TEGRA_ARMV8_COMMON - select TEGRA_CLKRST - select TEGRA_GPIO -+ select TEGRA_GP_PADCTRL - select TEGRA_NO_BPMP - - config TEGRA186 -diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile -index 0e812818d7a2..69f802c01b45 100644 ---- a/arch/arm/mach-tegra/Makefile -+++ b/arch/arm/mach-tegra/Makefile -@@ -13,7 +13,7 @@ else - obj-$(CONFIG_CMD_ENTERRCM) += cmd_enterrcm.o - endif - --obj-y += ap.o -+obj-$(CONFIG_TEGRA_GP_PADCTRL) += ap.o - obj-y += board.o board2.o - obj-y += cache.o - obj-$(CONFIG_TEGRA_CLKRST) += clock.o -diff --git a/arch/arm/mach-tegra/cache.c b/arch/arm/mach-tegra/cache.c -index be414e4e4aca..d7063490e222 100644 ---- a/arch/arm/mach-tegra/cache.c -+++ b/arch/arm/mach-tegra/cache.c -@@ -8,7 +8,9 @@ - #include - #include - #include -+#if IS_ENABLED(CONFIG_TEGRA_GP_PADCTRL) - #include -+#endif - - #ifndef CONFIG_ARM64 - void config_cache(void) - -From patchwork Mon Mar 18 23:24:11 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot, v2, - 04/15] ARM: tegra: Guard memory controller code with a Kconfig symbol -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1058146 -X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190318232422.24404-5-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de, Stephen Warren -Date: Tue, 19 Mar 2019 00:24:11 +0100 -From: Thierry Reding -List-Id: U-Boot discussion - -From: Thierry Reding - -Memory controller code is not relevant on all Tegra SoC generations, so -guard it with a Kconfig symbol that can be selected by the generations -that need it. - -This is in preparation for unifying Tegra186 code with the code used on -older generations. - -Signed-off-by: Thierry Reding ---- - arch/arm/mach-tegra/Kconfig | 5 +++++ - arch/arm/mach-tegra/board.c | 7 +++++++ - 2 files changed, 12 insertions(+) - -diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig -index 265051b18aaf..5763c4ae3cd1 100644 ---- a/arch/arm/mach-tegra/Kconfig -+++ b/arch/arm/mach-tegra/Kconfig -@@ -26,6 +26,9 @@ config TEGRA_IVC - U-Boot, it is typically used for communication between the main CPU - and various auxiliary processors. - -+config TEGRA_MC -+ bool -+ - config TEGRA_COMMON - bool "Tegra common options" - select BINMAN -@@ -65,6 +68,7 @@ config TEGRA_ARMV7_COMMON - select TEGRA_COMMON - select TEGRA_GPIO - select TEGRA_GP_PADCTRL -+ select TEGRA_MC - select TEGRA_NO_BPMP - - config TEGRA_ARMV8_COMMON -@@ -111,6 +115,7 @@ config TEGRA210 - select TEGRA_CLKRST - select TEGRA_GPIO - select TEGRA_GP_PADCTRL -+ select TEGRA_MC - select TEGRA_NO_BPMP - - config TEGRA186 -diff --git a/arch/arm/mach-tegra/board.c b/arch/arm/mach-tegra/board.c -index ecd5001de4c5..7ef5a67edd1f 100644 ---- a/arch/arm/mach-tegra/board.c -+++ b/arch/arm/mach-tegra/board.c -@@ -13,7 +13,9 @@ - #include - #endif - #include -+#if IS_ENABLED(CONFIG_TEGRA_MC) - #include -+#endif - #include - #include - #include -@@ -68,6 +70,7 @@ bool tegra_cpu_is_non_secure(void) - } - #endif - -+#if IS_ENABLED(CONFIG_TEGRA_MC) - /* Read the RAM size directly from the memory controller */ - static phys_size_t query_sdram_size(void) - { -@@ -117,11 +120,15 @@ static phys_size_t query_sdram_size(void) - - return size_bytes; - } -+#endif - - int dram_init(void) - { -+#if IS_ENABLED(CONFIG_TEGRA_MC) - /* We do not initialise DRAM here. We just query the size */ - gd->ram_size = query_sdram_size(); -+#endif -+ - return 0; - } - - -From patchwork Mon Mar 18 23:24:12 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot, v2, - 05/15] ARM: tegra: Guard pin controller code with a Kconfig symbol -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1058156 -X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190318232422.24404-6-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de, Stephen Warren -Date: Tue, 19 Mar 2019 00:24:12 +0100 -From: Thierry Reding -List-Id: U-Boot discussion - -From: Thierry Reding - -Pin controller code is not relevant on all Tegra SoC generations, so -guard it with a Kconfig symbol that can be selected by the generations -that need it. - -This is in preparation for unifying Tegra186 code with the code used on -older generations. - -Signed-off-by: Thierry Reding ---- - arch/arm/mach-tegra/Kconfig | 5 +++++ - arch/arm/mach-tegra/Makefile | 2 +- - arch/arm/mach-tegra/board.c | 6 ++++++ - arch/arm/mach-tegra/board2.c | 2 ++ - 4 files changed, 14 insertions(+), 1 deletion(-) - -diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig -index 5763c4ae3cd1..be20ac2e804e 100644 ---- a/arch/arm/mach-tegra/Kconfig -+++ b/arch/arm/mach-tegra/Kconfig -@@ -29,6 +29,9 @@ config TEGRA_IVC - config TEGRA_MC - bool - -+config TEGRA_PINCTRL -+ bool -+ - config TEGRA_COMMON - bool "Tegra common options" - select BINMAN -@@ -70,6 +73,7 @@ config TEGRA_ARMV7_COMMON - select TEGRA_GP_PADCTRL - select TEGRA_MC - select TEGRA_NO_BPMP -+ select TEGRA_PINCTRL - - config TEGRA_ARMV8_COMMON - bool "Tegra 64-bit common options" -@@ -117,6 +121,7 @@ config TEGRA210 - select TEGRA_GP_PADCTRL - select TEGRA_MC - select TEGRA_NO_BPMP -+ select TEGRA_PINCTRL - - config TEGRA186 - bool "Tegra186 family" -diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile -index 69f802c01b45..395e0191a458 100644 ---- a/arch/arm/mach-tegra/Makefile -+++ b/arch/arm/mach-tegra/Makefile -@@ -17,7 +17,7 @@ obj-$(CONFIG_TEGRA_GP_PADCTRL) += ap.o - obj-y += board.o board2.o - obj-y += cache.o - obj-$(CONFIG_TEGRA_CLKRST) += clock.o --obj-y += pinmux-common.o -+obj-$(CONFIG_TEGRA_PINCTRL) += pinmux-common.o - obj-y += powergate.o - obj-y += xusb-padctl-dummy.o - endif -diff --git a/arch/arm/mach-tegra/board.c b/arch/arm/mach-tegra/board.c -index 7ef5a67edd1f..b65bdde5a78d 100644 ---- a/arch/arm/mach-tegra/board.c -+++ b/arch/arm/mach-tegra/board.c -@@ -12,7 +12,9 @@ - #if IS_ENABLED(CONFIG_TEGRA_CLKRST) - #include - #endif -+#if IS_ENABLED(CONFIG_TEGRA_PINCTRL) - #include -+#endif - #if IS_ENABLED(CONFIG_TEGRA_MC) - #include - #endif -@@ -132,6 +134,7 @@ int dram_init(void) - return 0; - } - -+#if IS_ENABLED(CONFIG_TEGRA_PINCTRL) - static int uart_configs[] = { - #if defined(CONFIG_TEGRA20) - #if defined(CONFIG_TEGRA_UARTA_UAA_UAB) -@@ -199,9 +202,11 @@ static void setup_uarts(int uart_ids) - } - } - } -+#endif - - void board_init_uart_f(void) - { -+#if IS_ENABLED(CONFIG_TEGRA_PINCTRL) - int uart_ids = 0; /* bit mask of which UART ids to enable */ - - #ifdef CONFIG_TEGRA_ENABLE_UARTA -@@ -220,6 +225,7 @@ void board_init_uart_f(void) - uart_ids |= UARTE; - #endif - setup_uarts(uart_ids); -+#endif - } - - #if !CONFIG_IS_ENABLED(OF_CONTROL) -diff --git a/arch/arm/mach-tegra/board2.c b/arch/arm/mach-tegra/board2.c -index b94077221f77..ce1c9346959d 100644 ---- a/arch/arm/mach-tegra/board2.c -+++ b/arch/arm/mach-tegra/board2.c -@@ -25,8 +25,10 @@ - #if IS_ENABLED(CONFIG_TEGRA_CLKRST) - #include - #endif -+#if IS_ENABLED(CONFIG_TEGRA_PINCTRL) - #include - #include -+#endif - #include - #ifdef CONFIG_TEGRA_CLOCK_SCALING - #include - -From patchwork Mon Mar 18 23:24:13 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot, v2, - 06/15] ARM: tegra: Guard powergate code with a Kconfig symbol -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1058150 -X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190318232422.24404-7-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de, Stephen Warren -Date: Tue, 19 Mar 2019 00:24:13 +0100 -From: Thierry Reding -List-Id: U-Boot discussion - -From: Thierry Reding - -Powergate code is not relevant on all Tegra SoC generations, so guard it -with a Kconfig symbol that can be selected by the generations that need -it. - -This is in preparation for unifying Tegra186 code with the code used on -older generations. - -Signed-off-by: Thierry Reding ---- - arch/arm/mach-tegra/Kconfig | 5 +++++ - arch/arm/mach-tegra/Makefile | 2 +- - 2 files changed, 6 insertions(+), 1 deletion(-) - -diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig -index be20ac2e804e..db9198348d3f 100644 ---- a/arch/arm/mach-tegra/Kconfig -+++ b/arch/arm/mach-tegra/Kconfig -@@ -32,6 +32,9 @@ config TEGRA_MC - config TEGRA_PINCTRL - bool - -+config TEGRA_PMC -+ bool -+ - config TEGRA_COMMON - bool "Tegra common options" - select BINMAN -@@ -74,6 +77,7 @@ config TEGRA_ARMV7_COMMON - select TEGRA_MC - select TEGRA_NO_BPMP - select TEGRA_PINCTRL -+ select TEGRA_PMC - - config TEGRA_ARMV8_COMMON - bool "Tegra 64-bit common options" -@@ -122,6 +126,7 @@ config TEGRA210 - select TEGRA_MC - select TEGRA_NO_BPMP - select TEGRA_PINCTRL -+ select TEGRA_PMC - - config TEGRA186 - bool "Tegra186 family" -diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile -index 395e0191a458..517be21ee5f5 100644 ---- a/arch/arm/mach-tegra/Makefile -+++ b/arch/arm/mach-tegra/Makefile -@@ -18,7 +18,7 @@ obj-y += board.o board2.o - obj-y += cache.o - obj-$(CONFIG_TEGRA_CLKRST) += clock.o - obj-$(CONFIG_TEGRA_PINCTRL) += pinmux-common.o --obj-y += powergate.o -+obj-$(CONFIG_TEGRA_PMC) += powergate.o - obj-y += xusb-padctl-dummy.o - endif - - -From patchwork Mon Mar 18 23:24:14 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v2,07/15] ARM: tegra: Fix save_boot_params() prototype -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1058149 -X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190318232422.24404-8-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de, Stephen Warren -Date: Tue, 19 Mar 2019 00:24:14 +0100 -From: Thierry Reding -List-Id: U-Boot discussion - -From: Thierry Reding - -The save_boot_params() function takes as its first four arguments the -first four registers. On 32-bit ARM these are r0, r1, r2 and r3, all of -which are 32 bits wide. However, on 64-bit ARM thene registers are x0, -x1, x2 and x3, all of which are 64 bits wide. In order to allow reusing -the save_boot_params() implementation on 64-bit ARM, change it to take -unsigned long parameters rather than the fixed size 32-bit integers. -This ensures that the correct values are passed. - -Signed-off-by: Thierry Reding ---- - arch/arm/mach-tegra/board.c | 3 ++- - 1 file changed, 2 insertions(+), 1 deletion(-) - -diff --git a/arch/arm/mach-tegra/board.c b/arch/arm/mach-tegra/board.c -index b65bdde5a78d..59d2f347485d 100644 ---- a/arch/arm/mach-tegra/board.c -+++ b/arch/arm/mach-tegra/board.c -@@ -42,7 +42,8 @@ enum { - static bool from_spl __attribute__ ((section(".data"))); - - #ifndef CONFIG_SPL_BUILD --void save_boot_params(u32 r0, u32 r1, u32 r2, u32 r3) -+void save_boot_params(unsigned long r0, unsigned long r1, unsigned long r2, -+ unsigned long r3) - { - from_spl = r0 != UBOOT_NOT_LOADED_FROM_SPL; - save_boot_params_ret(); - -From patchwork Mon Mar 18 23:24:15 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot, v2, - 08/15] ARM: tegra: Allow boards to override boot target devices -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1058152 -X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190318232422.24404-9-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de, Stephen Warren -Date: Tue, 19 Mar 2019 00:24:15 +0100 -From: Thierry Reding -List-Id: U-Boot discussion - -From: Thierry Reding - -Boards may not support all the boot target devices in the default list -for Tegra devices. Allow a board to override the list and default to the -standard list only if the board hasn't specified one itself. - -Signed-off-by: Thierry Reding ---- - include/configs/tegra-common-post.h | 2 ++ - 1 file changed, 2 insertions(+) - -diff --git a/include/configs/tegra-common-post.h b/include/configs/tegra-common-post.h -index e54428ba43e2..9685ee5059ab 100644 ---- a/include/configs/tegra-common-post.h -+++ b/include/configs/tegra-common-post.h -@@ -21,12 +21,14 @@ - #define CONFIG_SYS_NONCACHED_MEMORY (1 << 20) /* 1 MiB */ - - #ifndef CONFIG_SPL_BUILD -+#ifndef BOOT_TARGET_DEVICES - #define BOOT_TARGET_DEVICES(func) \ - func(MMC, mmc, 1) \ - func(MMC, mmc, 0) \ - func(USB, usb, 0) \ - func(PXE, pxe, na) \ - func(DHCP, dhcp, na) -+#endif - #include - #else - #define BOOTENV - -From patchwork Mon Mar 18 23:24:16 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v2,09/15] ARM: tegra: Support TZ-only access to PMC -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1058153 -X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190318232422.24404-10-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de, Stephen Warren -Date: Tue, 19 Mar 2019 00:24:16 +0100 -From: Thierry Reding -List-Id: U-Boot discussion - -From: Thierry Reding - -Some devices may restrict access to the PMC to TrustZone software only. -Non-TZ software can detect this and use SMC calls to the firmware that -runs in the TrustZone to perform accesses to PMC registers. - -Note that this also fixes reset_cpu() and the enterrcm command on -Tegra186 where they were previously trying to access the PMC at a wrong -physical address. - -Based on work by Kalyani Chidambaram and Tom -Warren . - -Signed-off-by: Thierry Reding ---- - arch/arm/include/asm/arch-tegra/pmc.h | 20 +++++- - arch/arm/include/asm/arch-tegra/tegra.h | 6 ++ - arch/arm/mach-tegra/Kconfig | 5 ++ - arch/arm/mach-tegra/Makefile | 4 +- - arch/arm/mach-tegra/clock.c | 13 ++-- - arch/arm/mach-tegra/cmd_enterrcm.c | 6 +- - arch/arm/mach-tegra/cpu.c | 20 +++--- - arch/arm/mach-tegra/lowlevel_init.S | 39 ----------- - arch/arm/mach-tegra/pmc.c | 92 +++++++++++++++++++++++++ - arch/arm/mach-tegra/powergate.c | 11 +-- - 10 files changed, 151 insertions(+), 65 deletions(-) - delete mode 100644 arch/arm/mach-tegra/lowlevel_init.S - create mode 100644 arch/arm/mach-tegra/pmc.c - -diff --git a/arch/arm/include/asm/arch-tegra/pmc.h b/arch/arm/include/asm/arch-tegra/pmc.h -index 34bbe75d5fdb..1524bf291164 100644 ---- a/arch/arm/include/asm/arch-tegra/pmc.h -+++ b/arch/arm/include/asm/arch-tegra/pmc.h -@@ -1,6 +1,6 @@ - /* SPDX-License-Identifier: GPL-2.0+ */ - /* -- * (C) Copyright 2010-2015 -+ * (C) Copyright 2010-2019 - * NVIDIA Corporation - */ - -@@ -388,4 +388,22 @@ struct pmc_ctlr { - /* APBDEV_PMC_CNTRL2_0 0x440 */ - #define HOLD_CKE_LOW_EN (1 << 12) - -+/* PMC read/write functions */ -+u32 tegra_pmc_readl(unsigned long offset); -+void tegra_pmc_writel(u32 value, unsigned long offset); -+ -+#define PMC_CNTRL 0x0 -+#define PMC_CNTRL_MAIN_RST BIT(4) -+ -+#if IS_ENABLED(CONFIG_TEGRA186) -+# define PMC_SCRATCH0 0x32000 -+#else -+# define PMC_SCRATCH0 0x00050 -+#endif -+ -+/* for secure PMC */ -+#define TEGRA_SMC_PMC 0xc2fffe00 -+#define TEGRA_SMC_PMC_READ 0xaa -+#define TEGRA_SMC_PMC_WRITE 0xbb -+ - #endif /* PMC_H */ -diff --git a/arch/arm/include/asm/arch-tegra/tegra.h b/arch/arm/include/asm/arch-tegra/tegra.h -index 7ae0129e2db3..7a4e0972fb76 100644 ---- a/arch/arm/include/asm/arch-tegra/tegra.h -+++ b/arch/arm/include/asm/arch-tegra/tegra.h -@@ -30,7 +30,13 @@ - #define NV_PA_SLINK5_BASE (NV_PA_APB_MISC_BASE + 0xDC00) - #define NV_PA_SLINK6_BASE (NV_PA_APB_MISC_BASE + 0xDE00) - #define TEGRA_DVC_BASE (NV_PA_APB_MISC_BASE + 0xD000) -+#if defined(CONFIG_TEGRA20) || defined(CONFIG_TEGRA30) || \ -+ defined(CONFIG_TEGRA114) || defined(CONFIG_TEGRA124) || \ -+ defined(CONFIG_TEGRA132) || defined(CONFIG_TEGRA210) - #define NV_PA_PMC_BASE (NV_PA_APB_MISC_BASE + 0xE400) -+#else -+#define NV_PA_PMC_BASE 0xc360000 -+#endif - #define NV_PA_EMC_BASE (NV_PA_APB_MISC_BASE + 0xF400) - #define NV_PA_FUSE_BASE (NV_PA_APB_MISC_BASE + 0xF800) - #if defined(CONFIG_TEGRA20) || defined(CONFIG_TEGRA30) || \ -diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig -index db9198348d3f..28914a34a1b5 100644 ---- a/arch/arm/mach-tegra/Kconfig -+++ b/arch/arm/mach-tegra/Kconfig -@@ -35,6 +35,10 @@ config TEGRA_PINCTRL - config TEGRA_PMC - bool - -+config TEGRA_PMC_SECURE -+ bool -+ depends on TEGRA_PMC -+ - config TEGRA_COMMON - bool "Tegra common options" - select BINMAN -@@ -127,6 +131,7 @@ config TEGRA210 - select TEGRA_NO_BPMP - select TEGRA_PINCTRL - select TEGRA_PMC -+ select TEGRA_PMC_SECURE - - config TEGRA186 - bool "Tegra186 family" -diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile -index 517be21ee5f5..f8bc65aa8b18 100644 ---- a/arch/arm/mach-tegra/Makefile -+++ b/arch/arm/mach-tegra/Makefile -@@ -1,6 +1,6 @@ - # SPDX-License-Identifier: GPL-2.0+ - # --# (C) Copyright 2010-2015 Nvidia Corporation. -+# (C) Copyright 2010-2019 Nvidia Corporation. - # - # (C) Copyright 2000-2008 - # Wolfgang Denk, DENX Software Engineering, wd@denx.de. -@@ -27,11 +27,11 @@ obj-y += dt-setup.o - obj-$(CONFIG_TEGRA_CLOCK_SCALING) += emc.o - obj-$(CONFIG_TEGRA_GPU) += gpu.o - obj-$(CONFIG_TEGRA_IVC) += ivc.o --obj-y += lowlevel_init.o - ifndef CONFIG_SPL_BUILD - obj-$(CONFIG_ARMV7_PSCI) += psci.o - endif - obj-$(CONFIG_DISPLAY_CPUINFO) += sys_info.o -+obj-y += pmc.o - - obj-$(CONFIG_TEGRA20) += tegra20/ - obj-$(CONFIG_TEGRA30) += tegra30/ -diff --git a/arch/arm/mach-tegra/clock.c b/arch/arm/mach-tegra/clock.c -index 096330748f2b..c9cd4e6aaeb7 100644 ---- a/arch/arm/mach-tegra/clock.c -+++ b/arch/arm/mach-tegra/clock.c -@@ -1,6 +1,6 @@ - // SPDX-License-Identifier: GPL-2.0 - /* -- * Copyright (c) 2010-2015, NVIDIA CORPORATION. All rights reserved. -+ * Copyright (c) 2010-2019, NVIDIA CORPORATION. All rights reserved. - */ - - /* Tegra SoC common clock control functions */ -@@ -814,11 +814,16 @@ void tegra30_set_up_pllp(void) - - int clock_external_output(int clk_id) - { -- struct pmc_ctlr *pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE; -+ u32 val; - - if (clk_id >= 1 && clk_id <= 3) { -- setbits_le32(&pmc->pmc_clk_out_cntrl, -- 1 << (2 + (clk_id - 1) * 8)); -+ val = tegra_pmc_readl(offsetof(struct pmc_ctlr, -+ pmc_clk_out_cntrl)); -+ val |= 1 << (2 + (clk_id - 1) * 8); -+ tegra_pmc_writel(val, -+ offsetof(struct pmc_ctlr, -+ pmc_clk_out_cntrl)); -+ - } else { - printf("%s: Unknown output clock id %d\n", __func__, clk_id); - return -EINVAL; -diff --git a/arch/arm/mach-tegra/cmd_enterrcm.c b/arch/arm/mach-tegra/cmd_enterrcm.c -index 4e6beb3e5bb4..4a889f0e3422 100644 ---- a/arch/arm/mach-tegra/cmd_enterrcm.c -+++ b/arch/arm/mach-tegra/cmd_enterrcm.c -@@ -1,6 +1,6 @@ - // SPDX-License-Identifier: GPL-2.0+ - /* -- * Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. -+ * Copyright (c) 2012-2019, NVIDIA CORPORATION. All rights reserved. - * - * Derived from code (arch/arm/lib/reset.c) that is: - * -@@ -31,12 +31,10 @@ - static int do_enterrcm(cmd_tbl_t *cmdtp, int flag, int argc, - char * const argv[]) - { -- struct pmc_ctlr *pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE; -- - puts("Entering RCM...\n"); - udelay(50000); - -- pmc->pmc_scratch0 = 2; -+ tegra_pmc_writel(2, PMC_SCRATCH0); - disable_interrupts(); - reset_cpu(0); - -diff --git a/arch/arm/mach-tegra/cpu.c b/arch/arm/mach-tegra/cpu.c -index 1b6ad074ed8f..3d140760e68f 100644 ---- a/arch/arm/mach-tegra/cpu.c -+++ b/arch/arm/mach-tegra/cpu.c -@@ -1,6 +1,6 @@ - // SPDX-License-Identifier: GPL-2.0 - /* -- * Copyright (c) 2010-2015, NVIDIA CORPORATION. All rights reserved. -+ * Copyright (c) 2010-2019, NVIDIA CORPORATION. All rights reserved. - */ - - #include -@@ -299,21 +299,19 @@ void enable_cpu_clock(int enable) - - static int is_cpu_powered(void) - { -- struct pmc_ctlr *pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE; -- -- return (readl(&pmc->pmc_pwrgate_status) & CPU_PWRED) ? 1 : 0; -+ return (tegra_pmc_readl(offsetof(struct pmc_ctlr, -+ pmc_pwrgate_status)) & CPU_PWRED) ? 1 : 0; - } - - static void remove_cpu_io_clamps(void) - { -- struct pmc_ctlr *pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE; - u32 reg; - debug("%s entry\n", __func__); - - /* Remove the clamps on the CPU I/O signals */ -- reg = readl(&pmc->pmc_remove_clamping); -+ reg = tegra_pmc_readl(offsetof(struct pmc_ctlr, pmc_remove_clamping)); - reg |= CPU_CLMP; -- writel(reg, &pmc->pmc_remove_clamping); -+ tegra_pmc_writel(reg, offsetof(struct pmc_ctlr, pmc_remove_clamping)); - - /* Give I/O signals time to stabilize */ - udelay(IO_STABILIZATION_DELAY); -@@ -321,17 +319,19 @@ static void remove_cpu_io_clamps(void) - - void powerup_cpu(void) - { -- struct pmc_ctlr *pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE; - u32 reg; - int timeout = IO_STABILIZATION_DELAY; - debug("%s entry\n", __func__); - - if (!is_cpu_powered()) { - /* Toggle the CPU power state (OFF -> ON) */ -- reg = readl(&pmc->pmc_pwrgate_toggle); -+ reg = tegra_pmc_readl(offsetof(struct pmc_ctlr, -+ pmc_pwrgate_toggle)); - reg &= PARTID_CP; - reg |= START_CP; -- writel(reg, &pmc->pmc_pwrgate_toggle); -+ tegra_pmc_writel(reg, -+ offsetof(struct pmc_ctlr, -+ pmc_pwrgate_toggle)); - - /* Wait for the power to come up */ - while (!is_cpu_powered()) { -diff --git a/arch/arm/mach-tegra/lowlevel_init.S b/arch/arm/mach-tegra/lowlevel_init.S -deleted file mode 100644 -index 626f1b642745..000000000000 ---- a/arch/arm/mach-tegra/lowlevel_init.S -+++ /dev/null -@@ -1,39 +0,0 @@ --/* SPDX-License-Identifier: GPL-2.0+ */ --/* -- * SoC-specific setup info -- * -- * (C) Copyright 2010,2011 -- * NVIDIA Corporation -- */ -- --#include --#include -- --#ifdef CONFIG_ARM64 -- .align 5 --ENTRY(reset_cpu) -- /* get address for global reset register */ -- ldr x1, =PRM_RSTCTRL -- ldr w3, [x1] -- /* force reset */ -- orr w3, w3, #0x10 -- str w3, [x1] -- mov w0, w0 --1: -- b 1b --ENDPROC(reset_cpu) --#else -- .align 5 --ENTRY(reset_cpu) -- ldr r1, rstctl @ get addr for global reset -- @ reg -- ldr r3, [r1] -- orr r3, r3, #0x10 -- str r3, [r1] @ force reset -- mov r0, r0 --_loop_forever: -- b _loop_forever --rstctl: -- .word PRM_RSTCTRL --ENDPROC(reset_cpu) --#endif -diff --git a/arch/arm/mach-tegra/pmc.c b/arch/arm/mach-tegra/pmc.c -new file mode 100644 -index 000000000000..afd3c54179c1 ---- /dev/null -+++ b/arch/arm/mach-tegra/pmc.c -@@ -0,0 +1,92 @@ -+/* SPDX-License-Identifier: GPL-2.0 */ -+/* -+ * Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved. -+ */ -+ -+#include -+ -+#include -+ -+#include -+#include -+ -+DECLARE_GLOBAL_DATA_PTR; -+ -+#if IS_ENABLED(CONFIG_TEGRA_PMC_SECURE) -+static bool tegra_pmc_detect_tz_only(void) -+{ -+ static bool initialized = false; -+ static bool is_tz_only = false; -+ u32 value, saved; -+ -+ if (!initialized) { -+ saved = readl(NV_PA_PMC_BASE + PMC_SCRATCH0); -+ value = saved ^ 0xffffffff; -+ -+ if (value == 0xffffffff) -+ value = 0xdeadbeef; -+ -+ /* write pattern and read it back */ -+ writel(value, NV_PA_PMC_BASE + PMC_SCRATCH0); -+ value = readl(NV_PA_PMC_BASE + PMC_SCRATCH0); -+ -+ /* if we read all-zeroes, access is restricted to TZ only */ -+ if (value == 0) { -+ debug("access to PMC is restricted to TZ\n"); -+ is_tz_only = true; -+ } else { -+ /* restore original value */ -+ writel(saved, NV_PA_PMC_BASE + PMC_SCRATCH0); -+ } -+ -+ initialized = true; -+ } -+ -+ return is_tz_only; -+} -+#endif -+ -+uint32_t tegra_pmc_readl(unsigned long offset) -+{ -+#if IS_ENABLED(CONFIG_TEGRA_PMC_SECURE) -+ if (tegra_pmc_detect_tz_only()) { -+ struct arm_smccc_res res; -+ -+ arm_smccc_smc(TEGRA_SMC_PMC, TEGRA_SMC_PMC_READ, offset, 0, 0, -+ 0, 0, 0, &res); -+ if (res.a0) -+ printf("%s(): SMC failed: %lu\n", __func__, res.a0); -+ -+ return res.a1; -+ } -+#endif -+ -+ return readl(NV_PA_PMC_BASE + offset); -+} -+ -+void tegra_pmc_writel(u32 value, unsigned long offset) -+{ -+#if IS_ENABLED(CONFIG_TEGRA_PMC_SECURE) -+ if (tegra_pmc_detect_tz_only()) { -+ struct arm_smccc_res res; -+ -+ arm_smccc_smc(TEGRA_SMC_PMC, TEGRA_SMC_PMC_WRITE, offset, -+ value, 0, 0, 0, 0, &res); -+ if (res.a0) -+ printf("%s(): SMC failed: %lu\n", __func__, res.a0); -+ -+ return; -+ } -+#endif -+ -+ writel(value, NV_PA_PMC_BASE + offset); -+} -+ -+void reset_cpu(ulong addr) -+{ -+ u32 value; -+ -+ value = tegra_pmc_readl(PMC_CNTRL); -+ value |= PMC_CNTRL_MAIN_RST; -+ tegra_pmc_writel(value, PMC_CNTRL); -+} -diff --git a/arch/arm/mach-tegra/powergate.c b/arch/arm/mach-tegra/powergate.c -index e45f0961b242..761c9ef19e3b 100644 ---- a/arch/arm/mach-tegra/powergate.c -+++ b/arch/arm/mach-tegra/powergate.c -@@ -1,6 +1,6 @@ - // SPDX-License-Identifier: GPL-2.0 - /* -- * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved. -+ * Copyright (c) 2014-2019, NVIDIA CORPORATION. All rights reserved. - */ - - #include -@@ -11,6 +11,7 @@ - - #include - #include -+#include - - #define PWRGATE_TOGGLE 0x30 - #define PWRGATE_TOGGLE_START (1 << 8) -@@ -24,18 +25,18 @@ static int tegra_powergate_set(enum tegra_powergate id, bool state) - u32 value, mask = state ? (1 << id) : 0, old_mask; - unsigned long start, timeout = 25; - -- value = readl(NV_PA_PMC_BASE + PWRGATE_STATUS); -+ value = tegra_pmc_readl(PWRGATE_STATUS); - old_mask = value & (1 << id); - - if (mask == old_mask) - return 0; - -- writel(PWRGATE_TOGGLE_START | id, NV_PA_PMC_BASE + PWRGATE_TOGGLE); -+ tegra_pmc_writel(PWRGATE_TOGGLE_START | id, PWRGATE_TOGGLE); - - start = get_timer(0); - - while (get_timer(start) < timeout) { -- value = readl(NV_PA_PMC_BASE + PWRGATE_STATUS); -+ value = tegra_pmc_readl(PWRGATE_STATUS); - if ((value & (1 << id)) == mask) - return 0; - } -@@ -69,7 +70,7 @@ static int tegra_powergate_remove_clamping(enum tegra_powergate id) - else - value = 1 << id; - -- writel(value, NV_PA_PMC_BASE + REMOVE_CLAMPING); -+ tegra_pmc_writel(value, REMOVE_CLAMPING); - - return 0; - } - -From patchwork Mon Mar 18 23:24:17 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot, v2, - 10/15] ARM: tegra: Workaround UDC boot issues only if necessary -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1058157 -X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190318232422.24404-11-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de, Stephen Warren -Date: Tue, 19 Mar 2019 00:24:17 +0100 -From: Thierry Reding -List-Id: U-Boot discussion - -From: Thierry Reding - -Resetting the USB device controller on boot is only necessary if the SoC -actually has a UDC controller and U-Boot enables support for it. All the -Tegra boards support UDC via the ChipIdea UDC driver, so make the UDC on -boot workaround depend on the ChipIdea UDC driver. - -This prevents a crash on Tegra186 which does not have the ChipIdea UDC. - -Signed-off-by: Thierry Reding ---- - arch/arm/mach-tegra/Kconfig | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig -index 28914a34a1b5..faa73559fd42 100644 ---- a/arch/arm/mach-tegra/Kconfig -+++ b/arch/arm/mach-tegra/Kconfig -@@ -148,6 +148,7 @@ endchoice - - config TEGRA_DISCONNECT_UDC_ON_BOOT - bool "Disconnect USB device mode controller on boot" -+ depends on CI_UDC - default y - help - When loading U-Boot into RAM over USB protocols using tools such as - -From patchwork Mon Mar 18 23:24:18 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v2,11/15] ARM: tegra: Restore DRAM bank count -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1058154 -X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190318232422.24404-12-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de, Stephen Warren -Date: Tue, 19 Mar 2019 00:24:18 +0100 -From: Thierry Reding -List-Id: U-Boot discussion - -From: Thierry Reding - -Commit 86cf1c82850f ("configs: Migrate CONFIG_NR_DRAM_BANKS") reduced -the number of DRAM banks supported by U-Boot from 1026 to 8 on P2771-000 -boards. - -However, as explained in commit a9819b9e33bd ("ARM: tegra: p2771-000: -increase max DRAM bank count"), the platform can have a large number of -unusable chunks of memory (up to 1024), so a total of 1026 DRAM banks -are needed to describe the worst-case situation. - -In practice the number of DRAM banks needed will typically be much -lower, but we should be prepared to properly deal with the worst case. - -Signed-off-by: Thierry Reding ---- - configs/p2771-0000-000_defconfig | 2 +- - configs/p2771-0000-500_defconfig | 2 +- - 2 files changed, 2 insertions(+), 2 deletions(-) - -diff --git a/configs/p2771-0000-000_defconfig b/configs/p2771-0000-000_defconfig -index ac85efa37b3b..ad0802067e73 100644 ---- a/configs/p2771-0000-000_defconfig -+++ b/configs/p2771-0000-000_defconfig -@@ -2,7 +2,7 @@ CONFIG_ARM=y - CONFIG_TEGRA=y - CONFIG_SYS_TEXT_BASE=0x80080000 - CONFIG_TEGRA186=y --CONFIG_NR_DRAM_BANKS=8 -+CONFIG_NR_DRAM_BANKS=1026 - CONFIG_OF_SYSTEM_SETUP=y - CONFIG_CONSOLE_MUX=y - CONFIG_SYS_STDIO_DEREGISTER=y -diff --git a/configs/p2771-0000-500_defconfig b/configs/p2771-0000-500_defconfig -index df4d914d85cf..459b67fd195f 100644 ---- a/configs/p2771-0000-500_defconfig -+++ b/configs/p2771-0000-500_defconfig -@@ -2,7 +2,7 @@ CONFIG_ARM=y - CONFIG_TEGRA=y - CONFIG_SYS_TEXT_BASE=0x80080000 - CONFIG_TEGRA186=y --CONFIG_NR_DRAM_BANKS=8 -+CONFIG_NR_DRAM_BANKS=1026 - CONFIG_OF_SYSTEM_SETUP=y - CONFIG_CONSOLE_MUX=y - CONFIG_SYS_STDIO_DEREGISTER=y - -From patchwork Mon Mar 18 23:24:19 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v2,12/15] ARM: tegra: Unify Tegra186 builds -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1058151 -X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190318232422.24404-13-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de, Stephen Warren -Date: Tue, 19 Mar 2019 00:24:19 +0100 -From: Thierry Reding -List-Id: U-Boot discussion - -From: Thierry Reding - -Tegra186 build are currently dealt with in very special ways, which is -because Tegra186 is fundamentally different in many respects. It is no -longer necessary to do many of the low-level programming because early -boot firmware will already have taken care of it. - -Unfortunately, separating Tegra186 builds from the rest in this way -makes it difficult to share code with prior generations of Tegra. With -all of the low-level programming code behind Kconfig guards, the build -for Tegra186 can again be unified. - -As a side-effect, and partial reason for this change, other Tegra SoC -generations can now make use of the code that deals with taking over a -boot from earlier bootloaders. This used to be nvtboot, but has been -replaced by cboot nowadays. Rename the files and functions related to -this to avoid confusion. The implemented protocols are unchanged. - -Signed-off-by: Thierry Reding ---- - arch/arm/include/asm/arch-tegra/cboot.h | 39 ++++ - arch/arm/mach-tegra/Makefile | 4 +- - arch/arm/mach-tegra/board.c | 23 ++ - arch/arm/mach-tegra/board186.c | 32 --- - arch/arm/mach-tegra/board2.c | 21 ++ - .../{tegra186/nvtboot_board.c => cboot.c} | 202 ++++++++++++++++-- - .../{tegra186/nvtboot_ll.S => cboot_ll.S} | 12 +- - arch/arm/mach-tegra/tegra186/Makefile | 4 - - arch/arm/mach-tegra/tegra186/nvtboot_mem.c | 172 --------------- - board/nvidia/p2771-0000/p2771-0000.c | 10 +- - 10 files changed, 279 insertions(+), 240 deletions(-) - create mode 100644 arch/arm/include/asm/arch-tegra/cboot.h - delete mode 100644 arch/arm/mach-tegra/board186.c - rename arch/arm/mach-tegra/{tegra186/nvtboot_board.c => cboot.c} (55%) - rename arch/arm/mach-tegra/{tegra186/nvtboot_ll.S => cboot_ll.S} (57%) - delete mode 100644 arch/arm/mach-tegra/tegra186/nvtboot_mem.c - -diff --git a/arch/arm/include/asm/arch-tegra/cboot.h b/arch/arm/include/asm/arch-tegra/cboot.h -new file mode 100644 -index 000000000000..b3441ec178b3 ---- /dev/null -+++ b/arch/arm/include/asm/arch-tegra/cboot.h -@@ -0,0 +1,39 @@ -+/* SPDX-License-Identifier: GPL-2.0+ */ -+/* -+ * Copyright (c) 2019 NVIDIA Corporation. All rights reserved. -+ */ -+ -+#ifndef _TEGRA_CBOOT_H_ -+#define _TEGRA_CBOOT_H_ -+ -+#ifdef CONFIG_ARM64 -+extern unsigned long cboot_boot_x0; -+ -+void cboot_save_boot_params(unsigned long x0, unsigned long x1, -+ unsigned long x2, unsigned long x3); -+int cboot_dram_init(void); -+int cboot_dram_init_banksize(void); -+ulong cboot_get_usable_ram_top(ulong total_size); -+#else -+static inline void cboot_save_boot_params(unsigned long x0, unsigned long x1, -+ unsigned long x2, unsigned long x3) -+{ -+} -+ -+static inline int cboot_dram_init(void) -+{ -+ return -ENOSYS; -+} -+ -+static inline int cboot_dram_init_banksize(void) -+{ -+ return -ENOSYS; -+} -+ -+static inline ulong cboot_get_usable_ram_top(ulong total_size) -+{ -+ return 0; -+} -+#endif -+ -+#endif -diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile -index f8bc65aa8b18..41ba674edff4 100644 ---- a/arch/arm/mach-tegra/Makefile -+++ b/arch/arm/mach-tegra/Makefile -@@ -5,7 +5,6 @@ - # (C) Copyright 2000-2008 - # Wolfgang Denk, DENX Software Engineering, wd@denx.de. - --ifndef CONFIG_TEGRA186 - ifdef CONFIG_SPL_BUILD - obj-y += spl.o - obj-y += cpu.o -@@ -20,9 +19,8 @@ obj-$(CONFIG_TEGRA_CLKRST) += clock.o - obj-$(CONFIG_TEGRA_PINCTRL) += pinmux-common.o - obj-$(CONFIG_TEGRA_PMC) += powergate.o - obj-y += xusb-padctl-dummy.o --endif - --obj-$(CONFIG_ARM64) += arm64-mmu.o -+obj-$(CONFIG_ARM64) += arm64-mmu.o cboot_ll.o cboot.o - obj-y += dt-setup.o - obj-$(CONFIG_TEGRA_CLOCK_SCALING) += emc.o - obj-$(CONFIG_TEGRA_GPU) += gpu.o -diff --git a/arch/arm/mach-tegra/board.c b/arch/arm/mach-tegra/board.c -index 59d2f347485d..c3ba00811e83 100644 ---- a/arch/arm/mach-tegra/board.c -+++ b/arch/arm/mach-tegra/board.c -@@ -21,6 +21,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -46,6 +47,21 @@ void save_boot_params(unsigned long r0, unsigned long r1, unsigned long r2, - unsigned long r3) - { - from_spl = r0 != UBOOT_NOT_LOADED_FROM_SPL; -+ -+ /* -+ * The logic for this is somewhat indirect. The purpose of the marker -+ * (UBOOT_NOT_LOADED_FROM_SPL) is in fact used to determine if U-Boot -+ * was loaded from a read-only instance of itself, which is something -+ * that can happen in secure boot setups. So basically the presence -+ * of the marker is an indication that U-Boot was loaded by one such -+ * special variant of U-Boot. Conversely, the absence of the marker -+ * indicates that this instance of U-Boot was loaded by something -+ * other than a special U-Boot. This could be SPL, but it could just -+ * as well be one of any number of other first stage bootloaders. -+ */ -+ if (from_spl) -+ cboot_save_boot_params(r0, r1, r2, r3); -+ - save_boot_params_ret(); - } - #endif -@@ -127,6 +143,13 @@ static phys_size_t query_sdram_size(void) - - int dram_init(void) - { -+ int err; -+ -+ /* try to initialize DRAM from cboot DTB first */ -+ err = cboot_dram_init(); -+ if (err == 0) -+ return 0; -+ - #if IS_ENABLED(CONFIG_TEGRA_MC) - /* We do not initialise DRAM here. We just query the size */ - gd->ram_size = query_sdram_size(); -diff --git a/arch/arm/mach-tegra/board186.c b/arch/arm/mach-tegra/board186.c -deleted file mode 100644 -index 80b55707e90f..000000000000 ---- a/arch/arm/mach-tegra/board186.c -+++ /dev/null -@@ -1,32 +0,0 @@ --// SPDX-License-Identifier: GPL-2.0+ --/* -- * Copyright (c) 2016, NVIDIA CORPORATION. -- */ -- --#include --#include -- --int board_early_init_f(void) --{ -- return 0; --} -- --__weak int tegra_board_init(void) --{ -- return 0; --} -- --int board_init(void) --{ -- return tegra_board_init(); --} -- --__weak int tegra_soc_board_init_late(void) --{ -- return 0; --} -- --int board_late_init(void) --{ -- return tegra_soc_board_init_late(); --} -diff --git a/arch/arm/mach-tegra/board2.c b/arch/arm/mach-tegra/board2.c -index ce1c9346959d..bbc487aa3bf6 100644 ---- a/arch/arm/mach-tegra/board2.c -+++ b/arch/arm/mach-tegra/board2.c -@@ -13,6 +13,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -51,6 +52,7 @@ __weak void pin_mux_mmc(void) {} - __weak void gpio_early_init_uart(void) {} - __weak void pin_mux_display(void) {} - __weak void start_cpu_fan(void) {} -+__weak void cboot_late_init(void) {} - - #if defined(CONFIG_TEGRA_NAND) - __weak void pin_mux_nand(void) -@@ -243,6 +245,7 @@ int board_late_init(void) - } - #endif - start_cpu_fan(); -+ cboot_late_init(); - - return 0; - } -@@ -337,6 +340,15 @@ static ulong usable_ram_size_below_4g(void) - */ - int dram_init_banksize(void) - { -+ int err; -+ -+ /* try to compute DRAM bank size based on cboot DTB first */ -+ err = cboot_dram_init_banksize(); -+ if (err == 0) -+ return err; -+ -+ /* fall back to default DRAM bank size computation */ -+ - gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; - gd->bd->bi_dram[0].size = usable_ram_size_below_4g(); - -@@ -370,5 +382,14 @@ int dram_init_banksize(void) - */ - ulong board_get_usable_ram_top(ulong total_size) - { -+ ulong ram_top; -+ -+ /* try to get top of usable RAM based on cboot DTB first */ -+ ram_top = cboot_get_usable_ram_top(total_size); -+ if (ram_top > 0) -+ return ram_top; -+ -+ /* fall back to default usable RAM computation */ -+ - return CONFIG_SYS_SDRAM_BASE + usable_ram_size_below_4g(); - } -diff --git a/arch/arm/mach-tegra/tegra186/nvtboot_board.c b/arch/arm/mach-tegra/cboot.c -similarity index 55% -rename from arch/arm/mach-tegra/tegra186/nvtboot_board.c -rename to arch/arm/mach-tegra/cboot.c -index 83c0e931ea24..2bca98c92898 100644 ---- a/arch/arm/mach-tegra/tegra186/nvtboot_board.c -+++ b/arch/arm/mach-tegra/cboot.c -@@ -3,14 +3,182 @@ - * Copyright (c) 2016-2018, NVIDIA CORPORATION. - */ - --#include - #include - #include - #include -+#include -+ -+#include -+ - #include -+#include - #include - --extern unsigned long nvtboot_boot_x0; -+/* -+ * Size of a region that's large enough to hold the relocated U-Boot and all -+ * other allocations made around it (stack, heap, page tables, etc.) -+ * In practice, running "bdinfo" at the shell prompt, the stack reaches about -+ * 5MB from the address selected for ram_top as of the time of writing, -+ * so a 16MB region should be plenty. -+ */ -+#define MIN_USABLE_RAM_SIZE SZ_16M -+/* -+ * The amount of space we expect to require for stack usage. Used to validate -+ * that all reservations fit into the region selected for the relocation target -+ */ -+#define MIN_USABLE_STACK_SIZE SZ_1M -+ -+DECLARE_GLOBAL_DATA_PTR; -+ -+extern struct mm_region tegra_mem_map[]; -+ -+/* -+ * These variables are written to before relocation, and hence cannot be -+ * in.bss, since .bss overlaps the DTB that's appended to the U-Boot binary. -+ * The section attribute forces this into .data and avoids this issue. This -+ * also has the nice side-effect of the content being valid after relocation. -+ */ -+ -+/* The number of valid entries in ram_banks[] */ -+static int ram_bank_count __attribute__((section(".data"))); -+ -+/* -+ * The usable top-of-RAM for U-Boot. This is both: -+ * a) Below 4GB to avoid issues with peripherals that use 32-bit addressing. -+ * b) At the end of a region that has enough space to hold the relocated U-Boot -+ * and all other allocations made around it (stack, heap, page tables, etc.) -+ */ -+static u64 ram_top __attribute__((section(".data"))); -+/* The base address of the region of RAM that ends at ram_top */ -+static u64 region_base __attribute__((section(".data"))); -+ -+int cboot_dram_init(void) -+{ -+ unsigned int na, ns; -+ const void *cboot_blob = (void *)cboot_boot_x0; -+ int node, len, i; -+ const u32 *prop; -+ -+ if (!cboot_blob) -+ return -EINVAL; -+ -+ na = fdtdec_get_uint(cboot_blob, 0, "#address-cells", 2); -+ ns = fdtdec_get_uint(cboot_blob, 0, "#size-cells", 2); -+ -+ node = fdt_path_offset(cboot_blob, "/memory"); -+ if (node < 0) { -+ pr_err("Can't find /memory node in cboot DTB"); -+ hang(); -+ } -+ prop = fdt_getprop(cboot_blob, node, "reg", &len); -+ if (!prop) { -+ pr_err("Can't find /memory/reg property in cboot DTB"); -+ hang(); -+ } -+ -+ /* Calculate the true # of base/size pairs to read */ -+ len /= 4; /* Convert bytes to number of cells */ -+ len /= (na + ns); /* Convert cells to number of banks */ -+ if (len > CONFIG_NR_DRAM_BANKS) -+ len = CONFIG_NR_DRAM_BANKS; -+ -+ /* Parse the /memory node, and save useful entries */ -+ gd->ram_size = 0; -+ ram_bank_count = 0; -+ for (i = 0; i < len; i++) { -+ u64 bank_start, bank_end, bank_size, usable_bank_size; -+ -+ /* Extract raw memory region data from DTB */ -+ bank_start = fdt_read_number(prop, na); -+ prop += na; -+ bank_size = fdt_read_number(prop, ns); -+ prop += ns; -+ gd->ram_size += bank_size; -+ bank_end = bank_start + bank_size; -+ debug("Bank %d: %llx..%llx (+%llx)\n", i, -+ bank_start, bank_end, bank_size); -+ -+ /* -+ * Align the bank to MMU section size. This is not strictly -+ * necessary, since the translation table construction code -+ * handles page granularity without issue. However, aligning -+ * the MMU entries reduces the size and number of levels in the -+ * page table, so is worth it. -+ */ -+ bank_start = ROUND(bank_start, SZ_2M); -+ bank_end = bank_end & ~(SZ_2M - 1); -+ bank_size = bank_end - bank_start; -+ debug(" aligned: %llx..%llx (+%llx)\n", -+ bank_start, bank_end, bank_size); -+ if (bank_end <= bank_start) -+ continue; -+ -+ /* Record data used to create MMU translation tables */ -+ ram_bank_count++; -+ /* Index below is deliberately 1-based to skip MMIO entry */ -+ tegra_mem_map[ram_bank_count].virt = bank_start; -+ tegra_mem_map[ram_bank_count].phys = bank_start; -+ tegra_mem_map[ram_bank_count].size = bank_size; -+ tegra_mem_map[ram_bank_count].attrs = -+ PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_INNER_SHARE; -+ -+ /* Determine best bank to relocate U-Boot into */ -+ if (bank_end > SZ_4G) -+ bank_end = SZ_4G; -+ debug(" end %llx (usable)\n", bank_end); -+ usable_bank_size = bank_end - bank_start; -+ debug(" size %llx (usable)\n", usable_bank_size); -+ if ((usable_bank_size >= MIN_USABLE_RAM_SIZE) && -+ (bank_end > ram_top)) { -+ ram_top = bank_end; -+ region_base = bank_start; -+ debug("ram top now %llx\n", ram_top); -+ } -+ } -+ -+ /* Ensure memory map contains the desired sentinel entry */ -+ tegra_mem_map[ram_bank_count + 1].virt = 0; -+ tegra_mem_map[ram_bank_count + 1].phys = 0; -+ tegra_mem_map[ram_bank_count + 1].size = 0; -+ tegra_mem_map[ram_bank_count + 1].attrs = 0; -+ -+ /* Error out if a relocation target couldn't be found */ -+ if (!ram_top) { -+ pr_err("Can't find a usable RAM top"); -+ hang(); -+ } -+ -+ return 0; -+} -+ -+int cboot_dram_init_banksize(void) -+{ -+ int i; -+ -+ if (ram_bank_count == 0) -+ return -EINVAL; -+ -+ if ((gd->start_addr_sp - region_base) < MIN_USABLE_STACK_SIZE) { -+ pr_err("Reservations exceed chosen region size"); -+ hang(); -+ } -+ -+ for (i = 0; i < ram_bank_count; i++) { -+ gd->bd->bi_dram[i].start = tegra_mem_map[1 + i].virt; -+ gd->bd->bi_dram[i].size = tegra_mem_map[1 + i].size; -+ } -+ -+#ifdef CONFIG_PCI -+ gd->pci_ram_top = ram_top; -+#endif -+ -+ return 0; -+} -+ -+ulong cboot_get_usable_ram_top(ulong total_size) -+{ -+ return ram_top; -+} - - /* - * The following few functions run late during the boot process and dynamically -@@ -23,8 +191,6 @@ extern unsigned long nvtboot_boot_x0; - * list of RAM banks into some private data structure before running. - */ - --extern struct mm_region tegra_mem_map[]; -- - static char *gen_varname(const char *var, const char *ext) - { - size_t len_var = strlen(var); -@@ -235,7 +401,7 @@ static void set_calculated_env_vars(void) - dump_ram_banks(); - #endif - -- reserve_ram(nvtboot_boot_x0, fdt_totalsize(nvtboot_boot_x0)); -+ reserve_ram(cboot_boot_x0, fdt_totalsize(cboot_boot_x0)); - - #ifdef DEBUG - printf("RAM after reserving cboot DTB:\n"); -@@ -262,7 +428,7 @@ static void set_calculated_env_vars(void) - debug("%s: var: %s\n", __func__, var); - set_calculated_env_var(var); - #ifdef DEBUG -- printf("RAM banks affter allocating %s:\n", var); -+ printf("RAM banks after allocating %s:\n", var); - dump_ram_banks(); - #endif - } -@@ -274,9 +440,9 @@ static int set_fdt_addr(void) - { - int ret; - -- ret = env_set_hex("fdt_addr", nvtboot_boot_x0); -+ ret = env_set_hex("fdtaddr", cboot_boot_x0); - if (ret) { -- printf("Failed to set fdt_addr to point at DTB: %d\n", ret); -+ printf("Failed to set fdtaddr to point at DTB: %d\n", ret); - return ret; - } - -@@ -284,12 +450,12 @@ static int set_fdt_addr(void) - } - - /* -- * Attempt to use /chosen/nvidia,ether-mac in the nvtboot DTB to U-Boot's -+ * Attempt to use /chosen/nvidia,ethernet-mac in the cboot DTB to U-Boot's - * ethaddr environment variable if possible. - */ --static int set_ethaddr_from_nvtboot(void) -+static int set_ethaddr_from_cboot(void) - { -- const void *nvtboot_blob = (void *)nvtboot_boot_x0; -+ const void *cboot_blob = (void *)cboot_boot_x0; - int ret, node, len; - const u32 *prop; - -@@ -297,27 +463,27 @@ static int set_ethaddr_from_nvtboot(void) - if (env_get("ethaddr")) - return 0; - -- node = fdt_path_offset(nvtboot_blob, "/chosen"); -+ node = fdt_path_offset(cboot_blob, "/chosen"); - if (node < 0) { -- printf("Can't find /chosen node in nvtboot DTB\n"); -+ printf("Can't find /chosen node in cboot DTB\n"); - return node; - } -- prop = fdt_getprop(nvtboot_blob, node, "nvidia,ether-mac", &len); -+ prop = fdt_getprop(cboot_blob, node, "nvidia,ethernet-mac", &len); - if (!prop) { -- printf("Can't find nvidia,ether-mac property in nvtboot DTB\n"); -+ printf("Can't find nvidia,ether-mac property in cboot DTB\n"); - return -ENOENT; - } - - ret = env_set("ethaddr", (void *)prop); - if (ret) { -- printf("Failed to set ethaddr from nvtboot DTB: %d\n", ret); -+ printf("Failed to set ethaddr from cboot DTB: %d\n", ret); - return ret; - } - - return 0; - } - --int tegra_soc_board_init_late(void) -+int cboot_late_init(void) - { - set_calculated_env_vars(); - /* -@@ -326,7 +492,7 @@ int tegra_soc_board_init_late(void) - */ - set_fdt_addr(); - /* Ignore errors here; not all cases care about Ethernet addresses */ -- set_ethaddr_from_nvtboot(); -+ set_ethaddr_from_cboot(); - - return 0; - } -diff --git a/arch/arm/mach-tegra/tegra186/nvtboot_ll.S b/arch/arm/mach-tegra/cboot_ll.S -similarity index 57% -rename from arch/arm/mach-tegra/tegra186/nvtboot_ll.S -rename to arch/arm/mach-tegra/cboot_ll.S -index aa7a863d9702..4c9ddacc2b39 100644 ---- a/arch/arm/mach-tegra/tegra186/nvtboot_ll.S -+++ b/arch/arm/mach-tegra/cboot_ll.S -@@ -1,6 +1,6 @@ - /* SPDX-License-Identifier: GPL-2.0+ */ - /* -- * Save nvtboot-related boot-time CPU state -+ * Save cboot-related boot-time CPU state - * - * (C) Copyright 2015-2016 NVIDIA Corporation - */ -@@ -9,12 +9,12 @@ - #include - - .align 8 --.globl nvtboot_boot_x0 --nvtboot_boot_x0: -+.globl cboot_boot_x0 -+cboot_boot_x0: - .dword 0 - --ENTRY(save_boot_params) -- adr x8, nvtboot_boot_x0 -+ENTRY(cboot_save_boot_params) -+ adr x8, cboot_boot_x0 - str x0, [x8] - b save_boot_params_ret --ENDPROC(save_boot_params) -+ENDPROC(cboot_save_boot_params) -diff --git a/arch/arm/mach-tegra/tegra186/Makefile b/arch/arm/mach-tegra/tegra186/Makefile -index 56f3378ecea3..3a2405027704 100644 ---- a/arch/arm/mach-tegra/tegra186/Makefile -+++ b/arch/arm/mach-tegra/tegra186/Makefile -@@ -2,8 +2,4 @@ - # - # SPDX-License-Identifier: GPL-2.0 - --obj-y += ../board186.o - obj-y += cache.o --obj-y += nvtboot_board.o --obj-y += nvtboot_ll.o --obj-y += nvtboot_mem.o -diff --git a/arch/arm/mach-tegra/tegra186/nvtboot_mem.c b/arch/arm/mach-tegra/tegra186/nvtboot_mem.c -deleted file mode 100644 -index 62142821a595..000000000000 ---- a/arch/arm/mach-tegra/tegra186/nvtboot_mem.c -+++ /dev/null -@@ -1,172 +0,0 @@ --// SPDX-License-Identifier: GPL-2.0+ --/* -- * Copyright (c) 2016-2018, NVIDIA CORPORATION. -- */ -- --#include --#include --#include --#include --#include --#include -- --/* -- * Size of a region that's large enough to hold the relocated U-Boot and all -- * other allocations made around it (stack, heap, page tables, etc.) -- * In practice, running "bdinfo" at the shell prompt, the stack reaches about -- * 5MB from the address selected for ram_top as of the time of writing, -- * so a 16MB region should be plenty. -- */ --#define MIN_USABLE_RAM_SIZE SZ_16M --/* -- * The amount of space we expect to require for stack usage. Used to validate -- * that all reservations fit into the region selected for the relocation target -- */ --#define MIN_USABLE_STACK_SIZE SZ_1M -- --DECLARE_GLOBAL_DATA_PTR; -- --extern unsigned long nvtboot_boot_x0; --extern struct mm_region tegra_mem_map[]; -- --/* -- * These variables are written to before relocation, and hence cannot be -- * in.bss, since .bss overlaps the DTB that's appended to the U-Boot binary. -- * The section attribute forces this into .data and avoids this issue. This -- * also has the nice side-effect of the content being valid after relocation. -- */ -- --/* The number of valid entries in ram_banks[] */ --static int ram_bank_count __attribute__((section(".data"))); -- --/* -- * The usable top-of-RAM for U-Boot. This is both: -- * a) Below 4GB to avoid issues with peripherals that use 32-bit addressing. -- * b) At the end of a region that has enough space to hold the relocated U-Boot -- * and all other allocations made around it (stack, heap, page tables, etc.) -- */ --static u64 ram_top __attribute__((section(".data"))); --/* The base address of the region of RAM that ends at ram_top */ --static u64 region_base __attribute__((section(".data"))); -- --int dram_init(void) --{ -- unsigned int na, ns; -- const void *nvtboot_blob = (void *)nvtboot_boot_x0; -- int node, len, i; -- const u32 *prop; -- -- na = fdtdec_get_uint(nvtboot_blob, 0, "#address-cells", 2); -- ns = fdtdec_get_uint(nvtboot_blob, 0, "#size-cells", 2); -- -- node = fdt_path_offset(nvtboot_blob, "/memory"); -- if (node < 0) { -- pr_err("Can't find /memory node in nvtboot DTB"); -- hang(); -- } -- prop = fdt_getprop(nvtboot_blob, node, "reg", &len); -- if (!prop) { -- pr_err("Can't find /memory/reg property in nvtboot DTB"); -- hang(); -- } -- -- /* Calculate the true # of base/size pairs to read */ -- len /= 4; /* Convert bytes to number of cells */ -- len /= (na + ns); /* Convert cells to number of banks */ -- if (len > CONFIG_NR_DRAM_BANKS) -- len = CONFIG_NR_DRAM_BANKS; -- -- /* Parse the /memory node, and save useful entries */ -- gd->ram_size = 0; -- ram_bank_count = 0; -- for (i = 0; i < len; i++) { -- u64 bank_start, bank_end, bank_size, usable_bank_size; -- -- /* Extract raw memory region data from DTB */ -- bank_start = fdt_read_number(prop, na); -- prop += na; -- bank_size = fdt_read_number(prop, ns); -- prop += ns; -- gd->ram_size += bank_size; -- bank_end = bank_start + bank_size; -- debug("Bank %d: %llx..%llx (+%llx)\n", i, -- bank_start, bank_end, bank_size); -- -- /* -- * Align the bank to MMU section size. This is not strictly -- * necessary, since the translation table construction code -- * handles page granularity without issue. However, aligning -- * the MMU entries reduces the size and number of levels in the -- * page table, so is worth it. -- */ -- bank_start = ROUND(bank_start, SZ_2M); -- bank_end = bank_end & ~(SZ_2M - 1); -- bank_size = bank_end - bank_start; -- debug(" aligned: %llx..%llx (+%llx)\n", -- bank_start, bank_end, bank_size); -- if (bank_end <= bank_start) -- continue; -- -- /* Record data used to create MMU translation tables */ -- ram_bank_count++; -- /* Index below is deliberately 1-based to skip MMIO entry */ -- tegra_mem_map[ram_bank_count].virt = bank_start; -- tegra_mem_map[ram_bank_count].phys = bank_start; -- tegra_mem_map[ram_bank_count].size = bank_size; -- tegra_mem_map[ram_bank_count].attrs = -- PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_INNER_SHARE; -- -- /* Determine best bank to relocate U-Boot into */ -- if (bank_end > SZ_4G) -- bank_end = SZ_4G; -- debug(" end %llx (usable)\n", bank_end); -- usable_bank_size = bank_end - bank_start; -- debug(" size %llx (usable)\n", usable_bank_size); -- if ((usable_bank_size >= MIN_USABLE_RAM_SIZE) && -- (bank_end > ram_top)) { -- ram_top = bank_end; -- region_base = bank_start; -- debug("ram top now %llx\n", ram_top); -- } -- } -- -- /* Ensure memory map contains the desired sentinel entry */ -- tegra_mem_map[ram_bank_count + 1].virt = 0; -- tegra_mem_map[ram_bank_count + 1].phys = 0; -- tegra_mem_map[ram_bank_count + 1].size = 0; -- tegra_mem_map[ram_bank_count + 1].attrs = 0; -- -- /* Error out if a relocation target couldn't be found */ -- if (!ram_top) { -- pr_err("Can't find a usable RAM top"); -- hang(); -- } -- -- return 0; --} -- --int dram_init_banksize(void) --{ -- int i; -- -- if ((gd->start_addr_sp - region_base) < MIN_USABLE_STACK_SIZE) { -- pr_err("Reservations exceed chosen region size"); -- hang(); -- } -- -- for (i = 0; i < ram_bank_count; i++) { -- gd->bd->bi_dram[i].start = tegra_mem_map[1 + i].virt; -- gd->bd->bi_dram[i].size = tegra_mem_map[1 + i].size; -- } -- --#ifdef CONFIG_PCI -- gd->pci_ram_top = ram_top; --#endif -- -- return 0; --} -- --ulong board_get_usable_ram_top(ulong total_size) --{ -- return ram_top; --} -diff --git a/board/nvidia/p2771-0000/p2771-0000.c b/board/nvidia/p2771-0000/p2771-0000.c -index 496e8a02111e..6f88010c18c3 100644 ---- a/board/nvidia/p2771-0000/p2771-0000.c -+++ b/board/nvidia/p2771-0000/p2771-0000.c -@@ -7,7 +7,7 @@ - #include - #include "../p2571/max77620_init.h" - --int tegra_board_init(void) -+void pin_mux_mmc(void) - { - struct udevice *dev; - uchar val; -@@ -18,19 +18,18 @@ int tegra_board_init(void) - ret = i2c_get_chip_for_busnum(0, MAX77620_I2C_ADDR_7BIT, 1, &dev); - if (ret) { - printf("%s: Cannot find MAX77620 I2C chip\n", __func__); -- return ret; -+ return; - } - /* 0xF2 for 3.3v, enabled: bit7:6 = 11 = enable, bit5:0 = voltage */ - val = 0xF2; - ret = dm_i2c_write(dev, MAX77620_CNFG1_L3_REG, &val, 1); - if (ret) { - printf("i2c_write 0 0x3c 0x27 failed: %d\n", ret); -- return ret; -+ return; - } -- -- return 0; - } - -+#ifdef CONFIG_PCI_TEGRA - int tegra_pcie_board_init(void) - { - struct udevice *dev; -@@ -52,3 +51,4 @@ int tegra_pcie_board_init(void) - - return 0; - } -+#endif - -From patchwork Mon Mar 18 23:24:20 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot, v2, - 13/15] ARM: tegra: Implement cboot_save_boot_params() in C -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1058159 -X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190318232422.24404-14-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de, Stephen Warren -Date: Tue, 19 Mar 2019 00:24:20 +0100 -From: Thierry Reding -List-Id: U-Boot discussion - -From: Thierry Reding - -This is easier to deal with and works just as well for this simple -function. - -Signed-off-by: Thierry Reding ---- - arch/arm/mach-tegra/Makefile | 2 +- - arch/arm/mach-tegra/cboot.c | 12 ++++++++++++ - arch/arm/mach-tegra/cboot_ll.S | 20 -------------------- - 3 files changed, 13 insertions(+), 21 deletions(-) - delete mode 100644 arch/arm/mach-tegra/cboot_ll.S - -diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile -index 41ba674edff4..7165d70a60da 100644 ---- a/arch/arm/mach-tegra/Makefile -+++ b/arch/arm/mach-tegra/Makefile -@@ -20,7 +20,7 @@ obj-$(CONFIG_TEGRA_PINCTRL) += pinmux-common.o - obj-$(CONFIG_TEGRA_PMC) += powergate.o - obj-y += xusb-padctl-dummy.o - --obj-$(CONFIG_ARM64) += arm64-mmu.o cboot_ll.o cboot.o -+obj-$(CONFIG_ARM64) += arm64-mmu.o cboot.o - obj-y += dt-setup.o - obj-$(CONFIG_TEGRA_CLOCK_SCALING) += emc.o - obj-$(CONFIG_TEGRA_GPU) += gpu.o -diff --git a/arch/arm/mach-tegra/cboot.c b/arch/arm/mach-tegra/cboot.c -index 2bca98c92898..8708c4ec9727 100644 ---- a/arch/arm/mach-tegra/cboot.c -+++ b/arch/arm/mach-tegra/cboot.c -@@ -52,6 +52,18 @@ static u64 ram_top __attribute__((section(".data"))); - /* The base address of the region of RAM that ends at ram_top */ - static u64 region_base __attribute__((section(".data"))); - -+/* -+ * Explicitly put this in the .data section because it is written before the -+ * .bss section is zeroed out but it needs to persist. -+ */ -+unsigned long cboot_boot_x0 __attribute__((section(".data"))); -+ -+void cboot_save_boot_params(unsigned long x0, unsigned long x1, -+ unsigned long x2, unsigned long x3) -+{ -+ cboot_boot_x0 = x0; -+} -+ - int cboot_dram_init(void) - { - unsigned int na, ns; -diff --git a/arch/arm/mach-tegra/cboot_ll.S b/arch/arm/mach-tegra/cboot_ll.S -deleted file mode 100644 -index 4c9ddacc2b39..000000000000 ---- a/arch/arm/mach-tegra/cboot_ll.S -+++ /dev/null -@@ -1,20 +0,0 @@ --/* SPDX-License-Identifier: GPL-2.0+ */ --/* -- * Save cboot-related boot-time CPU state -- * -- * (C) Copyright 2015-2016 NVIDIA Corporation -- */ -- --#include --#include -- --.align 8 --.globl cboot_boot_x0 --cboot_boot_x0: -- .dword 0 -- --ENTRY(cboot_save_boot_params) -- adr x8, cboot_boot_x0 -- str x0, [x8] -- b save_boot_params_ret --ENDPROC(cboot_save_boot_params) - -From patchwork Mon Mar 18 23:24:21 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v2,14/15] ARM: tegra: Implement cboot_get_ethaddr() -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1058160 -X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190318232422.24404-15-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de, Stephen Warren -Date: Tue, 19 Mar 2019 00:24:21 +0100 -From: Thierry Reding -List-Id: U-Boot discussion - -From: Thierry Reding - -This function will attempt to look up an ethernet address in the DTB -that was passed in from cboot. It does so by first trying to locate the -primary ethernet device for the board (identified by the "ethernet" -alias) and if found, reads the "local-mac-address" property. If the -"ethernet" alias does not exist, or if it points to a device tree node -that doesn't exist, or if the device tree node that it points to does -not have a "local-mac-address" property or if the value is invalid, it -will fall back to the legacy mechanism of looking for the MAC address -stored in the "nvidia,ethernet-mac" property of the "/chosen" node. - -Signed-off-by: Thierry Reding ---- -Changes in v2: -- make dummy static inline to avoid duplicate definitions ---- - arch/arm/include/asm/arch-tegra/cboot.h | 6 ++ - arch/arm/mach-tegra/cboot.c | 78 ++++++++++++++++++++----- - 2 files changed, 69 insertions(+), 15 deletions(-) - -diff --git a/arch/arm/include/asm/arch-tegra/cboot.h b/arch/arm/include/asm/arch-tegra/cboot.h -index b3441ec178b3..021c24617575 100644 ---- a/arch/arm/include/asm/arch-tegra/cboot.h -+++ b/arch/arm/include/asm/arch-tegra/cboot.h -@@ -14,6 +14,7 @@ void cboot_save_boot_params(unsigned long x0, unsigned long x1, - int cboot_dram_init(void); - int cboot_dram_init_banksize(void); - ulong cboot_get_usable_ram_top(ulong total_size); -+int cboot_get_ethaddr(const void *fdt, uint8_t mac[ETH_ALEN]); - #else - static inline void cboot_save_boot_params(unsigned long x0, unsigned long x1, - unsigned long x2, unsigned long x3) -@@ -34,6 +35,11 @@ static inline ulong cboot_get_usable_ram_top(ulong total_size) - { - return 0; - } -+ -+static inline int cboot_get_ethaddr(const void *fdt, uint8_t mac[ETH_ALEN]) -+{ -+ return -ENOSYS; -+} - #endif - - #endif -diff --git a/arch/arm/mach-tegra/cboot.c b/arch/arm/mach-tegra/cboot.c -index 8708c4ec9727..c7a38d258cce 100644 ---- a/arch/arm/mach-tegra/cboot.c -+++ b/arch/arm/mach-tegra/cboot.c -@@ -4,6 +4,7 @@ - */ - - #include -+#include - #include - #include - #include -@@ -465,46 +466,93 @@ static int set_fdt_addr(void) - * Attempt to use /chosen/nvidia,ethernet-mac in the cboot DTB to U-Boot's - * ethaddr environment variable if possible. - */ --static int set_ethaddr_from_cboot(void) -+static int cboot_get_ethaddr_legacy(const void *fdt, uint8_t mac[ETH_ALEN]) - { -- const void *cboot_blob = (void *)cboot_boot_x0; -- int ret, node, len; -- const u32 *prop; -- -- /* Already a valid address in the environment? If so, keep it */ -- if (env_get("ethaddr")) -- return 0; -+ const char *prop; -+ int node, len; - -- node = fdt_path_offset(cboot_blob, "/chosen"); -+ node = fdt_path_offset(fdt, "/chosen"); - if (node < 0) { - printf("Can't find /chosen node in cboot DTB\n"); - return node; - } -- prop = fdt_getprop(cboot_blob, node, "nvidia,ethernet-mac", &len); -+ -+ prop = fdt_getprop(fdt, node, "nvidia,ethernet-mac", &len); - if (!prop) { - printf("Can't find nvidia,ether-mac property in cboot DTB\n"); - return -ENOENT; - } - -- ret = env_set("ethaddr", (void *)prop); -- if (ret) { -- printf("Failed to set ethaddr from cboot DTB: %d\n", ret); -- return ret; -+ eth_parse_enetaddr(prop, mac); -+ -+ if (!is_valid_ethaddr(mac)) { -+ printf("Invalid MAC address: %s\n", prop); -+ return -EINVAL; - } - -+ debug("Legacy MAC address: %pM\n", mac); -+ - return 0; - } - -+int cboot_get_ethaddr(const void *fdt, uint8_t mac[ETH_ALEN]) -+{ -+ int node, len, err = 0; -+ const uchar *prop; -+ const char *path; -+ -+ path = fdt_get_alias(fdt, "ethernet"); -+ if (!path) { -+ err = -ENOENT; -+ goto out; -+ } -+ -+ debug("ethernet alias found: %s\n", path); -+ -+ node = fdt_path_offset(fdt, path); -+ if (node < 0) { -+ err = -ENOENT; -+ goto out; -+ } -+ -+ prop = fdt_getprop(fdt, node, "local-mac-address", &len); -+ if (!prop) { -+ err = -ENOENT; -+ goto out; -+ } -+ -+ if (len != ETH_ALEN) { -+ err = -EINVAL; -+ goto out; -+ } -+ -+ debug("MAC address: %pM\n", prop); -+ memcpy(mac, prop, ETH_ALEN); -+ -+out: -+ if (err < 0) -+ err = cboot_get_ethaddr_legacy(fdt, mac); -+ -+ return err; -+} -+ - int cboot_late_init(void) - { -+ const void *fdt = (const void *)cboot_boot_x0; -+ uint8_t mac[ETH_ALEN]; -+ int err; -+ - set_calculated_env_vars(); - /* - * Ignore errors here; the value may not be used depending on - * extlinux.conf or boot script content. - */ - set_fdt_addr(); -+ - /* Ignore errors here; not all cases care about Ethernet addresses */ -- set_ethaddr_from_cboot(); -+ err = cboot_get_ethaddr(fdt, mac); -+ if (!err) -+ eth_env_set_enetaddr("ethaddr", mac); - - return 0; - } - From patchwork Mon Mar 18 23:24:22 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 diff --git a/ARM-tegra-Add-support-for-framebuffer-carveouts.patch b/ARM-tegra-Add-support-for-framebuffer-carveouts.patch new file mode 100644 index 0000000..3e1dc09 --- /dev/null +++ b/ARM-tegra-Add-support-for-framebuffer-carveouts.patch @@ -0,0 +1,1685 @@ +From patchwork Thu Mar 21 18:09:58 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot,v3,01/13] libfdt: Add phandle generation helper +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1060358 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190321181010.27005-2-thierry.reding@gmail.com> +To: Tom Warren , + Simon Glass +Cc: u-boot@lists.denx.de, Stephen Warren +Date: Thu, 21 Mar 2019 19:09:58 +0100 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +The new fdt_generate_phandle() function can be used to generate a new, +unused phandle given a specific device tree blob. The implementation is +somewhat naive in that it simply walks the entire device tree to find +the highest phandle value and then returns a phandle value one higher +than that. A more clever implementation might try to find holes in the +current set of phandle values and fill them. But this implementation is +relatively simple and works reliably. + +Also add a test that validates that phandles generated by this new API +are indeed unique. + +Signed-off-by: Thierry Reding +Reviewed-by: Simon Glass +--- +Changes in v3: +- update to latest upstream commit + + lib/libfdt/fdt_ro.c | 31 +++++++++++++++++++++++++++++++ + scripts/dtc/libfdt/fdt_ro.c | 31 +++++++++++++++++++++++++++++++ + scripts/dtc/libfdt/libfdt.h | 19 +++++++++++++++++++ + scripts/dtc/libfdt/libfdt_env.h | 1 + + 4 files changed, 82 insertions(+) + +diff --git a/lib/libfdt/fdt_ro.c b/lib/libfdt/fdt_ro.c +index b6ca4e0b0c30..693de9aa5ad8 100644 +--- a/lib/libfdt/fdt_ro.c ++++ b/lib/libfdt/fdt_ro.c +@@ -73,6 +73,37 @@ uint32_t fdt_get_max_phandle(const void *fdt) + return 0; + } + ++int fdt_generate_phandle(const void *fdt, uint32_t *phandle) ++{ ++ uint32_t max = 0; ++ int offset = -1; ++ ++ while (true) { ++ uint32_t value; ++ ++ offset = fdt_next_node(fdt, offset, NULL); ++ if (offset < 0) { ++ if (offset == -FDT_ERR_NOTFOUND) ++ break; ++ ++ return offset; ++ } ++ ++ value = fdt_get_phandle(fdt, offset); ++ ++ if (value > max) ++ max = value; ++ } ++ ++ if (max == FDT_MAX_PHANDLE) ++ return -FDT_ERR_NOPHANDLES; ++ ++ if (phandle) ++ *phandle = max + 1; ++ ++ return 0; ++} ++ + int fdt_get_mem_rsv(const void *fdt, int n, uint64_t *address, uint64_t *size) + { + FDT_CHECK_HEADER(fdt); +diff --git a/scripts/dtc/libfdt/fdt_ro.c b/scripts/dtc/libfdt/fdt_ro.c +index dfb3236da388..dc499884e4d1 100644 +--- a/scripts/dtc/libfdt/fdt_ro.c ++++ b/scripts/dtc/libfdt/fdt_ro.c +@@ -115,6 +115,37 @@ uint32_t fdt_get_max_phandle(const void *fdt) + return 0; + } + ++int fdt_generate_phandle(const void *fdt, uint32_t *phandle) ++{ ++ uint32_t max = 0; ++ int offset = -1; ++ ++ while (true) { ++ uint32_t value; ++ ++ offset = fdt_next_node(fdt, offset, NULL); ++ if (offset < 0) { ++ if (offset == -FDT_ERR_NOTFOUND) ++ break; ++ ++ return offset; ++ } ++ ++ value = fdt_get_phandle(fdt, offset); ++ ++ if (value > max) ++ max = value; ++ } ++ ++ if (max == FDT_MAX_PHANDLE) ++ return -FDT_ERR_NOPHANDLES; ++ ++ if (phandle) ++ *phandle = max + 1; ++ ++ return 0; ++} ++ + int fdt_get_mem_rsv(const void *fdt, int n, uint64_t *address, uint64_t *size) + { + FDT_CHECK_HEADER(fdt); +diff --git a/scripts/dtc/libfdt/libfdt.h b/scripts/dtc/libfdt/libfdt.h +index fd73688f9e9f..cf86ddba8811 100644 +--- a/scripts/dtc/libfdt/libfdt.h ++++ b/scripts/dtc/libfdt/libfdt.h +@@ -139,6 +139,10 @@ + + #define FDT_ERR_MAX 17 + ++/* constants */ ++#define FDT_MAX_PHANDLE 0xfffffffe ++ /* Valid values for phandles range from 1 to 2^32-2. */ ++ + /**********************************************************************/ + /* Low-level functions (you probably don't need these) */ + /**********************************************************************/ +@@ -313,6 +317,21 @@ const char *fdt_string(const void *fdt, int stroffset); + */ + uint32_t fdt_get_max_phandle(const void *fdt); + ++/** ++ * fdt_generate_phandle - return a new, unused phandle for a device tree blob ++ * @fdt: pointer to the device tree blob ++ * @phandle: return location for the new phandle ++ * ++ * Walks the device tree blob and looks for the highest phandle value. On ++ * success, the new, unused phandle value (one higher than the previously ++ * highest phandle value in the device tree blob) will be returned in the ++ * @phandle parameter. ++ * ++ * Returns: ++ * 0 on success or a negative error-code on failure ++ */ ++int fdt_generate_phandle(const void *fdt, uint32_t *phandle); ++ + /** + * fdt_num_mem_rsv - retrieve the number of memory reserve map entries + * @fdt: pointer to the device tree blob +diff --git a/scripts/dtc/libfdt/libfdt_env.h b/scripts/dtc/libfdt/libfdt_env.h +index bd2474628775..3ff9e2863075 100644 +--- a/scripts/dtc/libfdt/libfdt_env.h ++++ b/scripts/dtc/libfdt/libfdt_env.h +@@ -52,6 +52,7 @@ + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + ++#include + #include + #include + #include + +From patchwork Thu Mar 21 18:09:59 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot,v3,02/13] fdtdec: Add cpu_to_fdt_{addr, size}() macros +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1060376 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190321181010.27005-3-thierry.reding@gmail.com> +To: Tom Warren , + Simon Glass +Cc: u-boot@lists.denx.de, Stephen Warren +Date: Thu, 21 Mar 2019 19:09:59 +0100 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +These macros are useful for converting the endianness of variables of +type fdt_addr_t and fdt_size_t. + +Reviewed-by: Simon Glass +Signed-off-by: Thierry Reding +--- +Changes in v2: +- add Reviewed-by from Simon + + include/fdtdec.h | 4 ++++ + 1 file changed, 4 insertions(+) + +diff --git a/include/fdtdec.h b/include/fdtdec.h +index b7e35cd87c55..a965c33157c9 100644 +--- a/include/fdtdec.h ++++ b/include/fdtdec.h +@@ -27,11 +27,15 @@ typedef phys_size_t fdt_size_t; + #define FDT_ADDR_T_NONE (-1U) + #define fdt_addr_to_cpu(reg) be64_to_cpu(reg) + #define fdt_size_to_cpu(reg) be64_to_cpu(reg) ++#define cpu_to_fdt_addr(reg) cpu_to_be64(reg) ++#define cpu_to_fdt_size(reg) cpu_to_be64(reg) + typedef fdt64_t fdt_val_t; + #else + #define FDT_ADDR_T_NONE (-1U) + #define fdt_addr_to_cpu(reg) be32_to_cpu(reg) + #define fdt_size_to_cpu(reg) be32_to_cpu(reg) ++#define cpu_to_fdt_addr(reg) cpu_to_be32(reg) ++#define cpu_to_fdt_size(reg) cpu_to_be32(reg) + typedef fdt32_t fdt_val_t; + #endif + + +From patchwork Thu Mar 21 18:10:00 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot,v3,03/13] fdtdec: Add fdt_{addr, size}_unpack() helpers +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1060360 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190321181010.27005-4-thierry.reding@gmail.com> +To: Tom Warren , + Simon Glass +Cc: u-boot@lists.denx.de, Stephen Warren +Date: Thu, 21 Mar 2019 19:10:00 +0100 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +These helpers can be used to unpack variables of type fdt_addr_t and +fdt_size_t into a pair of 32-bit variables. This is useful in cases +where such variables need to be written to properties (such as "reg") +of a device tree node where they need to be split into cells. + +Signed-off-by: Thierry Reding +--- +Changes in v2: +- new patch + + include/fdtdec.h | 25 +++++++++++++++++++++++++ + 1 file changed, 25 insertions(+) + +diff --git a/include/fdtdec.h b/include/fdtdec.h +index a965c33157c9..a0ba57c6318b 100644 +--- a/include/fdtdec.h ++++ b/include/fdtdec.h +@@ -23,6 +23,31 @@ + */ + typedef phys_addr_t fdt_addr_t; + typedef phys_size_t fdt_size_t; ++ ++static inline fdt32_t fdt_addr_unpack(fdt_addr_t addr, fdt32_t *upper) ++{ ++ if (upper) ++#ifdef CONFIG_PHYS_64BIT ++ *upper = addr >> 32; ++#else ++ *upper = 0; ++#endif ++ ++ return addr; ++} ++ ++static inline fdt32_t fdt_size_unpack(fdt_size_t size, fdt32_t *upper) ++{ ++ if (upper) ++#ifdef CONFIG_PHYS_64BIT ++ *upper = size >> 32; ++#else ++ *upper = 0; ++#endif ++ ++ return size; ++} ++ + #ifdef CONFIG_PHYS_64BIT + #define FDT_ADDR_T_NONE (-1U) + #define fdt_addr_to_cpu(reg) be64_to_cpu(reg) + +From patchwork Thu Mar 21 18:10:01 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot,v3,04/13] fdtdec: Implement fdtdec_set_phandle() +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1060366 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190321181010.27005-5-thierry.reding@gmail.com> +To: Tom Warren , + Simon Glass +Cc: u-boot@lists.denx.de, Stephen Warren +Date: Thu, 21 Mar 2019 19:10:01 +0100 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +This function can be used to set a phandle for a given node. + +Signed-off-by: Thierry Reding +--- +Changes in v2: +- don't emit deprecated linux,phandle property + + include/fdtdec.h | 11 +++++++++++ + lib/fdtdec.c | 7 +++++++ + 2 files changed, 18 insertions(+) + +diff --git a/include/fdtdec.h b/include/fdtdec.h +index a0ba57c6318b..55600026c488 100644 +--- a/include/fdtdec.h ++++ b/include/fdtdec.h +@@ -981,6 +981,17 @@ int fdtdec_setup_mem_size_base(void); + */ + int fdtdec_setup_memory_banksize(void); + ++/** ++ * fdtdec_set_phandle() - sets the phandle of a given node ++ * ++ * @param blob FDT blob ++ * @param node offset in the FDT blob of the node whose phandle is to ++ * be set ++ * @param phandle phandle to set for the given node ++ * @return 0 on success or a negative error code on failure ++ */ ++int fdtdec_set_phandle(void *blob, int node, uint32_t phandle); ++ + /** + * Set up the device tree ready for use + */ +diff --git a/lib/fdtdec.c b/lib/fdtdec.c +index 09a7e133a539..00db90e3cdfd 100644 +--- a/lib/fdtdec.c ++++ b/lib/fdtdec.c +@@ -1243,6 +1243,13 @@ __weak void *board_fdt_blob_setup(void) + } + #endif + ++int fdtdec_set_phandle(void *blob, int node, uint32_t phandle) ++{ ++ fdt32_t value = cpu_to_fdt32(phandle); ++ ++ return fdt_setprop(blob, node, "phandle", &value, sizeof(value)); ++} ++ + int fdtdec_setup(void) + { + #if CONFIG_IS_ENABLED(OF_CONTROL) + +From patchwork Thu Mar 21 18:10:02 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot,v3,05/13] fdtdec: Implement fdtdec_add_reserved_memory() +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1060362 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190321181010.27005-6-thierry.reding@gmail.com> +To: Tom Warren , + Simon Glass +Cc: u-boot@lists.denx.de, Stephen Warren +Date: Thu, 21 Mar 2019 19:10:02 +0100 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +This function can be used to add subnodes in the /reserved-memory node. + +Reviewed-by: Simon Glass +Signed-off-by: Thierry Reding +--- +Changes in v3: +- use fdt_generate_phandle() instead of fdtdec_generate_phandle() +- add device tree bindings for /reserved-memory +- add examples to code comments + +Changes in v2: +- split fdt_{addr,size}_unpack() helpers into separate patch +- use name@x,y notation only if the upper cell is > 0 +- use debug() instead of printf() to save code size +- properly compute number of cells in reg property +- fix carveout size computations, was off by one +- use #size-cells where appropriate + + .../reserved-memory/reserved-memory.txt | 136 ++++++++++++++++++ + include/fdtdec.h | 48 +++++++ + lib/fdtdec.c | 131 +++++++++++++++++ + 3 files changed, 315 insertions(+) + create mode 100644 Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt + +diff --git a/Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt b/Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt +new file mode 100644 +index 000000000000..bac4afa3b197 +--- /dev/null ++++ b/Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt +@@ -0,0 +1,136 @@ ++*** Reserved memory regions *** ++ ++Reserved memory is specified as a node under the /reserved-memory node. ++The operating system shall exclude reserved memory from normal usage ++one can create child nodes describing particular reserved (excluded from ++normal use) memory regions. Such memory regions are usually designed for ++the special usage by various device drivers. ++ ++Parameters for each memory region can be encoded into the device tree ++with the following nodes: ++ ++/reserved-memory node ++--------------------- ++#address-cells, #size-cells (required) - standard definition ++ - Should use the same values as the root node ++ranges (required) - standard definition ++ - Should be empty ++ ++/reserved-memory/ child nodes ++----------------------------- ++Each child of the reserved-memory node specifies one or more regions of ++reserved memory. Each child node may either use a 'reg' property to ++specify a specific range of reserved memory, or a 'size' property with ++optional constraints to request a dynamically allocated block of memory. ++ ++Following the generic-names recommended practice, node names should ++reflect the purpose of the node (ie. "framebuffer" or "dma-pool"). Unit ++address (@
) should be appended to the name if the node is a ++static allocation. ++ ++Properties: ++Requires either a) or b) below. ++a) static allocation ++ reg (required) - standard definition ++b) dynamic allocation ++ size (required) - length based on parent's #size-cells ++ - Size in bytes of memory to reserve. ++ alignment (optional) - length based on parent's #size-cells ++ - Address boundary for alignment of allocation. ++ alloc-ranges (optional) - prop-encoded-array (address, length pairs). ++ - Specifies regions of memory that are ++ acceptable to allocate from. ++ ++If both reg and size are present, then the reg property takes precedence ++and size is ignored. ++ ++Additional properties: ++compatible (optional) - standard definition ++ - may contain the following strings: ++ - shared-dma-pool: This indicates a region of memory meant to be ++ used as a shared pool of DMA buffers for a set of devices. It can ++ be used by an operating system to instantiate the necessary pool ++ management subsystem if necessary. ++ - vendor specific string in the form ,[-] ++no-map (optional) - empty property ++ - Indicates the operating system must not create a virtual mapping ++ of the region as part of its standard mapping of system memory, ++ nor permit speculative access to it under any circumstances other ++ than under the control of the device driver using the region. ++reusable (optional) - empty property ++ - The operating system can use the memory in this region with the ++ limitation that the device driver(s) owning the region need to be ++ able to reclaim it back. Typically that means that the operating ++ system can use that region to store volatile or cached data that ++ can be otherwise regenerated or migrated elsewhere. ++ ++Linux implementation note: ++- If a "linux,cma-default" property is present, then Linux will use the ++ region for the default pool of the contiguous memory allocator. ++ ++- If a "linux,dma-default" property is present, then Linux will use the ++ region for the default pool of the consistent DMA allocator. ++ ++Device node references to reserved memory ++----------------------------------------- ++Regions in the /reserved-memory node may be referenced by other device ++nodes by adding a memory-region property to the device node. ++ ++memory-region (optional) - phandle, specifier pairs to children of /reserved-memory ++ ++Example ++------- ++This example defines 3 contiguous regions are defined for Linux kernel: ++one default of all device drivers (named linux,cma@72000000 and 64MiB in size), ++one dedicated to the framebuffer device (named framebuffer@78000000, 8MiB), and ++one for multimedia processing (named multimedia-memory@77000000, 64MiB). ++ ++/ { ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ++ memory { ++ reg = <0x40000000 0x40000000>; ++ }; ++ ++ reserved-memory { ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ranges; ++ ++ /* global autoconfigured region for contiguous allocations */ ++ linux,cma { ++ compatible = "shared-dma-pool"; ++ reusable; ++ size = <0x4000000>; ++ alignment = <0x2000>; ++ linux,cma-default; ++ }; ++ ++ display_reserved: framebuffer@78000000 { ++ reg = <0x78000000 0x800000>; ++ }; ++ ++ multimedia_reserved: multimedia@77000000 { ++ compatible = "acme,multimedia-memory"; ++ reg = <0x77000000 0x4000000>; ++ }; ++ }; ++ ++ /* ... */ ++ ++ fb0: video@12300000 { ++ memory-region = <&display_reserved>; ++ /* ... */ ++ }; ++ ++ scaler: scaler@12500000 { ++ memory-region = <&multimedia_reserved>; ++ /* ... */ ++ }; ++ ++ codec: codec@12600000 { ++ memory-region = <&multimedia_reserved>; ++ /* ... */ ++ }; ++}; +diff --git a/include/fdtdec.h b/include/fdtdec.h +index 55600026c488..b54ed38fb362 100644 +--- a/include/fdtdec.h ++++ b/include/fdtdec.h +@@ -992,6 +992,54 @@ int fdtdec_setup_memory_banksize(void); + */ + int fdtdec_set_phandle(void *blob, int node, uint32_t phandle); + ++/** ++ * fdtdec_add_reserved_memory() - add or find a reserved-memory node ++ * ++ * If a reserved-memory node already exists for the given carveout, a phandle ++ * for that node will be returned. Otherwise a new node will be created and a ++ * phandle corresponding to it will be returned. ++ * ++ * See Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt ++ * for details on how to use reserved memory regions. ++ * ++ * As an example, consider the following code snippet: ++ * ++ * struct fdt_memory fb = { ++ * .start = 0x92cb3000, ++ * .end = 0x934b2fff, ++ * }; ++ * uint32_t phandle; ++ * ++ * fdtdec_add_reserved_memory(fdt, "framebuffer", &fb, &phandle); ++ * ++ * This results in the following subnode being added to the top-level ++ * /reserved-memory node: ++ * ++ * reserved-memory { ++ * #address-cells = <0x00000002>; ++ * #size-cells = <0x00000002>; ++ * ranges; ++ * ++ * framebuffer@92cb3000 { ++ * reg = <0x00000000 0x92cb3000 0x00000000 0x00800000>; ++ * phandle = <0x0000004d>; ++ * }; ++ * }; ++ * ++ * If the top-level /reserved-memory node does not exist, it will be created. ++ * The phandle returned from the function call can be used to reference this ++ * reserved memory region from other nodes. ++ * ++ * @param blob FDT blob ++ * @param basename base name of the node to create ++ * @param carveout information about the carveout region ++ * @param phandlep return location for the phandle of the carveout region ++ * @return 0 on success or a negative error code on failure ++ */ ++int fdtdec_add_reserved_memory(void *blob, const char *basename, ++ const struct fdt_memory *carveout, ++ uint32_t *phandlep); ++ + /** + * Set up the device tree ready for use + */ +diff --git a/lib/fdtdec.c b/lib/fdtdec.c +index 00db90e3cdfd..be54ad5bd092 100644 +--- a/lib/fdtdec.c ++++ b/lib/fdtdec.c +@@ -1250,6 +1250,137 @@ int fdtdec_set_phandle(void *blob, int node, uint32_t phandle) + return fdt_setprop(blob, node, "phandle", &value, sizeof(value)); + } + ++static int fdtdec_init_reserved_memory(void *blob) ++{ ++ int na, ns, node, err; ++ fdt32_t value; ++ ++ /* inherit #address-cells and #size-cells from the root node */ ++ na = fdt_address_cells(blob, 0); ++ ns = fdt_size_cells(blob, 0); ++ ++ node = fdt_add_subnode(blob, 0, "reserved-memory"); ++ if (node < 0) ++ return node; ++ ++ err = fdt_setprop(blob, node, "ranges", NULL, 0); ++ if (err < 0) ++ return err; ++ ++ value = cpu_to_fdt32(ns); ++ ++ err = fdt_setprop(blob, node, "#size-cells", &value, sizeof(value)); ++ if (err < 0) ++ return err; ++ ++ value = cpu_to_fdt32(na); ++ ++ err = fdt_setprop(blob, node, "#address-cells", &value, sizeof(value)); ++ if (err < 0) ++ return err; ++ ++ return node; ++} ++ ++int fdtdec_add_reserved_memory(void *blob, const char *basename, ++ const struct fdt_memory *carveout, ++ uint32_t *phandlep) ++{ ++ fdt32_t cells[4] = {}, *ptr = cells; ++ uint32_t upper, lower, phandle; ++ int parent, node, na, ns, err; ++ char name[64]; ++ ++ /* create an empty /reserved-memory node if one doesn't exist */ ++ parent = fdt_path_offset(blob, "/reserved-memory"); ++ if (parent < 0) { ++ parent = fdtdec_init_reserved_memory(blob); ++ if (parent < 0) ++ return parent; ++ } ++ ++ /* only 1 or 2 #address-cells and #size-cells are supported */ ++ na = fdt_address_cells(blob, parent); ++ if (na < 1 || na > 2) ++ return -FDT_ERR_BADNCELLS; ++ ++ ns = fdt_size_cells(blob, parent); ++ if (ns < 1 || ns > 2) ++ return -FDT_ERR_BADNCELLS; ++ ++ /* find a matching node and return the phandle to that */ ++ fdt_for_each_subnode(node, blob, parent) { ++ const char *name = fdt_get_name(blob, node, NULL); ++ phys_addr_t addr, size; ++ ++ addr = fdtdec_get_addr_size(blob, node, "reg", &size); ++ if (addr == FDT_ADDR_T_NONE) { ++ debug("failed to read address/size for %s\n", name); ++ continue; ++ } ++ ++ if (addr == carveout->start && (addr + size) == carveout->end) { ++ *phandlep = fdt_get_phandle(blob, node); ++ return 0; ++ } ++ } ++ ++ /* ++ * Unpack the start address and generate the name of the new node ++ * base on the basename and the unit-address. ++ */ ++ lower = fdt_addr_unpack(carveout->start, &upper); ++ ++ if (na > 1 && upper > 0) ++ snprintf(name, sizeof(name), "%s@%x,%x", basename, upper, ++ lower); ++ else { ++ if (upper > 0) { ++ debug("address %08x:%08x exceeds addressable space\n", ++ upper, lower); ++ return -FDT_ERR_BADVALUE; ++ } ++ ++ snprintf(name, sizeof(name), "%s@%x", basename, lower); ++ } ++ ++ node = fdt_add_subnode(blob, parent, name); ++ if (node < 0) ++ return node; ++ ++ err = fdt_generate_phandle(blob, &phandle); ++ if (err < 0) ++ return err; ++ ++ err = fdtdec_set_phandle(blob, node, phandle); ++ if (err < 0) ++ return err; ++ ++ /* store one or two address cells */ ++ if (na > 1) ++ *ptr++ = cpu_to_fdt32(upper); ++ ++ *ptr++ = cpu_to_fdt32(lower); ++ ++ /* store one or two size cells */ ++ lower = fdt_size_unpack(carveout->end - carveout->start + 1, &upper); ++ ++ if (ns > 1) ++ *ptr++ = cpu_to_fdt32(upper); ++ ++ *ptr++ = cpu_to_fdt32(lower); ++ ++ err = fdt_setprop(blob, node, "reg", cells, (na + ns) * sizeof(*cells)); ++ if (err < 0) ++ return err; ++ ++ /* return the phandle for the new node for the caller to use */ ++ if (phandlep) ++ *phandlep = phandle; ++ ++ return 0; ++} ++ + int fdtdec_setup(void) + { + #if CONFIG_IS_ENABLED(OF_CONTROL) + +From patchwork Thu Mar 21 18:10:03 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot,v3,06/13] fdtdec: Implement carveout support functions +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1060373 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190321181010.27005-7-thierry.reding@gmail.com> +To: Tom Warren , + Simon Glass +Cc: u-boot@lists.denx.de, Stephen Warren +Date: Thu, 21 Mar 2019 19:10:03 +0100 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +The fdtdec_get_carveout() and fdtdec_set_carveout() function can be used +to read a carveout from a given node or add a carveout to a given node +using the standard device tree bindings (involving reserved-memory nodes +and the memory-region property). + +Reviewed-by: Simon Glass +Signed-off-by: Thierry Reding +--- +Changes in v3: +- add examples to code comments + +Changes in v2: +- use debug() instead of printf() to save code size +- fix carveout size computations, was off by one +- use fdtdec_get_addr_size_auto_noparent() + + include/fdtdec.h | 81 ++++++++++++++++++++++++++++++++++++++++++++ + lib/fdtdec.c | 87 ++++++++++++++++++++++++++++++++++++++++++++++++ + 2 files changed, 168 insertions(+) + +diff --git a/include/fdtdec.h b/include/fdtdec.h +index b54ed38fb362..13b743f59ab1 100644 +--- a/include/fdtdec.h ++++ b/include/fdtdec.h +@@ -1030,6 +1030,8 @@ int fdtdec_set_phandle(void *blob, int node, uint32_t phandle); + * The phandle returned from the function call can be used to reference this + * reserved memory region from other nodes. + * ++ * See fdtdec_set_carveout() for a more elaborate example. ++ * + * @param blob FDT blob + * @param basename base name of the node to create + * @param carveout information about the carveout region +@@ -1040,6 +1042,85 @@ int fdtdec_add_reserved_memory(void *blob, const char *basename, + const struct fdt_memory *carveout, + uint32_t *phandlep); + ++/** ++ * fdtdec_get_carveout() - reads a carveout from an FDT ++ * ++ * Reads information about a carveout region from an FDT. The carveout is a ++ * referenced by its phandle that is read from a given property in a given ++ * node. ++ * ++ * @param blob FDT blob ++ * @param node name of a node ++ * @param name name of the property in the given node that contains ++ * the phandle for the carveout ++ * @param index index of the phandle for which to read the carveout ++ * @param carveout return location for the carveout information ++ * @return 0 on success or a negative error code on failure ++ */ ++int fdtdec_get_carveout(const void *blob, const char *node, const char *name, ++ unsigned int index, struct fdt_memory *carveout); ++ ++/** ++ * fdtdec_set_carveout() - sets a carveout region for a given node ++ * ++ * Sets a carveout region for a given node. If a reserved-memory node already ++ * exists for the carveout, the phandle for that node will be reused. If no ++ * such node exists, a new one will be created and a phandle to it stored in ++ * a specified property of the given node. ++ * ++ * As an example, consider the following code snippet: ++ * ++ * const char *node = "/host1x@50000000/dc@54240000"; ++ * struct fdt_memory fb = { ++ * .start = 0x92cb3000, ++ * .end = 0x934b2fff, ++ * }; ++ * ++ * fdtdec_set_carveout(fdt, node, "memory-region", 0, "framebuffer", &fb); ++ * ++ * dc@54200000 is a display controller and was set up by the bootloader to ++ * scan out the framebuffer specified by "fb". This would cause the following ++ * reserved memory region to be added: ++ * ++ * reserved-memory { ++ * #address-cells = <0x00000002>; ++ * #size-cells = <0x00000002>; ++ * ranges; ++ * ++ * framebuffer@92cb3000 { ++ * reg = <0x00000000 0x92cb3000 0x00000000 0x00800000>; ++ * phandle = <0x0000004d>; ++ * }; ++ * }; ++ * ++ * A "memory-region" property will also be added to the node referenced by the ++ * offset parameter. ++ * ++ * host1x@50000000 { ++ * ... ++ * ++ * dc@54240000 { ++ * ... ++ * memory-region = <0x0000004d>; ++ * ... ++ * }; ++ * ++ * ... ++ * }; ++ * ++ * @param blob FDT blob ++ * @param node name of the node to add the carveout to ++ * @param prop_name name of the property in which to store the phandle of ++ * the carveout ++ * @param index index of the phandle to store ++ * @param name base name of the reserved-memory node to create ++ * @param carveout information about the carveout to add ++ * @return 0 on success or a negative error code on failure ++ */ ++int fdtdec_set_carveout(void *blob, const char *node, const char *prop_name, ++ unsigned int index, const char *name, ++ const struct fdt_memory *carveout); ++ + /** + * Set up the device tree ready for use + */ +diff --git a/lib/fdtdec.c b/lib/fdtdec.c +index be54ad5bd092..bd05ab90fce1 100644 +--- a/lib/fdtdec.c ++++ b/lib/fdtdec.c +@@ -1381,6 +1381,93 @@ int fdtdec_add_reserved_memory(void *blob, const char *basename, + return 0; + } + ++int fdtdec_get_carveout(const void *blob, const char *node, const char *name, ++ unsigned int index, struct fdt_memory *carveout) ++{ ++ const fdt32_t *prop; ++ uint32_t phandle; ++ int offset, len; ++ fdt_size_t size; ++ ++ offset = fdt_path_offset(blob, node); ++ if (offset < 0) ++ return offset; ++ ++ prop = fdt_getprop(blob, offset, name, &len); ++ if (!prop) { ++ debug("failed to get %s for %s\n", name, node); ++ return -FDT_ERR_NOTFOUND; ++ } ++ ++ if ((len % sizeof(phandle)) != 0) { ++ debug("invalid phandle property\n"); ++ return -FDT_ERR_BADPHANDLE; ++ } ++ ++ if (len < (sizeof(phandle) * (index + 1))) { ++ debug("invalid phandle index\n"); ++ return -FDT_ERR_BADPHANDLE; ++ } ++ ++ phandle = fdt32_to_cpu(prop[index]); ++ ++ offset = fdt_node_offset_by_phandle(blob, phandle); ++ if (offset < 0) { ++ debug("failed to find node for phandle %u\n", phandle); ++ return offset; ++ } ++ ++ carveout->start = fdtdec_get_addr_size_auto_noparent(blob, offset, ++ "reg", 0, &size, ++ true); ++ if (carveout->start == FDT_ADDR_T_NONE) { ++ debug("failed to read address/size from \"reg\" property\n"); ++ return -FDT_ERR_NOTFOUND; ++ } ++ ++ carveout->end = carveout->start + size - 1; ++ ++ return 0; ++} ++ ++int fdtdec_set_carveout(void *blob, const char *node, const char *prop_name, ++ unsigned int index, const char *name, ++ const struct fdt_memory *carveout) ++{ ++ uint32_t phandle; ++ int err, offset; ++ fdt32_t value; ++ ++ /* XXX implement support for multiple phandles */ ++ if (index > 0) { ++ debug("invalid index %u\n", index); ++ return -FDT_ERR_BADOFFSET; ++ } ++ ++ err = fdtdec_add_reserved_memory(blob, name, carveout, &phandle); ++ if (err < 0) { ++ debug("failed to add reserved memory: %d\n", err); ++ return err; ++ } ++ ++ offset = fdt_path_offset(blob, node); ++ if (offset < 0) { ++ debug("failed to find offset for node %s: %d\n", node, offset); ++ return offset; ++ } ++ ++ value = cpu_to_fdt32(phandle); ++ ++ err = fdt_setprop(blob, offset, prop_name, &value, sizeof(value)); ++ if (err < 0) { ++ debug("failed to set %s property for node %s: %d\n", prop_name, ++ node, err); ++ return err; ++ } ++ ++ return 0; ++} ++ + int fdtdec_setup(void) + { + #if CONFIG_IS_ENABLED(OF_CONTROL) + +From patchwork Thu Mar 21 18:10:04 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot,v3,07/13] fdtdec: Add Kconfig symbol for tests +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1060374 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190321181010.27005-8-thierry.reding@gmail.com> +To: Tom Warren , + Simon Glass +Cc: u-boot@lists.denx.de, Stephen Warren +Date: Thu, 21 Mar 2019 19:10:04 +0100 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +Runtime tests are provided as a test_fdtdec command implementation. Add +a Kconfig symbol that allows this command to be built so that the tests +can be used. + +Signed-off-by: Thierry Reding +Reviewed-by: Simon Glass +--- +Changes in v2: +- new patch + + lib/Kconfig | 4 ++++ + 1 file changed, 4 insertions(+) + +diff --git a/lib/Kconfig b/lib/Kconfig +index 366d164cd760..b1fccf7e8dff 100644 +--- a/lib/Kconfig ++++ b/lib/Kconfig +@@ -423,4 +423,8 @@ source lib/efi/Kconfig + source lib/efi_loader/Kconfig + source lib/optee/Kconfig + ++config TEST_FDTDEC ++ bool "enable fdtdec test" ++ depends on OF_LIBFDT ++ + endmenu + +From patchwork Thu Mar 21 18:10:05 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot,v3,08/13] fdtdec: test: Fix build warning +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1060368 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190321181010.27005-9-thierry.reding@gmail.com> +To: Tom Warren , + Simon Glass +Cc: u-boot@lists.denx.de, Stephen Warren +Date: Thu, 21 Mar 2019 19:10:05 +0100 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +Hide the declaration of the "fd" variable When not building a DEBUG +configuration, to avoid the variable being unused. + +Signed-off-by: Thierry Reding +Reviewed-by: Simon Glass +--- +Changes in v2: +- new patch + + lib/fdtdec_test.c | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/lib/fdtdec_test.c b/lib/fdtdec_test.c +index a82e27de942f..065fed278cf3 100644 +--- a/lib/fdtdec_test.c ++++ b/lib/fdtdec_test.c +@@ -79,7 +79,9 @@ static int make_fdt(void *fdt, int size, const char *aliases, + { + char name[20], value[20]; + const char *s; ++#if defined(DEBUG) && defined(CONFIG_SANDBOX) + int fd; ++#endif + + CHECK(fdt_create(fdt, size)); + CHECK(fdt_finish_reservemap(fdt)); + +From patchwork Thu Mar 21 18:10:06 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot,v3,09/13] fdtdec: test: Use compound statement macros +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1060361 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190321181010.27005-10-thierry.reding@gmail.com> +To: Tom Warren , + Simon Glass +Cc: u-boot@lists.denx.de, Stephen Warren +Date: Thu, 21 Mar 2019 19:10:06 +0100 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +This eliminates the need for intermediate helper functions and allow the +macros to return a value so that it can be used subsequently. + +Signed-off-by: Thierry Reding +Reviewed-by: Simon Glass +--- +Changes in v2: +- new patch + + lib/fdtdec_test.c | 64 ++++++++++++++++------------------------------- + 1 file changed, 22 insertions(+), 42 deletions(-) + +diff --git a/lib/fdtdec_test.c b/lib/fdtdec_test.c +index 065fed278cf3..928950918413 100644 +--- a/lib/fdtdec_test.c ++++ b/lib/fdtdec_test.c +@@ -15,48 +15,28 @@ + /* The size of our test fdt blob */ + #define FDT_SIZE (16 * 1024) + +-/** +- * Check if an operation failed, and if so, print an error +- * +- * @param oper_name Name of operation +- * @param err Error code to check +- * +- * @return 0 if ok, -1 if there was an error +- */ +-static int fdt_checkerr(const char *oper_name, int err) +-{ +- if (err) { +- printf("%s: %s: %s\n", __func__, oper_name, fdt_strerror(err)); +- return -1; +- } +- +- return 0; +-} +- +-/** +- * Check the result of an operation and if incorrect, print an error +- * +- * @param oper_name Name of operation +- * @param expected Expected value +- * @param value Actual value +- * +- * @return 0 if ok, -1 if there was an error +- */ +-static int checkval(const char *oper_name, int expected, int value) +-{ +- if (expected != value) { +- printf("%s: %s: expected %d, but returned %d\n", __func__, +- oper_name, expected, value); +- return -1; +- } +- +- return 0; +-} ++#define CHECK(op) ({ \ ++ int err = op; \ ++ if (err < 0) { \ ++ printf("%s: %s: %s\n", __func__, #op, \ ++ fdt_strerror(err)); \ ++ return err; \ ++ } \ ++ \ ++ err; \ ++ }) ++ ++#define CHECKVAL(op, expected) ({ \ ++ int err = op; \ ++ if (err != expected) { \ ++ printf("%s: %s: expected %d, but returned %d\n",\ ++ __func__, #op, expected, err); \ ++ return err; \ ++ } \ ++ \ ++ err; \ ++ }) + +-#define CHECK(op) if (fdt_checkerr(#op, op)) return -1 +-#define CHECKVAL(op, expected) \ +- if (checkval(#op, expected, op)) \ +- return -1 + #define CHECKOK(op) CHECKVAL(op, 0) + + /* maximum number of nodes / aliases to generate */ +@@ -138,7 +118,7 @@ static int run_test(const char *aliases, const char *nodes, const char *expect) + CHECKVAL(make_fdt(blob, FDT_SIZE, aliases, nodes), 0); + CHECKVAL(fdtdec_find_aliases_for_id(blob, "i2c", + COMPAT_UNKNOWN, +- list, ARRAY_SIZE(list)), strlen(expect)); ++ list, ARRAY_SIZE(list)), (int)strlen(expect)); + + /* Check we got the right ones */ + for (i = 0, s = expect; *s; s++, i++) { + +From patchwork Thu Mar 21 18:10:07 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot,v3,10/13] fdtdec: test: Add carveout tests +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1060375 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190321181010.27005-11-thierry.reding@gmail.com> +To: Tom Warren , + Simon Glass +Cc: u-boot@lists.denx.de, Stephen Warren +Date: Thu, 21 Mar 2019 19:10:07 +0100 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +Implement carveout tests for 32-bit and 64-bit builds. + +Signed-off-by: Thierry Reding +Reviewed-by: Simon Glass +--- +Changes in v2: +- new patch + + lib/fdtdec_test.c | 152 ++++++++++++++++++++++++++++++++++++++++++++++ + 1 file changed, 152 insertions(+) + +diff --git a/lib/fdtdec_test.c b/lib/fdtdec_test.c +index 928950918413..f6defe16c5a6 100644 +--- a/lib/fdtdec_test.c ++++ b/lib/fdtdec_test.c +@@ -141,6 +141,156 @@ static int run_test(const char *aliases, const char *nodes, const char *expect) + return 0; + } + ++static int make_fdt_carveout_device(void *fdt, uint32_t na, uint32_t ns) ++{ ++ const char *basename = "/display"; ++ struct fdt_memory carveout = { ++#ifdef CONFIG_PHYS_64BIT ++ .start = 0x180000000, ++ .end = 0x18fffffff, ++#else ++ .start = 0x80000000, ++ .end = 0x8fffffff, ++#endif ++ }; ++ fdt32_t cells[4], *ptr = cells; ++ uint32_t upper, lower; ++ char name[32]; ++ int offset; ++ ++ /* store one or two address cells */ ++ lower = fdt_addr_unpack(carveout.start, &upper); ++ ++ if (na > 1 && upper > 0) ++ snprintf(name, sizeof(name), "%s@%x,%x", basename, upper, ++ lower); ++ else ++ snprintf(name, sizeof(name), "%s@%x", basename, lower); ++ ++ if (na > 1) ++ *ptr++ = cpu_to_fdt32(upper); ++ ++ *ptr++ = cpu_to_fdt32(lower); ++ ++ /* store one or two size cells */ ++ lower = fdt_size_unpack(carveout.end - carveout.start + 1, &upper); ++ ++ if (ns > 1) ++ *ptr++ = cpu_to_fdt32(upper); ++ ++ *ptr++ = cpu_to_fdt32(lower); ++ ++ offset = CHECK(fdt_add_subnode(fdt, 0, name + 1)); ++ CHECK(fdt_setprop(fdt, offset, "reg", cells, (na + ns) * sizeof(*cells))); ++ ++ return fdtdec_set_carveout(fdt, name, "memory-region", 0, ++ "framebuffer", &carveout); ++} ++ ++static int check_fdt_carveout(void *fdt, uint32_t address_cells, ++ uint32_t size_cells) ++{ ++#ifdef CONFIG_PHYS_64BIT ++ const char *name = "/display@1,80000000"; ++ const struct fdt_memory expected = { ++ .start = 0x180000000, ++ .end = 0x18fffffff, ++ }; ++#else ++ const char *name = "/display@80000000"; ++ const struct fdt_memory expected = { ++ .start = 0x80000000, ++ .end = 0x8fffffff, ++ }; ++#endif ++ struct fdt_memory carveout; ++ ++ printf("carveout: %pap-%pap na=%u ns=%u: ", &expected.start, ++ &expected.end, address_cells, size_cells); ++ ++ CHECK(fdtdec_get_carveout(fdt, name, "memory-region", 0, &carveout)); ++ ++ if ((carveout.start != expected.start) || ++ (carveout.end != expected.end)) { ++ printf("carveout: %pap-%pap, expected %pap-%pap\n", ++ &carveout.start, &carveout.end, ++ &expected.start, &expected.end); ++ return 1; ++ } ++ ++ printf("pass\n"); ++ return 0; ++} ++ ++static int make_fdt_carveout(void *fdt, int size, uint32_t address_cells, ++ uint32_t size_cells) ++{ ++ fdt32_t na = cpu_to_fdt32(address_cells); ++ fdt32_t ns = cpu_to_fdt32(size_cells); ++#if defined(DEBUG) && defined(CONFIG_SANDBOX) ++ char filename[512]; ++ int fd; ++#endif ++ int err; ++ ++ CHECK(fdt_create(fdt, size)); ++ CHECK(fdt_finish_reservemap(fdt)); ++ CHECK(fdt_begin_node(fdt, "")); ++ CHECK(fdt_property(fdt, "#address-cells", &na, sizeof(na))); ++ CHECK(fdt_property(fdt, "#size-cells", &ns, sizeof(ns))); ++ CHECK(fdt_end_node(fdt)); ++ CHECK(fdt_finish(fdt)); ++ CHECK(fdt_pack(fdt)); ++ ++ CHECK(fdt_open_into(fdt, fdt, FDT_SIZE)); ++ ++ err = make_fdt_carveout_device(fdt, address_cells, size_cells); ++ ++#if defined(DEBUG) && defined(CONFIG_SANDBOX) ++ snprintf(filename, sizeof(filename), "/tmp/fdtdec-carveout-%u-%u.dtb", ++ address_cells, size_cells); ++ ++ fd = os_open(filename, OS_O_CREAT | OS_O_WRONLY); ++ if (fd < 0) { ++ printf("could not open .dtb file to write\n"); ++ goto out; ++ } ++ ++ os_write(fd, fdt, size); ++ os_close(fd); ++ ++out: ++#endif ++ return err; ++} ++ ++static int check_carveout(void) ++{ ++ void *fdt; ++ ++ fdt = malloc(FDT_SIZE); ++ if (!fdt) { ++ printf("%s: out of memory\n", __func__); ++ return 1; ++ } ++ ++#ifndef CONFIG_PHYS_64BIT ++ CHECKVAL(make_fdt_carveout(fdt, FDT_SIZE, 1, 1), 0); ++ CHECKOK(check_fdt_carveout(fdt, 1, 1)); ++ CHECKVAL(make_fdt_carveout(fdt, FDT_SIZE, 1, 2), 0); ++ CHECKOK(check_fdt_carveout(fdt, 1, 2)); ++#else ++ CHECKVAL(make_fdt_carveout(fdt, FDT_SIZE, 1, 1), -FDT_ERR_BADVALUE); ++ CHECKVAL(make_fdt_carveout(fdt, FDT_SIZE, 1, 2), -FDT_ERR_BADVALUE); ++#endif ++ CHECKVAL(make_fdt_carveout(fdt, FDT_SIZE, 2, 1), 0); ++ CHECKOK(check_fdt_carveout(fdt, 2, 1)); ++ CHECKVAL(make_fdt_carveout(fdt, FDT_SIZE, 2, 2), 0); ++ CHECKOK(check_fdt_carveout(fdt, 2, 2)); ++ ++ return 0; ++} ++ + static int do_test_fdtdec(cmd_tbl_t *cmdtp, int flag, int argc, + char * const argv[]) + { +@@ -182,6 +332,8 @@ static int do_test_fdtdec(cmd_tbl_t *cmdtp, int flag, int argc, + CHECKOK(run_test("2a 1a 0a", "a", " a")); + CHECKOK(run_test("0a 1a 2a", "a", "a")); + ++ CHECKOK(check_carveout()); ++ + printf("Test passed\n"); + return 0; + } + +From patchwork Thu Mar 21 18:10:08 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot,v3,11/13] sandbox: Enable fdtdec tests +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1060364 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190321181010.27005-12-thierry.reding@gmail.com> +To: Tom Warren , + Simon Glass +Cc: u-boot@lists.denx.de, Stephen Warren +Date: Thu, 21 Mar 2019 19:10:08 +0100 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +Enable fdtdec tests on sandbox configurations so that they can be run to +validate the fdtdec implementation. + +Signed-off-by: Thierry Reding +Reviewed-by: Simon Glass +--- +Changes in v2: +- new patch + + configs/sandbox64_defconfig | 1 + + configs/sandbox_defconfig | 1 + + 2 files changed, 2 insertions(+) + +diff --git a/configs/sandbox64_defconfig b/configs/sandbox64_defconfig +index da4bdced3105..c04ecd915ae7 100644 +--- a/configs/sandbox64_defconfig ++++ b/configs/sandbox64_defconfig +@@ -194,6 +194,7 @@ CONFIG_CMD_DHRYSTONE=y + CONFIG_TPM=y + CONFIG_LZ4=y + CONFIG_ERRNO_STR=y ++CONFIG_TEST_FDTDEC=y + CONFIG_UNIT_TEST=y + CONFIG_UT_TIME=y + CONFIG_UT_DM=y +diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig +index 193e41896cb7..bb508a8d02e2 100644 +--- a/configs/sandbox_defconfig ++++ b/configs/sandbox_defconfig +@@ -215,6 +215,7 @@ CONFIG_CMD_DHRYSTONE=y + CONFIG_TPM=y + CONFIG_LZ4=y + CONFIG_ERRNO_STR=y ++CONFIG_TEST_FDTDEC=y + CONFIG_UNIT_TEST=y + CONFIG_UT_TIME=y + CONFIG_UT_DM=y + +From patchwork Thu Mar 21 18:10:09 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot,v3,12/13] p2371-2180: Add support for framebuffer carveouts +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1060367 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190321181010.27005-13-thierry.reding@gmail.com> +To: Tom Warren , + Simon Glass +Cc: u-boot@lists.denx.de, Stephen Warren +Date: Thu, 21 Mar 2019 19:10:09 +0100 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +If early firmware initialized the display hardware and the display +controllers are scanning out a framebuffer (e.g. a splash screen), make +sure to pass information about the memory location of that framebuffer +to the kernel before booting to avoid the kernel from using that memory +for the buddy allocator. + +This same mechanism can also be used in the kernel to set up early SMMU +mappings and avoid SMMU faults caused by the display controller reading +from memory for which it has no mapping. + +Signed-off-by: Thierry Reding +Reviewed-by: Simon Glass +--- + board/nvidia/p2371-2180/p2371-2180.c | 47 ++++++++++++++++++++++++++++ + 1 file changed, 47 insertions(+) + +diff --git a/board/nvidia/p2371-2180/p2371-2180.c b/board/nvidia/p2371-2180/p2371-2180.c +index a444d692d7ea..4985302d6bc2 100644 +--- a/board/nvidia/p2371-2180/p2371-2180.c ++++ b/board/nvidia/p2371-2180/p2371-2180.c +@@ -6,6 +6,7 @@ + + #include + #include ++#include + #include + #include + #include +@@ -138,9 +139,55 @@ static void ft_mac_address_setup(void *fdt) + } + } + ++static int ft_copy_carveout(void *dst, const void *src, const char *node) ++{ ++ struct fdt_memory fb; ++ int err; ++ ++ err = fdtdec_get_carveout(src, node, "memory-region", 0, &fb); ++ if (err < 0) { ++ if (err != -FDT_ERR_NOTFOUND) ++ printf("failed to get carveout for %s: %d\n", node, ++ err); ++ ++ return err; ++ } ++ ++ err = fdtdec_set_carveout(dst, node, "memory-region", 0, "framebuffer", ++ &fb); ++ if (err < 0) { ++ printf("failed to set carveout for %s: %d\n", node, err); ++ return err; ++ } ++ ++ return 0; ++} ++ ++static void ft_carveout_setup(void *fdt) ++{ ++ const void *cboot_fdt = (const void *)cboot_boot_x0; ++ static const char * const nodes[] = { ++ "/host1x@50000000/dc@54200000", ++ "/host1x@50000000/dc@54240000", ++ }; ++ unsigned int i; ++ int err; ++ ++ for (i = 0; i < ARRAY_SIZE(nodes); i++) { ++ err = ft_copy_carveout(fdt, cboot_fdt, nodes[i]); ++ if (err < 0) { ++ if (err != -FDT_ERR_NOTFOUND) ++ printf("failed to copy carveout for %s: %d\n", ++ nodes[i], err); ++ continue; ++ } ++ } ++} ++ + int ft_board_setup(void *fdt, bd_t *bd) + { + ft_mac_address_setup(fdt); ++ ft_carveout_setup(fdt); + + return 0; + } + +From patchwork Thu Mar 21 18:10:10 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot,v3,13/13] p2771-0000: Add support for framebuffer carveouts +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1060363 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190321181010.27005-14-thierry.reding@gmail.com> +To: Tom Warren , + Simon Glass +Cc: u-boot@lists.denx.de, Stephen Warren +Date: Thu, 21 Mar 2019 19:10:10 +0100 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +If early firmware initialized the display hardware and the display +controllers are scanning out a framebuffer (e.g. a splash screen), make +sure to pass information about the memory location of that framebuffer +to the kernel before booting to avoid the kernel from using that memory +for the buddy allocator. + +This same mechanism can also be used in the kernel to set up early SMMU +mappings and avoid SMMU faults caused by the display controller reading +from memory for which it has no mapping. + +Signed-off-by: Thierry Reding +Reviewed-by: Simon Glass +--- + board/nvidia/p2771-0000/p2771-0000.c | 66 ++++++++++++++++++++++++++-- + 1 file changed, 62 insertions(+), 4 deletions(-) + +diff --git a/board/nvidia/p2771-0000/p2771-0000.c b/board/nvidia/p2771-0000/p2771-0000.c +index fe22067f6571..d294c7ae0136 100644 +--- a/board/nvidia/p2771-0000/p2771-0000.c ++++ b/board/nvidia/p2771-0000/p2771-0000.c +@@ -5,6 +5,7 @@ + + #include + #include ++#include + #include + #include + #include +@@ -56,7 +57,7 @@ int tegra_pcie_board_init(void) + } + #endif + +-int ft_board_setup(void *fdt, bd_t *bd) ++static void ft_mac_address_setup(void *fdt) + { + const void *cboot_fdt = (const void *)cboot_boot_x0; + uint8_t mac[ETH_ALEN], local_mac[ETH_ALEN]; +@@ -69,13 +70,15 @@ int ft_board_setup(void *fdt, bd_t *bd) + + path = fdt_get_alias(fdt, "ethernet"); + if (!path) +- return 0; ++ return; + + debug("ethernet alias found: %s\n", path); + + offset = fdt_path_offset(fdt, path); +- if (offset < 0) +- return 0; ++ if (offset < 0) { ++ printf("ethernet alias points to absent node %s\n", path); ++ return; ++ } + + if (is_valid_ethaddr(local_mac)) { + err = fdt_setprop(fdt, offset, "local-mac-address", local_mac, +@@ -92,6 +95,61 @@ int ft_board_setup(void *fdt, bd_t *bd) + debug("MAC address set: %pM\n", mac); + } + } ++} ++ ++static int ft_copy_carveout(void *dst, const void *src, const char *node) ++{ ++ struct fdt_memory fb; ++ int err; ++ ++ err = fdtdec_get_carveout(src, node, "memory-region", 0, &fb); ++ if (err < 0) { ++ if (err != -FDT_ERR_NOTFOUND) ++ printf("failed to get carveout for %s: %d\n", node, ++ err); ++ ++ return err; ++ } ++ ++ err = fdtdec_set_carveout(dst, node, "memory-region", 0, "framebuffer", ++ &fb); ++ if (err < 0) { ++ printf("failed to set carveout for %s: %d\n", node, err); ++ return err; ++ } ++ ++ return 0; ++} ++ ++static void ft_carveout_setup(void *fdt) ++{ ++ const void *cboot_fdt = (const void *)cboot_boot_x0; ++ static const char * const nodes[] = { ++ "/host1x@13e00000/display-hub@15200000/display@15200000", ++ "/host1x@13e00000/display-hub@15200000/display@15210000", ++ "/host1x@13e00000/display-hub@15200000/display@15220000", ++ }; ++ unsigned int i; ++ int err; ++ ++ for (i = 0; i < ARRAY_SIZE(nodes); i++) { ++ printf("copying carveout for %s...\n", nodes[i]); ++ ++ err = ft_copy_carveout(fdt, cboot_fdt, nodes[i]); ++ if (err < 0) { ++ if (err != -FDT_ERR_NOTFOUND) ++ printf("failed to copy carveout for %s: %d\n", ++ nodes[i], err); ++ ++ continue; ++ } ++ } ++} ++ ++int ft_board_setup(void *fdt, bd_t *bd) ++{ ++ ft_mac_address_setup(fdt); ++ ft_carveout_setup(fdt); + + return 0; + } diff --git a/ARM-tegra-Miscellaneous-improvements.patch b/ARM-tegra-Miscellaneous-improvements.patch new file mode 100644 index 0000000..61790a1 --- /dev/null +++ b/ARM-tegra-Miscellaneous-improvements.patch @@ -0,0 +1,2949 @@ +From patchwork Thu Mar 21 18:01:00 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot,v3,01/19] ARM: tegra: Use common header for PMU declarations +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1060337 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190321180118.26475-2-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de +Date: Thu, 21 Mar 2019 19:01:00 +0100 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +There's no need to replicate the pmu.h header file for every Tegra SoC +generation. Use a single header that is shared across generations. + +Signed-off-by: Thierry Reding +--- + .../include/asm/{arch-tegra20 => arch-tegra}/pmu.h | 6 +++--- + arch/arm/include/asm/arch-tegra114/pmu.h | 12 ------------ + arch/arm/include/asm/arch-tegra124/pmu.h | 13 ------------- + arch/arm/include/asm/arch-tegra210/pmu.h | 13 ------------- + arch/arm/include/asm/arch-tegra30/pmu.h | 12 ------------ + arch/arm/mach-tegra/board2.c | 2 +- + arch/arm/mach-tegra/emc.c | 2 +- + 7 files changed, 5 insertions(+), 55 deletions(-) + rename arch/arm/include/asm/{arch-tegra20 => arch-tegra}/pmu.h (73%) + delete mode 100644 arch/arm/include/asm/arch-tegra114/pmu.h + delete mode 100644 arch/arm/include/asm/arch-tegra124/pmu.h + delete mode 100644 arch/arm/include/asm/arch-tegra210/pmu.h + delete mode 100644 arch/arm/include/asm/arch-tegra30/pmu.h + +diff --git a/arch/arm/include/asm/arch-tegra20/pmu.h b/arch/arm/include/asm/arch-tegra/pmu.h +similarity index 73% +rename from arch/arm/include/asm/arch-tegra20/pmu.h +rename to arch/arm/include/asm/arch-tegra/pmu.h +index 18766dfed2bb..e850875d3166 100644 +--- a/arch/arm/include/asm/arch-tegra20/pmu.h ++++ b/arch/arm/include/asm/arch-tegra/pmu.h +@@ -4,10 +4,10 @@ + * NVIDIA Corporation + */ + +-#ifndef _ARCH_PMU_H_ +-#define _ARCH_PMU_H_ ++#ifndef _TEGRA_PMU_H_ ++#define _TEGRA_PMU_H_ + + /* Set core and CPU voltages to nominal levels */ + int pmu_set_nominal(void); + +-#endif /* _ARCH_PMU_H_ */ ++#endif /* _TEGRA_PMU_H_ */ +diff --git a/arch/arm/include/asm/arch-tegra114/pmu.h b/arch/arm/include/asm/arch-tegra114/pmu.h +deleted file mode 100644 +index 1e571ee7b317..000000000000 +--- a/arch/arm/include/asm/arch-tegra114/pmu.h ++++ /dev/null +@@ -1,12 +0,0 @@ +-/* SPDX-License-Identifier: GPL-2.0 */ +-/* +- * Copyright (c) 2010-2013, NVIDIA CORPORATION. All rights reserved. +- */ +- +-#ifndef _TEGRA114_PMU_H_ +-#define _TEGRA114_PMU_H_ +- +-/* Set core and CPU voltages to nominal levels */ +-int pmu_set_nominal(void); +- +-#endif /* _TEGRA114_PMU_H_ */ +diff --git a/arch/arm/include/asm/arch-tegra124/pmu.h b/arch/arm/include/asm/arch-tegra124/pmu.h +deleted file mode 100644 +index c38393edefda..000000000000 +--- a/arch/arm/include/asm/arch-tegra124/pmu.h ++++ /dev/null +@@ -1,13 +0,0 @@ +-/* SPDX-License-Identifier: GPL-2.0+ */ +-/* +- * (C) Copyright 2010-2013 +- * NVIDIA Corporation +- */ +- +-#ifndef _TEGRA124_PMU_H_ +-#define _TEGRA124_PMU_H_ +- +-/* Set core and CPU voltages to nominal levels */ +-int pmu_set_nominal(void); +- +-#endif /* _TEGRA124_PMU_H_ */ +diff --git a/arch/arm/include/asm/arch-tegra210/pmu.h b/arch/arm/include/asm/arch-tegra210/pmu.h +deleted file mode 100644 +index 6ea36aa41876..000000000000 +--- a/arch/arm/include/asm/arch-tegra210/pmu.h ++++ /dev/null +@@ -1,13 +0,0 @@ +-/* SPDX-License-Identifier: GPL-2.0+ */ +-/* +- * (C) Copyright 2010-2015 +- * NVIDIA Corporation +- */ +- +-#ifndef _TEGRA210_PMU_H_ +-#define _TEGRA210_PMU_H_ +- +-/* Set core and CPU voltages to nominal levels */ +-int pmu_set_nominal(void); +- +-#endif /* _TEGRA210_PMU_H_ */ +diff --git a/arch/arm/include/asm/arch-tegra30/pmu.h b/arch/arm/include/asm/arch-tegra30/pmu.h +deleted file mode 100644 +index a823f0fbfc61..000000000000 +--- a/arch/arm/include/asm/arch-tegra30/pmu.h ++++ /dev/null +@@ -1,12 +0,0 @@ +-/* SPDX-License-Identifier: GPL-2.0 */ +-/* +- * Copyright (c) 2010-2012, NVIDIA CORPORATION. All rights reserved. +- */ +- +-#ifndef _TEGRA30_PMU_H_ +-#define _TEGRA30_PMU_H_ +- +-/* Set core and CPU voltages to nominal levels */ +-int pmu_set_nominal(void); +- +-#endif /* _TEGRA30_PMU_H_ */ +diff --git a/arch/arm/mach-tegra/board2.c b/arch/arm/mach-tegra/board2.c +index 12257a42b51b..b8d5ef0322cb 100644 +--- a/arch/arm/mach-tegra/board2.c ++++ b/arch/arm/mach-tegra/board2.c +@@ -15,6 +15,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -24,7 +25,6 @@ + #include + #include + #include +-#include + #include + #ifdef CONFIG_TEGRA_CLOCK_SCALING + #include +diff --git a/arch/arm/mach-tegra/emc.c b/arch/arm/mach-tegra/emc.c +index 6697909d9a3e..66628933b653 100644 +--- a/arch/arm/mach-tegra/emc.c ++++ b/arch/arm/mach-tegra/emc.c +@@ -8,10 +8,10 @@ + #include + #include + #include +-#include + #include + #include + #include ++#include + #include + + DECLARE_GLOBAL_DATA_PTR; + +From patchwork Thu Mar 21 18:01:01 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot,v3,02/19] ARM: tegra: Guard clock code with a Kconfig symbol +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1060347 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190321180118.26475-3-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de +Date: Thu, 21 Mar 2019 19:01:01 +0100 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +Clock code is not relevant on all Tegra SoC generations, so guard it +with a Kconfig symbol that can be selected by the generations that need +it. + +This is in preparation for unifying Tegra186 code with the code used on +older generations. + +Signed-off-by: Thierry Reding +--- + arch/arm/mach-tegra/Kconfig | 5 +++++ + arch/arm/mach-tegra/Makefile | 2 +- + arch/arm/mach-tegra/board.c | 2 ++ + arch/arm/mach-tegra/board2.c | 12 ++++++++++-- + 4 files changed, 18 insertions(+), 3 deletions(-) + +diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig +index 86b1cd11f752..ee078fec9adc 100644 +--- a/arch/arm/mach-tegra/Kconfig ++++ b/arch/arm/mach-tegra/Kconfig +@@ -12,6 +12,9 @@ config SPL_LIBGENERIC_SUPPORT + config SPL_SERIAL_SUPPORT + default y + ++config TEGRA_CLKRST ++ bool ++ + config TEGRA_IVC + bool "Tegra IVC protocol" + help +@@ -55,6 +58,7 @@ config TEGRA_ARMV7_COMMON + select SPL + select SPL_BOARD_INIT if SPL + select SUPPORT_SPL ++ select TEGRA_CLKRST + select TEGRA_COMMON + select TEGRA_GPIO + select TEGRA_NO_BPMP +@@ -100,6 +104,7 @@ config TEGRA124 + config TEGRA210 + bool "Tegra210 family" + select TEGRA_ARMV8_COMMON ++ select TEGRA_CLKRST + select TEGRA_GPIO + select TEGRA_NO_BPMP + +diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile +index d4b4666fb1e2..0e812818d7a2 100644 +--- a/arch/arm/mach-tegra/Makefile ++++ b/arch/arm/mach-tegra/Makefile +@@ -16,7 +16,7 @@ endif + obj-y += ap.o + obj-y += board.o board2.o + obj-y += cache.o +-obj-y += clock.o ++obj-$(CONFIG_TEGRA_CLKRST) += clock.o + obj-y += pinmux-common.o + obj-y += powergate.o + obj-y += xusb-padctl-dummy.o +diff --git a/arch/arm/mach-tegra/board.c b/arch/arm/mach-tegra/board.c +index f8fc042a1dcc..ecd5001de4c5 100644 +--- a/arch/arm/mach-tegra/board.c ++++ b/arch/arm/mach-tegra/board.c +@@ -9,7 +9,9 @@ + #include + #include + #include ++#if IS_ENABLED(CONFIG_TEGRA_CLKRST) + #include ++#endif + #include + #include + #include +diff --git a/arch/arm/mach-tegra/board2.c b/arch/arm/mach-tegra/board2.c +index b8d5ef0322cb..b94077221f77 100644 +--- a/arch/arm/mach-tegra/board2.c ++++ b/arch/arm/mach-tegra/board2.c +@@ -22,7 +22,9 @@ + #include + #include + #include ++#if IS_ENABLED(CONFIG_TEGRA_CLKRST) + #include ++#endif + #include + #include + #include +@@ -109,8 +111,10 @@ int board_init(void) + __maybe_unused int board_id; + + /* Do clocks and UART first so that printf() works */ ++#if IS_ENABLED(CONFIG_TEGRA_CLKRST) + clock_init(); + clock_verify(); ++#endif + + tegra_gpu_config(); + +@@ -181,8 +185,10 @@ void gpio_early_init(void) __attribute__((weak, alias("__gpio_early_init"))); + + int board_early_init_f(void) + { ++#if IS_ENABLED(CONFIG_TEGRA_CLKRST) + if (!clock_early_init_done()) + clock_early_init(); ++#endif + + #if defined(CONFIG_TEGRA_DISCONNECT_UDC_ON_BOOT) + #define USBCMD_FS2 (1 << 15) +@@ -193,10 +199,12 @@ int board_early_init_f(void) + #endif + + /* Do any special system timer/TSC setup */ +-#if defined(CONFIG_TEGRA_SUPPORT_NON_SECURE) ++#if IS_ENABLED(CONFIG_TEGRA_CLKRST) ++# if defined(CONFIG_TEGRA_SUPPORT_NON_SECURE) + if (!tegra_cpu_is_non_secure()) +-#endif ++# endif + arch_timer_init(); ++#endif + + pinmux_init(); + board_init_uart_f(); + +From patchwork Thu Mar 21 18:01:02 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot, v3, + 03/19] ARM: tegra: Guard GP pad control code with a Kconfig symbol +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1060338 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190321180118.26475-4-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de +Date: Thu, 21 Mar 2019 19:01:02 +0100 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +The GP pad control code is not relevant on all Tegra SoC generations, so +guard it with a Kconfig symbol that can be selected by the generations +that need it. + +This is in preparation for unifying Tegra186 code with the code used on +older generations. + +Signed-off-by: Thierry Reding +--- + arch/arm/mach-tegra/Kconfig | 5 +++++ + arch/arm/mach-tegra/Makefile | 2 +- + arch/arm/mach-tegra/cache.c | 2 ++ + 3 files changed, 8 insertions(+), 1 deletion(-) + +diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig +index ee078fec9adc..265051b18aaf 100644 +--- a/arch/arm/mach-tegra/Kconfig ++++ b/arch/arm/mach-tegra/Kconfig +@@ -15,6 +15,9 @@ config SPL_SERIAL_SUPPORT + config TEGRA_CLKRST + bool + ++config TEGRA_GP_PADCTRL ++ bool ++ + config TEGRA_IVC + bool "Tegra IVC protocol" + help +@@ -61,6 +64,7 @@ config TEGRA_ARMV7_COMMON + select TEGRA_CLKRST + select TEGRA_COMMON + select TEGRA_GPIO ++ select TEGRA_GP_PADCTRL + select TEGRA_NO_BPMP + + config TEGRA_ARMV8_COMMON +@@ -106,6 +110,7 @@ config TEGRA210 + select TEGRA_ARMV8_COMMON + select TEGRA_CLKRST + select TEGRA_GPIO ++ select TEGRA_GP_PADCTRL + select TEGRA_NO_BPMP + + config TEGRA186 +diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile +index 0e812818d7a2..69f802c01b45 100644 +--- a/arch/arm/mach-tegra/Makefile ++++ b/arch/arm/mach-tegra/Makefile +@@ -13,7 +13,7 @@ else + obj-$(CONFIG_CMD_ENTERRCM) += cmd_enterrcm.o + endif + +-obj-y += ap.o ++obj-$(CONFIG_TEGRA_GP_PADCTRL) += ap.o + obj-y += board.o board2.o + obj-y += cache.o + obj-$(CONFIG_TEGRA_CLKRST) += clock.o +diff --git a/arch/arm/mach-tegra/cache.c b/arch/arm/mach-tegra/cache.c +index be414e4e4aca..d7063490e222 100644 +--- a/arch/arm/mach-tegra/cache.c ++++ b/arch/arm/mach-tegra/cache.c +@@ -8,7 +8,9 @@ + #include + #include + #include ++#if IS_ENABLED(CONFIG_TEGRA_GP_PADCTRL) + #include ++#endif + + #ifndef CONFIG_ARM64 + void config_cache(void) + +From patchwork Thu Mar 21 18:01:03 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot, v3, + 04/19] ARM: tegra: Guard memory controller code with a Kconfig symbol +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1060339 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190321180118.26475-5-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de +Date: Thu, 21 Mar 2019 19:01:03 +0100 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +Memory controller code is not relevant on all Tegra SoC generations, so +guard it with a Kconfig symbol that can be selected by the generations +that need it. + +This is in preparation for unifying Tegra186 code with the code used on +older generations. + +Signed-off-by: Thierry Reding +--- + arch/arm/mach-tegra/Kconfig | 5 +++++ + arch/arm/mach-tegra/board.c | 7 +++++++ + 2 files changed, 12 insertions(+) + +diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig +index 265051b18aaf..5763c4ae3cd1 100644 +--- a/arch/arm/mach-tegra/Kconfig ++++ b/arch/arm/mach-tegra/Kconfig +@@ -26,6 +26,9 @@ config TEGRA_IVC + U-Boot, it is typically used for communication between the main CPU + and various auxiliary processors. + ++config TEGRA_MC ++ bool ++ + config TEGRA_COMMON + bool "Tegra common options" + select BINMAN +@@ -65,6 +68,7 @@ config TEGRA_ARMV7_COMMON + select TEGRA_COMMON + select TEGRA_GPIO + select TEGRA_GP_PADCTRL ++ select TEGRA_MC + select TEGRA_NO_BPMP + + config TEGRA_ARMV8_COMMON +@@ -111,6 +115,7 @@ config TEGRA210 + select TEGRA_CLKRST + select TEGRA_GPIO + select TEGRA_GP_PADCTRL ++ select TEGRA_MC + select TEGRA_NO_BPMP + + config TEGRA186 +diff --git a/arch/arm/mach-tegra/board.c b/arch/arm/mach-tegra/board.c +index ecd5001de4c5..7ef5a67edd1f 100644 +--- a/arch/arm/mach-tegra/board.c ++++ b/arch/arm/mach-tegra/board.c +@@ -13,7 +13,9 @@ + #include + #endif + #include ++#if IS_ENABLED(CONFIG_TEGRA_MC) + #include ++#endif + #include + #include + #include +@@ -68,6 +70,7 @@ bool tegra_cpu_is_non_secure(void) + } + #endif + ++#if IS_ENABLED(CONFIG_TEGRA_MC) + /* Read the RAM size directly from the memory controller */ + static phys_size_t query_sdram_size(void) + { +@@ -117,11 +120,15 @@ static phys_size_t query_sdram_size(void) + + return size_bytes; + } ++#endif + + int dram_init(void) + { ++#if IS_ENABLED(CONFIG_TEGRA_MC) + /* We do not initialise DRAM here. We just query the size */ + gd->ram_size = query_sdram_size(); ++#endif ++ + return 0; + } + + +From patchwork Thu Mar 21 18:01:04 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot, v3, + 05/19] ARM: tegra: Guard pin controller code with a Kconfig symbol +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1060345 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190321180118.26475-6-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de +Date: Thu, 21 Mar 2019 19:01:04 +0100 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +Pin controller code is not relevant on all Tegra SoC generations, so +guard it with a Kconfig symbol that can be selected by the generations +that need it. + +This is in preparation for unifying Tegra186 code with the code used on +older generations. + +Signed-off-by: Thierry Reding +--- + arch/arm/mach-tegra/Kconfig | 5 +++++ + arch/arm/mach-tegra/Makefile | 2 +- + arch/arm/mach-tegra/board.c | 6 ++++++ + arch/arm/mach-tegra/board2.c | 2 ++ + 4 files changed, 14 insertions(+), 1 deletion(-) + +diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig +index 5763c4ae3cd1..be20ac2e804e 100644 +--- a/arch/arm/mach-tegra/Kconfig ++++ b/arch/arm/mach-tegra/Kconfig +@@ -29,6 +29,9 @@ config TEGRA_IVC + config TEGRA_MC + bool + ++config TEGRA_PINCTRL ++ bool ++ + config TEGRA_COMMON + bool "Tegra common options" + select BINMAN +@@ -70,6 +73,7 @@ config TEGRA_ARMV7_COMMON + select TEGRA_GP_PADCTRL + select TEGRA_MC + select TEGRA_NO_BPMP ++ select TEGRA_PINCTRL + + config TEGRA_ARMV8_COMMON + bool "Tegra 64-bit common options" +@@ -117,6 +121,7 @@ config TEGRA210 + select TEGRA_GP_PADCTRL + select TEGRA_MC + select TEGRA_NO_BPMP ++ select TEGRA_PINCTRL + + config TEGRA186 + bool "Tegra186 family" +diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile +index 69f802c01b45..395e0191a458 100644 +--- a/arch/arm/mach-tegra/Makefile ++++ b/arch/arm/mach-tegra/Makefile +@@ -17,7 +17,7 @@ obj-$(CONFIG_TEGRA_GP_PADCTRL) += ap.o + obj-y += board.o board2.o + obj-y += cache.o + obj-$(CONFIG_TEGRA_CLKRST) += clock.o +-obj-y += pinmux-common.o ++obj-$(CONFIG_TEGRA_PINCTRL) += pinmux-common.o + obj-y += powergate.o + obj-y += xusb-padctl-dummy.o + endif +diff --git a/arch/arm/mach-tegra/board.c b/arch/arm/mach-tegra/board.c +index 7ef5a67edd1f..b65bdde5a78d 100644 +--- a/arch/arm/mach-tegra/board.c ++++ b/arch/arm/mach-tegra/board.c +@@ -12,7 +12,9 @@ + #if IS_ENABLED(CONFIG_TEGRA_CLKRST) + #include + #endif ++#if IS_ENABLED(CONFIG_TEGRA_PINCTRL) + #include ++#endif + #if IS_ENABLED(CONFIG_TEGRA_MC) + #include + #endif +@@ -132,6 +134,7 @@ int dram_init(void) + return 0; + } + ++#if IS_ENABLED(CONFIG_TEGRA_PINCTRL) + static int uart_configs[] = { + #if defined(CONFIG_TEGRA20) + #if defined(CONFIG_TEGRA_UARTA_UAA_UAB) +@@ -199,9 +202,11 @@ static void setup_uarts(int uart_ids) + } + } + } ++#endif + + void board_init_uart_f(void) + { ++#if IS_ENABLED(CONFIG_TEGRA_PINCTRL) + int uart_ids = 0; /* bit mask of which UART ids to enable */ + + #ifdef CONFIG_TEGRA_ENABLE_UARTA +@@ -220,6 +225,7 @@ void board_init_uart_f(void) + uart_ids |= UARTE; + #endif + setup_uarts(uart_ids); ++#endif + } + + #if !CONFIG_IS_ENABLED(OF_CONTROL) +diff --git a/arch/arm/mach-tegra/board2.c b/arch/arm/mach-tegra/board2.c +index b94077221f77..ce1c9346959d 100644 +--- a/arch/arm/mach-tegra/board2.c ++++ b/arch/arm/mach-tegra/board2.c +@@ -25,8 +25,10 @@ + #if IS_ENABLED(CONFIG_TEGRA_CLKRST) + #include + #endif ++#if IS_ENABLED(CONFIG_TEGRA_PINCTRL) + #include + #include ++#endif + #include + #ifdef CONFIG_TEGRA_CLOCK_SCALING + #include + +From patchwork Thu Mar 21 18:01:05 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot, v3, + 06/19] ARM: tegra: Guard powergate code with a Kconfig symbol +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1060355 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190321180118.26475-7-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de +Date: Thu, 21 Mar 2019 19:01:05 +0100 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +Powergate code is not relevant on all Tegra SoC generations, so guard it +with a Kconfig symbol that can be selected by the generations that need +it. + +This is in preparation for unifying Tegra186 code with the code used on +older generations. + +Signed-off-by: Thierry Reding +--- + arch/arm/mach-tegra/Kconfig | 5 +++++ + arch/arm/mach-tegra/Makefile | 2 +- + 2 files changed, 6 insertions(+), 1 deletion(-) + +diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig +index be20ac2e804e..db9198348d3f 100644 +--- a/arch/arm/mach-tegra/Kconfig ++++ b/arch/arm/mach-tegra/Kconfig +@@ -32,6 +32,9 @@ config TEGRA_MC + config TEGRA_PINCTRL + bool + ++config TEGRA_PMC ++ bool ++ + config TEGRA_COMMON + bool "Tegra common options" + select BINMAN +@@ -74,6 +77,7 @@ config TEGRA_ARMV7_COMMON + select TEGRA_MC + select TEGRA_NO_BPMP + select TEGRA_PINCTRL ++ select TEGRA_PMC + + config TEGRA_ARMV8_COMMON + bool "Tegra 64-bit common options" +@@ -122,6 +126,7 @@ config TEGRA210 + select TEGRA_MC + select TEGRA_NO_BPMP + select TEGRA_PINCTRL ++ select TEGRA_PMC + + config TEGRA186 + bool "Tegra186 family" +diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile +index 395e0191a458..517be21ee5f5 100644 +--- a/arch/arm/mach-tegra/Makefile ++++ b/arch/arm/mach-tegra/Makefile +@@ -18,7 +18,7 @@ obj-y += board.o board2.o + obj-y += cache.o + obj-$(CONFIG_TEGRA_CLKRST) += clock.o + obj-$(CONFIG_TEGRA_PINCTRL) += pinmux-common.o +-obj-y += powergate.o ++obj-$(CONFIG_TEGRA_PMC) += powergate.o + obj-y += xusb-padctl-dummy.o + endif + + +From patchwork Thu Mar 21 18:01:06 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot,v3,07/19] ARM: tegra: Fix save_boot_params() prototype +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1060346 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190321180118.26475-8-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de +Date: Thu, 21 Mar 2019 19:01:06 +0100 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +The save_boot_params() function takes as its first four arguments the +first four registers. On 32-bit ARM these are r0, r1, r2 and r3, all of +which are 32 bits wide. However, on 64-bit ARM thene registers are x0, +x1, x2 and x3, all of which are 64 bits wide. In order to allow reusing +the save_boot_params() implementation on 64-bit ARM, change it to take +unsigned long parameters rather than the fixed size 32-bit integers. +This ensures that the correct values are passed. + +Signed-off-by: Thierry Reding +--- + arch/arm/mach-tegra/board.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +diff --git a/arch/arm/mach-tegra/board.c b/arch/arm/mach-tegra/board.c +index b65bdde5a78d..59d2f347485d 100644 +--- a/arch/arm/mach-tegra/board.c ++++ b/arch/arm/mach-tegra/board.c +@@ -42,7 +42,8 @@ enum { + static bool from_spl __attribute__ ((section(".data"))); + + #ifndef CONFIG_SPL_BUILD +-void save_boot_params(u32 r0, u32 r1, u32 r2, u32 r3) ++void save_boot_params(unsigned long r0, unsigned long r1, unsigned long r2, ++ unsigned long r3) + { + from_spl = r0 != UBOOT_NOT_LOADED_FROM_SPL; + save_boot_params_ret(); + +From patchwork Thu Mar 21 18:01:07 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot, v3, + 08/19] ARM: tegra: Allow boards to override boot target devices +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1060348 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190321180118.26475-9-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de +Date: Thu, 21 Mar 2019 19:01:07 +0100 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +Boards may not support all the boot target devices in the default list +for Tegra devices. Allow a board to override the list and default to the +standard list only if the board hasn't specified one itself. + +Signed-off-by: Thierry Reding +--- + include/configs/tegra-common-post.h | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/include/configs/tegra-common-post.h b/include/configs/tegra-common-post.h +index e54428ba43e2..9685ee5059ab 100644 +--- a/include/configs/tegra-common-post.h ++++ b/include/configs/tegra-common-post.h +@@ -21,12 +21,14 @@ + #define CONFIG_SYS_NONCACHED_MEMORY (1 << 20) /* 1 MiB */ + + #ifndef CONFIG_SPL_BUILD ++#ifndef BOOT_TARGET_DEVICES + #define BOOT_TARGET_DEVICES(func) \ + func(MMC, mmc, 1) \ + func(MMC, mmc, 0) \ + func(USB, usb, 0) \ + func(PXE, pxe, na) \ + func(DHCP, dhcp, na) ++#endif + #include + #else + #define BOOTENV + +From patchwork Thu Mar 21 18:01:08 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot,v3,09/19] ARM: tegra: Support TZ-only access to PMC +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1060350 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190321180118.26475-10-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de +Date: Thu, 21 Mar 2019 19:01:08 +0100 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +Some devices may restrict access to the PMC to TrustZone software only. +Non-TZ software can detect this and use SMC calls to the firmware that +runs in the TrustZone to perform accesses to PMC registers. + +Note that this also fixes reset_cpu() and the enterrcm command on +Tegra186 where they were previously trying to access the PMC at a wrong +physical address. + +Based on work by Kalyani Chidambaram and Tom +Warren . + +Signed-off-by: Thierry Reding +--- + arch/arm/include/asm/arch-tegra/pmc.h | 20 +++++- + arch/arm/include/asm/arch-tegra/tegra.h | 6 ++ + arch/arm/mach-tegra/Kconfig | 5 ++ + arch/arm/mach-tegra/Makefile | 4 +- + arch/arm/mach-tegra/clock.c | 13 ++-- + arch/arm/mach-tegra/cmd_enterrcm.c | 6 +- + arch/arm/mach-tegra/cpu.c | 20 +++--- + arch/arm/mach-tegra/lowlevel_init.S | 39 ----------- + arch/arm/mach-tegra/pmc.c | 92 +++++++++++++++++++++++++ + arch/arm/mach-tegra/powergate.c | 11 +-- + 10 files changed, 151 insertions(+), 65 deletions(-) + delete mode 100644 arch/arm/mach-tegra/lowlevel_init.S + create mode 100644 arch/arm/mach-tegra/pmc.c + +diff --git a/arch/arm/include/asm/arch-tegra/pmc.h b/arch/arm/include/asm/arch-tegra/pmc.h +index 34bbe75d5fdb..1524bf291164 100644 +--- a/arch/arm/include/asm/arch-tegra/pmc.h ++++ b/arch/arm/include/asm/arch-tegra/pmc.h +@@ -1,6 +1,6 @@ + /* SPDX-License-Identifier: GPL-2.0+ */ + /* +- * (C) Copyright 2010-2015 ++ * (C) Copyright 2010-2019 + * NVIDIA Corporation + */ + +@@ -388,4 +388,22 @@ struct pmc_ctlr { + /* APBDEV_PMC_CNTRL2_0 0x440 */ + #define HOLD_CKE_LOW_EN (1 << 12) + ++/* PMC read/write functions */ ++u32 tegra_pmc_readl(unsigned long offset); ++void tegra_pmc_writel(u32 value, unsigned long offset); ++ ++#define PMC_CNTRL 0x0 ++#define PMC_CNTRL_MAIN_RST BIT(4) ++ ++#if IS_ENABLED(CONFIG_TEGRA186) ++# define PMC_SCRATCH0 0x32000 ++#else ++# define PMC_SCRATCH0 0x00050 ++#endif ++ ++/* for secure PMC */ ++#define TEGRA_SMC_PMC 0xc2fffe00 ++#define TEGRA_SMC_PMC_READ 0xaa ++#define TEGRA_SMC_PMC_WRITE 0xbb ++ + #endif /* PMC_H */ +diff --git a/arch/arm/include/asm/arch-tegra/tegra.h b/arch/arm/include/asm/arch-tegra/tegra.h +index 7ae0129e2db3..7a4e0972fb76 100644 +--- a/arch/arm/include/asm/arch-tegra/tegra.h ++++ b/arch/arm/include/asm/arch-tegra/tegra.h +@@ -30,7 +30,13 @@ + #define NV_PA_SLINK5_BASE (NV_PA_APB_MISC_BASE + 0xDC00) + #define NV_PA_SLINK6_BASE (NV_PA_APB_MISC_BASE + 0xDE00) + #define TEGRA_DVC_BASE (NV_PA_APB_MISC_BASE + 0xD000) ++#if defined(CONFIG_TEGRA20) || defined(CONFIG_TEGRA30) || \ ++ defined(CONFIG_TEGRA114) || defined(CONFIG_TEGRA124) || \ ++ defined(CONFIG_TEGRA132) || defined(CONFIG_TEGRA210) + #define NV_PA_PMC_BASE (NV_PA_APB_MISC_BASE + 0xE400) ++#else ++#define NV_PA_PMC_BASE 0xc360000 ++#endif + #define NV_PA_EMC_BASE (NV_PA_APB_MISC_BASE + 0xF400) + #define NV_PA_FUSE_BASE (NV_PA_APB_MISC_BASE + 0xF800) + #if defined(CONFIG_TEGRA20) || defined(CONFIG_TEGRA30) || \ +diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig +index db9198348d3f..28914a34a1b5 100644 +--- a/arch/arm/mach-tegra/Kconfig ++++ b/arch/arm/mach-tegra/Kconfig +@@ -35,6 +35,10 @@ config TEGRA_PINCTRL + config TEGRA_PMC + bool + ++config TEGRA_PMC_SECURE ++ bool ++ depends on TEGRA_PMC ++ + config TEGRA_COMMON + bool "Tegra common options" + select BINMAN +@@ -127,6 +131,7 @@ config TEGRA210 + select TEGRA_NO_BPMP + select TEGRA_PINCTRL + select TEGRA_PMC ++ select TEGRA_PMC_SECURE + + config TEGRA186 + bool "Tegra186 family" +diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile +index 517be21ee5f5..f8bc65aa8b18 100644 +--- a/arch/arm/mach-tegra/Makefile ++++ b/arch/arm/mach-tegra/Makefile +@@ -1,6 +1,6 @@ + # SPDX-License-Identifier: GPL-2.0+ + # +-# (C) Copyright 2010-2015 Nvidia Corporation. ++# (C) Copyright 2010-2019 Nvidia Corporation. + # + # (C) Copyright 2000-2008 + # Wolfgang Denk, DENX Software Engineering, wd@denx.de. +@@ -27,11 +27,11 @@ obj-y += dt-setup.o + obj-$(CONFIG_TEGRA_CLOCK_SCALING) += emc.o + obj-$(CONFIG_TEGRA_GPU) += gpu.o + obj-$(CONFIG_TEGRA_IVC) += ivc.o +-obj-y += lowlevel_init.o + ifndef CONFIG_SPL_BUILD + obj-$(CONFIG_ARMV7_PSCI) += psci.o + endif + obj-$(CONFIG_DISPLAY_CPUINFO) += sys_info.o ++obj-y += pmc.o + + obj-$(CONFIG_TEGRA20) += tegra20/ + obj-$(CONFIG_TEGRA30) += tegra30/ +diff --git a/arch/arm/mach-tegra/clock.c b/arch/arm/mach-tegra/clock.c +index 096330748f2b..c9cd4e6aaeb7 100644 +--- a/arch/arm/mach-tegra/clock.c ++++ b/arch/arm/mach-tegra/clock.c +@@ -1,6 +1,6 @@ + // SPDX-License-Identifier: GPL-2.0 + /* +- * Copyright (c) 2010-2015, NVIDIA CORPORATION. All rights reserved. ++ * Copyright (c) 2010-2019, NVIDIA CORPORATION. All rights reserved. + */ + + /* Tegra SoC common clock control functions */ +@@ -814,11 +814,16 @@ void tegra30_set_up_pllp(void) + + int clock_external_output(int clk_id) + { +- struct pmc_ctlr *pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE; ++ u32 val; + + if (clk_id >= 1 && clk_id <= 3) { +- setbits_le32(&pmc->pmc_clk_out_cntrl, +- 1 << (2 + (clk_id - 1) * 8)); ++ val = tegra_pmc_readl(offsetof(struct pmc_ctlr, ++ pmc_clk_out_cntrl)); ++ val |= 1 << (2 + (clk_id - 1) * 8); ++ tegra_pmc_writel(val, ++ offsetof(struct pmc_ctlr, ++ pmc_clk_out_cntrl)); ++ + } else { + printf("%s: Unknown output clock id %d\n", __func__, clk_id); + return -EINVAL; +diff --git a/arch/arm/mach-tegra/cmd_enterrcm.c b/arch/arm/mach-tegra/cmd_enterrcm.c +index 4e6beb3e5bb4..4a889f0e3422 100644 +--- a/arch/arm/mach-tegra/cmd_enterrcm.c ++++ b/arch/arm/mach-tegra/cmd_enterrcm.c +@@ -1,6 +1,6 @@ + // SPDX-License-Identifier: GPL-2.0+ + /* +- * Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. ++ * Copyright (c) 2012-2019, NVIDIA CORPORATION. All rights reserved. + * + * Derived from code (arch/arm/lib/reset.c) that is: + * +@@ -31,12 +31,10 @@ + static int do_enterrcm(cmd_tbl_t *cmdtp, int flag, int argc, + char * const argv[]) + { +- struct pmc_ctlr *pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE; +- + puts("Entering RCM...\n"); + udelay(50000); + +- pmc->pmc_scratch0 = 2; ++ tegra_pmc_writel(2, PMC_SCRATCH0); + disable_interrupts(); + reset_cpu(0); + +diff --git a/arch/arm/mach-tegra/cpu.c b/arch/arm/mach-tegra/cpu.c +index 1b6ad074ed8f..3d140760e68f 100644 +--- a/arch/arm/mach-tegra/cpu.c ++++ b/arch/arm/mach-tegra/cpu.c +@@ -1,6 +1,6 @@ + // SPDX-License-Identifier: GPL-2.0 + /* +- * Copyright (c) 2010-2015, NVIDIA CORPORATION. All rights reserved. ++ * Copyright (c) 2010-2019, NVIDIA CORPORATION. All rights reserved. + */ + + #include +@@ -299,21 +299,19 @@ void enable_cpu_clock(int enable) + + static int is_cpu_powered(void) + { +- struct pmc_ctlr *pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE; +- +- return (readl(&pmc->pmc_pwrgate_status) & CPU_PWRED) ? 1 : 0; ++ return (tegra_pmc_readl(offsetof(struct pmc_ctlr, ++ pmc_pwrgate_status)) & CPU_PWRED) ? 1 : 0; + } + + static void remove_cpu_io_clamps(void) + { +- struct pmc_ctlr *pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE; + u32 reg; + debug("%s entry\n", __func__); + + /* Remove the clamps on the CPU I/O signals */ +- reg = readl(&pmc->pmc_remove_clamping); ++ reg = tegra_pmc_readl(offsetof(struct pmc_ctlr, pmc_remove_clamping)); + reg |= CPU_CLMP; +- writel(reg, &pmc->pmc_remove_clamping); ++ tegra_pmc_writel(reg, offsetof(struct pmc_ctlr, pmc_remove_clamping)); + + /* Give I/O signals time to stabilize */ + udelay(IO_STABILIZATION_DELAY); +@@ -321,17 +319,19 @@ static void remove_cpu_io_clamps(void) + + void powerup_cpu(void) + { +- struct pmc_ctlr *pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE; + u32 reg; + int timeout = IO_STABILIZATION_DELAY; + debug("%s entry\n", __func__); + + if (!is_cpu_powered()) { + /* Toggle the CPU power state (OFF -> ON) */ +- reg = readl(&pmc->pmc_pwrgate_toggle); ++ reg = tegra_pmc_readl(offsetof(struct pmc_ctlr, ++ pmc_pwrgate_toggle)); + reg &= PARTID_CP; + reg |= START_CP; +- writel(reg, &pmc->pmc_pwrgate_toggle); ++ tegra_pmc_writel(reg, ++ offsetof(struct pmc_ctlr, ++ pmc_pwrgate_toggle)); + + /* Wait for the power to come up */ + while (!is_cpu_powered()) { +diff --git a/arch/arm/mach-tegra/lowlevel_init.S b/arch/arm/mach-tegra/lowlevel_init.S +deleted file mode 100644 +index 626f1b642745..000000000000 +--- a/arch/arm/mach-tegra/lowlevel_init.S ++++ /dev/null +@@ -1,39 +0,0 @@ +-/* SPDX-License-Identifier: GPL-2.0+ */ +-/* +- * SoC-specific setup info +- * +- * (C) Copyright 2010,2011 +- * NVIDIA Corporation +- */ +- +-#include +-#include +- +-#ifdef CONFIG_ARM64 +- .align 5 +-ENTRY(reset_cpu) +- /* get address for global reset register */ +- ldr x1, =PRM_RSTCTRL +- ldr w3, [x1] +- /* force reset */ +- orr w3, w3, #0x10 +- str w3, [x1] +- mov w0, w0 +-1: +- b 1b +-ENDPROC(reset_cpu) +-#else +- .align 5 +-ENTRY(reset_cpu) +- ldr r1, rstctl @ get addr for global reset +- @ reg +- ldr r3, [r1] +- orr r3, r3, #0x10 +- str r3, [r1] @ force reset +- mov r0, r0 +-_loop_forever: +- b _loop_forever +-rstctl: +- .word PRM_RSTCTRL +-ENDPROC(reset_cpu) +-#endif +diff --git a/arch/arm/mach-tegra/pmc.c b/arch/arm/mach-tegra/pmc.c +new file mode 100644 +index 000000000000..afd3c54179c1 +--- /dev/null ++++ b/arch/arm/mach-tegra/pmc.c +@@ -0,0 +1,92 @@ ++/* SPDX-License-Identifier: GPL-2.0 */ ++/* ++ * Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved. ++ */ ++ ++#include ++ ++#include ++ ++#include ++#include ++ ++DECLARE_GLOBAL_DATA_PTR; ++ ++#if IS_ENABLED(CONFIG_TEGRA_PMC_SECURE) ++static bool tegra_pmc_detect_tz_only(void) ++{ ++ static bool initialized = false; ++ static bool is_tz_only = false; ++ u32 value, saved; ++ ++ if (!initialized) { ++ saved = readl(NV_PA_PMC_BASE + PMC_SCRATCH0); ++ value = saved ^ 0xffffffff; ++ ++ if (value == 0xffffffff) ++ value = 0xdeadbeef; ++ ++ /* write pattern and read it back */ ++ writel(value, NV_PA_PMC_BASE + PMC_SCRATCH0); ++ value = readl(NV_PA_PMC_BASE + PMC_SCRATCH0); ++ ++ /* if we read all-zeroes, access is restricted to TZ only */ ++ if (value == 0) { ++ debug("access to PMC is restricted to TZ\n"); ++ is_tz_only = true; ++ } else { ++ /* restore original value */ ++ writel(saved, NV_PA_PMC_BASE + PMC_SCRATCH0); ++ } ++ ++ initialized = true; ++ } ++ ++ return is_tz_only; ++} ++#endif ++ ++uint32_t tegra_pmc_readl(unsigned long offset) ++{ ++#if IS_ENABLED(CONFIG_TEGRA_PMC_SECURE) ++ if (tegra_pmc_detect_tz_only()) { ++ struct arm_smccc_res res; ++ ++ arm_smccc_smc(TEGRA_SMC_PMC, TEGRA_SMC_PMC_READ, offset, 0, 0, ++ 0, 0, 0, &res); ++ if (res.a0) ++ printf("%s(): SMC failed: %lu\n", __func__, res.a0); ++ ++ return res.a1; ++ } ++#endif ++ ++ return readl(NV_PA_PMC_BASE + offset); ++} ++ ++void tegra_pmc_writel(u32 value, unsigned long offset) ++{ ++#if IS_ENABLED(CONFIG_TEGRA_PMC_SECURE) ++ if (tegra_pmc_detect_tz_only()) { ++ struct arm_smccc_res res; ++ ++ arm_smccc_smc(TEGRA_SMC_PMC, TEGRA_SMC_PMC_WRITE, offset, ++ value, 0, 0, 0, 0, &res); ++ if (res.a0) ++ printf("%s(): SMC failed: %lu\n", __func__, res.a0); ++ ++ return; ++ } ++#endif ++ ++ writel(value, NV_PA_PMC_BASE + offset); ++} ++ ++void reset_cpu(ulong addr) ++{ ++ u32 value; ++ ++ value = tegra_pmc_readl(PMC_CNTRL); ++ value |= PMC_CNTRL_MAIN_RST; ++ tegra_pmc_writel(value, PMC_CNTRL); ++} +diff --git a/arch/arm/mach-tegra/powergate.c b/arch/arm/mach-tegra/powergate.c +index e45f0961b242..761c9ef19e3b 100644 +--- a/arch/arm/mach-tegra/powergate.c ++++ b/arch/arm/mach-tegra/powergate.c +@@ -1,6 +1,6 @@ + // SPDX-License-Identifier: GPL-2.0 + /* +- * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved. ++ * Copyright (c) 2014-2019, NVIDIA CORPORATION. All rights reserved. + */ + + #include +@@ -11,6 +11,7 @@ + + #include + #include ++#include + + #define PWRGATE_TOGGLE 0x30 + #define PWRGATE_TOGGLE_START (1 << 8) +@@ -24,18 +25,18 @@ static int tegra_powergate_set(enum tegra_powergate id, bool state) + u32 value, mask = state ? (1 << id) : 0, old_mask; + unsigned long start, timeout = 25; + +- value = readl(NV_PA_PMC_BASE + PWRGATE_STATUS); ++ value = tegra_pmc_readl(PWRGATE_STATUS); + old_mask = value & (1 << id); + + if (mask == old_mask) + return 0; + +- writel(PWRGATE_TOGGLE_START | id, NV_PA_PMC_BASE + PWRGATE_TOGGLE); ++ tegra_pmc_writel(PWRGATE_TOGGLE_START | id, PWRGATE_TOGGLE); + + start = get_timer(0); + + while (get_timer(start) < timeout) { +- value = readl(NV_PA_PMC_BASE + PWRGATE_STATUS); ++ value = tegra_pmc_readl(PWRGATE_STATUS); + if ((value & (1 << id)) == mask) + return 0; + } +@@ -69,7 +70,7 @@ static int tegra_powergate_remove_clamping(enum tegra_powergate id) + else + value = 1 << id; + +- writel(value, NV_PA_PMC_BASE + REMOVE_CLAMPING); ++ tegra_pmc_writel(value, REMOVE_CLAMPING); + + return 0; + } + +From patchwork Thu Mar 21 18:01:09 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot, v3, + 10/19] ARM: tegra: Workaround UDC boot issues only if necessary +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1060352 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190321180118.26475-11-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de +Date: Thu, 21 Mar 2019 19:01:09 +0100 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +Resetting the USB device controller on boot is only necessary if the SoC +actually has a UDC controller and U-Boot enables support for it. All the +Tegra boards support UDC via the ChipIdea UDC driver, so make the UDC on +boot workaround depend on the ChipIdea UDC driver. + +This prevents a crash on Tegra186 which does not have the ChipIdea UDC. + +Signed-off-by: Thierry Reding +--- + arch/arm/mach-tegra/Kconfig | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig +index 28914a34a1b5..faa73559fd42 100644 +--- a/arch/arm/mach-tegra/Kconfig ++++ b/arch/arm/mach-tegra/Kconfig +@@ -148,6 +148,7 @@ endchoice + + config TEGRA_DISCONNECT_UDC_ON_BOOT + bool "Disconnect USB device mode controller on boot" ++ depends on CI_UDC + default y + help + When loading U-Boot into RAM over USB protocols using tools such as + +From patchwork Thu Mar 21 18:01:10 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot,v3,11/19] ARM: tegra: Restore DRAM bank count +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1060341 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190321180118.26475-12-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de +Date: Thu, 21 Mar 2019 19:01:10 +0100 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +Commit 86cf1c82850f ("configs: Migrate CONFIG_NR_DRAM_BANKS") reduced +the number of DRAM banks supported by U-Boot from 1026 to 8 on P2771-000 +boards. + +However, as explained in commit a9819b9e33bd ("ARM: tegra: p2771-000: +increase max DRAM bank count"), the platform can have a large number of +unusable chunks of memory (up to 1024), so a total of 1026 DRAM banks +are needed to describe the worst-case situation. + +In practice the number of DRAM banks needed will typically be much +lower, but we should be prepared to properly deal with the worst case. + +Signed-off-by: Thierry Reding +--- + configs/p2771-0000-000_defconfig | 2 +- + configs/p2771-0000-500_defconfig | 2 +- + 2 files changed, 2 insertions(+), 2 deletions(-) + +diff --git a/configs/p2771-0000-000_defconfig b/configs/p2771-0000-000_defconfig +index ac85efa37b3b..ad0802067e73 100644 +--- a/configs/p2771-0000-000_defconfig ++++ b/configs/p2771-0000-000_defconfig +@@ -2,7 +2,7 @@ CONFIG_ARM=y + CONFIG_TEGRA=y + CONFIG_SYS_TEXT_BASE=0x80080000 + CONFIG_TEGRA186=y +-CONFIG_NR_DRAM_BANKS=8 ++CONFIG_NR_DRAM_BANKS=1026 + CONFIG_OF_SYSTEM_SETUP=y + CONFIG_CONSOLE_MUX=y + CONFIG_SYS_STDIO_DEREGISTER=y +diff --git a/configs/p2771-0000-500_defconfig b/configs/p2771-0000-500_defconfig +index df4d914d85cf..459b67fd195f 100644 +--- a/configs/p2771-0000-500_defconfig ++++ b/configs/p2771-0000-500_defconfig +@@ -2,7 +2,7 @@ CONFIG_ARM=y + CONFIG_TEGRA=y + CONFIG_SYS_TEXT_BASE=0x80080000 + CONFIG_TEGRA186=y +-CONFIG_NR_DRAM_BANKS=8 ++CONFIG_NR_DRAM_BANKS=1026 + CONFIG_OF_SYSTEM_SETUP=y + CONFIG_CONSOLE_MUX=y + CONFIG_SYS_STDIO_DEREGISTER=y + +From patchwork Thu Mar 21 18:01:11 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot,v3,12/19] ARM: tegra: Unify Tegra186 builds +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1060344 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190321180118.26475-13-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de +Date: Thu, 21 Mar 2019 19:01:11 +0100 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +Tegra186 build are currently dealt with in very special ways, which is +because Tegra186 is fundamentally different in many respects. It is no +longer necessary to do many of the low-level programming because early +boot firmware will already have taken care of it. + +Unfortunately, separating Tegra186 builds from the rest in this way +makes it difficult to share code with prior generations of Tegra. With +all of the low-level programming code behind Kconfig guards, the build +for Tegra186 can again be unified. + +As a side-effect, and partial reason for this change, other Tegra SoC +generations can now make use of the code that deals with taking over a +boot from earlier bootloaders. This used to be nvtboot, but has been +replaced by cboot nowadays. Rename the files and functions related to +this to avoid confusion. The implemented protocols are unchanged. + +Signed-off-by: Thierry Reding +--- +Changes in v3: +- load cboot DTB address to fdt_addr instead of fdtaddr + + arch/arm/include/asm/arch-tegra/cboot.h | 39 ++++ + arch/arm/mach-tegra/Makefile | 4 +- + arch/arm/mach-tegra/board.c | 23 ++ + arch/arm/mach-tegra/board186.c | 32 --- + arch/arm/mach-tegra/board2.c | 21 ++ + .../{tegra186/nvtboot_board.c => cboot.c} | 200 ++++++++++++++++-- + .../{tegra186/nvtboot_ll.S => cboot_ll.S} | 12 +- + arch/arm/mach-tegra/tegra186/Makefile | 4 - + arch/arm/mach-tegra/tegra186/nvtboot_mem.c | 172 --------------- + board/nvidia/p2771-0000/p2771-0000.c | 10 +- + 10 files changed, 278 insertions(+), 239 deletions(-) + create mode 100644 arch/arm/include/asm/arch-tegra/cboot.h + delete mode 100644 arch/arm/mach-tegra/board186.c + rename arch/arm/mach-tegra/{tegra186/nvtboot_board.c => cboot.c} (56%) + rename arch/arm/mach-tegra/{tegra186/nvtboot_ll.S => cboot_ll.S} (57%) + delete mode 100644 arch/arm/mach-tegra/tegra186/nvtboot_mem.c + +diff --git a/arch/arm/include/asm/arch-tegra/cboot.h b/arch/arm/include/asm/arch-tegra/cboot.h +new file mode 100644 +index 000000000000..b3441ec178b3 +--- /dev/null ++++ b/arch/arm/include/asm/arch-tegra/cboot.h +@@ -0,0 +1,39 @@ ++/* SPDX-License-Identifier: GPL-2.0+ */ ++/* ++ * Copyright (c) 2019 NVIDIA Corporation. All rights reserved. ++ */ ++ ++#ifndef _TEGRA_CBOOT_H_ ++#define _TEGRA_CBOOT_H_ ++ ++#ifdef CONFIG_ARM64 ++extern unsigned long cboot_boot_x0; ++ ++void cboot_save_boot_params(unsigned long x0, unsigned long x1, ++ unsigned long x2, unsigned long x3); ++int cboot_dram_init(void); ++int cboot_dram_init_banksize(void); ++ulong cboot_get_usable_ram_top(ulong total_size); ++#else ++static inline void cboot_save_boot_params(unsigned long x0, unsigned long x1, ++ unsigned long x2, unsigned long x3) ++{ ++} ++ ++static inline int cboot_dram_init(void) ++{ ++ return -ENOSYS; ++} ++ ++static inline int cboot_dram_init_banksize(void) ++{ ++ return -ENOSYS; ++} ++ ++static inline ulong cboot_get_usable_ram_top(ulong total_size) ++{ ++ return 0; ++} ++#endif ++ ++#endif +diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile +index f8bc65aa8b18..41ba674edff4 100644 +--- a/arch/arm/mach-tegra/Makefile ++++ b/arch/arm/mach-tegra/Makefile +@@ -5,7 +5,6 @@ + # (C) Copyright 2000-2008 + # Wolfgang Denk, DENX Software Engineering, wd@denx.de. + +-ifndef CONFIG_TEGRA186 + ifdef CONFIG_SPL_BUILD + obj-y += spl.o + obj-y += cpu.o +@@ -20,9 +19,8 @@ obj-$(CONFIG_TEGRA_CLKRST) += clock.o + obj-$(CONFIG_TEGRA_PINCTRL) += pinmux-common.o + obj-$(CONFIG_TEGRA_PMC) += powergate.o + obj-y += xusb-padctl-dummy.o +-endif + +-obj-$(CONFIG_ARM64) += arm64-mmu.o ++obj-$(CONFIG_ARM64) += arm64-mmu.o cboot_ll.o cboot.o + obj-y += dt-setup.o + obj-$(CONFIG_TEGRA_CLOCK_SCALING) += emc.o + obj-$(CONFIG_TEGRA_GPU) += gpu.o +diff --git a/arch/arm/mach-tegra/board.c b/arch/arm/mach-tegra/board.c +index 59d2f347485d..c3ba00811e83 100644 +--- a/arch/arm/mach-tegra/board.c ++++ b/arch/arm/mach-tegra/board.c +@@ -21,6 +21,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -46,6 +47,21 @@ void save_boot_params(unsigned long r0, unsigned long r1, unsigned long r2, + unsigned long r3) + { + from_spl = r0 != UBOOT_NOT_LOADED_FROM_SPL; ++ ++ /* ++ * The logic for this is somewhat indirect. The purpose of the marker ++ * (UBOOT_NOT_LOADED_FROM_SPL) is in fact used to determine if U-Boot ++ * was loaded from a read-only instance of itself, which is something ++ * that can happen in secure boot setups. So basically the presence ++ * of the marker is an indication that U-Boot was loaded by one such ++ * special variant of U-Boot. Conversely, the absence of the marker ++ * indicates that this instance of U-Boot was loaded by something ++ * other than a special U-Boot. This could be SPL, but it could just ++ * as well be one of any number of other first stage bootloaders. ++ */ ++ if (from_spl) ++ cboot_save_boot_params(r0, r1, r2, r3); ++ + save_boot_params_ret(); + } + #endif +@@ -127,6 +143,13 @@ static phys_size_t query_sdram_size(void) + + int dram_init(void) + { ++ int err; ++ ++ /* try to initialize DRAM from cboot DTB first */ ++ err = cboot_dram_init(); ++ if (err == 0) ++ return 0; ++ + #if IS_ENABLED(CONFIG_TEGRA_MC) + /* We do not initialise DRAM here. We just query the size */ + gd->ram_size = query_sdram_size(); +diff --git a/arch/arm/mach-tegra/board186.c b/arch/arm/mach-tegra/board186.c +deleted file mode 100644 +index 80b55707e90f..000000000000 +--- a/arch/arm/mach-tegra/board186.c ++++ /dev/null +@@ -1,32 +0,0 @@ +-// SPDX-License-Identifier: GPL-2.0+ +-/* +- * Copyright (c) 2016, NVIDIA CORPORATION. +- */ +- +-#include +-#include +- +-int board_early_init_f(void) +-{ +- return 0; +-} +- +-__weak int tegra_board_init(void) +-{ +- return 0; +-} +- +-int board_init(void) +-{ +- return tegra_board_init(); +-} +- +-__weak int tegra_soc_board_init_late(void) +-{ +- return 0; +-} +- +-int board_late_init(void) +-{ +- return tegra_soc_board_init_late(); +-} +diff --git a/arch/arm/mach-tegra/board2.c b/arch/arm/mach-tegra/board2.c +index ce1c9346959d..bbc487aa3bf6 100644 +--- a/arch/arm/mach-tegra/board2.c ++++ b/arch/arm/mach-tegra/board2.c +@@ -13,6 +13,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -51,6 +52,7 @@ __weak void pin_mux_mmc(void) {} + __weak void gpio_early_init_uart(void) {} + __weak void pin_mux_display(void) {} + __weak void start_cpu_fan(void) {} ++__weak void cboot_late_init(void) {} + + #if defined(CONFIG_TEGRA_NAND) + __weak void pin_mux_nand(void) +@@ -243,6 +245,7 @@ int board_late_init(void) + } + #endif + start_cpu_fan(); ++ cboot_late_init(); + + return 0; + } +@@ -337,6 +340,15 @@ static ulong usable_ram_size_below_4g(void) + */ + int dram_init_banksize(void) + { ++ int err; ++ ++ /* try to compute DRAM bank size based on cboot DTB first */ ++ err = cboot_dram_init_banksize(); ++ if (err == 0) ++ return err; ++ ++ /* fall back to default DRAM bank size computation */ ++ + gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; + gd->bd->bi_dram[0].size = usable_ram_size_below_4g(); + +@@ -370,5 +382,14 @@ int dram_init_banksize(void) + */ + ulong board_get_usable_ram_top(ulong total_size) + { ++ ulong ram_top; ++ ++ /* try to get top of usable RAM based on cboot DTB first */ ++ ram_top = cboot_get_usable_ram_top(total_size); ++ if (ram_top > 0) ++ return ram_top; ++ ++ /* fall back to default usable RAM computation */ ++ + return CONFIG_SYS_SDRAM_BASE + usable_ram_size_below_4g(); + } +diff --git a/arch/arm/mach-tegra/tegra186/nvtboot_board.c b/arch/arm/mach-tegra/cboot.c +similarity index 56% +rename from arch/arm/mach-tegra/tegra186/nvtboot_board.c +rename to arch/arm/mach-tegra/cboot.c +index 83c0e931ea24..95a097584ac6 100644 +--- a/arch/arm/mach-tegra/tegra186/nvtboot_board.c ++++ b/arch/arm/mach-tegra/cboot.c +@@ -3,14 +3,182 @@ + * Copyright (c) 2016-2018, NVIDIA CORPORATION. + */ + +-#include + #include + #include + #include ++#include ++ ++#include ++ + #include ++#include + #include + +-extern unsigned long nvtboot_boot_x0; ++/* ++ * Size of a region that's large enough to hold the relocated U-Boot and all ++ * other allocations made around it (stack, heap, page tables, etc.) ++ * In practice, running "bdinfo" at the shell prompt, the stack reaches about ++ * 5MB from the address selected for ram_top as of the time of writing, ++ * so a 16MB region should be plenty. ++ */ ++#define MIN_USABLE_RAM_SIZE SZ_16M ++/* ++ * The amount of space we expect to require for stack usage. Used to validate ++ * that all reservations fit into the region selected for the relocation target ++ */ ++#define MIN_USABLE_STACK_SIZE SZ_1M ++ ++DECLARE_GLOBAL_DATA_PTR; ++ ++extern struct mm_region tegra_mem_map[]; ++ ++/* ++ * These variables are written to before relocation, and hence cannot be ++ * in.bss, since .bss overlaps the DTB that's appended to the U-Boot binary. ++ * The section attribute forces this into .data and avoids this issue. This ++ * also has the nice side-effect of the content being valid after relocation. ++ */ ++ ++/* The number of valid entries in ram_banks[] */ ++static int ram_bank_count __attribute__((section(".data"))); ++ ++/* ++ * The usable top-of-RAM for U-Boot. This is both: ++ * a) Below 4GB to avoid issues with peripherals that use 32-bit addressing. ++ * b) At the end of a region that has enough space to hold the relocated U-Boot ++ * and all other allocations made around it (stack, heap, page tables, etc.) ++ */ ++static u64 ram_top __attribute__((section(".data"))); ++/* The base address of the region of RAM that ends at ram_top */ ++static u64 region_base __attribute__((section(".data"))); ++ ++int cboot_dram_init(void) ++{ ++ unsigned int na, ns; ++ const void *cboot_blob = (void *)cboot_boot_x0; ++ int node, len, i; ++ const u32 *prop; ++ ++ if (!cboot_blob) ++ return -EINVAL; ++ ++ na = fdtdec_get_uint(cboot_blob, 0, "#address-cells", 2); ++ ns = fdtdec_get_uint(cboot_blob, 0, "#size-cells", 2); ++ ++ node = fdt_path_offset(cboot_blob, "/memory"); ++ if (node < 0) { ++ pr_err("Can't find /memory node in cboot DTB"); ++ hang(); ++ } ++ prop = fdt_getprop(cboot_blob, node, "reg", &len); ++ if (!prop) { ++ pr_err("Can't find /memory/reg property in cboot DTB"); ++ hang(); ++ } ++ ++ /* Calculate the true # of base/size pairs to read */ ++ len /= 4; /* Convert bytes to number of cells */ ++ len /= (na + ns); /* Convert cells to number of banks */ ++ if (len > CONFIG_NR_DRAM_BANKS) ++ len = CONFIG_NR_DRAM_BANKS; ++ ++ /* Parse the /memory node, and save useful entries */ ++ gd->ram_size = 0; ++ ram_bank_count = 0; ++ for (i = 0; i < len; i++) { ++ u64 bank_start, bank_end, bank_size, usable_bank_size; ++ ++ /* Extract raw memory region data from DTB */ ++ bank_start = fdt_read_number(prop, na); ++ prop += na; ++ bank_size = fdt_read_number(prop, ns); ++ prop += ns; ++ gd->ram_size += bank_size; ++ bank_end = bank_start + bank_size; ++ debug("Bank %d: %llx..%llx (+%llx)\n", i, ++ bank_start, bank_end, bank_size); ++ ++ /* ++ * Align the bank to MMU section size. This is not strictly ++ * necessary, since the translation table construction code ++ * handles page granularity without issue. However, aligning ++ * the MMU entries reduces the size and number of levels in the ++ * page table, so is worth it. ++ */ ++ bank_start = ROUND(bank_start, SZ_2M); ++ bank_end = bank_end & ~(SZ_2M - 1); ++ bank_size = bank_end - bank_start; ++ debug(" aligned: %llx..%llx (+%llx)\n", ++ bank_start, bank_end, bank_size); ++ if (bank_end <= bank_start) ++ continue; ++ ++ /* Record data used to create MMU translation tables */ ++ ram_bank_count++; ++ /* Index below is deliberately 1-based to skip MMIO entry */ ++ tegra_mem_map[ram_bank_count].virt = bank_start; ++ tegra_mem_map[ram_bank_count].phys = bank_start; ++ tegra_mem_map[ram_bank_count].size = bank_size; ++ tegra_mem_map[ram_bank_count].attrs = ++ PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_INNER_SHARE; ++ ++ /* Determine best bank to relocate U-Boot into */ ++ if (bank_end > SZ_4G) ++ bank_end = SZ_4G; ++ debug(" end %llx (usable)\n", bank_end); ++ usable_bank_size = bank_end - bank_start; ++ debug(" size %llx (usable)\n", usable_bank_size); ++ if ((usable_bank_size >= MIN_USABLE_RAM_SIZE) && ++ (bank_end > ram_top)) { ++ ram_top = bank_end; ++ region_base = bank_start; ++ debug("ram top now %llx\n", ram_top); ++ } ++ } ++ ++ /* Ensure memory map contains the desired sentinel entry */ ++ tegra_mem_map[ram_bank_count + 1].virt = 0; ++ tegra_mem_map[ram_bank_count + 1].phys = 0; ++ tegra_mem_map[ram_bank_count + 1].size = 0; ++ tegra_mem_map[ram_bank_count + 1].attrs = 0; ++ ++ /* Error out if a relocation target couldn't be found */ ++ if (!ram_top) { ++ pr_err("Can't find a usable RAM top"); ++ hang(); ++ } ++ ++ return 0; ++} ++ ++int cboot_dram_init_banksize(void) ++{ ++ int i; ++ ++ if (ram_bank_count == 0) ++ return -EINVAL; ++ ++ if ((gd->start_addr_sp - region_base) < MIN_USABLE_STACK_SIZE) { ++ pr_err("Reservations exceed chosen region size"); ++ hang(); ++ } ++ ++ for (i = 0; i < ram_bank_count; i++) { ++ gd->bd->bi_dram[i].start = tegra_mem_map[1 + i].virt; ++ gd->bd->bi_dram[i].size = tegra_mem_map[1 + i].size; ++ } ++ ++#ifdef CONFIG_PCI ++ gd->pci_ram_top = ram_top; ++#endif ++ ++ return 0; ++} ++ ++ulong cboot_get_usable_ram_top(ulong total_size) ++{ ++ return ram_top; ++} + + /* + * The following few functions run late during the boot process and dynamically +@@ -23,8 +191,6 @@ extern unsigned long nvtboot_boot_x0; + * list of RAM banks into some private data structure before running. + */ + +-extern struct mm_region tegra_mem_map[]; +- + static char *gen_varname(const char *var, const char *ext) + { + size_t len_var = strlen(var); +@@ -235,7 +401,7 @@ static void set_calculated_env_vars(void) + dump_ram_banks(); + #endif + +- reserve_ram(nvtboot_boot_x0, fdt_totalsize(nvtboot_boot_x0)); ++ reserve_ram(cboot_boot_x0, fdt_totalsize(cboot_boot_x0)); + + #ifdef DEBUG + printf("RAM after reserving cboot DTB:\n"); +@@ -262,7 +428,7 @@ static void set_calculated_env_vars(void) + debug("%s: var: %s\n", __func__, var); + set_calculated_env_var(var); + #ifdef DEBUG +- printf("RAM banks affter allocating %s:\n", var); ++ printf("RAM banks after allocating %s:\n", var); + dump_ram_banks(); + #endif + } +@@ -274,7 +440,7 @@ static int set_fdt_addr(void) + { + int ret; + +- ret = env_set_hex("fdt_addr", nvtboot_boot_x0); ++ ret = env_set_hex("fdt_addr", cboot_boot_x0); + if (ret) { + printf("Failed to set fdt_addr to point at DTB: %d\n", ret); + return ret; +@@ -284,12 +450,12 @@ static int set_fdt_addr(void) + } + + /* +- * Attempt to use /chosen/nvidia,ether-mac in the nvtboot DTB to U-Boot's ++ * Attempt to use /chosen/nvidia,ethernet-mac in the cboot DTB to U-Boot's + * ethaddr environment variable if possible. + */ +-static int set_ethaddr_from_nvtboot(void) ++static int set_ethaddr_from_cboot(void) + { +- const void *nvtboot_blob = (void *)nvtboot_boot_x0; ++ const void *cboot_blob = (void *)cboot_boot_x0; + int ret, node, len; + const u32 *prop; + +@@ -297,27 +463,27 @@ static int set_ethaddr_from_nvtboot(void) + if (env_get("ethaddr")) + return 0; + +- node = fdt_path_offset(nvtboot_blob, "/chosen"); ++ node = fdt_path_offset(cboot_blob, "/chosen"); + if (node < 0) { +- printf("Can't find /chosen node in nvtboot DTB\n"); ++ printf("Can't find /chosen node in cboot DTB\n"); + return node; + } +- prop = fdt_getprop(nvtboot_blob, node, "nvidia,ether-mac", &len); ++ prop = fdt_getprop(cboot_blob, node, "nvidia,ethernet-mac", &len); + if (!prop) { +- printf("Can't find nvidia,ether-mac property in nvtboot DTB\n"); ++ printf("Can't find nvidia,ether-mac property in cboot DTB\n"); + return -ENOENT; + } + + ret = env_set("ethaddr", (void *)prop); + if (ret) { +- printf("Failed to set ethaddr from nvtboot DTB: %d\n", ret); ++ printf("Failed to set ethaddr from cboot DTB: %d\n", ret); + return ret; + } + + return 0; + } + +-int tegra_soc_board_init_late(void) ++int cboot_late_init(void) + { + set_calculated_env_vars(); + /* +@@ -326,7 +492,7 @@ int tegra_soc_board_init_late(void) + */ + set_fdt_addr(); + /* Ignore errors here; not all cases care about Ethernet addresses */ +- set_ethaddr_from_nvtboot(); ++ set_ethaddr_from_cboot(); + + return 0; + } +diff --git a/arch/arm/mach-tegra/tegra186/nvtboot_ll.S b/arch/arm/mach-tegra/cboot_ll.S +similarity index 57% +rename from arch/arm/mach-tegra/tegra186/nvtboot_ll.S +rename to arch/arm/mach-tegra/cboot_ll.S +index aa7a863d9702..4c9ddacc2b39 100644 +--- a/arch/arm/mach-tegra/tegra186/nvtboot_ll.S ++++ b/arch/arm/mach-tegra/cboot_ll.S +@@ -1,6 +1,6 @@ + /* SPDX-License-Identifier: GPL-2.0+ */ + /* +- * Save nvtboot-related boot-time CPU state ++ * Save cboot-related boot-time CPU state + * + * (C) Copyright 2015-2016 NVIDIA Corporation + */ +@@ -9,12 +9,12 @@ + #include + + .align 8 +-.globl nvtboot_boot_x0 +-nvtboot_boot_x0: ++.globl cboot_boot_x0 ++cboot_boot_x0: + .dword 0 + +-ENTRY(save_boot_params) +- adr x8, nvtboot_boot_x0 ++ENTRY(cboot_save_boot_params) ++ adr x8, cboot_boot_x0 + str x0, [x8] + b save_boot_params_ret +-ENDPROC(save_boot_params) ++ENDPROC(cboot_save_boot_params) +diff --git a/arch/arm/mach-tegra/tegra186/Makefile b/arch/arm/mach-tegra/tegra186/Makefile +index 56f3378ecea3..3a2405027704 100644 +--- a/arch/arm/mach-tegra/tegra186/Makefile ++++ b/arch/arm/mach-tegra/tegra186/Makefile +@@ -2,8 +2,4 @@ + # + # SPDX-License-Identifier: GPL-2.0 + +-obj-y += ../board186.o + obj-y += cache.o +-obj-y += nvtboot_board.o +-obj-y += nvtboot_ll.o +-obj-y += nvtboot_mem.o +diff --git a/arch/arm/mach-tegra/tegra186/nvtboot_mem.c b/arch/arm/mach-tegra/tegra186/nvtboot_mem.c +deleted file mode 100644 +index 62142821a595..000000000000 +--- a/arch/arm/mach-tegra/tegra186/nvtboot_mem.c ++++ /dev/null +@@ -1,172 +0,0 @@ +-// SPDX-License-Identifier: GPL-2.0+ +-/* +- * Copyright (c) 2016-2018, NVIDIA CORPORATION. +- */ +- +-#include +-#include +-#include +-#include +-#include +-#include +- +-/* +- * Size of a region that's large enough to hold the relocated U-Boot and all +- * other allocations made around it (stack, heap, page tables, etc.) +- * In practice, running "bdinfo" at the shell prompt, the stack reaches about +- * 5MB from the address selected for ram_top as of the time of writing, +- * so a 16MB region should be plenty. +- */ +-#define MIN_USABLE_RAM_SIZE SZ_16M +-/* +- * The amount of space we expect to require for stack usage. Used to validate +- * that all reservations fit into the region selected for the relocation target +- */ +-#define MIN_USABLE_STACK_SIZE SZ_1M +- +-DECLARE_GLOBAL_DATA_PTR; +- +-extern unsigned long nvtboot_boot_x0; +-extern struct mm_region tegra_mem_map[]; +- +-/* +- * These variables are written to before relocation, and hence cannot be +- * in.bss, since .bss overlaps the DTB that's appended to the U-Boot binary. +- * The section attribute forces this into .data and avoids this issue. This +- * also has the nice side-effect of the content being valid after relocation. +- */ +- +-/* The number of valid entries in ram_banks[] */ +-static int ram_bank_count __attribute__((section(".data"))); +- +-/* +- * The usable top-of-RAM for U-Boot. This is both: +- * a) Below 4GB to avoid issues with peripherals that use 32-bit addressing. +- * b) At the end of a region that has enough space to hold the relocated U-Boot +- * and all other allocations made around it (stack, heap, page tables, etc.) +- */ +-static u64 ram_top __attribute__((section(".data"))); +-/* The base address of the region of RAM that ends at ram_top */ +-static u64 region_base __attribute__((section(".data"))); +- +-int dram_init(void) +-{ +- unsigned int na, ns; +- const void *nvtboot_blob = (void *)nvtboot_boot_x0; +- int node, len, i; +- const u32 *prop; +- +- na = fdtdec_get_uint(nvtboot_blob, 0, "#address-cells", 2); +- ns = fdtdec_get_uint(nvtboot_blob, 0, "#size-cells", 2); +- +- node = fdt_path_offset(nvtboot_blob, "/memory"); +- if (node < 0) { +- pr_err("Can't find /memory node in nvtboot DTB"); +- hang(); +- } +- prop = fdt_getprop(nvtboot_blob, node, "reg", &len); +- if (!prop) { +- pr_err("Can't find /memory/reg property in nvtboot DTB"); +- hang(); +- } +- +- /* Calculate the true # of base/size pairs to read */ +- len /= 4; /* Convert bytes to number of cells */ +- len /= (na + ns); /* Convert cells to number of banks */ +- if (len > CONFIG_NR_DRAM_BANKS) +- len = CONFIG_NR_DRAM_BANKS; +- +- /* Parse the /memory node, and save useful entries */ +- gd->ram_size = 0; +- ram_bank_count = 0; +- for (i = 0; i < len; i++) { +- u64 bank_start, bank_end, bank_size, usable_bank_size; +- +- /* Extract raw memory region data from DTB */ +- bank_start = fdt_read_number(prop, na); +- prop += na; +- bank_size = fdt_read_number(prop, ns); +- prop += ns; +- gd->ram_size += bank_size; +- bank_end = bank_start + bank_size; +- debug("Bank %d: %llx..%llx (+%llx)\n", i, +- bank_start, bank_end, bank_size); +- +- /* +- * Align the bank to MMU section size. This is not strictly +- * necessary, since the translation table construction code +- * handles page granularity without issue. However, aligning +- * the MMU entries reduces the size and number of levels in the +- * page table, so is worth it. +- */ +- bank_start = ROUND(bank_start, SZ_2M); +- bank_end = bank_end & ~(SZ_2M - 1); +- bank_size = bank_end - bank_start; +- debug(" aligned: %llx..%llx (+%llx)\n", +- bank_start, bank_end, bank_size); +- if (bank_end <= bank_start) +- continue; +- +- /* Record data used to create MMU translation tables */ +- ram_bank_count++; +- /* Index below is deliberately 1-based to skip MMIO entry */ +- tegra_mem_map[ram_bank_count].virt = bank_start; +- tegra_mem_map[ram_bank_count].phys = bank_start; +- tegra_mem_map[ram_bank_count].size = bank_size; +- tegra_mem_map[ram_bank_count].attrs = +- PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_INNER_SHARE; +- +- /* Determine best bank to relocate U-Boot into */ +- if (bank_end > SZ_4G) +- bank_end = SZ_4G; +- debug(" end %llx (usable)\n", bank_end); +- usable_bank_size = bank_end - bank_start; +- debug(" size %llx (usable)\n", usable_bank_size); +- if ((usable_bank_size >= MIN_USABLE_RAM_SIZE) && +- (bank_end > ram_top)) { +- ram_top = bank_end; +- region_base = bank_start; +- debug("ram top now %llx\n", ram_top); +- } +- } +- +- /* Ensure memory map contains the desired sentinel entry */ +- tegra_mem_map[ram_bank_count + 1].virt = 0; +- tegra_mem_map[ram_bank_count + 1].phys = 0; +- tegra_mem_map[ram_bank_count + 1].size = 0; +- tegra_mem_map[ram_bank_count + 1].attrs = 0; +- +- /* Error out if a relocation target couldn't be found */ +- if (!ram_top) { +- pr_err("Can't find a usable RAM top"); +- hang(); +- } +- +- return 0; +-} +- +-int dram_init_banksize(void) +-{ +- int i; +- +- if ((gd->start_addr_sp - region_base) < MIN_USABLE_STACK_SIZE) { +- pr_err("Reservations exceed chosen region size"); +- hang(); +- } +- +- for (i = 0; i < ram_bank_count; i++) { +- gd->bd->bi_dram[i].start = tegra_mem_map[1 + i].virt; +- gd->bd->bi_dram[i].size = tegra_mem_map[1 + i].size; +- } +- +-#ifdef CONFIG_PCI +- gd->pci_ram_top = ram_top; +-#endif +- +- return 0; +-} +- +-ulong board_get_usable_ram_top(ulong total_size) +-{ +- return ram_top; +-} +diff --git a/board/nvidia/p2771-0000/p2771-0000.c b/board/nvidia/p2771-0000/p2771-0000.c +index 496e8a02111e..6f88010c18c3 100644 +--- a/board/nvidia/p2771-0000/p2771-0000.c ++++ b/board/nvidia/p2771-0000/p2771-0000.c +@@ -7,7 +7,7 @@ + #include + #include "../p2571/max77620_init.h" + +-int tegra_board_init(void) ++void pin_mux_mmc(void) + { + struct udevice *dev; + uchar val; +@@ -18,19 +18,18 @@ int tegra_board_init(void) + ret = i2c_get_chip_for_busnum(0, MAX77620_I2C_ADDR_7BIT, 1, &dev); + if (ret) { + printf("%s: Cannot find MAX77620 I2C chip\n", __func__); +- return ret; ++ return; + } + /* 0xF2 for 3.3v, enabled: bit7:6 = 11 = enable, bit5:0 = voltage */ + val = 0xF2; + ret = dm_i2c_write(dev, MAX77620_CNFG1_L3_REG, &val, 1); + if (ret) { + printf("i2c_write 0 0x3c 0x27 failed: %d\n", ret); +- return ret; ++ return; + } +- +- return 0; + } + ++#ifdef CONFIG_PCI_TEGRA + int tegra_pcie_board_init(void) + { + struct udevice *dev; +@@ -52,3 +51,4 @@ int tegra_pcie_board_init(void) + + return 0; + } ++#endif + +From patchwork Thu Mar 21 18:01:12 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot, v3, + 13/19] ARM: tegra: Implement cboot_save_boot_params() in C +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1060342 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190321180118.26475-14-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de +Date: Thu, 21 Mar 2019 19:01:12 +0100 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +This is easier to deal with and works just as well for this simple +function. + +Signed-off-by: Thierry Reding +--- + arch/arm/mach-tegra/Makefile | 2 +- + arch/arm/mach-tegra/cboot.c | 12 ++++++++++++ + arch/arm/mach-tegra/cboot_ll.S | 20 -------------------- + 3 files changed, 13 insertions(+), 21 deletions(-) + delete mode 100644 arch/arm/mach-tegra/cboot_ll.S + +diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile +index 41ba674edff4..7165d70a60da 100644 +--- a/arch/arm/mach-tegra/Makefile ++++ b/arch/arm/mach-tegra/Makefile +@@ -20,7 +20,7 @@ obj-$(CONFIG_TEGRA_PINCTRL) += pinmux-common.o + obj-$(CONFIG_TEGRA_PMC) += powergate.o + obj-y += xusb-padctl-dummy.o + +-obj-$(CONFIG_ARM64) += arm64-mmu.o cboot_ll.o cboot.o ++obj-$(CONFIG_ARM64) += arm64-mmu.o cboot.o + obj-y += dt-setup.o + obj-$(CONFIG_TEGRA_CLOCK_SCALING) += emc.o + obj-$(CONFIG_TEGRA_GPU) += gpu.o +diff --git a/arch/arm/mach-tegra/cboot.c b/arch/arm/mach-tegra/cboot.c +index 95a097584ac6..acf33b4c4e0c 100644 +--- a/arch/arm/mach-tegra/cboot.c ++++ b/arch/arm/mach-tegra/cboot.c +@@ -52,6 +52,18 @@ static u64 ram_top __attribute__((section(".data"))); + /* The base address of the region of RAM that ends at ram_top */ + static u64 region_base __attribute__((section(".data"))); + ++/* ++ * Explicitly put this in the .data section because it is written before the ++ * .bss section is zeroed out but it needs to persist. ++ */ ++unsigned long cboot_boot_x0 __attribute__((section(".data"))); ++ ++void cboot_save_boot_params(unsigned long x0, unsigned long x1, ++ unsigned long x2, unsigned long x3) ++{ ++ cboot_boot_x0 = x0; ++} ++ + int cboot_dram_init(void) + { + unsigned int na, ns; +diff --git a/arch/arm/mach-tegra/cboot_ll.S b/arch/arm/mach-tegra/cboot_ll.S +deleted file mode 100644 +index 4c9ddacc2b39..000000000000 +--- a/arch/arm/mach-tegra/cboot_ll.S ++++ /dev/null +@@ -1,20 +0,0 @@ +-/* SPDX-License-Identifier: GPL-2.0+ */ +-/* +- * Save cboot-related boot-time CPU state +- * +- * (C) Copyright 2015-2016 NVIDIA Corporation +- */ +- +-#include +-#include +- +-.align 8 +-.globl cboot_boot_x0 +-cboot_boot_x0: +- .dword 0 +- +-ENTRY(cboot_save_boot_params) +- adr x8, cboot_boot_x0 +- str x0, [x8] +- b save_boot_params_ret +-ENDPROC(cboot_save_boot_params) + +From patchwork Thu Mar 21 18:01:13 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot,v3,14/19] ARM: tegra: Implement cboot_get_ethaddr() +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1060340 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190321180118.26475-15-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de +Date: Thu, 21 Mar 2019 19:01:13 +0100 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +This function will attempt to look up an ethernet address in the DTB +that was passed in from cboot. It does so by first trying to locate the +primary ethernet device for the board (identified by the "ethernet" +alias) and if found, reads the "local-mac-address" property. If the +"ethernet" alias does not exist, or if it points to a device tree node +that doesn't exist, or if the device tree node that it points to does +not have a "local-mac-address" property or if the value is invalid, it +will fall back to the legacy mechanism of looking for the MAC address +stored in the "nvidia,ethernet-mac" property of the "/chosen" node. + +Signed-off-by: Thierry Reding +--- +Changes in v2: +- make dummy static inline to avoid duplicate definitions + + arch/arm/include/asm/arch-tegra/cboot.h | 6 ++ + arch/arm/mach-tegra/cboot.c | 78 ++++++++++++++++++++----- + 2 files changed, 69 insertions(+), 15 deletions(-) + +diff --git a/arch/arm/include/asm/arch-tegra/cboot.h b/arch/arm/include/asm/arch-tegra/cboot.h +index b3441ec178b3..021c24617575 100644 +--- a/arch/arm/include/asm/arch-tegra/cboot.h ++++ b/arch/arm/include/asm/arch-tegra/cboot.h +@@ -14,6 +14,7 @@ void cboot_save_boot_params(unsigned long x0, unsigned long x1, + int cboot_dram_init(void); + int cboot_dram_init_banksize(void); + ulong cboot_get_usable_ram_top(ulong total_size); ++int cboot_get_ethaddr(const void *fdt, uint8_t mac[ETH_ALEN]); + #else + static inline void cboot_save_boot_params(unsigned long x0, unsigned long x1, + unsigned long x2, unsigned long x3) +@@ -34,6 +35,11 @@ static inline ulong cboot_get_usable_ram_top(ulong total_size) + { + return 0; + } ++ ++static inline int cboot_get_ethaddr(const void *fdt, uint8_t mac[ETH_ALEN]) ++{ ++ return -ENOSYS; ++} + #endif + + #endif +diff --git a/arch/arm/mach-tegra/cboot.c b/arch/arm/mach-tegra/cboot.c +index acf33b4c4e0c..9735380bda59 100644 +--- a/arch/arm/mach-tegra/cboot.c ++++ b/arch/arm/mach-tegra/cboot.c +@@ -4,6 +4,7 @@ + */ + + #include ++#include + #include + #include + #include +@@ -465,46 +466,93 @@ static int set_fdt_addr(void) + * Attempt to use /chosen/nvidia,ethernet-mac in the cboot DTB to U-Boot's + * ethaddr environment variable if possible. + */ +-static int set_ethaddr_from_cboot(void) ++static int cboot_get_ethaddr_legacy(const void *fdt, uint8_t mac[ETH_ALEN]) + { +- const void *cboot_blob = (void *)cboot_boot_x0; +- int ret, node, len; +- const u32 *prop; +- +- /* Already a valid address in the environment? If so, keep it */ +- if (env_get("ethaddr")) +- return 0; ++ const char *prop; ++ int node, len; + +- node = fdt_path_offset(cboot_blob, "/chosen"); ++ node = fdt_path_offset(fdt, "/chosen"); + if (node < 0) { + printf("Can't find /chosen node in cboot DTB\n"); + return node; + } +- prop = fdt_getprop(cboot_blob, node, "nvidia,ethernet-mac", &len); ++ ++ prop = fdt_getprop(fdt, node, "nvidia,ethernet-mac", &len); + if (!prop) { + printf("Can't find nvidia,ether-mac property in cboot DTB\n"); + return -ENOENT; + } + +- ret = env_set("ethaddr", (void *)prop); +- if (ret) { +- printf("Failed to set ethaddr from cboot DTB: %d\n", ret); +- return ret; ++ eth_parse_enetaddr(prop, mac); ++ ++ if (!is_valid_ethaddr(mac)) { ++ printf("Invalid MAC address: %s\n", prop); ++ return -EINVAL; + } + ++ debug("Legacy MAC address: %pM\n", mac); ++ + return 0; + } + ++int cboot_get_ethaddr(const void *fdt, uint8_t mac[ETH_ALEN]) ++{ ++ int node, len, err = 0; ++ const uchar *prop; ++ const char *path; ++ ++ path = fdt_get_alias(fdt, "ethernet"); ++ if (!path) { ++ err = -ENOENT; ++ goto out; ++ } ++ ++ debug("ethernet alias found: %s\n", path); ++ ++ node = fdt_path_offset(fdt, path); ++ if (node < 0) { ++ err = -ENOENT; ++ goto out; ++ } ++ ++ prop = fdt_getprop(fdt, node, "local-mac-address", &len); ++ if (!prop) { ++ err = -ENOENT; ++ goto out; ++ } ++ ++ if (len != ETH_ALEN) { ++ err = -EINVAL; ++ goto out; ++ } ++ ++ debug("MAC address: %pM\n", prop); ++ memcpy(mac, prop, ETH_ALEN); ++ ++out: ++ if (err < 0) ++ err = cboot_get_ethaddr_legacy(fdt, mac); ++ ++ return err; ++} ++ + int cboot_late_init(void) + { ++ const void *fdt = (const void *)cboot_boot_x0; ++ uint8_t mac[ETH_ALEN]; ++ int err; ++ + set_calculated_env_vars(); + /* + * Ignore errors here; the value may not be used depending on + * extlinux.conf or boot script content. + */ + set_fdt_addr(); ++ + /* Ignore errors here; not all cases care about Ethernet addresses */ +- set_ethaddr_from_cboot(); ++ err = cboot_get_ethaddr(fdt, mac); ++ if (!err) ++ eth_env_set_enetaddr("ethaddr", mac); + + return 0; + } + +From patchwork Thu Mar 21 18:01:14 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot, v3, + 15/19] ARM: tegra: Enable position independent build for 64-bit +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1060357 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190321180118.26475-16-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de +Date: Thu, 21 Mar 2019 19:01:14 +0100 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +Note that U-Boot is always chainloaded from cboot starting with L4T +release 28. cboot always loads U-Boot to a fixed address, so making +the builds position independent isn't strictly necessary. However, +position independent builds can be convenient because if U-Boot is +ever loaded to an address different from its link address, it will +still be able to boot. + +Signed-off-by: Thierry Reding +--- + arch/arm/mach-tegra/Kconfig | 1 + + configs/e2220-1170_defconfig | 2 +- + configs/p2371-0000_defconfig | 2 +- + configs/p2371-2180_defconfig | 2 +- + configs/p2571_defconfig | 2 +- + 5 files changed, 5 insertions(+), 4 deletions(-) + +diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig +index faa73559fd42..97e22ead5985 100644 +--- a/arch/arm/mach-tegra/Kconfig ++++ b/arch/arm/mach-tegra/Kconfig +@@ -87,6 +87,7 @@ config TEGRA_ARMV8_COMMON + bool "Tegra 64-bit common options" + select ARM64 + select LINUX_KERNEL_IMAGE_HEADER ++ select POSITION_INDEPENDENT + select TEGRA_COMMON + + if TEGRA_ARMV8_COMMON +diff --git a/configs/e2220-1170_defconfig b/configs/e2220-1170_defconfig +index fbca72ace6ed..87668f8e517f 100644 +--- a/configs/e2220-1170_defconfig ++++ b/configs/e2220-1170_defconfig +@@ -1,6 +1,6 @@ + CONFIG_ARM=y + CONFIG_TEGRA=y +-CONFIG_SYS_TEXT_BASE=0x80110000 ++CONFIG_SYS_TEXT_BASE=0x80080000 + CONFIG_TEGRA210=y + CONFIG_NR_DRAM_BANKS=2 + CONFIG_OF_SYSTEM_SETUP=y +diff --git a/configs/p2371-0000_defconfig b/configs/p2371-0000_defconfig +index c25872128e07..979cb8ec0a25 100644 +--- a/configs/p2371-0000_defconfig ++++ b/configs/p2371-0000_defconfig +@@ -1,6 +1,6 @@ + CONFIG_ARM=y + CONFIG_TEGRA=y +-CONFIG_SYS_TEXT_BASE=0x80110000 ++CONFIG_SYS_TEXT_BASE=0x80080000 + CONFIG_TEGRA210=y + CONFIG_TARGET_P2371_0000=y + CONFIG_NR_DRAM_BANKS=2 +diff --git a/configs/p2371-2180_defconfig b/configs/p2371-2180_defconfig +index b662ef143141..2fac69917a92 100644 +--- a/configs/p2371-2180_defconfig ++++ b/configs/p2371-2180_defconfig +@@ -1,6 +1,6 @@ + CONFIG_ARM=y + CONFIG_TEGRA=y +-CONFIG_SYS_TEXT_BASE=0x80110000 ++CONFIG_SYS_TEXT_BASE=0x80080000 + CONFIG_TEGRA210=y + CONFIG_TARGET_P2371_2180=y + CONFIG_NR_DRAM_BANKS=2 +diff --git a/configs/p2571_defconfig b/configs/p2571_defconfig +index 5f0f8c519b4c..ff4654cea9b4 100644 +--- a/configs/p2571_defconfig ++++ b/configs/p2571_defconfig +@@ -1,6 +1,6 @@ + CONFIG_ARM=y + CONFIG_TEGRA=y +-CONFIG_SYS_TEXT_BASE=0x80110000 ++CONFIG_SYS_TEXT_BASE=0x80080000 + CONFIG_TEGRA210=y + CONFIG_TARGET_P2571=y + CONFIG_NR_DRAM_BANKS=2 + +From patchwork Thu Mar 21 18:01:15 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot,v3,16/19] p2371-2180: Pass Ethernet MAC to the kernel +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1060351 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190321180118.26475-17-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de +Date: Thu, 21 Mar 2019 19:01:15 +0100 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +Pass the ethernet MAC address to the kernel upon boot. This passes both +the local-mac-address property (as passed to U-Boot from cboot) and the +currently set MAC address via the mac-address property. The latter will +only be set if it is different from the address that was already passed +via the local-mac-address property. + +Signed-off-by: Thierry Reding +--- + board/nvidia/p2371-2180/p2371-2180.c | 50 ++++++++++++++++++++++++++++ + configs/p2371-2180_defconfig | 1 + + 2 files changed, 51 insertions(+) + +diff --git a/board/nvidia/p2371-2180/p2371-2180.c b/board/nvidia/p2371-2180/p2371-2180.c +index 212037da5ac0..a444d692d7ea 100644 +--- a/board/nvidia/p2371-2180/p2371-2180.c ++++ b/board/nvidia/p2371-2180/p2371-2180.c +@@ -5,9 +5,12 @@ + */ + + #include ++#include + #include ++#include + #include + #include ++#include + #include "../p2571/max77620_init.h" + #include "pinmux-config-p2371-2180.h" + +@@ -94,3 +97,50 @@ int tegra_pcie_board_init(void) + return 0; + } + #endif /* PCI */ ++ ++static void ft_mac_address_setup(void *fdt) ++{ ++ const void *cboot_fdt = (const void *)cboot_boot_x0; ++ uint8_t mac[ETH_ALEN], local_mac[ETH_ALEN]; ++ const char *path; ++ int offset, err; ++ ++ err = cboot_get_ethaddr(cboot_fdt, local_mac); ++ if (err < 0) ++ memset(local_mac, 0, ETH_ALEN); ++ ++ path = fdt_get_alias(fdt, "ethernet"); ++ if (!path) ++ return; ++ ++ debug("ethernet alias found: %s\n", path); ++ ++ offset = fdt_path_offset(fdt, path); ++ if (offset < 0) { ++ printf("ethernet alias points to absent node %s\n", path); ++ return; ++ } ++ ++ if (is_valid_ethaddr(local_mac)) { ++ err = fdt_setprop(fdt, offset, "local-mac-address", local_mac, ++ ETH_ALEN); ++ if (!err) ++ debug("Local MAC address set: %pM\n", local_mac); ++ } ++ ++ if (eth_env_get_enetaddr("ethaddr", mac)) { ++ if (memcmp(local_mac, mac, ETH_ALEN) != 0) { ++ err = fdt_setprop(fdt, offset, "mac-address", mac, ++ ETH_ALEN); ++ if (!err) ++ debug("MAC address set: %pM\n", mac); ++ } ++ } ++} ++ ++int ft_board_setup(void *fdt, bd_t *bd) ++{ ++ ft_mac_address_setup(fdt); ++ ++ return 0; ++} +diff --git a/configs/p2371-2180_defconfig b/configs/p2371-2180_defconfig +index 2fac69917a92..16afbba68ae7 100644 +--- a/configs/p2371-2180_defconfig ++++ b/configs/p2371-2180_defconfig +@@ -5,6 +5,7 @@ CONFIG_TEGRA210=y + CONFIG_TARGET_P2371_2180=y + CONFIG_NR_DRAM_BANKS=2 + CONFIG_OF_SYSTEM_SETUP=y ++CONFIG_OF_BOARD_SETUP=y + CONFIG_CONSOLE_MUX=y + CONFIG_SYS_STDIO_DEREGISTER=y + CONFIG_SYS_PROMPT="Tegra210 (P2371-2180) # " + +From patchwork Thu Mar 21 18:01:16 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot,v3,17/19] p2771-0000: Pass Ethernet MAC to the kernel +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1060356 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190321180118.26475-18-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de +Date: Thu, 21 Mar 2019 19:01:16 +0100 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +Pass the ethernet MAC address to the kernel upon boot. This passes both +the local-mac-address property (as passed to U-Boot from cboot) and the +currently set MAC address via the mac-address property. The latter will +only be set if it is different from the address that was already passed +via the local-mac-address property. + +Signed-off-by: Thierry Reding +--- + board/nvidia/p2771-0000/p2771-0000.c | 43 ++++++++++++++++++++++++++++ + configs/p2771-0000-000_defconfig | 1 + + configs/p2771-0000-500_defconfig | 1 + + 3 files changed, 45 insertions(+) + +diff --git a/board/nvidia/p2771-0000/p2771-0000.c b/board/nvidia/p2771-0000/p2771-0000.c +index 6f88010c18c3..fe22067f6571 100644 +--- a/board/nvidia/p2771-0000/p2771-0000.c ++++ b/board/nvidia/p2771-0000/p2771-0000.c +@@ -4,7 +4,10 @@ + */ + + #include ++#include + #include ++#include ++#include + #include "../p2571/max77620_init.h" + + void pin_mux_mmc(void) +@@ -52,3 +55,43 @@ int tegra_pcie_board_init(void) + return 0; + } + #endif ++ ++int ft_board_setup(void *fdt, bd_t *bd) ++{ ++ const void *cboot_fdt = (const void *)cboot_boot_x0; ++ uint8_t mac[ETH_ALEN], local_mac[ETH_ALEN]; ++ const char *path; ++ int offset, err; ++ ++ err = cboot_get_ethaddr(cboot_fdt, local_mac); ++ if (err < 0) ++ memset(local_mac, 0, ETH_ALEN); ++ ++ path = fdt_get_alias(fdt, "ethernet"); ++ if (!path) ++ return 0; ++ ++ debug("ethernet alias found: %s\n", path); ++ ++ offset = fdt_path_offset(fdt, path); ++ if (offset < 0) ++ return 0; ++ ++ if (is_valid_ethaddr(local_mac)) { ++ err = fdt_setprop(fdt, offset, "local-mac-address", local_mac, ++ ETH_ALEN); ++ if (!err) ++ debug("Local MAC address set: %pM\n", local_mac); ++ } ++ ++ if (eth_env_get_enetaddr("ethaddr", mac)) { ++ if (memcmp(local_mac, mac, ETH_ALEN) != 0) { ++ err = fdt_setprop(fdt, offset, "mac-address", mac, ++ ETH_ALEN); ++ if (!err) ++ debug("MAC address set: %pM\n", mac); ++ } ++ } ++ ++ return 0; ++} +diff --git a/configs/p2771-0000-000_defconfig b/configs/p2771-0000-000_defconfig +index ad0802067e73..91896e39a10f 100644 +--- a/configs/p2771-0000-000_defconfig ++++ b/configs/p2771-0000-000_defconfig +@@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x80080000 + CONFIG_TEGRA186=y + CONFIG_NR_DRAM_BANKS=1026 + CONFIG_OF_SYSTEM_SETUP=y ++CONFIG_OF_BOARD_SETUP=y + CONFIG_CONSOLE_MUX=y + CONFIG_SYS_STDIO_DEREGISTER=y + CONFIG_SYS_PROMPT="Tegra186 (P2771-0000-000) # " +diff --git a/configs/p2771-0000-500_defconfig b/configs/p2771-0000-500_defconfig +index 459b67fd195f..20d4393838d6 100644 +--- a/configs/p2771-0000-500_defconfig ++++ b/configs/p2771-0000-500_defconfig +@@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x80080000 + CONFIG_TEGRA186=y + CONFIG_NR_DRAM_BANKS=1026 + CONFIG_OF_SYSTEM_SETUP=y ++CONFIG_OF_BOARD_SETUP=y + CONFIG_CONSOLE_MUX=y + CONFIG_SYS_STDIO_DEREGISTER=y + CONFIG_SYS_PROMPT="Tegra186 (P2771-0000-500) # " + +From patchwork Thu Mar 21 18:01:17 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot,v3,18/19] lib: Implement strndup() +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1060343 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190321180118.26475-19-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de +Date: Thu, 21 Mar 2019 19:01:17 +0100 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +Signed-off-by: Thierry Reding +--- + include/linux/string.h | 1 + + lib/string.c | 23 +++++++++++++++++++++++ + 2 files changed, 24 insertions(+) + +diff --git a/include/linux/string.h b/include/linux/string.h +index 36066207392e..5d63be4ce5b0 100644 +--- a/include/linux/string.h ++++ b/include/linux/string.h +@@ -94,6 +94,7 @@ size_t strcspn(const char *s, const char *reject); + #ifndef __HAVE_ARCH_STRDUP + extern char * strdup(const char *); + #endif ++extern char * strndup(const char *, size_t); + #ifndef __HAVE_ARCH_STRSWAB + extern char * strswab(const char *); + #endif +diff --git a/lib/string.c b/lib/string.c +index af17c16f616d..9b779ddc3bbe 100644 +--- a/lib/string.c ++++ b/lib/string.c +@@ -326,6 +326,29 @@ char * strdup(const char *s) + } + #endif + ++char * strndup(const char *s, size_t n) ++{ ++ size_t len; ++ char *new; ++ ++ if (s == NULL) ++ return NULL; ++ ++ len = strlen(s); ++ ++ if (n < len) ++ len = n; ++ ++ new = malloc(len + 1); ++ if (new == NULL) ++ return NULL; ++ ++ strncpy(new, s, len); ++ new[len] = '\0'; ++ ++ return new; ++} ++ + #ifndef __HAVE_ARCH_STRSPN + /** + * strspn - Calculate the length of the initial substring of @s which only + +From patchwork Thu Mar 21 18:01:18 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot,v3,19/19] ARM: tegra: Import cbootargs value from cboot DTB +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1060349 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190321180118.26475-20-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de +Date: Thu, 21 Mar 2019 19:01:18 +0100 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +Read the boot arguments passed by cboot via the /chosen/bootargs +property and store it in the cbootargs environment variable. + +Signed-off-by: Thierry Reding +--- + arch/arm/mach-tegra/cboot.c | 47 +++++++++++++++++++++++++++++++++++++ + 1 file changed, 47 insertions(+) + +diff --git a/arch/arm/mach-tegra/cboot.c b/arch/arm/mach-tegra/cboot.c +index 9735380bda59..8bfcbcdc6e6d 100644 +--- a/arch/arm/mach-tegra/cboot.c ++++ b/arch/arm/mach-tegra/cboot.c +@@ -8,7 +8,9 @@ + #include + #include + #include ++#include + ++#include + #include + + #include +@@ -536,10 +538,49 @@ out: + return err; + } + ++static char *strip(const char *ptr) ++{ ++ const char *end; ++ ++ while (*ptr && isblank(*ptr)) ++ ptr++; ++ ++ /* empty string */ ++ if (*ptr == '\0') ++ return strdup(ptr); ++ ++ end = ptr; ++ ++ while (end[1]) ++ end++; ++ ++ while (isblank(*end)) ++ end--; ++ ++ return strndup(ptr, end - ptr + 1); ++} ++ ++static char *cboot_get_bootargs(const void *fdt) ++{ ++ const char *args; ++ int offset, len; ++ ++ offset = fdt_path_offset(fdt, "/chosen"); ++ if (offset < 0) ++ return NULL; ++ ++ args = fdt_getprop(fdt, offset, "bootargs", &len); ++ if (!args) ++ return NULL; ++ ++ return strip(args); ++} ++ + int cboot_late_init(void) + { + const void *fdt = (const void *)cboot_boot_x0; + uint8_t mac[ETH_ALEN]; ++ char *bootargs; + int err; + + set_calculated_env_vars(); +@@ -554,5 +595,11 @@ int cboot_late_init(void) + if (!err) + eth_env_set_enetaddr("ethaddr", mac); + ++ bootargs = cboot_get_bootargs(fdt); ++ if (bootargs) { ++ env_set("cbootargs", bootargs); ++ free(bootargs); ++ } ++ + return 0; + } diff --git a/tegra-p2371-2180-Build-position-independent-binary.patch b/tegra-p2371-2180-Build-position-independent-binary.patch deleted file mode 100644 index eb9f5c5..0000000 --- a/tegra-p2371-2180-Build-position-independent-binary.patch +++ /dev/null @@ -1,37 +0,0 @@ -From patchwork Fri Mar 8 20:10:23 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot] p2371-2180: Build position independent binary -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1053674 -Message-Id: <20190308201023.2145-1-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de, Stephen Warren -Date: Fri, 8 Mar 2019 21:10:23 +0100 -From: Thierry Reding -List-Id: U-Boot discussion - -From: Thierry Reding - -In order to support chainloading of U-Boot by an earlier bootloader, -make sure the binary is position independent, so that the earlier boot- -loader can relocate it if necessary. - -Signed-off-by: Thierry Reding ---- - configs/p2371-2180_defconfig | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/configs/p2371-2180_defconfig b/configs/p2371-2180_defconfig -index b66459e379ac..8d7cf3fb5346 100644 ---- a/configs/p2371-2180_defconfig -+++ b/configs/p2371-2180_defconfig -@@ -1,6 +1,7 @@ - CONFIG_ARM=y - CONFIG_TEGRA=y - CONFIG_SYS_TEXT_BASE=0x80110000 -+CONFIG_POSITION_INDEPENDENT=y - CONFIG_TEGRA210=y - CONFIG_TARGET_P2371_2180=y - CONFIG_NR_DRAM_BANKS=2 diff --git a/ti-am335x_evm-Enable-CONFIG_SPL_OF_CONTROL.patch b/ti-am335x_evm-Enable-CONFIG_SPL_OF_CONTROL.patch new file mode 100644 index 0000000..8415e8f --- /dev/null +++ b/ti-am335x_evm-Enable-CONFIG_SPL_OF_CONTROL.patch @@ -0,0 +1,183 @@ +From patchwork Tue Mar 19 11:19:21 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot] ti: am335x_evm: Enable CONFIG_SPL_OF_CONTROL +X-Patchwork-Submitter: Tom Rini +X-Patchwork-Id: 1058350 +X-Patchwork-Delegate: trini@ti.com +Message-Id: <1552994361-32058-1-git-send-email-trini@konsulko.com> +To: u-boot@lists.denx.de +Date: Tue, 19 Mar 2019 07:19:21 -0400 +From: Tom Rini +List-Id: U-Boot discussion + +Enable support for SPL_OF_CONTROL on this platform. That means doing a +few things: +- Add u-boot,dm-pre-reloc to a number of nodes +- Drop static platdata in the board file. +- A lot of tweaks to the defconfig. We remove some things such as + SPL_USE_ARCH_MEMCPY/SET for space. Increase our malloc len. +- Drop, for now at least, USB SPL support as it's causing a hang. + +Cc: Faiz Abbas +Cc: Lokesh Vutla +Signed-off-by: Tom Rini +--- + arch/arm/dts/am335x-evm-u-boot.dtsi | 45 +++++++++++++++++++++++++++++++++++-- + board/ti/am335x/board.c | 30 ------------------------- + configs/am335x_evm_defconfig | 14 ++++++++---- + 3 files changed, 53 insertions(+), 36 deletions(-) + +diff --git a/arch/arm/dts/am335x-evm-u-boot.dtsi b/arch/arm/dts/am335x-evm-u-boot.dtsi +index b6b97ed16d91..16a9f855ad1f 100644 +--- a/arch/arm/dts/am335x-evm-u-boot.dtsi ++++ b/arch/arm/dts/am335x-evm-u-boot.dtsi +@@ -3,11 +3,52 @@ + * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/ + */ + ++#include "am33xx-u-boot.dtsi" + +-&mmc3 { +- status = "disabled"; ++&l4_wkup { ++ u-boot,dm-pre-reloc; ++}; ++ ++&scm { ++ u-boot,dm-pre-reloc; ++}; ++ ++&am33xx_pinmux { ++ u-boot,dm-pre-reloc; ++}; ++ ++&uart0_pins { ++ u-boot,dm-pre-reloc; ++}; ++ ++&uart0 { ++ u-boot,dm-pre-reloc; ++}; ++ ++&gpio0 { ++ u-boot,dm-pre-reloc; ++}; ++ ++&i2c0 { ++ u-boot,dm-pre-reloc; ++}; ++ ++&i2c0_pins { ++ u-boot,dm-pre-reloc; + }; + + &usb0 { + dr_mode = "peripheral"; + }; ++ ++&mmc1 { ++ u-boot,dm-pre-reloc; ++}; ++ ++&mmc1_pins { ++ u-boot,dm-pre-reloc; ++}; ++ ++&mmc3 { ++ status = "disabled"; ++}; +diff --git a/board/ti/am335x/board.c b/board/ti/am335x/board.c +index d67f94ad47ba..bfad1a75a456 100644 +--- a/board/ti/am335x/board.c ++++ b/board/ti/am335x/board.c +@@ -1054,33 +1054,3 @@ void board_fit_image_post_process(void **p_image, size_t *p_size) + secure_boot_verify_image(p_image, p_size); + } + #endif +- +-#if !CONFIG_IS_ENABLED(OF_CONTROL) +-static const struct omap_hsmmc_plat am335x_mmc0_platdata = { +- .base_addr = (struct hsmmc *)OMAP_HSMMC1_BASE, +- .cfg.host_caps = MMC_MODE_HS_52MHz | MMC_MODE_HS | MMC_MODE_4BIT, +- .cfg.f_min = 400000, +- .cfg.f_max = 52000000, +- .cfg.voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195, +- .cfg.b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT, +-}; +- +-U_BOOT_DEVICE(am335x_mmc0) = { +- .name = "omap_hsmmc", +- .platdata = &am335x_mmc0_platdata, +-}; +- +-static const struct omap_hsmmc_plat am335x_mmc1_platdata = { +- .base_addr = (struct hsmmc *)OMAP_HSMMC2_BASE, +- .cfg.host_caps = MMC_MODE_HS_52MHz | MMC_MODE_HS | MMC_MODE_8BIT, +- .cfg.f_min = 400000, +- .cfg.f_max = 52000000, +- .cfg.voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195, +- .cfg.b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT, +-}; +- +-U_BOOT_DEVICE(am335x_mmc1) = { +- .name = "omap_hsmmc", +- .platdata = &am335x_mmc1_platdata, +-}; +-#endif +diff --git a/configs/am335x_evm_defconfig b/configs/am335x_evm_defconfig +index 924116835251..dd690dcb495c 100644 +--- a/configs/am335x_evm_defconfig ++++ b/configs/am335x_evm_defconfig +@@ -1,23 +1,26 @@ + CONFIG_ARM=y ++# CONFIG_SPL_USE_ARCH_MEMCPY is not set ++# CONFIG_SPL_USE_ARCH_MEMSET is not set + CONFIG_ARCH_OMAP2PLUS=y + CONFIG_TI_COMMON_CMD_OPTIONS=y ++CONFIG_SYS_MALLOC_F_LEN=0x4000 + CONFIG_AM33XX=y ++CONFIG_SPL_SYS_MALLOC_F_LEN=0x1000 + CONFIG_SPL=y + CONFIG_DISTRO_DEFAULTS=y ++CONFIG_TPL_SYS_MALLOC_F_LEN=0x1000 + CONFIG_SPL_LOAD_FIT=y + CONFIG_OF_BOARD_SETUP=y + CONFIG_BOOTCOMMAND="if test ${boot_fit} -eq 1; then run update_to_fit; fi; run findfdt; run init_console; run envboot; run distro_bootcmd" ++CONFIG_LOGLEVEL=3 + CONFIG_SYS_CONSOLE_INFO_QUIET=y + CONFIG_VERSION_VARIABLE=y + CONFIG_ARCH_MISC_INIT=y + # CONFIG_SPL_FS_EXT4 is not set + CONFIG_SPL_MTD_SUPPORT=y +-CONFIG_SPL_MUSB_NEW_SUPPORT=y + CONFIG_SPL_NET_SUPPORT=y + CONFIG_SPL_NET_VCI_STRING="AM33xx U-Boot SPL" + CONFIG_SPL_OS_BOOT=y +-CONFIG_SPL_USB_GADGET=y +-CONFIG_SPL_USB_ETHER=y + CONFIG_CMD_SPL=y + CONFIG_CMD_SPL_NAND_OFS=0x00080000 + # CONFIG_CMD_FLASH is not set +@@ -28,10 +31,12 @@ CONFIG_MTDIDS_DEFAULT="nand0=nand.0" + CONFIG_MTDPARTS_DEFAULT="mtdparts=nand.0:128k(NAND.SPL),128k(NAND.SPL.backup1),128k(NAND.SPL.backup2),128k(NAND.SPL.backup3),256k(NAND.u-boot-spl-os),1m(NAND.u-boot),128k(NAND.u-boot-env),128k(NAND.u-boot-env.backup1),8m(NAND.kernel),-(NAND.file-system)" + # CONFIG_SPL_EFI_PARTITION is not set + CONFIG_OF_CONTROL=y ++CONFIG_SPL_OF_CONTROL=y + CONFIG_DEFAULT_DEVICE_TREE="am335x-evm" + CONFIG_OF_LIST="am335x-evm am335x-bone am335x-boneblack am335x-evmsk am335x-bonegreen am335x-icev2" ++CONFIG_OF_SPL_REMOVE_PROPS="clocks clock-names interrupt-parent" + CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y +-# CONFIG_BLK is not set ++CONFIG_SPL_OF_TRANSLATE=y + CONFIG_BOOTCOUNT_LIMIT=y + CONFIG_DFU_MMC=y + CONFIG_DFU_NAND=y +@@ -68,5 +73,6 @@ CONFIG_USB_GADGET_VENDOR_NUM=0x0451 + CONFIG_USB_GADGET_PRODUCT_NUM=0xd022 + CONFIG_USB_ETHER=y + CONFIG_DYNAMIC_CRC_TABLE=y ++CONFIG_SPL_TINY_MEMSET=y + CONFIG_RSA=y + CONFIG_LZO=y diff --git a/uboot-tools.spec b/uboot-tools.spec index e05f4bd..bdb9444 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -2,7 +2,7 @@ Name: uboot-tools Version: 2019.04 -Release: 0.6%{?candidate:.%{candidate}}%{?dist} +Release: 0.7%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -20,14 +20,15 @@ Patch1: uefi-use-Fedora-specific-path-name.patch # general fixes Patch2: uefi-distro-load-FDT-from-any-partition-on-boot-device.patch Patch3: usb-kbd-fixes.patch +Patch4: uefi-rc5-fixes.patch # Board fixes and enablement Patch10: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch Patch11: dragonboard-fixes.patch - -Patch12: ARM-tegra-Add-NVIDIA-Jetson-Nano-Developer-Kit-support.patch -Patch13: tegra-p2371-2180-Build-position-independent-binary.patch -Patch14: net-eth-uclass-Write-MAC-address-to-hardware-after-probe.patch +Patch12: ARM-tegra-Miscellaneous-improvements.patch +Patch13: ARM-tegra-Add-support-for-framebuffer-carveouts.patch +Patch14: ARM-tegra-Add-NVIDIA-Jetson-Nano-Developer-Kit-support.patch +Patch15: net-eth-uclass-Write-MAC-address-to-hardware-after-probe.patch BuildRequires: bc BuildRequires: dtc @@ -302,6 +303,9 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Sun Mar 24 2019 Peter Robinson 2019.04-0.7-rc4 +- Minor UEFI fixes, Tegra Jetson TX series rebase + * Wed Mar 20 2019 Peter Robinson 2019.04-0.6-rc4 - Tegra Jetson TX-series improvements diff --git a/uefi-rc5-fixes.patch b/uefi-rc5-fixes.patch new file mode 100644 index 0000000..fd36553 --- /dev/null +++ b/uefi-rc5-fixes.patch @@ -0,0 +1,245 @@ +From 306b16718edddd660b84bf3c6627ce5d41b53ce7 Mon Sep 17 00:00:00 2001 +From: Heinrich Schuchardt +Date: Mon, 18 Mar 2019 20:01:59 +0100 +Subject: [PATCH 01/25] efi_loader: correct parameter size in efi_allocate_pool + +efi_allocate_pages() expects a (uint64_t *) pointer to pass the address of +the assigned memory. If we pass the address of a pointer here, an illegal +memory access occurs on 32bit systems. + +Fixes: 282a06cbcae8 ("efi_loader: Expose U-Boot addresses in memory map +for sandbox") +Signed-off-by: Heinrich Schuchardt +--- + lib/efi_loader/efi_memory.c | 5 +++-- + 1 file changed, 3 insertions(+), 2 deletions(-) + +diff --git a/lib/efi_loader/efi_memory.c b/lib/efi_loader/efi_memory.c +index ebd2b36c03..55622d2fb4 100644 +--- a/lib/efi_loader/efi_memory.c ++++ b/lib/efi_loader/efi_memory.c +@@ -440,6 +440,7 @@ efi_status_t efi_free_pages(uint64_t memory, efi_uintn_t pages) + efi_status_t efi_allocate_pool(int pool_type, efi_uintn_t size, void **buffer) + { + efi_status_t r; ++ u64 addr; + struct efi_pool_allocation *alloc; + u64 num_pages = efi_size_in_pages(size + + sizeof(struct efi_pool_allocation)); +@@ -453,9 +454,9 @@ efi_status_t efi_allocate_pool(int pool_type, efi_uintn_t size, void **buffer) + } + + r = efi_allocate_pages(EFI_ALLOCATE_ANY_PAGES, pool_type, num_pages, +- (uint64_t *)&alloc); +- ++ &addr); + if (r == EFI_SUCCESS) { ++ alloc = (struct efi_pool_allocation *)(uintptr_t)addr; + alloc->num_pages = num_pages; + *buffer = alloc->data; + } +-- +2.20.1 + +From bd3b7478d1e17b4d487d276f5cc0e4f4ef9fc4b7 Mon Sep 17 00:00:00 2001 +From: Heinrich Schuchardt +Date: Tue, 19 Mar 2019 12:30:27 +0100 +Subject: [PATCH 02/25] efi_loader: endless loop in add_strings_package() + +Avoid an endless loop in add_strings_package(). + +Suggested-by: Takahiro Akashi +Reported-by: Coverity (CID 185833) +Signed-off-by: Heinrich Schuchardt +--- + lib/efi_loader/efi_hii.c | 5 ++--- + 1 file changed, 2 insertions(+), 3 deletions(-) + +diff --git a/lib/efi_loader/efi_hii.c b/lib/efi_loader/efi_hii.c +index 3a966fa4df..61b71dec62 100644 +--- a/lib/efi_loader/efi_hii.c ++++ b/lib/efi_loader/efi_hii.c +@@ -227,9 +227,8 @@ out: + error: + if (stbl) { + free(stbl->language); +- if (idx > 0) +- while (--idx >= 0) +- free(stbl->strings[idx].string); ++ while (idx > 0) ++ free(stbl->strings[--idx].string); + free(stbl->strings); + } + free(stbl); +-- +2.20.1 + +From e7dae584b05feaf507c5b85a704a2c1d25abffc9 Mon Sep 17 00:00:00 2001 +From: Heinrich Schuchardt +Date: Tue, 19 Mar 2019 18:36:21 +0100 +Subject: [PATCH 03/25] efi_loader: missing return in + efi_get_next_variable_name() + +Add a missing return statement in efi_get_next_variable_name(). + +Reported-by: Coverity (CID 185834) +Signed-off-by: Heinrich Schuchardt +--- + lib/efi_loader/efi_variable.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/lib/efi_loader/efi_variable.c b/lib/efi_loader/efi_variable.c +index e0d7f5736d..699f4184d9 100644 +--- a/lib/efi_loader/efi_variable.c ++++ b/lib/efi_loader/efi_variable.c +@@ -335,7 +335,7 @@ efi_status_t EFIAPI efi_get_next_variable_name(efi_uintn_t *variable_name_size, + EFI_ENTRY("%p \"%ls\" %pUl", variable_name_size, variable_name, vendor); + + if (!variable_name_size || !variable_name || !vendor) +- EFI_EXIT(EFI_INVALID_PARAMETER); ++ return EFI_EXIT(EFI_INVALID_PARAMETER); + + if (variable_name[0]) { + /* check null-terminated string */ +-- +2.20.1 + +From 1fd7a4764103781e424ef687034da06de3cb60b7 Mon Sep 17 00:00:00 2001 +From: Heinrich Schuchardt +Date: Tue, 19 Mar 2019 18:44:05 +0100 +Subject: [PATCH 04/25] efi_loader: memory leak in efi_dump_single_var() + +A misplaced return statement lead to a memory leak in +efi_dump_single_var(). + +Reported-by: Coverity (CID 185829) +Signed-off-by: Heinrich Schuchardt +--- + cmd/nvedit_efi.c | 1 - + 1 file changed, 1 deletion(-) + +diff --git a/cmd/nvedit_efi.c b/cmd/nvedit_efi.c +index ca32566a61..e65b38dbf3 100644 +--- a/cmd/nvedit_efi.c ++++ b/cmd/nvedit_efi.c +@@ -80,7 +80,6 @@ static void efi_dump_single_var(u16 *name, efi_guid_t *guid) + printf(", DataSize = 0x%zx\n", size); + print_hex_dump(" ", DUMP_PREFIX_OFFSET, 16, 1, data, size, true); + +- return; + out: + free(data); + } +-- +2.20.1 + +From d5974af7f7626777b5c41894f75c813ff35c1793 Mon Sep 17 00:00:00 2001 +From: Heinrich Schuchardt +Date: Tue, 19 Mar 2019 18:58:58 +0100 +Subject: [PATCH 05/25] efi_loader: remove superfluous check in + efi_setup_loaded_image() + +It does not make any sense to check if a pointer is NULL if we have +dereferenced it before. + +Reported-by: Coverity (CID 185827) +Signed-off-by: Heinrich Schuchardt +--- + lib/efi_loader/efi_boottime.c | 6 ++---- + 1 file changed, 2 insertions(+), 4 deletions(-) + +diff --git a/lib/efi_loader/efi_boottime.c b/lib/efi_loader/efi_boottime.c +index bd8b8a17ae..4fc550d9f3 100644 +--- a/lib/efi_loader/efi_boottime.c ++++ b/lib/efi_loader/efi_boottime.c +@@ -1581,10 +1581,8 @@ efi_status_t efi_setup_loaded_image(struct efi_device_path *device_path, + goto failure; + #endif + +- if (info_ptr) +- *info_ptr = info; +- if (handle_ptr) +- *handle_ptr = obj; ++ *info_ptr = info; ++ *handle_ptr = obj; + + return ret; + failure: +-- +2.20.1 + +From 1646e0928c8eb052bfa2283a6ab8d9f2a92a10e9 Mon Sep 17 00:00:00 2001 +From: Heinrich Schuchardt +Date: Tue, 19 Mar 2019 19:16:23 +0100 +Subject: [PATCH 06/25] efi_loader: superfluous conversion in efi_file_open() + +printf("%ls", ..) expects u16 * as argument to print. There is not need for +a conversion to wchar_t *. + +Signed-off-by: Heinrich Schuchardt +--- + lib/efi_loader/efi_file.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/lib/efi_loader/efi_file.c b/lib/efi_loader/efi_file.c +index 3a7323765b..bc715218a1 100644 +--- a/lib/efi_loader/efi_file.c ++++ b/lib/efi_loader/efi_file.c +@@ -226,7 +226,7 @@ static efi_status_t EFIAPI efi_file_open(struct efi_file_handle *file, + efi_status_t ret; + + EFI_ENTRY("%p, %p, \"%ls\", %llx, %llu", file, new_handle, +- (wchar_t *)file_name, open_mode, attributes); ++ file_name, open_mode, attributes); + + /* Check parameters */ + if (!file || !new_handle || !file_name) { +-- +2.20.1 + +From d0bd87612f410a723d5ddb3001e805485e3efb4f Mon Sep 17 00:00:00 2001 +From: Heinrich Schuchardt +Date: Tue, 19 Mar 2019 20:08:46 +0100 +Subject: [PATCH 07/25] efi_selftest: fix test_hii_string_get_string() + +The check testing the string result of get_string() returned the wrong +result. The result was ignored. + +Use efi_st_strcmp_16_8() for the string comparison. + +Signed-off-by: Heinrich Schuchardt +--- + lib/efi_selftest/efi_selftest_hii.c | 17 ++++------------- + 1 file changed, 4 insertions(+), 13 deletions(-) + +diff --git a/lib/efi_selftest/efi_selftest_hii.c b/lib/efi_selftest/efi_selftest_hii.c +index 8a0b3bc353..f4b70f7950 100644 +--- a/lib/efi_selftest/efi_selftest_hii.c ++++ b/lib/efi_selftest/efi_selftest_hii.c +@@ -783,19 +783,10 @@ static int test_hii_string_get_string(void) + goto out; + } + +-#if 1 +- u16 *c1, *c2; +- +- for (c1 = string, c2 = L"Japanese"; *c1 == *c2; c1++, c2++) +- ; +- if (!*c1 && !*c2) +- result = EFI_ST_SUCCESS; +- else +- result = EFI_ST_FAILURE; +-#else +- /* TODO: %ls */ +- efi_st_printf("got string is %s (can be wrong)\n", string); +-#endif ++ if (efi_st_strcmp_16_8(string, "Japanese")) { ++ efi_st_error("get_string returned incorrect string\n"); ++ goto out; ++ } + + result = EFI_ST_SUCCESS; + +-- +2.20.1 + From 5a26b77b90e1e8bbedaa6dcd2c6f595cf0880680 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Sat, 30 Mar 2019 01:09:06 +0000 Subject: [PATCH 2/6] Add config file check to see if we create kernel DT sym link to enable use of firmware DT --- 10-devicetree.install | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/10-devicetree.install b/10-devicetree.install index 752e5d0..3345391 100755 --- a/10-devicetree.install +++ b/10-devicetree.install @@ -9,6 +9,18 @@ KERNEL_VERSION="$2" #BOOT_DIR_ABS="$3" #KERNEL_IMAGE="$4" +[ -f /etc/u-boot.conf ] && source /etc/u-boot.conf || true +[ -z "$FIRMWAREDT" ] || FirmwareDT=$FIRMWAREDT + +if [[ $FirmwareDT == "True" ]] +then + # if we want to use firmware DT we remove symlink to current kernel DT + if [ -h /boot/dtb ]; then + rm -f /boot/dtb + fi + exit 0 +fi + # Setup a /boot/dtb -> /boot/dtb-$newest_kernel_version symlink so that # u-boot can find the correct dtb to load. # From bd4cc382b4484bc11c7d949cd981e12a690c6726 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Sun, 31 Mar 2019 12:45:47 +0100 Subject: [PATCH 3/6] Add ability to make creation of boot/dtb symlink configurable --- uboot-tools.spec | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/uboot-tools.spec b/uboot-tools.spec index bdb9444..d16be4f 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -2,7 +2,7 @@ Name: uboot-tools Version: 2019.04 -Release: 0.7%{?candidate:.%{candidate}}%{?dist} +Release: 0.8%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -303,6 +303,9 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Sun Mar 31 2019 Peter Robinson 2019.04-0.8-rc4 +- Add ability to make creation of boot/dtb symlink configurable + * Sun Mar 24 2019 Peter Robinson 2019.04-0.7-rc4 - Minor UEFI fixes, Tegra Jetson TX series rebase From 7f3f828546447c73e816f11b1edc092301e2d2fb Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Fri, 5 Apr 2019 06:41:33 +0100 Subject: [PATCH 4/6] Latest Tegra patch revision --- ARM-tegra-Miscellaneous-improvements.patch | 353 ++++++++++++--------- uboot-tools.spec | 5 +- 2 files changed, 200 insertions(+), 158 deletions(-) diff --git a/ARM-tegra-Miscellaneous-improvements.patch b/ARM-tegra-Miscellaneous-improvements.patch index 61790a1..f65ecd8 100644 --- a/ARM-tegra-Miscellaneous-improvements.patch +++ b/ARM-tegra-Miscellaneous-improvements.patch @@ -1,15 +1,16 @@ -From patchwork Thu Mar 21 18:01:00 2019 +From patchwork Thu Apr 4 11:59:24 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v3,01/19] ARM: tegra: Use common header for PMU declarations +Subject: [U-Boot,v4,01/19] ARM: tegra: Use common header for PMU declarations X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1060337 +X-Patchwork-Id: 1077183 X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190321180118.26475-2-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de -Date: Thu, 21 Mar 2019 19:01:00 +0100 +Message-Id: <20190404115942.17947-2-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de, Stephen Warren , + Jonathan Hunter +Date: Thu, 4 Apr 2019 13:59:24 +0200 From: Thierry Reding List-Id: U-Boot discussion @@ -166,18 +167,19 @@ index 6697909d9a3e..66628933b653 100644 DECLARE_GLOBAL_DATA_PTR; -From patchwork Thu Mar 21 18:01:01 2019 +From patchwork Thu Apr 4 11:59:25 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v3,02/19] ARM: tegra: Guard clock code with a Kconfig symbol +Subject: [U-Boot,v4,02/19] ARM: tegra: Guard clock code with a Kconfig symbol X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1060347 +X-Patchwork-Id: 1077185 X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190321180118.26475-3-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de -Date: Thu, 21 Mar 2019 19:01:01 +0100 +Message-Id: <20190404115942.17947-3-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de, Stephen Warren , + Jonathan Hunter +Date: Thu, 4 Apr 2019 13:59:25 +0200 From: Thierry Reding List-Id: U-Boot discussion @@ -307,19 +309,20 @@ index b8d5ef0322cb..b94077221f77 100644 pinmux_init(); board_init_uart_f(); -From patchwork Thu Mar 21 18:01:02 2019 +From patchwork Thu Apr 4 11:59:26 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [U-Boot, v3, +Subject: [U-Boot, v4, 03/19] ARM: tegra: Guard GP pad control code with a Kconfig symbol X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1060338 +X-Patchwork-Id: 1077187 X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190321180118.26475-4-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de -Date: Thu, 21 Mar 2019 19:01:02 +0100 +Message-Id: <20190404115942.17947-4-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de, Stephen Warren , + Jonathan Hunter +Date: Thu, 4 Apr 2019 13:59:26 +0200 From: Thierry Reding List-Id: U-Boot discussion @@ -397,19 +400,20 @@ index be414e4e4aca..d7063490e222 100644 #ifndef CONFIG_ARM64 void config_cache(void) -From patchwork Thu Mar 21 18:01:03 2019 +From patchwork Thu Apr 4 11:59:27 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [U-Boot, v3, +Subject: [U-Boot, v4, 04/19] ARM: tegra: Guard memory controller code with a Kconfig symbol X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1060339 +X-Patchwork-Id: 1077188 X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190321180118.26475-5-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de -Date: Thu, 21 Mar 2019 19:01:03 +0100 +Message-Id: <20190404115942.17947-5-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de, Stephen Warren , + Jonathan Hunter +Date: Thu, 4 Apr 2019 13:59:27 +0200 From: Thierry Reding List-Id: U-Boot discussion @@ -497,19 +501,20 @@ index ecd5001de4c5..7ef5a67edd1f 100644 } -From patchwork Thu Mar 21 18:01:04 2019 +From patchwork Thu Apr 4 11:59:28 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [U-Boot, v3, +Subject: [U-Boot, v4, 05/19] ARM: tegra: Guard pin controller code with a Kconfig symbol X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1060345 +X-Patchwork-Id: 1077207 X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190321180118.26475-6-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de -Date: Thu, 21 Mar 2019 19:01:04 +0100 +Message-Id: <20190404115942.17947-6-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de, Stephen Warren , + Jonathan Hunter +Date: Thu, 4 Apr 2019 13:59:28 +0200 From: Thierry Reding List-Id: U-Boot discussion @@ -631,19 +636,20 @@ index b94077221f77..ce1c9346959d 100644 #ifdef CONFIG_TEGRA_CLOCK_SCALING #include -From patchwork Thu Mar 21 18:01:05 2019 +From patchwork Thu Apr 4 11:59:29 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [U-Boot, v3, +Subject: [U-Boot, v4, 06/19] ARM: tegra: Guard powergate code with a Kconfig symbol X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1060355 +X-Patchwork-Id: 1077193 X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190321180118.26475-7-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de -Date: Thu, 21 Mar 2019 19:01:05 +0100 +Message-Id: <20190404115942.17947-7-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de, Stephen Warren , + Jonathan Hunter +Date: Thu, 4 Apr 2019 13:59:29 +0200 From: Thierry Reding List-Id: U-Boot discussion @@ -706,18 +712,19 @@ index 395e0191a458..517be21ee5f5 100644 endif -From patchwork Thu Mar 21 18:01:06 2019 +From patchwork Thu Apr 4 11:59:30 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v3,07/19] ARM: tegra: Fix save_boot_params() prototype +Subject: [U-Boot,v4,07/19] ARM: tegra: Fix save_boot_params() prototype X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1060346 +X-Patchwork-Id: 1077195 X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190321180118.26475-8-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de -Date: Thu, 21 Mar 2019 19:01:06 +0100 +Message-Id: <20190404115942.17947-8-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de, Stephen Warren , + Jonathan Hunter +Date: Thu, 4 Apr 2019 13:59:30 +0200 From: Thierry Reding List-Id: U-Boot discussion @@ -751,19 +758,20 @@ index b65bdde5a78d..59d2f347485d 100644 from_spl = r0 != UBOOT_NOT_LOADED_FROM_SPL; save_boot_params_ret(); -From patchwork Thu Mar 21 18:01:07 2019 +From patchwork Thu Apr 4 11:59:31 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [U-Boot, v3, +Subject: [U-Boot, v4, 08/19] ARM: tegra: Allow boards to override boot target devices X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1060348 +X-Patchwork-Id: 1077192 X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190321180118.26475-9-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de -Date: Thu, 21 Mar 2019 19:01:07 +0100 +Message-Id: <20190404115942.17947-9-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de, Stephen Warren , + Jonathan Hunter +Date: Thu, 4 Apr 2019 13:59:31 +0200 From: Thierry Reding List-Id: U-Boot discussion @@ -798,18 +806,19 @@ index e54428ba43e2..9685ee5059ab 100644 #else #define BOOTENV -From patchwork Thu Mar 21 18:01:08 2019 +From patchwork Thu Apr 4 11:59:32 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v3,09/19] ARM: tegra: Support TZ-only access to PMC +Subject: [U-Boot,v4,09/19] ARM: tegra: Support TZ-only access to PMC X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1060350 +X-Patchwork-Id: 1077197 X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190321180118.26475-10-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de -Date: Thu, 21 Mar 2019 19:01:08 +0100 +Message-Id: <20190404115942.17947-10-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de, Stephen Warren , + Jonathan Hunter +Date: Thu, 4 Apr 2019 13:59:32 +0200 From: Thierry Reding List-Id: U-Boot discussion @@ -1257,19 +1266,20 @@ index e45f0961b242..761c9ef19e3b 100644 return 0; } -From patchwork Thu Mar 21 18:01:09 2019 +From patchwork Thu Apr 4 11:59:33 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [U-Boot, v3, +Subject: [U-Boot, v4, 10/19] ARM: tegra: Workaround UDC boot issues only if necessary X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1060352 +X-Patchwork-Id: 1077191 X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190321180118.26475-11-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de -Date: Thu, 21 Mar 2019 19:01:09 +0100 +Message-Id: <20190404115942.17947-11-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de, Stephen Warren , + Jonathan Hunter +Date: Thu, 4 Apr 2019 13:59:33 +0200 From: Thierry Reding List-Id: U-Boot discussion @@ -1300,18 +1310,19 @@ index 28914a34a1b5..faa73559fd42 100644 help When loading U-Boot into RAM over USB protocols using tools such as -From patchwork Thu Mar 21 18:01:10 2019 +From patchwork Thu Apr 4 11:59:34 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v3,11/19] ARM: tegra: Restore DRAM bank count +Subject: [U-Boot,v4,11/19] ARM: tegra: Restore DRAM bank count X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1060341 +X-Patchwork-Id: 1077194 X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190321180118.26475-12-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de -Date: Thu, 21 Mar 2019 19:01:10 +0100 +Message-Id: <20190404115942.17947-12-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de, Stephen Warren , + Jonathan Hunter +Date: Thu, 4 Apr 2019 13:59:34 +0200 From: Thierry Reding List-Id: U-Boot discussion @@ -1362,18 +1373,19 @@ index df4d914d85cf..459b67fd195f 100644 CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y -From patchwork Thu Mar 21 18:01:11 2019 +From patchwork Thu Apr 4 11:59:35 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v3,12/19] ARM: tegra: Unify Tegra186 builds +Subject: [U-Boot,v4,12/19] ARM: tegra: Unify Tegra186 builds X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1060344 +X-Patchwork-Id: 1077204 X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190321180118.26475-13-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de -Date: Thu, 21 Mar 2019 19:01:11 +0100 +Message-Id: <20190404115942.17947-13-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de, Stephen Warren , + Jonathan Hunter +Date: Thu, 4 Apr 2019 13:59:35 +0200 From: Thierry Reding List-Id: U-Boot discussion @@ -1397,6 +1409,9 @@ this to avoid confusion. The implemented protocols are unchanged. Signed-off-by: Thierry Reding --- +Changes in v4: +- consistently use /chosen/nvidia,ether-mac property + Changes in v3: - load cboot DTB address to fdt_addr instead of fdtaddr @@ -1634,7 +1649,7 @@ diff --git a/arch/arm/mach-tegra/tegra186/nvtboot_board.c b/arch/arm/mach-tegra/ similarity index 56% rename from arch/arm/mach-tegra/tegra186/nvtboot_board.c rename to arch/arm/mach-tegra/cboot.c -index 83c0e931ea24..95a097584ac6 100644 +index 83c0e931ea24..3ebf7b055553 100644 --- a/arch/arm/mach-tegra/tegra186/nvtboot_board.c +++ b/arch/arm/mach-tegra/cboot.c @@ -3,14 +3,182 @@ @@ -1863,7 +1878,7 @@ index 83c0e931ea24..95a097584ac6 100644 /* - * Attempt to use /chosen/nvidia,ether-mac in the nvtboot DTB to U-Boot's -+ * Attempt to use /chosen/nvidia,ethernet-mac in the cboot DTB to U-Boot's ++ * Attempt to use /chosen/nvidia,ether-mac in the cboot DTB to U-Boot's * ethaddr environment variable if possible. */ -static int set_ethaddr_from_nvtboot(void) @@ -1886,7 +1901,7 @@ index 83c0e931ea24..95a097584ac6 100644 return node; } - prop = fdt_getprop(nvtboot_blob, node, "nvidia,ether-mac", &len); -+ prop = fdt_getprop(cboot_blob, node, "nvidia,ethernet-mac", &len); ++ prop = fdt_getprop(cboot_blob, node, "nvidia,ether-mac", &len); if (!prop) { - printf("Can't find nvidia,ether-mac property in nvtboot DTB\n"); + printf("Can't find nvidia,ether-mac property in cboot DTB\n"); @@ -2183,19 +2198,20 @@ index 496e8a02111e..6f88010c18c3 100644 } +#endif -From patchwork Thu Mar 21 18:01:12 2019 +From patchwork Thu Apr 4 11:59:36 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [U-Boot, v3, +Subject: [U-Boot, v4, 13/19] ARM: tegra: Implement cboot_save_boot_params() in C X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1060342 +X-Patchwork-Id: 1077211 X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190321180118.26475-14-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de -Date: Thu, 21 Mar 2019 19:01:12 +0100 +Message-Id: <20190404115942.17947-14-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de, Stephen Warren , + Jonathan Hunter +Date: Thu, 4 Apr 2019 13:59:36 +0200 From: Thierry Reding List-Id: U-Boot discussion @@ -2226,7 +2242,7 @@ index 41ba674edff4..7165d70a60da 100644 obj-$(CONFIG_TEGRA_CLOCK_SCALING) += emc.o obj-$(CONFIG_TEGRA_GPU) += gpu.o diff --git a/arch/arm/mach-tegra/cboot.c b/arch/arm/mach-tegra/cboot.c -index 95a097584ac6..acf33b4c4e0c 100644 +index 3ebf7b055553..a302ca45f39b 100644 --- a/arch/arm/mach-tegra/cboot.c +++ b/arch/arm/mach-tegra/cboot.c @@ -52,6 +52,18 @@ static u64 ram_top __attribute__((section(".data"))); @@ -2275,18 +2291,19 @@ index 4c9ddacc2b39..000000000000 - b save_boot_params_ret -ENDPROC(cboot_save_boot_params) -From patchwork Thu Mar 21 18:01:13 2019 +From patchwork Thu Apr 4 11:59:37 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v3,14/19] ARM: tegra: Implement cboot_get_ethaddr() +Subject: [U-Boot,v4,14/19] ARM: tegra: Implement cboot_get_ethaddr() X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1060340 +X-Patchwork-Id: 1077213 X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190321180118.26475-15-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de -Date: Thu, 21 Mar 2019 19:01:13 +0100 +Message-Id: <20190404115942.17947-15-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de, Stephen Warren , + Jonathan Hunter +Date: Thu, 4 Apr 2019 13:59:37 +0200 From: Thierry Reding List-Id: U-Boot discussion @@ -2300,16 +2317,21 @@ alias) and if found, reads the "local-mac-address" property. If the that doesn't exist, or if the device tree node that it points to does not have a "local-mac-address" property or if the value is invalid, it will fall back to the legacy mechanism of looking for the MAC address -stored in the "nvidia,ethernet-mac" property of the "/chosen" node. +stored in the "nvidia,ethernet-mac" or "nvidia,ether-mac" properties of +the "/chosen" node. Signed-off-by: Thierry Reding --- +Changes in v4: +- also check the /chosen/nvidia,ethernet-mac property for compatibility + with Tegra210 + Changes in v2: - make dummy static inline to avoid duplicate definitions arch/arm/include/asm/arch-tegra/cboot.h | 6 ++ - arch/arm/mach-tegra/cboot.c | 78 ++++++++++++++++++++----- - 2 files changed, 69 insertions(+), 15 deletions(-) + arch/arm/mach-tegra/cboot.c | 92 ++++++++++++++++++++----- + 2 files changed, 81 insertions(+), 17 deletions(-) diff --git a/arch/arm/include/asm/arch-tegra/cboot.h b/arch/arm/include/asm/arch-tegra/cboot.h index b3441ec178b3..021c24617575 100644 @@ -2336,7 +2358,7 @@ index b3441ec178b3..021c24617575 100644 #endif diff --git a/arch/arm/mach-tegra/cboot.c b/arch/arm/mach-tegra/cboot.c -index acf33b4c4e0c..9735380bda59 100644 +index a302ca45f39b..6c6d06d89a5d 100644 --- a/arch/arm/mach-tegra/cboot.c +++ b/arch/arm/mach-tegra/cboot.c @@ -4,6 +4,7 @@ @@ -2347,8 +2369,8 @@ index acf33b4c4e0c..9735380bda59 100644 #include #include #include -@@ -465,46 +466,93 @@ static int set_fdt_addr(void) - * Attempt to use /chosen/nvidia,ethernet-mac in the cboot DTB to U-Boot's +@@ -465,46 +466,103 @@ static int set_fdt_addr(void) + * Attempt to use /chosen/nvidia,ether-mac in the cboot DTB to U-Boot's * ethaddr environment variable if possible. */ -static int set_ethaddr_from_cboot(void) @@ -2361,20 +2383,32 @@ index acf33b4c4e0c..9735380bda59 100644 - /* Already a valid address in the environment? If so, keep it */ - if (env_get("ethaddr")) - return 0; -+ const char *prop; -+ int node, len; - +- - node = fdt_path_offset(cboot_blob, "/chosen"); ++ const char *const properties[] = { ++ "nvidia,ethernet-mac", ++ "nvidia,ether-mac", ++ }; ++ const char *prop; ++ unsigned int i; ++ int node, len; ++ + node = fdt_path_offset(fdt, "/chosen"); if (node < 0) { printf("Can't find /chosen node in cboot DTB\n"); return node; } -- prop = fdt_getprop(cboot_blob, node, "nvidia,ethernet-mac", &len); +- prop = fdt_getprop(cboot_blob, node, "nvidia,ether-mac", &len); ++ ++ for (i = 0; i < ARRAY_SIZE(properties); i++) { ++ prop = fdt_getprop(fdt, node, properties[i], &len); ++ if (prop) ++ break; ++ } + -+ prop = fdt_getprop(fdt, node, "nvidia,ethernet-mac", &len); if (!prop) { - printf("Can't find nvidia,ether-mac property in cboot DTB\n"); +- printf("Can't find nvidia,ether-mac property in cboot DTB\n"); ++ printf("Can't find Ethernet MAC address in cboot DTB\n"); return -ENOENT; } @@ -2457,19 +2491,20 @@ index acf33b4c4e0c..9735380bda59 100644 return 0; } -From patchwork Thu Mar 21 18:01:14 2019 +From patchwork Thu Apr 4 11:59:38 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [U-Boot, v3, +Subject: [U-Boot, v4, 15/19] ARM: tegra: Enable position independent build for 64-bit X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1060357 +X-Patchwork-Id: 1077212 X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190321180118.26475-16-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de -Date: Thu, 21 Mar 2019 19:01:14 +0100 +Message-Id: <20190404115942.17947-16-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de, Stephen Warren , + Jonathan Hunter +Date: Thu, 4 Apr 2019 13:59:38 +0200 From: Thierry Reding List-Id: U-Boot discussion @@ -2504,7 +2539,7 @@ index faa73559fd42..97e22ead5985 100644 if TEGRA_ARMV8_COMMON diff --git a/configs/e2220-1170_defconfig b/configs/e2220-1170_defconfig -index fbca72ace6ed..87668f8e517f 100644 +index af3f80edb117..baabb0ccf8cc 100644 --- a/configs/e2220-1170_defconfig +++ b/configs/e2220-1170_defconfig @@ -1,6 +1,6 @@ @@ -2516,7 +2551,7 @@ index fbca72ace6ed..87668f8e517f 100644 CONFIG_NR_DRAM_BANKS=2 CONFIG_OF_SYSTEM_SETUP=y diff --git a/configs/p2371-0000_defconfig b/configs/p2371-0000_defconfig -index c25872128e07..979cb8ec0a25 100644 +index 6b564366a825..aa8b73a2ba08 100644 --- a/configs/p2371-0000_defconfig +++ b/configs/p2371-0000_defconfig @@ -1,6 +1,6 @@ @@ -2528,7 +2563,7 @@ index c25872128e07..979cb8ec0a25 100644 CONFIG_TARGET_P2371_0000=y CONFIG_NR_DRAM_BANKS=2 diff --git a/configs/p2371-2180_defconfig b/configs/p2371-2180_defconfig -index b662ef143141..2fac69917a92 100644 +index a790cd83b82d..4923d330de6c 100644 --- a/configs/p2371-2180_defconfig +++ b/configs/p2371-2180_defconfig @@ -1,6 +1,6 @@ @@ -2540,7 +2575,7 @@ index b662ef143141..2fac69917a92 100644 CONFIG_TARGET_P2371_2180=y CONFIG_NR_DRAM_BANKS=2 diff --git a/configs/p2571_defconfig b/configs/p2571_defconfig -index 5f0f8c519b4c..ff4654cea9b4 100644 +index e48e0a1a14ec..8e9c45690dce 100644 --- a/configs/p2571_defconfig +++ b/configs/p2571_defconfig @@ -1,6 +1,6 @@ @@ -2552,18 +2587,19 @@ index 5f0f8c519b4c..ff4654cea9b4 100644 CONFIG_TARGET_P2571=y CONFIG_NR_DRAM_BANKS=2 -From patchwork Thu Mar 21 18:01:15 2019 +From patchwork Thu Apr 4 11:59:39 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v3,16/19] p2371-2180: Pass Ethernet MAC to the kernel +Subject: [U-Boot,v4,16/19] p2371-2180: Pass Ethernet MAC to the kernel X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1060351 +X-Patchwork-Id: 1077196 X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190321180118.26475-17-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de -Date: Thu, 21 Mar 2019 19:01:15 +0100 +Message-Id: <20190404115942.17947-17-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de, Stephen Warren , + Jonathan Hunter +Date: Thu, 4 Apr 2019 13:59:39 +0200 From: Thierry Reding List-Id: U-Boot discussion @@ -2650,7 +2686,7 @@ index 212037da5ac0..a444d692d7ea 100644 + return 0; +} diff --git a/configs/p2371-2180_defconfig b/configs/p2371-2180_defconfig -index 2fac69917a92..16afbba68ae7 100644 +index 4923d330de6c..0ee4913a0469 100644 --- a/configs/p2371-2180_defconfig +++ b/configs/p2371-2180_defconfig @@ -5,6 +5,7 @@ CONFIG_TEGRA210=y @@ -2662,18 +2698,19 @@ index 2fac69917a92..16afbba68ae7 100644 CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra210 (P2371-2180) # " -From patchwork Thu Mar 21 18:01:16 2019 +From patchwork Thu Apr 4 11:59:40 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v3,17/19] p2771-0000: Pass Ethernet MAC to the kernel +Subject: [U-Boot,v4,17/19] p2771-0000: Pass Ethernet MAC to the kernel X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1060356 +X-Patchwork-Id: 1077208 X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190321180118.26475-18-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de -Date: Thu, 21 Mar 2019 19:01:16 +0100 +Message-Id: <20190404115942.17947-18-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de, Stephen Warren , + Jonathan Hunter +Date: Thu, 4 Apr 2019 13:59:40 +0200 From: Thierry Reding List-Id: U-Boot discussion @@ -2776,18 +2813,19 @@ index 459b67fd195f..20d4393838d6 100644 CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra186 (P2771-0000-500) # " -From patchwork Thu Mar 21 18:01:17 2019 +From patchwork Thu Apr 4 11:59:41 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v3,18/19] lib: Implement strndup() +Subject: [U-Boot,v4,18/19] lib: Implement strndup() X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1060343 +X-Patchwork-Id: 1077221 X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190321180118.26475-19-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de -Date: Thu, 21 Mar 2019 19:01:17 +0100 +Message-Id: <20190404115942.17947-19-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de, Stephen Warren , + Jonathan Hunter +Date: Thu, 4 Apr 2019 13:59:41 +0200 From: Thierry Reding List-Id: U-Boot discussion @@ -2846,18 +2884,19 @@ index af17c16f616d..9b779ddc3bbe 100644 /** * strspn - Calculate the length of the initial substring of @s which only -From patchwork Thu Mar 21 18:01:18 2019 +From patchwork Thu Apr 4 11:59:42 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v3,19/19] ARM: tegra: Import cbootargs value from cboot DTB +Subject: [U-Boot,v4,19/19] ARM: tegra: Import cbootargs value from cboot DTB X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1060349 +X-Patchwork-Id: 1077205 X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190321180118.26475-20-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de -Date: Thu, 21 Mar 2019 19:01:18 +0100 +Message-Id: <20190404115942.17947-20-thierry.reding@gmail.com> +To: Tom Warren +Cc: u-boot@lists.denx.de, Stephen Warren , + Jonathan Hunter +Date: Thu, 4 Apr 2019 13:59:42 +0200 From: Thierry Reding List-Id: U-Boot discussion @@ -2872,7 +2911,7 @@ Signed-off-by: Thierry Reding 1 file changed, 47 insertions(+) diff --git a/arch/arm/mach-tegra/cboot.c b/arch/arm/mach-tegra/cboot.c -index 9735380bda59..8bfcbcdc6e6d 100644 +index 6c6d06d89a5d..3f42ffeb73c0 100644 --- a/arch/arm/mach-tegra/cboot.c +++ b/arch/arm/mach-tegra/cboot.c @@ -8,7 +8,9 @@ @@ -2885,7 +2924,7 @@ index 9735380bda59..8bfcbcdc6e6d 100644 #include #include -@@ -536,10 +538,49 @@ out: +@@ -546,10 +548,49 @@ out: return err; } @@ -2935,7 +2974,7 @@ index 9735380bda59..8bfcbcdc6e6d 100644 int err; set_calculated_env_vars(); -@@ -554,5 +595,11 @@ int cboot_late_init(void) +@@ -564,5 +605,11 @@ int cboot_late_init(void) if (!err) eth_env_set_enetaddr("ethaddr", mac); diff --git a/uboot-tools.spec b/uboot-tools.spec index d16be4f..688536a 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -2,7 +2,7 @@ Name: uboot-tools Version: 2019.04 -Release: 0.8%{?candidate:.%{candidate}}%{?dist} +Release: 0.9%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -303,6 +303,9 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Thu Apr 4 2019 Peter Robinson 2019.04-0.9-rc4 +- Latest Tegra patch revision + * Sun Mar 31 2019 Peter Robinson 2019.04-0.8-rc4 - Add ability to make creation of boot/dtb symlink configurable From 178f1bba0fcc45cba879b274419c19e8cb6f39f5 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Thu, 18 Apr 2019 15:53:13 +0100 Subject: [PATCH 5/6] 2019.04, Fixes for AllWinner and NVIDIA Jetson devices --- ...IA-Jetson-Nano-Developer-Kit-support.patch | 777 ------ ...dd-support-for-framebuffer-carveouts.patch | 761 +++--- ARM-tegra-Miscellaneous-improvements.patch | 2237 ++++++++++++++--- ...egra-defaine-fdtfile-for-all-devices.patch | 162 ++ ...-MAC-address-to-hardware-after-probe.patch | 224 +- ...69-Implement---hwaddr_write-callback.patch | 102 + sources | 2 +- uboot-tools.spec | 22 +- ...m-runtime-data-to-boot-services-data.patch | 54 + ...lculation-overflow-on-32-bit-systems.patch | 46 + uefi-rc5-fixes.patch | 245 -- 11 files changed, 2757 insertions(+), 1875 deletions(-) delete mode 100644 ARM-tegra-Add-NVIDIA-Jetson-Nano-Developer-Kit-support.patch create mode 100644 arm-tegra-defaine-fdtfile-for-all-devices.patch create mode 100644 net-rtl8169-Implement---hwaddr_write-callback.patch create mode 100644 uefi-Change-FDT-memory-type-from-runtime-data-to-boot-services-data.patch create mode 100644 uefi-fix-memory-calculation-overflow-on-32-bit-systems.patch delete mode 100644 uefi-rc5-fixes.patch diff --git a/ARM-tegra-Add-NVIDIA-Jetson-Nano-Developer-Kit-support.patch b/ARM-tegra-Add-NVIDIA-Jetson-Nano-Developer-Kit-support.patch deleted file mode 100644 index 70bb946..0000000 --- a/ARM-tegra-Add-NVIDIA-Jetson-Nano-Developer-Kit-support.patch +++ /dev/null @@ -1,777 +0,0 @@ -From patchwork Mon Mar 18 23:24:22 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot, v2, - 15/15] ARM: tegra: Add NVIDIA Jetson Nano Developer Kit support -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1058155 -X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190318232422.24404-16-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de, Stephen Warren -Date: Tue, 19 Mar 2019 00:24:22 +0100 -From: Thierry Reding -List-Id: U-Boot discussion - -From: Thierry Reding - -The Jetson Nano Developer Kit is a Tegra X1 based development board. It -is similar to Jetson TX1 but it is not pin compatible. It features 4 GB -of LPDDR4, an SPI NOR flash for early boot firmware and an SD card slot -used for storage. - -HDMI 2.0 or DP 1.2 are available for display, four USB ports (3 USB 2.0 -and 1 USB 3.0) can be used to attach a variety of peripherals and a PCI -Ethernet controller provides onboard network connectivity. - -A 40-pin header on the board can be used to extend the capabilities and -exposed interfaces of the Jetson Nano. - -Signed-off-by: Thierry Reding ---- - arch/arm/dts/tegra210-p3450-0000.dts | 130 +++++++++ - arch/arm/mach-tegra/tegra210/Kconfig | 7 + - board/nvidia/p3450-0000/Kconfig | 12 + - board/nvidia/p3450-0000/MAINTAINERS | 6 + - board/nvidia/p3450-0000/Makefile | 8 + - board/nvidia/p3450-0000/p3450-0000.c | 143 ++++++++++ - .../p3450-0000/pinmux-config-p3450-0000.h | 257 ++++++++++++++++++ - configs/p3450-0000_defconfig | 54 ++++ - include/configs/p3450-0000.h | 44 +++ - 9 files changed, 661 insertions(+) - create mode 100644 arch/arm/dts/tegra210-p3450-0000.dts - create mode 100644 board/nvidia/p3450-0000/Kconfig - create mode 100644 board/nvidia/p3450-0000/MAINTAINERS - create mode 100644 board/nvidia/p3450-0000/Makefile - create mode 100644 board/nvidia/p3450-0000/p3450-0000.c - create mode 100644 board/nvidia/p3450-0000/pinmux-config-p3450-0000.h - create mode 100644 configs/p3450-0000_defconfig - create mode 100644 include/configs/p3450-0000.h - -diff --git a/arch/arm/dts/tegra210-p3450-0000.dts b/arch/arm/dts/tegra210-p3450-0000.dts -new file mode 100644 -index 000000000000..a2119165e2f6 ---- /dev/null -+++ b/arch/arm/dts/tegra210-p3450-0000.dts -@@ -0,0 +1,130 @@ -+/dts-v1/; -+ -+#include "tegra210.dtsi" -+ -+/ { -+ model = "NVIDIA Jetson Nano Development Kit"; -+ compatible = "nvidia,p3450-0000", "nvidia,tegra210"; -+ -+ chosen { -+ stdout-path = &uarta; -+ }; -+ -+ aliases { -+ i2c0 = "/i2c@7000d000"; -+ i2c2 = "/i2c@7000c400"; -+ i2c3 = "/i2c@7000c500"; -+ i2c4 = "/i2c@7000c700"; -+ sdhci0 = "/sdhci@700b0600"; -+ sdhci1 = "/sdhci@700b0000"; -+ spi0 = "/spi@70410000"; -+ usb0 = "/usb@7d000000"; -+ }; -+ -+ memory { -+ reg = <0x0 0x80000000 0x0 0xc0000000>; -+ }; -+ -+ pcie-controller@01003000 { -+ status = "okay"; -+ -+ pci@1,0 { -+ status = "okay"; -+ }; -+ -+ pci@2,0 { -+ status = "okay"; -+ }; -+ }; -+ -+ serial@70006000 { -+ status = "okay"; -+ }; -+ -+ padctl@7009f000 { -+ pinctrl-0 = <&padctl_default>; -+ pinctrl-names = "default"; -+ -+ padctl_default: pinmux { -+ xusb { -+ nvidia,lanes = "otg-1", "otg-2"; -+ nvidia,function = "xusb"; -+ nvidia,iddq = <0>; -+ }; -+ -+ usb3 { -+ nvidia,lanes = "pcie-5", "pcie-6"; -+ nvidia,function = "usb3"; -+ nvidia,iddq = <0>; -+ }; -+ -+ pcie-x1 { -+ nvidia,lanes = "pcie-0"; -+ nvidia,function = "pcie-x1"; -+ nvidia,iddq = <0>; -+ }; -+ -+ pcie-x4 { -+ nvidia,lanes = "pcie-1", "pcie-2", -+ "pcie-3", "pcie-4"; -+ nvidia,function = "pcie-x4"; -+ nvidia,iddq = <0>; -+ }; -+ -+ sata { -+ nvidia,lanes = "sata-0"; -+ nvidia,function = "sata"; -+ nvidia,iddq = <0>; -+ }; -+ }; -+ }; -+ -+ sdhci@700b0000 { -+ status = "okay"; -+ cd-gpios = <&gpio TEGRA_GPIO(Z, 1) GPIO_ACTIVE_LOW>; -+ power-gpios = <&gpio TEGRA_GPIO(Z, 3) GPIO_ACTIVE_HIGH>; -+ bus-width = <4>; -+ }; -+ -+ i2c@7000c400 { -+ status = "okay"; -+ clock-frequency = <400000>; -+ }; -+ -+ i2c@7000c500 { -+ status = "okay"; -+ clock-frequency = <400000>; -+ }; -+ -+ i2c@7000c700 { -+ status = "okay"; -+ clock-frequency = <400000>; -+ }; -+ -+ i2c@7000d000 { -+ status = "okay"; -+ clock-frequency = <400000>; -+ }; -+ -+ spi@70410000 { -+ status = "okay"; -+ }; -+ -+ usb@7d000000 { -+ status = "okay"; -+ dr_mode = "peripheral"; -+ }; -+ -+ clocks { -+ compatible = "simple-bus"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ clk32k_in: clock@0 { -+ compatible = "fixed-clock"; -+ reg = <0>; -+ #clock-cells = <0>; -+ clock-frequency = <32768>; -+ }; -+ }; -+}; -diff --git a/arch/arm/mach-tegra/tegra210/Kconfig b/arch/arm/mach-tegra/tegra210/Kconfig -index 250738aed312..60dde5435940 100644 ---- a/arch/arm/mach-tegra/tegra210/Kconfig -+++ b/arch/arm/mach-tegra/tegra210/Kconfig -@@ -35,6 +35,12 @@ config TARGET_P2571 - help - P2571 is a P2530 married to a P1963 I/O board - -+config TARGET_P3450_0000 -+ bool "NVIDIA Jetson Nano Development Kit" -+ select BOARD_LATE_INIT -+ help -+ P3450-0000 is a P3448 CPU board married to a P3449 I/O board. -+ - endchoice - - config SYS_SOC -@@ -47,5 +53,6 @@ source "board/nvidia/e2220-1170/Kconfig" - source "board/nvidia/p2371-0000/Kconfig" - source "board/nvidia/p2371-2180/Kconfig" - source "board/nvidia/p2571/Kconfig" -+source "board/nvidia/p3450-0000/Kconfig" - - endif -diff --git a/board/nvidia/p3450-0000/Kconfig b/board/nvidia/p3450-0000/Kconfig -new file mode 100644 -index 000000000000..7a08cd88675f ---- /dev/null -+++ b/board/nvidia/p3450-0000/Kconfig -@@ -0,0 +1,12 @@ -+if TARGET_P3450_0000 -+ -+config SYS_BOARD -+ default "p3450-0000" -+ -+config SYS_VENDOR -+ default "nvidia" -+ -+config SYS_CONFIG_NAME -+ default "p3450-0000" -+ -+endif -diff --git a/board/nvidia/p3450-0000/MAINTAINERS b/board/nvidia/p3450-0000/MAINTAINERS -new file mode 100644 -index 000000000000..40700066bf39 ---- /dev/null -+++ b/board/nvidia/p3450-0000/MAINTAINERS -@@ -0,0 +1,6 @@ -+P3450-0000 BOARD -+M: Tom Warren -+S: Maintained -+F: board/nvidia/p3450-0000/ -+F: include/configs/p3450-0000.h -+F: configs/p3450-0000_defconfig -diff --git a/board/nvidia/p3450-0000/Makefile b/board/nvidia/p3450-0000/Makefile -new file mode 100644 -index 000000000000..993c506d8200 ---- /dev/null -+++ b/board/nvidia/p3450-0000/Makefile -@@ -0,0 +1,8 @@ -+# -+# (C) Copyright 2018 -+# NVIDIA Corporation -+# -+# SPDX-License-Identifier: GPL-2.0+ -+# -+ -+obj-y += p3450-0000.o -diff --git a/board/nvidia/p3450-0000/p3450-0000.c b/board/nvidia/p3450-0000/p3450-0000.c -new file mode 100644 -index 000000000000..fc13185c36b6 ---- /dev/null -+++ b/board/nvidia/p3450-0000/p3450-0000.c -@@ -0,0 +1,143 @@ -+/* -+ * (C) Copyright 2018 -+ * NVIDIA Corporation -+ * -+ * SPDX-License-Identifier: GPL-2.0+ -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include "../p2571/max77620_init.h" -+#include "pinmux-config-p3450-0000.h" -+ -+void pin_mux_mmc(void) -+{ -+ struct udevice *dev; -+ uchar val; -+ int ret; -+ -+ /* Turn on MAX77620 LDO2 to 3.3V for SD card power */ -+ debug("%s: Set LDO2 for VDDIO_SDMMC_AP power to 3.3V\n", __func__); -+ ret = i2c_get_chip_for_busnum(0, MAX77620_I2C_ADDR_7BIT, 1, &dev); -+ if (ret) { -+ printf("%s: Cannot find MAX77620 I2C chip\n", __func__); -+ return; -+ } -+ /* 0xF2 for 3.3v, enabled: bit7:6 = 11 = enable, bit5:0 = voltage */ -+ val = 0xF2; -+ ret = dm_i2c_write(dev, MAX77620_CNFG1_L2_REG, &val, 1); -+ if (ret) -+ printf("i2c_write 0 0x3c 0x27 failed: %d\n", ret); -+ -+ /* Disable LDO4 discharge */ -+ ret = dm_i2c_read(dev, MAX77620_CNFG2_L4_REG, &val, 1); -+ if (ret) { -+ printf("i2c_read 0 0x3c 0x2c failed: %d\n", ret); -+ } else { -+ val &= ~BIT(1); /* ADE */ -+ ret = dm_i2c_write(dev, MAX77620_CNFG2_L4_REG, &val, 1); -+ if (ret) -+ printf("i2c_write 0 0x3c 0x2c failed: %d\n", ret); -+ } -+ -+ /* Set MBLPD */ -+ ret = dm_i2c_read(dev, MAX77620_CNFGGLBL1_REG, &val, 1); -+ if (ret) { -+ printf("i2c_write 0 0x3c 0x00 failed: %d\n", ret); -+ } else { -+ val |= BIT(6); /* MBLPD */ -+ ret = dm_i2c_write(dev, MAX77620_CNFGGLBL1_REG, &val, 1); -+ if (ret) -+ printf("i2c_write 0 0x3c 0x00 failed: %d\n", ret); -+ } -+} -+ -+/* -+ * Routine: pinmux_init -+ * Description: Do individual peripheral pinmux configs -+ */ -+void pinmux_init(void) -+{ -+ pinmux_clear_tristate_input_clamping(); -+ -+ gpio_config_table(p3450_0000_gpio_inits, -+ ARRAY_SIZE(p3450_0000_gpio_inits)); -+ -+ pinmux_config_pingrp_table(p3450_0000_pingrps, -+ ARRAY_SIZE(p3450_0000_pingrps)); -+ -+ pinmux_config_drvgrp_table(p3450_0000_drvgrps, -+ ARRAY_SIZE(p3450_0000_drvgrps)); -+} -+ -+#ifdef CONFIG_PCI_TEGRA -+int tegra_pcie_board_init(void) -+{ -+ struct udevice *dev; -+ uchar val; -+ int ret; -+ -+ /* Turn on MAX77620 LDO1 to 1.05V for PEX power */ -+ debug("%s: Set LDO1 for PEX power to 1.05V\n", __func__); -+ ret = i2c_get_chip_for_busnum(0, MAX77620_I2C_ADDR_7BIT, 1, &dev); -+ if (ret) { -+ printf("%s: Cannot find MAX77620 I2C chip\n", __func__); -+ return -1; -+ } -+ /* 0xCA for 1.05v, enabled: bit7:6 = 11 = enable, bit5:0 = voltage */ -+ val = 0xCA; -+ ret = dm_i2c_write(dev, MAX77620_CNFG1_L1_REG, &val, 1); -+ if (ret) -+ printf("i2c_write 0 0x3c 0x25 failed: %d\n", ret); -+ -+ return 0; -+} -+#endif /* PCI */ -+ -+int ft_board_setup(void *fdt, bd_t *bd) -+{ -+ const void *cboot_fdt = (const void *)cboot_boot_x0; -+ uint8_t mac[ETH_ALEN], local_mac[ETH_ALEN]; -+ const char *path; -+ int offset, err; -+ -+ err = cboot_get_ethaddr(cboot_fdt, local_mac); -+ if (err < 0) -+ memset(local_mac, 0, ETH_ALEN); -+ -+ path = fdt_get_alias(fdt, "ethernet"); -+ if (!path) -+ return 0; -+ -+ debug("ethernet alias found: %s\n", path); -+ -+ offset = fdt_path_offset(fdt, path); -+ if (offset < 0) -+ return 0; -+ -+ debug("PCI ethernet device tree node found\n"); -+ -+ if (is_valid_ethaddr(local_mac)) { -+ err = fdt_setprop(fdt, offset, "local-mac-address", local_mac, -+ ETH_ALEN); -+ if (!err) -+ debug("Local MAC address set: %pM\n", local_mac); -+ } -+ -+ if (eth_env_get_enetaddr("ethaddr", mac)) { -+ if (memcmp(local_mac, mac, ETH_ALEN) != 0) { -+ err = fdt_setprop(fdt, offset, "mac-address", mac, -+ ETH_ALEN); -+ if (!err) -+ debug("MAC address set: %pM\n", mac); -+ } -+ } -+ -+ return 0; -+} -diff --git a/board/nvidia/p3450-0000/pinmux-config-p3450-0000.h b/board/nvidia/p3450-0000/pinmux-config-p3450-0000.h -new file mode 100644 -index 000000000000..d491bffccd72 ---- /dev/null -+++ b/board/nvidia/p3450-0000/pinmux-config-p3450-0000.h -@@ -0,0 +1,257 @@ -+/* -+ * Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved. -+ * -+ * SPDX-License-Identifier: GPL-2.0+ -+ */ -+ -+/* -+ * THIS FILE IS AUTO-GENERATED - DO NOT EDIT! -+ * -+ * To generate this file, use the tegra-pinmux-scripts tool available from -+ * https://github.com/NVIDIA/tegra-pinmux-scripts -+ * Run "board-to-uboot.py p3450-0000". -+ */ -+ -+#ifndef _PINMUX_CONFIG_P3450_0000_H_ -+#define _PINMUX_CONFIG_P3450_0000_H_ -+ -+#define GPIO_INIT(_port, _gpio, _init) \ -+ { \ -+ .gpio = TEGRA_GPIO(_port, _gpio), \ -+ .init = TEGRA_GPIO_INIT_##_init, \ -+ } -+ -+static const struct tegra_gpio_config p3450_0000_gpio_inits[] = { -+ /* port, pin, init_val */ -+ GPIO_INIT(A, 5, IN), -+ GPIO_INIT(A, 6, OUT0), -+ GPIO_INIT(B, 4, IN), -+ GPIO_INIT(B, 5, IN), -+ GPIO_INIT(B, 6, IN), -+ GPIO_INIT(B, 7, IN), -+ GPIO_INIT(C, 0, IN), -+ GPIO_INIT(C, 1, IN), -+ GPIO_INIT(C, 2, IN), -+ GPIO_INIT(C, 3, IN), -+ GPIO_INIT(C, 4, IN), -+ GPIO_INIT(E, 6, IN), -+ GPIO_INIT(G, 2, IN), -+ GPIO_INIT(G, 3, IN), -+ GPIO_INIT(H, 0, OUT0), -+ GPIO_INIT(H, 2, IN), -+ GPIO_INIT(H, 3, OUT0), -+ GPIO_INIT(H, 4, OUT0), -+ GPIO_INIT(H, 5, IN), -+ GPIO_INIT(H, 6, IN), -+ GPIO_INIT(H, 7, OUT0), -+ GPIO_INIT(I, 0, OUT0), -+ GPIO_INIT(I, 1, IN), -+ GPIO_INIT(I, 2, OUT0), -+ GPIO_INIT(J, 4, IN), -+ GPIO_INIT(J, 5, IN), -+ GPIO_INIT(J, 6, IN), -+ GPIO_INIT(J, 7, IN), -+ GPIO_INIT(S, 5, IN), -+ GPIO_INIT(S, 7, OUT0), -+ GPIO_INIT(T, 0, OUT0), -+ GPIO_INIT(V, 0, IN), -+ GPIO_INIT(V, 1, IN), -+ GPIO_INIT(X, 3, OUT1), -+ GPIO_INIT(X, 4, IN), -+ GPIO_INIT(X, 5, IN), -+ GPIO_INIT(X, 6, IN), -+ GPIO_INIT(Y, 1, IN), -+ GPIO_INIT(Y, 2, IN), -+ GPIO_INIT(Z, 0, IN), -+ GPIO_INIT(Z, 2, IN), -+ GPIO_INIT(Z, 3, OUT0), -+ GPIO_INIT(BB, 0, IN), -+ GPIO_INIT(CC, 4, IN), -+ GPIO_INIT(DD, 0, IN), -+}; -+ -+#define PINCFG(_pingrp, _mux, _pull, _tri, _io, _od, _e_io_hv) \ -+ { \ -+ .pingrp = PMUX_PINGRP_##_pingrp, \ -+ .func = PMUX_FUNC_##_mux, \ -+ .pull = PMUX_PULL_##_pull, \ -+ .tristate = PMUX_TRI_##_tri, \ -+ .io = PMUX_PIN_##_io, \ -+ .od = PMUX_PIN_OD_##_od, \ -+ .e_io_hv = PMUX_PIN_E_IO_HV_##_e_io_hv, \ -+ .lock = PMUX_PIN_LOCK_DEFAULT, \ -+ } -+ -+static const struct pmux_pingrp_config p3450_0000_pingrps[] = { -+ /* pingrp, mux, pull, tri, e_input, od, e_io_hv */ -+ PINCFG(PEX_L0_RST_N_PA0, PE0, NORMAL, NORMAL, OUTPUT, DISABLE, NORMAL), -+ PINCFG(PEX_L0_CLKREQ_N_PA1, PE0, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), -+ PINCFG(PEX_WAKE_N_PA2, PE, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), -+ PINCFG(PEX_L1_RST_N_PA3, PE1, NORMAL, NORMAL, OUTPUT, DISABLE, NORMAL), -+ PINCFG(PEX_L1_CLKREQ_N_PA4, PE1, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), -+ PINCFG(SATA_LED_ACTIVE_PA5, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(PA6, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(SPI2_MOSI_PB4, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(SPI2_MISO_PB5, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(SPI2_SCK_PB6, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(SPI2_CS0_PB7, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(SPI1_MOSI_PC0, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(SPI1_MISO_PC1, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(SPI1_SCK_PC2, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(SPI1_CS0_PC3, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(SPI1_CS1_PC4, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(SPI4_SCK_PC5, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(SPI4_CS0_PC6, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(SPI4_MOSI_PC7, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(SPI4_MISO_PD0, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(UART3_TX_PD1, UARTC, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(UART3_RX_PD2, UARTC, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(UART3_RTS_PD3, UARTC, UP, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(UART3_CTS_PD4, UARTC, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(DMIC1_CLK_PE0, I2S3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(DMIC1_DAT_PE1, I2S3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(DMIC2_CLK_PE2, I2S3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(DMIC2_DAT_PE3, I2S3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(DMIC3_CLK_PE4, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(DMIC3_DAT_PE5, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(PE6, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(PE7, PWM3, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(GEN3_I2C_SCL_PF0, I2C3, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), -+ PINCFG(GEN3_I2C_SDA_PF1, I2C3, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), -+ PINCFG(UART2_TX_PG0, UARTB, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(UART2_RX_PG1, UARTB, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(UART2_RTS_PG2, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(UART2_CTS_PG3, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(WIFI_EN_PH0, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(WIFI_RST_PH1, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(WIFI_WAKE_AP_PH2, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(AP_WAKE_BT_PH3, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(BT_RST_PH4, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(BT_WAKE_AP_PH5, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(PH6, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(AP_WAKE_NFC_PH7, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(NFC_EN_PI0, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(NFC_INT_PI1, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(GPS_EN_PI2, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(GPS_RST_PI3, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(UART4_TX_PI4, UARTD, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(UART4_RX_PI5, UARTD, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(UART4_RTS_PI6, UARTD, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(UART4_CTS_PI7, UARTD, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(GEN1_I2C_SDA_PJ0, I2C1, NORMAL, NORMAL, INPUT, DISABLE, HIGH), -+ PINCFG(GEN1_I2C_SCL_PJ1, I2C1, NORMAL, NORMAL, INPUT, DISABLE, HIGH), -+ PINCFG(GEN2_I2C_SCL_PJ2, I2C2, NORMAL, NORMAL, INPUT, DISABLE, HIGH), -+ PINCFG(GEN2_I2C_SDA_PJ3, I2C2, NORMAL, NORMAL, INPUT, DISABLE, HIGH), -+ PINCFG(PK0, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(PK1, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(PK2, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(PK3, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(PK4, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(PK5, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(PK6, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(PK7, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(PL0, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(PL1, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(SDMMC1_CLK_PM0, SDMMC1, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(SDMMC1_CMD_PM1, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(SDMMC1_DAT3_PM2, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(SDMMC1_DAT2_PM3, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(SDMMC1_DAT1_PM4, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(SDMMC1_DAT0_PM5, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(SDMMC3_CLK_PP0, SDMMC3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(SDMMC3_CMD_PP1, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(SDMMC3_DAT3_PP2, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(SDMMC3_DAT2_PP3, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(SDMMC3_DAT1_PP4, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(SDMMC3_DAT0_PP5, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(CAM1_MCLK_PS0, EXTPERIPH3, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(CAM2_MCLK_PS1, EXTPERIPH3, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(CAM_I2C_SCL_PS2, I2CVI, NORMAL, NORMAL, INPUT, DISABLE, HIGH), -+ PINCFG(CAM_I2C_SDA_PS3, I2CVI, NORMAL, NORMAL, INPUT, DISABLE, HIGH), -+ PINCFG(CAM_RST_PS4, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(CAM_AF_EN_PS5, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(CAM_FLASH_EN_PS6, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(CAM1_PWDN_PS7, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(CAM2_PWDN_PT0, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(CAM1_STROBE_PT1, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(UART1_TX_PU0, UARTA, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(UART1_RX_PU1, UARTA, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(UART1_RTS_PU2, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(UART1_CTS_PU3, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(LCD_BL_PWM_PV0, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(LCD_BL_EN_PV1, DEFAULT, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(LCD_RST_PV2, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(LCD_GPIO1_PV3, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(LCD_GPIO2_PV4, PWM1, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(AP_READY_PV5, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(TOUCH_RST_PV6, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(TOUCH_CLK_PV7, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(MODEM_WAKE_AP_PX0, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(TOUCH_INT_PX1, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(MOTION_INT_PX2, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(ALS_PROX_INT_PX3, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(TEMP_ALERT_PX4, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(BUTTON_POWER_ON_PX5, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(BUTTON_VOL_UP_PX6, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(BUTTON_VOL_DOWN_PX7, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(BUTTON_SLIDE_SW_PY0, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(BUTTON_HOME_PY1, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(LCD_TE_PY2, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(PWR_I2C_SCL_PY3, I2CPMU, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), -+ PINCFG(PWR_I2C_SDA_PY4, I2CPMU, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), -+ PINCFG(CLK_32K_OUT_PY5, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(PZ0, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(PZ1, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(PZ2, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(PZ3, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(PZ4, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(PZ5, SOC, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(DAP2_FS_PAA0, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(DAP2_SCLK_PAA1, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(DAP2_DIN_PAA2, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(DAP2_DOUT_PAA3, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(AUD_MCLK_PBB0, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(DVFS_PWM_PBB1, CLDVFS, NORMAL, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(DVFS_CLK_PBB2, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(GPIO_X1_AUD_PBB3, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(GPIO_X3_AUD_PBB4, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(HDMI_CEC_PCC0, CEC, NORMAL, NORMAL, INPUT, DISABLE, HIGH), -+ PINCFG(HDMI_INT_DP_HPD_PCC1, DP, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), -+ PINCFG(SPDIF_OUT_PCC2, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(SPDIF_IN_PCC3, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(USB_VBUS_EN0_PCC4, DEFAULT, UP, NORMAL, INPUT, DISABLE, NORMAL), -+ PINCFG(USB_VBUS_EN1_PCC5, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, NORMAL), -+ PINCFG(DP_HPD0_PCC6, DP, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(PCC7, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, NORMAL), -+ PINCFG(SPI2_CS1_PDD0, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(QSPI_SCK_PEE0, QSPI, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(QSPI_CS_N_PEE1, QSPI, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(QSPI_IO0_PEE2, QSPI, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(QSPI_IO1_PEE3, QSPI, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(QSPI_IO2_PEE4, QSPI, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(QSPI_IO3_PEE5, QSPI, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(CORE_PWR_REQ, CORE, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(CPU_PWR_REQ, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(PWR_INT_N, PMI, UP, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(CLK_32K_IN, CLK, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), -+ PINCFG(JTAG_RTCK, JTAG, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(CLK_REQ, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), -+ PINCFG(SHUTDOWN, SHUTDOWN, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), -+}; -+ -+#define DRVCFG(_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) \ -+ { \ -+ .drvgrp = PMUX_DRVGRP_##_drvgrp, \ -+ .slwf = _slwf, \ -+ .slwr = _slwr, \ -+ .drvup = _drvup, \ -+ .drvdn = _drvdn, \ -+ .lpmd = PMUX_LPMD_##_lpmd, \ -+ .schmt = PMUX_SCHMT_##_schmt, \ -+ .hsm = PMUX_HSM_##_hsm, \ -+ } -+ -+static const struct pmux_drvgrp_config p3450_0000_drvgrps[] = { -+}; -+ -+#endif /* PINMUX_CONFIG_P3450_0000_H */ -diff --git a/configs/p3450-0000_defconfig b/configs/p3450-0000_defconfig -new file mode 100644 -index 000000000000..32c2b65a2979 ---- /dev/null -+++ b/configs/p3450-0000_defconfig -@@ -0,0 +1,54 @@ -+CONFIG_ARM=y -+CONFIG_TEGRA=y -+CONFIG_SYS_TEXT_BASE=0x80110000 -+CONFIG_POSITION_INDEPENDENT=y -+CONFIG_TEGRA210=y -+CONFIG_TARGET_P3450_0000=y -+CONFIG_NR_DRAM_BANKS=2 -+CONFIG_OF_SYSTEM_SETUP=y -+CONFIG_OF_BOARD_SETUP=y -+CONFIG_CONSOLE_MUX=y -+CONFIG_SYS_STDIO_DEREGISTER=y -+CONFIG_SYS_PROMPT="Tegra210 (P3450-0000) # " -+# CONFIG_CMD_IMI is not set -+CONFIG_CMD_DFU=y -+# CONFIG_CMD_FLASH is not set -+CONFIG_CMD_GPIO=y -+CONFIG_CMD_I2C=y -+CONFIG_CMD_MMC=y -+CONFIG_CMD_PCI=y -+CONFIG_CMD_SF=y -+CONFIG_CMD_SPI=y -+CONFIG_CMD_USB=y -+CONFIG_CMD_USB_MASS_STORAGE=y -+# CONFIG_CMD_SETEXPR is not set -+# CONFIG_CMD_NFS is not set -+CONFIG_CMD_EXT4_WRITE=y -+CONFIG_OF_LIVE=y -+CONFIG_DEFAULT_DEVICE_TREE="tegra210-p3450-0000" -+CONFIG_DFU_MMC=y -+CONFIG_DFU_RAM=y -+CONFIG_DFU_SF=y -+CONFIG_SYS_I2C_TEGRA=y -+CONFIG_SPI_FLASH=y -+CONFIG_SPI_FLASH_WINBOND=y -+CONFIG_RTL8169=y -+CONFIG_PCI=y -+CONFIG_DM_PCI=y -+CONFIG_DM_PCI_COMPAT=y -+CONFIG_PCI_TEGRA=y -+CONFIG_SYS_NS16550=y -+CONFIG_TEGRA114_SPI=y -+CONFIG_USB=y -+CONFIG_DM_USB=y -+CONFIG_USB_EHCI_HCD=y -+CONFIG_USB_EHCI_TEGRA=y -+CONFIG_USB_GADGET=y -+CONFIG_USB_GADGET_MANUFACTURER="NVIDIA" -+CONFIG_USB_GADGET_VENDOR_NUM=0x0955 -+CONFIG_USB_GADGET_PRODUCT_NUM=0x701a -+CONFIG_CI_UDC=y -+CONFIG_USB_GADGET_DOWNLOAD=y -+CONFIG_USB_HOST_ETHER=y -+CONFIG_USB_ETHER_ASIX=y -+# CONFIG_ENV_IS_IN_MMC is not set -diff --git a/include/configs/p3450-0000.h b/include/configs/p3450-0000.h -new file mode 100644 -index 000000000000..37c71421acbb ---- /dev/null -+++ b/include/configs/p3450-0000.h -@@ -0,0 +1,44 @@ -+/* SPDX-License-Identifier: GPL-2.0+ */ -+/* -+ * (C) Copyright 2018-2019 NVIDIA Corporation. All rights reserved. -+ */ -+ -+#ifndef _P3450_0000_H -+#define _P3450_0000_H -+ -+#include -+ -+#include "tegra210-common.h" -+ -+/* High-level configuration options */ -+#define CONFIG_TEGRA_BOARD_STRING "NVIDIA P3450-0000" -+ -+/* Board-specific serial config */ -+#define CONFIG_TEGRA_ENABLE_UARTA -+ -+/* Only MMC1/PXE/DHCP for now, add USB back in later when supported */ -+#define BOOT_TARGET_DEVICES(func) \ -+ func(MMC, mmc, 0) \ -+ func(PXE, pxe, na) \ -+ func(DHCP, dhcp, na) -+ -+/* SPI */ -+#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 -+#define CONFIG_SF_DEFAULT_SPEED 24000000 -+#define CONFIG_SPI_FLASH_SIZE (4 << 20) -+ -+#define CONFIG_PREBOOT -+ -+#define BOARD_EXTRA_ENV_SETTINGS \ -+ "preboot=if test -e mmc 1:1 /u-boot-preboot.scr; then " \ -+ "load mmc 1:1 ${scriptaddr} /u-boot-preboot.scr; " \ -+ "source ${scriptaddr}; " \ -+ "fi\0" -+ -+#include "tegra-common-usb-gadget.h" -+#include "tegra-common-post.h" -+ -+/* Crystal is 38.4MHz. clk_m runs at half that rate */ -+#define COUNTER_FREQUENCY 19200000 -+ -+#endif /* _P3450_0000_H */ diff --git a/ARM-tegra-Add-support-for-framebuffer-carveouts.patch b/ARM-tegra-Add-support-for-framebuffer-carveouts.patch index 3e1dc09..5672527 100644 --- a/ARM-tegra-Add-support-for-framebuffer-carveouts.patch +++ b/ARM-tegra-Add-support-for-framebuffer-carveouts.patch @@ -1,20 +1,75 @@ -From patchwork Thu Mar 21 18:09:58 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v3,01/13] libfdt: Add phandle generation helper -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1060358 -X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190321181010.27005-2-thierry.reding@gmail.com> -To: Tom Warren , - Simon Glass -Cc: u-boot@lists.denx.de, Stephen Warren -Date: Thu, 21 Mar 2019 19:09:58 +0100 -From: Thierry Reding -List-Id: U-Boot discussion - +From 87409c02ff1cc7249f0fdccbb44c607931cb9bb2 Mon Sep 17 00:00:00 2001 From: Thierry Reding +Date: Fri, 1 Mar 2019 19:20:48 +0100 +Subject: [PATCH 01/12] fdt: Remove duplicate code + +Commit 6d29cc7dcf2d ("fdt: Fixup only valid memory banks") ended up +being merged twice, first as: + + commit 6d29cc7dcf2d35966aa0b6119fd1cbca0d21d5e6 + Author: Thierry Reding + AuthorDate: Tue Jan 30 11:34:17 2018 +0100 + Commit: Simon Glass + CommitDate: Sun Feb 18 12:53:38 2018 -0700 + + fdt: Fixup only valid memory banks + + Memory banks with address 0 and size 0 are empty and should not be + passed to the OS via device tree. + + Signed-off-by: Thierry Reding + Acked-by: Stephen Warren + +and later again, though this time it was v2: + + commit ed5af03f9bb8905f1e94d68ab49f22d7f061d75f + Author: Thierry Reding + AuthorDate: Thu Feb 15 19:05:59 2018 +0100 + Commit: Tom Rini + CommitDate: Fri Feb 23 10:40:50 2018 -0500 + + fdt: Fixup only valid memory banks + + Memory banks with address 0 and size 0 are empty and should not be + passed to the OS via device tree. + + Acked-by: Stephen Warren + Signed-off-by: Thierry Reding + +The second version was slightly different, so the main hunk of the patch +was applied twice. This isn't harmful because the code is idempotent, +but it's wasteful to run the same code twice. + +Signed-off-by: Thierry Reding +Reviewed-by: Simon Glass +--- + common/fdt_support.c | 6 ------ + 1 file changed, 6 deletions(-) + +diff --git a/common/fdt_support.c b/common/fdt_support.c +index 42583e3ed8..ab08a0114f 100644 +--- a/common/fdt_support.c ++++ b/common/fdt_support.c +@@ -456,12 +456,6 @@ int fdt_fixup_memory_banks(void *blob, u64 start[], u64 size[], int banks) + if (!banks) + return 0; + +- for (i = 0; i < banks; i++) +- if (start[i] == 0 && size[i] == 0) +- break; +- +- banks = i; +- + len = fdt_pack_reg(blob, tmp, start, size, banks); + + err = fdt_setprop(blob, nodeoffset, "reg", tmp, len); +-- +2.21.0 + +From abf9afc43916b5e16972bd595d2d34c3abff3613 Mon Sep 17 00:00:00 2001 +From: Thierry Reding +Date: Thu, 21 Mar 2019 19:09:58 +0100 +Subject: [PATCH 02/12] libfdt: Add phandle generation helper The new fdt_generate_phandle() function can be used to generate a new, unused phandle given a specific device tree blob. The implementation is @@ -30,9 +85,6 @@ are indeed unique. Signed-off-by: Thierry Reding Reviewed-by: Simon Glass --- -Changes in v3: -- update to latest upstream commit - lib/libfdt/fdt_ro.c | 31 +++++++++++++++++++++++++++++++ scripts/dtc/libfdt/fdt_ro.c | 31 +++++++++++++++++++++++++++++++ scripts/dtc/libfdt/libfdt.h | 19 +++++++++++++++++++ @@ -40,7 +92,7 @@ Changes in v3: 4 files changed, 82 insertions(+) diff --git a/lib/libfdt/fdt_ro.c b/lib/libfdt/fdt_ro.c -index b6ca4e0b0c30..693de9aa5ad8 100644 +index b6ca4e0b0c..693de9aa5a 100644 --- a/lib/libfdt/fdt_ro.c +++ b/lib/libfdt/fdt_ro.c @@ -73,6 +73,37 @@ uint32_t fdt_get_max_phandle(const void *fdt) @@ -82,7 +134,7 @@ index b6ca4e0b0c30..693de9aa5ad8 100644 { FDT_CHECK_HEADER(fdt); diff --git a/scripts/dtc/libfdt/fdt_ro.c b/scripts/dtc/libfdt/fdt_ro.c -index dfb3236da388..dc499884e4d1 100644 +index dfb3236da3..dc499884e4 100644 --- a/scripts/dtc/libfdt/fdt_ro.c +++ b/scripts/dtc/libfdt/fdt_ro.c @@ -115,6 +115,37 @@ uint32_t fdt_get_max_phandle(const void *fdt) @@ -124,7 +176,7 @@ index dfb3236da388..dc499884e4d1 100644 { FDT_CHECK_HEADER(fdt); diff --git a/scripts/dtc/libfdt/libfdt.h b/scripts/dtc/libfdt/libfdt.h -index fd73688f9e9f..cf86ddba8811 100644 +index fd73688f9e..cf86ddba88 100644 --- a/scripts/dtc/libfdt/libfdt.h +++ b/scripts/dtc/libfdt/libfdt.h @@ -139,6 +139,10 @@ @@ -161,7 +213,7 @@ index fd73688f9e9f..cf86ddba8811 100644 * fdt_num_mem_rsv - retrieve the number of memory reserve map entries * @fdt: pointer to the device tree blob diff --git a/scripts/dtc/libfdt/libfdt_env.h b/scripts/dtc/libfdt/libfdt_env.h -index bd2474628775..3ff9e2863075 100644 +index bd24746287..3ff9e28630 100644 --- a/scripts/dtc/libfdt/libfdt_env.h +++ b/scripts/dtc/libfdt/libfdt_env.h @@ -52,6 +52,7 @@ @@ -172,24 +224,13 @@ index bd2474628775..3ff9e2863075 100644 #include #include #include +-- +2.21.0 -From patchwork Thu Mar 21 18:09:59 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v3,02/13] fdtdec: Add cpu_to_fdt_{addr, size}() macros -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1060376 -X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190321181010.27005-3-thierry.reding@gmail.com> -To: Tom Warren , - Simon Glass -Cc: u-boot@lists.denx.de, Stephen Warren -Date: Thu, 21 Mar 2019 19:09:59 +0100 -From: Thierry Reding -List-Id: U-Boot discussion - +From 57d9e1ba51831b787ac114c8b5ab17cc44a22977 Mon Sep 17 00:00:00 2001 From: Thierry Reding +Date: Thu, 21 Mar 2019 19:09:59 +0100 +Subject: [PATCH 03/12] fdtdec: Add cpu_to_fdt_{addr, size}() macros These macros are useful for converting the endianness of variables of type fdt_addr_t and fdt_size_t. @@ -197,14 +238,11 @@ type fdt_addr_t and fdt_size_t. Reviewed-by: Simon Glass Signed-off-by: Thierry Reding --- -Changes in v2: -- add Reviewed-by from Simon - include/fdtdec.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/include/fdtdec.h b/include/fdtdec.h -index b7e35cd87c55..a965c33157c9 100644 +index b7e35cd87c..a965c33157 100644 --- a/include/fdtdec.h +++ b/include/fdtdec.h @@ -27,11 +27,15 @@ typedef phys_size_t fdt_size_t; @@ -223,24 +261,13 @@ index b7e35cd87c55..a965c33157c9 100644 typedef fdt32_t fdt_val_t; #endif +-- +2.21.0 -From patchwork Thu Mar 21 18:10:00 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v3,03/13] fdtdec: Add fdt_{addr, size}_unpack() helpers -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1060360 -X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190321181010.27005-4-thierry.reding@gmail.com> -To: Tom Warren , - Simon Glass -Cc: u-boot@lists.denx.de, Stephen Warren -Date: Thu, 21 Mar 2019 19:10:00 +0100 -From: Thierry Reding -List-Id: U-Boot discussion - +From 30086fd2012b1f00cc1d4d11e962634236277d17 Mon Sep 17 00:00:00 2001 From: Thierry Reding +Date: Thu, 21 Mar 2019 19:10:00 +0100 +Subject: [PATCH 04/12] fdtdec: Add fdt_{addr, size}_unpack() helpers These helpers can be used to unpack variables of type fdt_addr_t and fdt_size_t into a pair of 32-bit variables. This is useful in cases @@ -249,14 +276,11 @@ of a device tree node where they need to be split into cells. Signed-off-by: Thierry Reding --- -Changes in v2: -- new patch - include/fdtdec.h | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/include/fdtdec.h b/include/fdtdec.h -index a965c33157c9..a0ba57c6318b 100644 +index a965c33157..a0ba57c631 100644 --- a/include/fdtdec.h +++ b/include/fdtdec.h @@ -23,6 +23,31 @@ @@ -291,38 +315,24 @@ index a965c33157c9..a0ba57c6318b 100644 #ifdef CONFIG_PHYS_64BIT #define FDT_ADDR_T_NONE (-1U) #define fdt_addr_to_cpu(reg) be64_to_cpu(reg) +-- +2.21.0 -From patchwork Thu Mar 21 18:10:01 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v3,04/13] fdtdec: Implement fdtdec_set_phandle() -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1060366 -X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190321181010.27005-5-thierry.reding@gmail.com> -To: Tom Warren , - Simon Glass -Cc: u-boot@lists.denx.de, Stephen Warren -Date: Thu, 21 Mar 2019 19:10:01 +0100 -From: Thierry Reding -List-Id: U-Boot discussion - +From 33c157fbae9cf088c8374543daf012487e3d3c07 Mon Sep 17 00:00:00 2001 From: Thierry Reding +Date: Thu, 21 Mar 2019 19:10:01 +0100 +Subject: [PATCH 05/12] fdtdec: Implement fdtdec_set_phandle() This function can be used to set a phandle for a given node. Signed-off-by: Thierry Reding --- -Changes in v2: -- don't emit deprecated linux,phandle property - include/fdtdec.h | 11 +++++++++++ lib/fdtdec.c | 7 +++++++ 2 files changed, 18 insertions(+) diff --git a/include/fdtdec.h b/include/fdtdec.h -index a0ba57c6318b..55600026c488 100644 +index a0ba57c631..55600026c4 100644 --- a/include/fdtdec.h +++ b/include/fdtdec.h @@ -981,6 +981,17 @@ int fdtdec_setup_mem_size_base(void); @@ -344,7 +354,7 @@ index a0ba57c6318b..55600026c488 100644 * Set up the device tree ready for use */ diff --git a/lib/fdtdec.c b/lib/fdtdec.c -index 09a7e133a539..00db90e3cdfd 100644 +index 09a7e133a5..00db90e3cd 100644 --- a/lib/fdtdec.c +++ b/lib/fdtdec.c @@ -1243,6 +1243,13 @@ __weak void *board_fdt_blob_setup(void) @@ -361,43 +371,19 @@ index 09a7e133a539..00db90e3cdfd 100644 int fdtdec_setup(void) { #if CONFIG_IS_ENABLED(OF_CONTROL) +-- +2.21.0 -From patchwork Thu Mar 21 18:10:02 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v3,05/13] fdtdec: Implement fdtdec_add_reserved_memory() -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1060362 -X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190321181010.27005-6-thierry.reding@gmail.com> -To: Tom Warren , - Simon Glass -Cc: u-boot@lists.denx.de, Stephen Warren -Date: Thu, 21 Mar 2019 19:10:02 +0100 -From: Thierry Reding -List-Id: U-Boot discussion - +From 9c2ed8c44b3d62e01e2885f0e2b077407bf6056b Mon Sep 17 00:00:00 2001 From: Thierry Reding +Date: Thu, 21 Mar 2019 19:10:02 +0100 +Subject: [PATCH 06/12] fdtdec: Implement fdtdec_add_reserved_memory() This function can be used to add subnodes in the /reserved-memory node. Reviewed-by: Simon Glass Signed-off-by: Thierry Reding --- -Changes in v3: -- use fdt_generate_phandle() instead of fdtdec_generate_phandle() -- add device tree bindings for /reserved-memory -- add examples to code comments - -Changes in v2: -- split fdt_{addr,size}_unpack() helpers into separate patch -- use name@x,y notation only if the upper cell is > 0 -- use debug() instead of printf() to save code size -- properly compute number of cells in reg property -- fix carveout size computations, was off by one -- use #size-cells where appropriate - .../reserved-memory/reserved-memory.txt | 136 ++++++++++++++++++ include/fdtdec.h | 48 +++++++ lib/fdtdec.c | 131 +++++++++++++++++ @@ -406,7 +392,7 @@ Changes in v2: diff --git a/Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt b/Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt new file mode 100644 -index 000000000000..bac4afa3b197 +index 0000000000..bac4afa3b1 --- /dev/null +++ b/Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt @@ -0,0 +1,136 @@ @@ -547,7 +533,7 @@ index 000000000000..bac4afa3b197 + }; +}; diff --git a/include/fdtdec.h b/include/fdtdec.h -index 55600026c488..b54ed38fb362 100644 +index 55600026c4..b54ed38fb3 100644 --- a/include/fdtdec.h +++ b/include/fdtdec.h @@ -992,6 +992,54 @@ int fdtdec_setup_memory_banksize(void); @@ -606,7 +592,7 @@ index 55600026c488..b54ed38fb362 100644 * Set up the device tree ready for use */ diff --git a/lib/fdtdec.c b/lib/fdtdec.c -index 00db90e3cdfd..be54ad5bd092 100644 +index 00db90e3cd..be54ad5bd0 100644 --- a/lib/fdtdec.c +++ b/lib/fdtdec.c @@ -1250,6 +1250,137 @@ int fdtdec_set_phandle(void *blob, int node, uint32_t phandle) @@ -747,24 +733,13 @@ index 00db90e3cdfd..be54ad5bd092 100644 int fdtdec_setup(void) { #if CONFIG_IS_ENABLED(OF_CONTROL) +-- +2.21.0 -From patchwork Thu Mar 21 18:10:03 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v3,06/13] fdtdec: Implement carveout support functions -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1060373 -X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190321181010.27005-7-thierry.reding@gmail.com> -To: Tom Warren , - Simon Glass -Cc: u-boot@lists.denx.de, Stephen Warren -Date: Thu, 21 Mar 2019 19:10:03 +0100 -From: Thierry Reding -List-Id: U-Boot discussion - +From 58eb0f1af300064b91809e52d96479fd02ce9091 Mon Sep 17 00:00:00 2001 From: Thierry Reding +Date: Thu, 21 Mar 2019 19:10:03 +0100 +Subject: [PATCH 07/12] fdtdec: Implement carveout support functions The fdtdec_get_carveout() and fdtdec_set_carveout() function can be used to read a carveout from a given node or add a carveout to a given node @@ -774,20 +749,12 @@ and the memory-region property). Reviewed-by: Simon Glass Signed-off-by: Thierry Reding --- -Changes in v3: -- add examples to code comments - -Changes in v2: -- use debug() instead of printf() to save code size -- fix carveout size computations, was off by one -- use fdtdec_get_addr_size_auto_noparent() - include/fdtdec.h | 81 ++++++++++++++++++++++++++++++++++++++++++++ lib/fdtdec.c | 87 ++++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 168 insertions(+) diff --git a/include/fdtdec.h b/include/fdtdec.h -index b54ed38fb362..13b743f59ab1 100644 +index b54ed38fb3..13b743f59a 100644 --- a/include/fdtdec.h +++ b/include/fdtdec.h @@ -1030,6 +1030,8 @@ int fdtdec_set_phandle(void *blob, int node, uint32_t phandle); @@ -886,7 +853,7 @@ index b54ed38fb362..13b743f59ab1 100644 * Set up the device tree ready for use */ diff --git a/lib/fdtdec.c b/lib/fdtdec.c -index be54ad5bd092..bd05ab90fce1 100644 +index be54ad5bd0..bd05ab90fc 100644 --- a/lib/fdtdec.c +++ b/lib/fdtdec.c @@ -1381,6 +1381,93 @@ int fdtdec_add_reserved_memory(void *blob, const char *basename, @@ -983,24 +950,13 @@ index be54ad5bd092..bd05ab90fce1 100644 int fdtdec_setup(void) { #if CONFIG_IS_ENABLED(OF_CONTROL) +-- +2.21.0 -From patchwork Thu Mar 21 18:10:04 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v3,07/13] fdtdec: Add Kconfig symbol for tests -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1060374 -X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190321181010.27005-8-thierry.reding@gmail.com> -To: Tom Warren , - Simon Glass -Cc: u-boot@lists.denx.de, Stephen Warren -Date: Thu, 21 Mar 2019 19:10:04 +0100 -From: Thierry Reding -List-Id: U-Boot discussion - +From 1c1d7d2d6d85003ac2df657588a2c5a78f7db8ad Mon Sep 17 00:00:00 2001 From: Thierry Reding +Date: Thu, 21 Mar 2019 19:10:04 +0100 +Subject: [PATCH 08/12] fdtdec: Add Kconfig symbol for tests Runtime tests are provided as a test_fdtdec command implementation. Add a Kconfig symbol that allows this command to be built so that the tests @@ -1009,14 +965,11 @@ can be used. Signed-off-by: Thierry Reding Reviewed-by: Simon Glass --- -Changes in v2: -- new patch - lib/Kconfig | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/lib/Kconfig b/lib/Kconfig -index 366d164cd760..b1fccf7e8dff 100644 +index 366d164cd7..b1fccf7e8d 100644 --- a/lib/Kconfig +++ b/lib/Kconfig @@ -423,4 +423,8 @@ source lib/efi/Kconfig @@ -1028,24 +981,13 @@ index 366d164cd760..b1fccf7e8dff 100644 + depends on OF_LIBFDT + endmenu +-- +2.21.0 -From patchwork Thu Mar 21 18:10:05 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v3,08/13] fdtdec: test: Fix build warning -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1060368 -X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190321181010.27005-9-thierry.reding@gmail.com> -To: Tom Warren , - Simon Glass -Cc: u-boot@lists.denx.de, Stephen Warren -Date: Thu, 21 Mar 2019 19:10:05 +0100 -From: Thierry Reding -List-Id: U-Boot discussion - +From aa6715267b997d800b7934ce14cf4e5cc6f9bcf9 Mon Sep 17 00:00:00 2001 From: Thierry Reding +Date: Thu, 21 Mar 2019 19:10:05 +0100 +Subject: [PATCH 09/12] fdtdec: test: Fix build warning Hide the declaration of the "fd" variable When not building a DEBUG configuration, to avoid the variable being unused. @@ -1053,14 +995,11 @@ configuration, to avoid the variable being unused. Signed-off-by: Thierry Reding Reviewed-by: Simon Glass --- -Changes in v2: -- new patch - lib/fdtdec_test.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/lib/fdtdec_test.c b/lib/fdtdec_test.c -index a82e27de942f..065fed278cf3 100644 +index a82e27de94..065fed278c 100644 --- a/lib/fdtdec_test.c +++ b/lib/fdtdec_test.c @@ -79,7 +79,9 @@ static int make_fdt(void *fdt, int size, const char *aliases, @@ -1073,24 +1012,13 @@ index a82e27de942f..065fed278cf3 100644 CHECK(fdt_create(fdt, size)); CHECK(fdt_finish_reservemap(fdt)); +-- +2.21.0 -From patchwork Thu Mar 21 18:10:06 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v3,09/13] fdtdec: test: Use compound statement macros -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1060361 -X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190321181010.27005-10-thierry.reding@gmail.com> -To: Tom Warren , - Simon Glass -Cc: u-boot@lists.denx.de, Stephen Warren -Date: Thu, 21 Mar 2019 19:10:06 +0100 -From: Thierry Reding -List-Id: U-Boot discussion - +From 952f7a32bc2249e28e0dc08890d663a3b55f74b8 Mon Sep 17 00:00:00 2001 From: Thierry Reding +Date: Thu, 21 Mar 2019 19:10:06 +0100 +Subject: [PATCH 10/12] fdtdec: test: Use compound statement macros This eliminates the need for intermediate helper functions and allow the macros to return a value so that it can be used subsequently. @@ -1098,14 +1026,11 @@ macros to return a value so that it can be used subsequently. Signed-off-by: Thierry Reding Reviewed-by: Simon Glass --- -Changes in v2: -- new patch - lib/fdtdec_test.c | 64 ++++++++++++++++------------------------------- 1 file changed, 22 insertions(+), 42 deletions(-) diff --git a/lib/fdtdec_test.c b/lib/fdtdec_test.c -index 065fed278cf3..928950918413 100644 +index 065fed278c..9289509184 100644 --- a/lib/fdtdec_test.c +++ b/lib/fdtdec_test.c @@ -15,48 +15,28 @@ @@ -1187,38 +1112,24 @@ index 065fed278cf3..928950918413 100644 /* Check we got the right ones */ for (i = 0, s = expect; *s; s++, i++) { +-- +2.21.0 -From patchwork Thu Mar 21 18:10:07 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v3,10/13] fdtdec: test: Add carveout tests -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1060375 -X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190321181010.27005-11-thierry.reding@gmail.com> -To: Tom Warren , - Simon Glass -Cc: u-boot@lists.denx.de, Stephen Warren -Date: Thu, 21 Mar 2019 19:10:07 +0100 -From: Thierry Reding -List-Id: U-Boot discussion - +From cd380b7093b9a342244a1cd732621cb960bc1668 Mon Sep 17 00:00:00 2001 From: Thierry Reding +Date: Thu, 21 Mar 2019 19:10:07 +0100 +Subject: [PATCH 11/12] fdtdec: test: Add carveout tests Implement carveout tests for 32-bit and 64-bit builds. Signed-off-by: Thierry Reding Reviewed-by: Simon Glass --- -Changes in v2: -- new patch - lib/fdtdec_test.c | 152 ++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 152 insertions(+) diff --git a/lib/fdtdec_test.c b/lib/fdtdec_test.c -index 928950918413..f6defe16c5a6 100644 +index 9289509184..f6defe16c5 100644 --- a/lib/fdtdec_test.c +++ b/lib/fdtdec_test.c @@ -141,6 +141,156 @@ static int run_test(const char *aliases, const char *nodes, const char *expect) @@ -1387,24 +1298,13 @@ index 928950918413..f6defe16c5a6 100644 printf("Test passed\n"); return 0; } +-- +2.21.0 -From patchwork Thu Mar 21 18:10:08 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v3,11/13] sandbox: Enable fdtdec tests -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1060364 -X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190321181010.27005-12-thierry.reding@gmail.com> -To: Tom Warren , - Simon Glass -Cc: u-boot@lists.denx.de, Stephen Warren -Date: Thu, 21 Mar 2019 19:10:08 +0100 -From: Thierry Reding -List-Id: U-Boot discussion - +From ac9681d2d1fa09977106a32c1e2194c7bc6b5c80 Mon Sep 17 00:00:00 2001 From: Thierry Reding +Date: Thu, 21 Mar 2019 19:10:08 +0100 +Subject: [PATCH 12/12] sandbox: Enable fdtdec tests Enable fdtdec tests on sandbox configurations so that they can be run to validate the fdtdec implementation. @@ -1412,15 +1312,12 @@ validate the fdtdec implementation. Signed-off-by: Thierry Reding Reviewed-by: Simon Glass --- -Changes in v2: -- new patch - configs/sandbox64_defconfig | 1 + configs/sandbox_defconfig | 1 + 2 files changed, 2 insertions(+) diff --git a/configs/sandbox64_defconfig b/configs/sandbox64_defconfig -index da4bdced3105..c04ecd915ae7 100644 +index da4bdced31..c04ecd915a 100644 --- a/configs/sandbox64_defconfig +++ b/configs/sandbox64_defconfig @@ -194,6 +194,7 @@ CONFIG_CMD_DHRYSTONE=y @@ -1432,7 +1329,7 @@ index da4bdced3105..c04ecd915ae7 100644 CONFIG_UT_TIME=y CONFIG_UT_DM=y diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig -index 193e41896cb7..bb508a8d02e2 100644 +index 193e41896c..bb508a8d02 100644 --- a/configs/sandbox_defconfig +++ b/configs/sandbox_defconfig @@ -215,6 +215,7 @@ CONFIG_CMD_DHRYSTONE=y @@ -1443,243 +1340,193 @@ index 193e41896cb7..bb508a8d02e2 100644 CONFIG_UNIT_TEST=y CONFIG_UT_TIME=y CONFIG_UT_DM=y +-- +2.21.0 -From patchwork Thu Mar 21 18:10:09 2019 +From patchwork Mon Apr 15 08:08:20 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v3,12/13] p2371-2180: Add support for framebuffer carveouts +Subject: [U-Boot,1/2] fdtdec: Use fdt_setprop_u32() for fdtdec_set_phandle() X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1060367 -X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190321181010.27005-13-thierry.reding@gmail.com> -To: Tom Warren , - Simon Glass -Cc: u-boot@lists.denx.de, Stephen Warren -Date: Thu, 21 Mar 2019 19:10:09 +0100 +X-Patchwork-Id: 1085479 +X-Patchwork-Delegate: sjg@chromium.org +Message-Id: <20190415080821.441-1-thierry.reding@gmail.com> +To: Simon Glass +Cc: u-boot@lists.denx.de +Date: Mon, 15 Apr 2019 10:08:20 +0200 From: Thierry Reding List-Id: U-Boot discussion From: Thierry Reding -If early firmware initialized the display hardware and the display -controllers are scanning out a framebuffer (e.g. a splash screen), make -sure to pass information about the memory location of that framebuffer -to the kernel before booting to avoid the kernel from using that memory -for the buddy allocator. - -This same mechanism can also be used in the kernel to set up early SMMU -mappings and avoid SMMU faults caused by the display controller reading -from memory for which it has no mapping. +The fdt_setprop_u32() function does everything that we need, so we +really only use the function as a convenience wrapper, in which case it +can simply be a static inline function. Signed-off-by: Thierry Reding -Reviewed-by: Simon Glass --- - board/nvidia/p2371-2180/p2371-2180.c | 47 ++++++++++++++++++++++++++++ - 1 file changed, 47 insertions(+) + include/fdtdec.h | 5 ++++- + lib/fdtdec.c | 7 ------- + 2 files changed, 4 insertions(+), 8 deletions(-) -diff --git a/board/nvidia/p2371-2180/p2371-2180.c b/board/nvidia/p2371-2180/p2371-2180.c -index a444d692d7ea..4985302d6bc2 100644 ---- a/board/nvidia/p2371-2180/p2371-2180.c -+++ b/board/nvidia/p2371-2180/p2371-2180.c -@@ -6,6 +6,7 @@ - - #include - #include -+#include - #include - #include - #include -@@ -138,9 +139,55 @@ static void ft_mac_address_setup(void *fdt) - } - } - -+static int ft_copy_carveout(void *dst, const void *src, const char *node) +diff --git a/include/fdtdec.h b/include/fdtdec.h +index 266c58271f0b..110aa6ab6dea 100644 +--- a/include/fdtdec.h ++++ b/include/fdtdec.h +@@ -1029,7 +1029,10 @@ int fdtdec_setup_memory_banksize(void); + * @param phandle phandle to set for the given node + * @return 0 on success or a negative error code on failure + */ +-int fdtdec_set_phandle(void *blob, int node, uint32_t phandle); ++static inline int fdtdec_set_phandle(void *blob, int node, uint32_t phandle) +{ -+ struct fdt_memory fb; -+ int err; -+ -+ err = fdtdec_get_carveout(src, node, "memory-region", 0, &fb); -+ if (err < 0) { -+ if (err != -FDT_ERR_NOTFOUND) -+ printf("failed to get carveout for %s: %d\n", node, -+ err); -+ -+ return err; -+ } -+ -+ err = fdtdec_set_carveout(dst, node, "memory-region", 0, "framebuffer", -+ &fb); -+ if (err < 0) { -+ printf("failed to set carveout for %s: %d\n", node, err); -+ return err; -+ } -+ -+ return 0; ++ return fdt_setprop_u32(blob, node, "phandle", phandle); +} -+ -+static void ft_carveout_setup(void *fdt) -+{ -+ const void *cboot_fdt = (const void *)cboot_boot_x0; -+ static const char * const nodes[] = { -+ "/host1x@50000000/dc@54200000", -+ "/host1x@50000000/dc@54240000", -+ }; -+ unsigned int i; -+ int err; -+ -+ for (i = 0; i < ARRAY_SIZE(nodes); i++) { -+ err = ft_copy_carveout(fdt, cboot_fdt, nodes[i]); -+ if (err < 0) { -+ if (err != -FDT_ERR_NOTFOUND) -+ printf("failed to copy carveout for %s: %d\n", -+ nodes[i], err); -+ continue; -+ } -+ } -+} -+ - int ft_board_setup(void *fdt, bd_t *bd) - { - ft_mac_address_setup(fdt); -+ ft_carveout_setup(fdt); - return 0; - } - -From patchwork Thu Mar 21 18:10:10 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v3,13/13] p2771-0000: Add support for framebuffer carveouts -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1060363 -X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190321181010.27005-14-thierry.reding@gmail.com> -To: Tom Warren , - Simon Glass -Cc: u-boot@lists.denx.de, Stephen Warren -Date: Thu, 21 Mar 2019 19:10:10 +0100 -From: Thierry Reding -List-Id: U-Boot discussion - -From: Thierry Reding - -If early firmware initialized the display hardware and the display -controllers are scanning out a framebuffer (e.g. a splash screen), make -sure to pass information about the memory location of that framebuffer -to the kernel before booting to avoid the kernel from using that memory -for the buddy allocator. - -This same mechanism can also be used in the kernel to set up early SMMU -mappings and avoid SMMU faults caused by the display controller reading -from memory for which it has no mapping. - -Signed-off-by: Thierry Reding -Reviewed-by: Simon Glass ---- - board/nvidia/p2771-0000/p2771-0000.c | 66 ++++++++++++++++++++++++++-- - 1 file changed, 62 insertions(+), 4 deletions(-) - -diff --git a/board/nvidia/p2771-0000/p2771-0000.c b/board/nvidia/p2771-0000/p2771-0000.c -index fe22067f6571..d294c7ae0136 100644 ---- a/board/nvidia/p2771-0000/p2771-0000.c -+++ b/board/nvidia/p2771-0000/p2771-0000.c -@@ -5,6 +5,7 @@ - - #include - #include -+#include - #include - #include - #include -@@ -56,7 +57,7 @@ int tegra_pcie_board_init(void) + /** + * fdtdec_add_reserved_memory() - add or find a reserved-memory node +diff --git a/lib/fdtdec.c b/lib/fdtdec.c +index 9c9c30234732..fea44a9a8c65 100644 +--- a/lib/fdtdec.c ++++ b/lib/fdtdec.c +@@ -1261,13 +1261,6 @@ __weak void *board_fdt_blob_setup(void) } #endif --int ft_board_setup(void *fdt, bd_t *bd) -+static void ft_mac_address_setup(void *fdt) +-int fdtdec_set_phandle(void *blob, int node, uint32_t phandle) +-{ +- fdt32_t value = cpu_to_fdt32(phandle); +- +- return fdt_setprop(blob, node, "phandle", &value, sizeof(value)); +-} +- + static int fdtdec_init_reserved_memory(void *blob) { - const void *cboot_fdt = (const void *)cboot_boot_x0; - uint8_t mac[ETH_ALEN], local_mac[ETH_ALEN]; -@@ -69,13 +70,15 @@ int ft_board_setup(void *fdt, bd_t *bd) + int na, ns, node, err; + +From patchwork Mon Apr 15 08:08:21 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot,2/2] fdtdec: Remove fdt_{addr,size}_unpack() +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1085480 +X-Patchwork-Delegate: sjg@chromium.org +Message-Id: <20190415080821.441-2-thierry.reding@gmail.com> +To: Simon Glass +Cc: u-boot@lists.denx.de +Date: Mon, 15 Apr 2019 10:08:21 +0200 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +U-Boot already defines the {upper,lower}_32_bits() macros that have the +same purpose. Use the existing macros instead of defining new APIs. + +Signed-off-by: Thierry Reding +--- + include/fdtdec.h | 24 ------------------------ + lib/fdtdec.c | 8 ++++++-- + lib/fdtdec_test.c | 8 ++++++-- + 3 files changed, 12 insertions(+), 28 deletions(-) + +diff --git a/include/fdtdec.h b/include/fdtdec.h +index 110aa6ab6dea..fa8e34f6f960 100644 +--- a/include/fdtdec.h ++++ b/include/fdtdec.h +@@ -24,30 +24,6 @@ + typedef phys_addr_t fdt_addr_t; + typedef phys_size_t fdt_size_t; - path = fdt_get_alias(fdt, "ethernet"); - if (!path) -- return 0; -+ return; +-static inline fdt32_t fdt_addr_unpack(fdt_addr_t addr, fdt32_t *upper) +-{ +- if (upper) +-#ifdef CONFIG_PHYS_64BIT +- *upper = addr >> 32; +-#else +- *upper = 0; +-#endif +- +- return addr; +-} +- +-static inline fdt32_t fdt_size_unpack(fdt_size_t size, fdt32_t *upper) +-{ +- if (upper) +-#ifdef CONFIG_PHYS_64BIT +- *upper = size >> 32; +-#else +- *upper = 0; +-#endif +- +- return size; +-} +- + #ifdef CONFIG_PHYS_64BIT + #define FDT_ADDR_T_NONE (-1U) + #define fdt_addr_to_cpu(reg) be64_to_cpu(reg) +diff --git a/lib/fdtdec.c b/lib/fdtdec.c +index fea44a9a8c65..d0ba88897335 100644 +--- a/lib/fdtdec.c ++++ b/lib/fdtdec.c +@@ -1300,6 +1300,7 @@ int fdtdec_add_reserved_memory(void *blob, const char *basename, + fdt32_t cells[4] = {}, *ptr = cells; + uint32_t upper, lower, phandle; + int parent, node, na, ns, err; ++ fdt_size_t size; + char name[64]; - debug("ethernet alias found: %s\n", path); + /* create an empty /reserved-memory node if one doesn't exist */ +@@ -1340,7 +1341,8 @@ int fdtdec_add_reserved_memory(void *blob, const char *basename, + * Unpack the start address and generate the name of the new node + * base on the basename and the unit-address. + */ +- lower = fdt_addr_unpack(carveout->start, &upper); ++ upper = upper_32_bits(carveout->start); ++ lower = lower_32_bits(carveout->start); - offset = fdt_path_offset(fdt, path); -- if (offset < 0) -- return 0; -+ if (offset < 0) { -+ printf("ethernet alias points to absent node %s\n", path); -+ return; -+ } + if (na > 1 && upper > 0) + snprintf(name, sizeof(name), "%s@%x,%x", basename, upper, +@@ -1374,7 +1376,9 @@ int fdtdec_add_reserved_memory(void *blob, const char *basename, + *ptr++ = cpu_to_fdt32(lower); - if (is_valid_ethaddr(local_mac)) { - err = fdt_setprop(fdt, offset, "local-mac-address", local_mac, -@@ -92,6 +95,61 @@ int ft_board_setup(void *fdt, bd_t *bd) - debug("MAC address set: %pM\n", mac); - } - } -+} -+ -+static int ft_copy_carveout(void *dst, const void *src, const char *node) -+{ -+ struct fdt_memory fb; -+ int err; -+ -+ err = fdtdec_get_carveout(src, node, "memory-region", 0, &fb); -+ if (err < 0) { -+ if (err != -FDT_ERR_NOTFOUND) -+ printf("failed to get carveout for %s: %d\n", node, -+ err); -+ -+ return err; -+ } -+ -+ err = fdtdec_set_carveout(dst, node, "memory-region", 0, "framebuffer", -+ &fb); -+ if (err < 0) { -+ printf("failed to set carveout for %s: %d\n", node, err); -+ return err; -+ } -+ -+ return 0; -+} -+ -+static void ft_carveout_setup(void *fdt) -+{ -+ const void *cboot_fdt = (const void *)cboot_boot_x0; -+ static const char * const nodes[] = { -+ "/host1x@13e00000/display-hub@15200000/display@15200000", -+ "/host1x@13e00000/display-hub@15200000/display@15210000", -+ "/host1x@13e00000/display-hub@15200000/display@15220000", -+ }; -+ unsigned int i; -+ int err; -+ -+ for (i = 0; i < ARRAY_SIZE(nodes); i++) { -+ printf("copying carveout for %s...\n", nodes[i]); -+ -+ err = ft_copy_carveout(fdt, cboot_fdt, nodes[i]); -+ if (err < 0) { -+ if (err != -FDT_ERR_NOTFOUND) -+ printf("failed to copy carveout for %s: %d\n", -+ nodes[i], err); -+ -+ continue; -+ } -+ } -+} -+ -+int ft_board_setup(void *fdt, bd_t *bd) -+{ -+ ft_mac_address_setup(fdt); -+ ft_carveout_setup(fdt); + /* store one or two size cells */ +- lower = fdt_size_unpack(carveout->end - carveout->start + 1, &upper); ++ size = carveout->end - carveout->start + 1; ++ upper = upper_32_bits(size); ++ lower = lower_32_bits(size); - return 0; - } + if (ns > 1) + *ptr++ = cpu_to_fdt32(upper); +diff --git a/lib/fdtdec_test.c b/lib/fdtdec_test.c +index f6defe16c5a6..1f4f27054057 100644 +--- a/lib/fdtdec_test.c ++++ b/lib/fdtdec_test.c +@@ -155,11 +155,13 @@ static int make_fdt_carveout_device(void *fdt, uint32_t na, uint32_t ns) + }; + fdt32_t cells[4], *ptr = cells; + uint32_t upper, lower; ++ fdt_size_t size; + char name[32]; + int offset; + + /* store one or two address cells */ +- lower = fdt_addr_unpack(carveout.start, &upper); ++ upper = upper_32_bits(carveout.start); ++ lower = lower_32_bits(carveout.start); + + if (na > 1 && upper > 0) + snprintf(name, sizeof(name), "%s@%x,%x", basename, upper, +@@ -173,7 +175,9 @@ static int make_fdt_carveout_device(void *fdt, uint32_t na, uint32_t ns) + *ptr++ = cpu_to_fdt32(lower); + + /* store one or two size cells */ +- lower = fdt_size_unpack(carveout.end - carveout.start + 1, &upper); ++ size = carveout.end - carveout.start + 1; ++ upper = upper_32_bits(size); ++ lower = lower_32_bits(size); + + if (ns > 1) + *ptr++ = cpu_to_fdt32(upper); diff --git a/ARM-tegra-Miscellaneous-improvements.patch b/ARM-tegra-Miscellaneous-improvements.patch index f65ecd8..03d2da9 100644 --- a/ARM-tegra-Miscellaneous-improvements.patch +++ b/ARM-tegra-Miscellaneous-improvements.patch @@ -1,16 +1,303 @@ -From patchwork Thu Apr 4 11:59:24 2019 +From patchwork Mon Apr 15 09:32:13 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v4,01/19] ARM: tegra: Use common header for PMU declarations +Subject: [U-Boot,v5,01/27] fdtdec: Add fdtdec_set_ethernet_mac_address() X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1077183 +X-Patchwork-Id: 1085515 X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190404115942.17947-2-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de, Stephen Warren , - Jonathan Hunter -Date: Thu, 4 Apr 2019 13:59:24 +0200 +Message-Id: <20190415093239.27509-2-thierry.reding@gmail.com> +To: Tom Warren , + Simon Glass +Cc: u-boot@lists.denx.de, Jon Hunter +Date: Mon, 15 Apr 2019 11:32:13 +0200 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +This function can be used to set the local MAC address for the default +Ethernet interface in its device tree node. The default interface is +identified by the "ethernet" alias. + +One case where this is useful is for devices that store their MAC +address in a custom location. Once extracted, board code can store the +MAC address in U-Boot's control DTB so that it will automatically be +used by the Ethernet uclass. + +Signed-off-by: Thierry Reding +--- + include/fdtdec.h | 24 ++++++++++++++++++++++++ + lib/fdtdec.c | 29 +++++++++++++++++++++++++++++ + 2 files changed, 53 insertions(+) + +diff --git a/include/fdtdec.h b/include/fdtdec.h +index fa8e34f6f960..e6c22dd5cd5c 100644 +--- a/include/fdtdec.h ++++ b/include/fdtdec.h +@@ -996,6 +996,30 @@ int fdtdec_setup_memory_banksize_fdt(const void *blob); + */ + int fdtdec_setup_memory_banksize(void); + ++/** ++ * fdtdec_set_ethernet_mac_address() - set MAC address for default interface ++ * ++ * Looks up the default interface via the "ethernet" alias (in the /aliases ++ * node) and stores the given MAC in its "local-mac-address" property. This ++ * is useful on platforms that store the MAC address in a custom location. ++ * Board code can call this in the late init stage to make sure that the ++ * interface device tree node has the right MAC address configured for the ++ * Ethernet uclass to pick it up. ++ * ++ * Typically the FDT passed into this function will be U-Boot's control DTB. ++ * Given that a lot of code may be holding offsets to various nodes in that ++ * tree, this code will only set the "local-mac-address" property in-place, ++ * which means that it needs to exist and have space for the 6-byte address. ++ * This ensures that the operation is non-destructive and does not invalidate ++ * offsets that other drivers may be using. ++ * ++ * @param fdt FDT blob ++ * @param mac buffer containing the MAC address to set ++ * @param size size of MAC address ++ * @return 0 on success or a negative error code on failure ++ */ ++int fdtdec_set_ethernet_mac_address(void *fdt, const u8 *mac, size_t size); ++ + /** + * fdtdec_set_phandle() - sets the phandle of a given node + * +diff --git a/lib/fdtdec.c b/lib/fdtdec.c +index d0ba88897335..3ee786b57940 100644 +--- a/lib/fdtdec.c ++++ b/lib/fdtdec.c +@@ -1261,6 +1261,35 @@ __weak void *board_fdt_blob_setup(void) + } + #endif + ++int fdtdec_set_ethernet_mac_address(void *fdt, const u8 *mac, size_t size) ++{ ++ const char *path; ++ int offset, err; ++ ++ if (!is_valid_ethaddr(mac)) ++ return -EINVAL; ++ ++ path = fdt_get_alias(fdt, "ethernet"); ++ if (!path) ++ return 0; ++ ++ debug("ethernet alias found: %s\n", path); ++ ++ offset = fdt_path_offset(fdt, path); ++ if (offset < 0) { ++ debug("ethernet alias points to absent node %s\n", path); ++ return -ENOENT; ++ } ++ ++ err = fdt_setprop_inplace(fdt, offset, "local-mac-address", mac, size); ++ if (err < 0) ++ return err; ++ ++ debug("MAC address: %pM\n", mac); ++ ++ return 0; ++} ++ + static int fdtdec_init_reserved_memory(void *blob) + { + int na, ns, node, err; + +From patchwork Mon Apr 15 09:32:14 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot,v5,02/27] lib: Implement strndup() +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1085516 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190415093239.27509-3-thierry.reding@gmail.com> +To: Tom Warren , + Simon Glass +Cc: u-boot@lists.denx.de, Jon Hunter +Date: Mon, 15 Apr 2019 11:32:14 +0200 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +Signed-off-by: Thierry Reding +--- + include/linux/string.h | 1 + + lib/string.c | 23 +++++++++++++++++++++++ + 2 files changed, 24 insertions(+) + +diff --git a/include/linux/string.h b/include/linux/string.h +index 36066207392e..5d63be4ce5b0 100644 +--- a/include/linux/string.h ++++ b/include/linux/string.h +@@ -94,6 +94,7 @@ size_t strcspn(const char *s, const char *reject); + #ifndef __HAVE_ARCH_STRDUP + extern char * strdup(const char *); + #endif ++extern char * strndup(const char *, size_t); + #ifndef __HAVE_ARCH_STRSWAB + extern char * strswab(const char *); + #endif +diff --git a/lib/string.c b/lib/string.c +index af17c16f616d..9b779ddc3bbe 100644 +--- a/lib/string.c ++++ b/lib/string.c +@@ -326,6 +326,29 @@ char * strdup(const char *s) + } + #endif + ++char * strndup(const char *s, size_t n) ++{ ++ size_t len; ++ char *new; ++ ++ if (s == NULL) ++ return NULL; ++ ++ len = strlen(s); ++ ++ if (n < len) ++ len = n; ++ ++ new = malloc(len + 1); ++ if (new == NULL) ++ return NULL; ++ ++ strncpy(new, s, len); ++ new[len] = '\0'; ++ ++ return new; ++} ++ + #ifndef __HAVE_ARCH_STRSPN + /** + * strspn - Calculate the length of the initial substring of @s which only + +From patchwork Mon Apr 15 09:32:15 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot, v5, + 03/27] ARM: tegra: Fix mux type for disp1 and disp2 clocks on Tegra210 +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1085517 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190415093239.27509-4-thierry.reding@gmail.com> +To: Tom Warren , + Simon Glass +Cc: u-boot@lists.denx.de, Jon Hunter +Date: Mon, 15 Apr 2019 11:32:15 +0200 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +On Tegra210 the parents for the disp1 and disp2 clocks are slightly +different from earlier chips. Only pll_p, pll_d_out0, pll_d2_out0 and +clk_m are valid parents (technically pll_d_out is as well, but U-Boot +doesn't know anything about it). Fix up the type name and the mux +definition. + +Signed-off-by: Thierry Reding +--- + arch/arm/mach-tegra/tegra210/clock.c | 10 +++++----- + 1 file changed, 5 insertions(+), 5 deletions(-) + +diff --git a/arch/arm/mach-tegra/tegra210/clock.c b/arch/arm/mach-tegra/tegra210/clock.c +index 06068c4b7b8d..0d7cafea2017 100644 +--- a/arch/arm/mach-tegra/tegra210/clock.c ++++ b/arch/arm/mach-tegra/tegra210/clock.c +@@ -40,7 +40,7 @@ enum clock_type_id { + CLOCK_TYPE_PDCT, + CLOCK_TYPE_ACPT, + CLOCK_TYPE_ASPTE, +- CLOCK_TYPE_PMDACD2T, ++ CLOCK_TYPE_PDD2T, + CLOCK_TYPE_PCST, + CLOCK_TYPE_DP, + +@@ -97,8 +97,8 @@ static enum clock_id clock_source[CLOCK_TYPE_COUNT][CLOCK_MAX_MUX+1] = { + { CLK(AUDIO), CLK(SFROM32KHZ), CLK(PERIPH), CLK(OSC), + CLK(EPCI), CLK(NONE), CLK(NONE), CLK(NONE), + MASK_BITS_31_29}, +- { CLK(PERIPH), CLK(MEMORY), CLK(DISPLAY), CLK(AUDIO), +- CLK(CGENERAL), CLK(DISPLAY2), CLK(OSC), CLK(NONE), ++ { CLK(PERIPH), CLK(NONE), CLK(DISPLAY), CLK(NONE), ++ CLK(NONE), CLK(DISPLAY2), CLK(OSC), CLK(NONE), + MASK_BITS_31_29}, + { CLK(PERIPH), CLK(CGENERAL), CLK(SFROM32KHZ), CLK(OSC), + CLK(NONE), CLK(NONE), CLK(NONE), CLK(NONE), +@@ -174,8 +174,8 @@ static enum clock_type_id clock_periph_type[PERIPHC_COUNT] = { + TYPE(PERIPHC_0bh, CLOCK_TYPE_NONE), + TYPE(PERIPHC_0ch, CLOCK_TYPE_NONE), + TYPE(PERIPHC_SBC1, CLOCK_TYPE_PC2CC3M_T), +- TYPE(PERIPHC_DISP1, CLOCK_TYPE_PMDACD2T), +- TYPE(PERIPHC_DISP2, CLOCK_TYPE_PMDACD2T), ++ TYPE(PERIPHC_DISP1, CLOCK_TYPE_PDD2T), ++ TYPE(PERIPHC_DISP2, CLOCK_TYPE_PDD2T), + + /* 0x10 */ + TYPE(PERIPHC_10h, CLOCK_TYPE_NONE), + +From patchwork Mon Apr 15 09:32:16 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot, v5, + 04/27] ARM: tegra: Remove disp1 clock initialization on Tegra210 +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1085526 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190415093239.27509-5-thierry.reding@gmail.com> +To: Tom Warren , + Simon Glass +Cc: u-boot@lists.denx.de, Jon Hunter +Date: Mon, 15 Apr 2019 11:32:16 +0200 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +pll_c is not a valid parent for the disp1 clock, so trying to set it +will fail. Given that display is not used in U-Boot, remove the init +table entry so that disp1 will keep its default parent (clk_m). + +Signed-off-by: Thierry Reding +--- + arch/arm/mach-tegra/tegra210/clock.c | 1 - + 1 file changed, 1 deletion(-) + +diff --git a/arch/arm/mach-tegra/tegra210/clock.c b/arch/arm/mach-tegra/tegra210/clock.c +index 0d7cafea2017..b240860f08cf 100644 +--- a/arch/arm/mach-tegra/tegra210/clock.c ++++ b/arch/arm/mach-tegra/tegra210/clock.c +@@ -1265,7 +1265,6 @@ struct periph_clk_init periph_clk_init_table[] = { + { PERIPH_ID_SBC5, CLOCK_ID_PERIPH }, + { PERIPH_ID_SBC6, CLOCK_ID_PERIPH }, + { PERIPH_ID_HOST1X, CLOCK_ID_PERIPH }, +- { PERIPH_ID_DISP1, CLOCK_ID_CGENERAL }, + { PERIPH_ID_SDMMC1, CLOCK_ID_PERIPH }, + { PERIPH_ID_SDMMC2, CLOCK_ID_PERIPH }, + { PERIPH_ID_SDMMC3, CLOCK_ID_PERIPH }, + +From patchwork Mon Apr 15 09:32:17 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot,v5,05/27] ARM: tegra: Use common header for PMU declarations +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1085523 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190415093239.27509-6-thierry.reding@gmail.com> +To: Tom Warren , + Simon Glass +Cc: u-boot@lists.denx.de, Jon Hunter +Date: Mon, 15 Apr 2019 11:32:17 +0200 From: Thierry Reding List-Id: U-Boot discussion @@ -167,19 +454,19 @@ index 6697909d9a3e..66628933b653 100644 DECLARE_GLOBAL_DATA_PTR; -From patchwork Thu Apr 4 11:59:25 2019 +From patchwork Mon Apr 15 09:32:18 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v4,02/19] ARM: tegra: Guard clock code with a Kconfig symbol +Subject: [U-Boot,v5,06/27] ARM: tegra: Guard clock code with a Kconfig symbol X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1077185 +X-Patchwork-Id: 1085522 X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190404115942.17947-3-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de, Stephen Warren , - Jonathan Hunter -Date: Thu, 4 Apr 2019 13:59:25 +0200 +Message-Id: <20190415093239.27509-7-thierry.reding@gmail.com> +To: Tom Warren , + Simon Glass +Cc: u-boot@lists.denx.de, Jon Hunter +Date: Mon, 15 Apr 2019 11:32:18 +0200 From: Thierry Reding List-Id: U-Boot discussion @@ -309,20 +596,20 @@ index b8d5ef0322cb..b94077221f77 100644 pinmux_init(); board_init_uart_f(); -From patchwork Thu Apr 4 11:59:26 2019 +From patchwork Mon Apr 15 09:32:19 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [U-Boot, v4, - 03/19] ARM: tegra: Guard GP pad control code with a Kconfig symbol +Subject: [U-Boot, v5, + 07/27] ARM: tegra: Guard GP pad control code with a Kconfig symbol X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1077187 +X-Patchwork-Id: 1085520 X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190404115942.17947-4-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de, Stephen Warren , - Jonathan Hunter -Date: Thu, 4 Apr 2019 13:59:26 +0200 +Message-Id: <20190415093239.27509-8-thierry.reding@gmail.com> +To: Tom Warren , + Simon Glass +Cc: u-boot@lists.denx.de, Jon Hunter +Date: Mon, 15 Apr 2019 11:32:19 +0200 From: Thierry Reding List-Id: U-Boot discussion @@ -400,20 +687,20 @@ index be414e4e4aca..d7063490e222 100644 #ifndef CONFIG_ARM64 void config_cache(void) -From patchwork Thu Apr 4 11:59:27 2019 +From patchwork Mon Apr 15 09:32:20 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [U-Boot, v4, - 04/19] ARM: tegra: Guard memory controller code with a Kconfig symbol +Subject: [U-Boot, v5, + 08/27] ARM: tegra: Guard memory controller code with a Kconfig symbol X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1077188 +X-Patchwork-Id: 1085531 X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190404115942.17947-5-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de, Stephen Warren , - Jonathan Hunter -Date: Thu, 4 Apr 2019 13:59:27 +0200 +Message-Id: <20190415093239.27509-9-thierry.reding@gmail.com> +To: Tom Warren , + Simon Glass +Cc: u-boot@lists.denx.de, Jon Hunter +Date: Mon, 15 Apr 2019 11:32:20 +0200 From: Thierry Reding List-Id: U-Boot discussion @@ -501,20 +788,20 @@ index ecd5001de4c5..7ef5a67edd1f 100644 } -From patchwork Thu Apr 4 11:59:28 2019 +From patchwork Mon Apr 15 09:32:21 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [U-Boot, v4, - 05/19] ARM: tegra: Guard pin controller code with a Kconfig symbol +Subject: [U-Boot, v5, + 09/27] ARM: tegra: Guard pin controller code with a Kconfig symbol X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1077207 +X-Patchwork-Id: 1085527 X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190404115942.17947-6-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de, Stephen Warren , - Jonathan Hunter -Date: Thu, 4 Apr 2019 13:59:28 +0200 +Message-Id: <20190415093239.27509-10-thierry.reding@gmail.com> +To: Tom Warren , + Simon Glass +Cc: u-boot@lists.denx.de, Jon Hunter +Date: Mon, 15 Apr 2019 11:32:21 +0200 From: Thierry Reding List-Id: U-Boot discussion @@ -636,20 +923,20 @@ index b94077221f77..ce1c9346959d 100644 #ifdef CONFIG_TEGRA_CLOCK_SCALING #include -From patchwork Thu Apr 4 11:59:29 2019 +From patchwork Mon Apr 15 09:32:22 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [U-Boot, v4, - 06/19] ARM: tegra: Guard powergate code with a Kconfig symbol +Subject: [U-Boot, v5, + 10/27] ARM: tegra: Guard powergate code with a Kconfig symbol X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1077193 +X-Patchwork-Id: 1085529 X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190404115942.17947-7-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de, Stephen Warren , - Jonathan Hunter -Date: Thu, 4 Apr 2019 13:59:29 +0200 +Message-Id: <20190415093239.27509-11-thierry.reding@gmail.com> +To: Tom Warren , + Simon Glass +Cc: u-boot@lists.denx.de, Jon Hunter +Date: Mon, 15 Apr 2019 11:32:22 +0200 From: Thierry Reding List-Id: U-Boot discussion @@ -712,19 +999,19 @@ index 395e0191a458..517be21ee5f5 100644 endif -From patchwork Thu Apr 4 11:59:30 2019 +From patchwork Mon Apr 15 09:32:23 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v4,07/19] ARM: tegra: Fix save_boot_params() prototype +Subject: [U-Boot,v5,11/27] ARM: tegra: Fix save_boot_params() prototype X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1077195 +X-Patchwork-Id: 1085528 X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190404115942.17947-8-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de, Stephen Warren , - Jonathan Hunter -Date: Thu, 4 Apr 2019 13:59:30 +0200 +Message-Id: <20190415093239.27509-12-thierry.reding@gmail.com> +To: Tom Warren , + Simon Glass +Cc: u-boot@lists.denx.de, Jon Hunter +Date: Mon, 15 Apr 2019 11:32:23 +0200 From: Thierry Reding List-Id: U-Boot discussion @@ -758,20 +1045,20 @@ index b65bdde5a78d..59d2f347485d 100644 from_spl = r0 != UBOOT_NOT_LOADED_FROM_SPL; save_boot_params_ret(); -From patchwork Thu Apr 4 11:59:31 2019 +From patchwork Mon Apr 15 09:32:24 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [U-Boot, v4, - 08/19] ARM: tegra: Allow boards to override boot target devices +Subject: [U-Boot, v5, + 12/27] ARM: tegra: Allow boards to override boot target devices X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1077192 +X-Patchwork-Id: 1085524 X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190404115942.17947-9-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de, Stephen Warren , - Jonathan Hunter -Date: Thu, 4 Apr 2019 13:59:31 +0200 +Message-Id: <20190415093239.27509-13-thierry.reding@gmail.com> +To: Tom Warren , + Simon Glass +Cc: u-boot@lists.denx.de, Jon Hunter +Date: Mon, 15 Apr 2019 11:32:24 +0200 From: Thierry Reding List-Id: U-Boot discussion @@ -806,19 +1093,19 @@ index e54428ba43e2..9685ee5059ab 100644 #else #define BOOTENV -From patchwork Thu Apr 4 11:59:32 2019 +From patchwork Mon Apr 15 09:32:25 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v4,09/19] ARM: tegra: Support TZ-only access to PMC +Subject: [U-Boot,v5,13/27] ARM: tegra: Support TZ-only access to PMC X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1077197 +X-Patchwork-Id: 1085544 X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190404115942.17947-10-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de, Stephen Warren , - Jonathan Hunter -Date: Thu, 4 Apr 2019 13:59:32 +0200 +Message-Id: <20190415093239.27509-14-thierry.reding@gmail.com> +To: Tom Warren , + Simon Glass +Cc: u-boot@lists.denx.de, Jon Hunter +Date: Mon, 15 Apr 2019 11:32:25 +0200 From: Thierry Reding List-Id: U-Boot discussion @@ -1266,20 +1553,20 @@ index e45f0961b242..761c9ef19e3b 100644 return 0; } -From patchwork Thu Apr 4 11:59:33 2019 +From patchwork Mon Apr 15 09:32:26 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [U-Boot, v4, - 10/19] ARM: tegra: Workaround UDC boot issues only if necessary +Subject: [U-Boot, v5, + 14/27] ARM: tegra: Workaround UDC boot issues only if necessary X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1077191 +X-Patchwork-Id: 1085541 X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190404115942.17947-11-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de, Stephen Warren , - Jonathan Hunter -Date: Thu, 4 Apr 2019 13:59:33 +0200 +Message-Id: <20190415093239.27509-15-thierry.reding@gmail.com> +To: Tom Warren , + Simon Glass +Cc: u-boot@lists.denx.de, Jon Hunter +Date: Mon, 15 Apr 2019 11:32:26 +0200 From: Thierry Reding List-Id: U-Boot discussion @@ -1310,19 +1597,19 @@ index 28914a34a1b5..faa73559fd42 100644 help When loading U-Boot into RAM over USB protocols using tools such as -From patchwork Thu Apr 4 11:59:34 2019 +From patchwork Mon Apr 15 09:32:27 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v4,11/19] ARM: tegra: Restore DRAM bank count +Subject: [U-Boot,v5,15/27] ARM: tegra: Restore DRAM bank count X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1077194 +X-Patchwork-Id: 1085532 X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190404115942.17947-12-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de, Stephen Warren , - Jonathan Hunter -Date: Thu, 4 Apr 2019 13:59:34 +0200 +Message-Id: <20190415093239.27509-16-thierry.reding@gmail.com> +To: Tom Warren , + Simon Glass +Cc: u-boot@lists.denx.de, Jon Hunter +Date: Mon, 15 Apr 2019 11:32:27 +0200 From: Thierry Reding List-Id: U-Boot discussion @@ -1373,19 +1660,19 @@ index df4d914d85cf..459b67fd195f 100644 CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y -From patchwork Thu Apr 4 11:59:35 2019 +From patchwork Mon Apr 15 09:32:28 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v4,12/19] ARM: tegra: Unify Tegra186 builds +Subject: [U-Boot,v5,16/27] ARM: tegra: Unify Tegra186 builds X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1077204 +X-Patchwork-Id: 1085533 X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190404115942.17947-13-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de, Stephen Warren , - Jonathan Hunter -Date: Thu, 4 Apr 2019 13:59:35 +0200 +Message-Id: <20190415093239.27509-17-thierry.reding@gmail.com> +To: Tom Warren , + Simon Glass +Cc: u-boot@lists.denx.de, Jon Hunter +Date: Mon, 15 Apr 2019 11:32:28 +0200 From: Thierry Reding List-Id: U-Boot discussion @@ -2198,20 +2485,20 @@ index 496e8a02111e..6f88010c18c3 100644 } +#endif -From patchwork Thu Apr 4 11:59:36 2019 +From patchwork Mon Apr 15 09:32:29 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [U-Boot, v4, - 13/19] ARM: tegra: Implement cboot_save_boot_params() in C +Subject: [U-Boot, v5, + 17/27] ARM: tegra: Implement cboot_save_boot_params() in C X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1077211 +X-Patchwork-Id: 1085530 X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190404115942.17947-14-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de, Stephen Warren , - Jonathan Hunter -Date: Thu, 4 Apr 2019 13:59:36 +0200 +Message-Id: <20190415093239.27509-18-thierry.reding@gmail.com> +To: Tom Warren , + Simon Glass +Cc: u-boot@lists.denx.de, Jon Hunter +Date: Mon, 15 Apr 2019 11:32:29 +0200 From: Thierry Reding List-Id: U-Boot discussion @@ -2291,27 +2578,27 @@ index 4c9ddacc2b39..000000000000 - b save_boot_params_ret -ENDPROC(cboot_save_boot_params) -From patchwork Thu Apr 4 11:59:37 2019 +From patchwork Mon Apr 15 09:32:30 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v4,14/19] ARM: tegra: Implement cboot_get_ethaddr() +Subject: [U-Boot,v5,18/27] ARM: tegra: Implement cboot_get_ethaddr() X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1077213 +X-Patchwork-Id: 1085543 X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190404115942.17947-15-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de, Stephen Warren , - Jonathan Hunter -Date: Thu, 4 Apr 2019 13:59:37 +0200 +Message-Id: <20190415093239.27509-19-thierry.reding@gmail.com> +To: Tom Warren , + Simon Glass +Cc: u-boot@lists.denx.de, Jon Hunter +Date: Mon, 15 Apr 2019 11:32:30 +0200 From: Thierry Reding List-Id: U-Boot discussion From: Thierry Reding -This function will attempt to look up an ethernet address in the DTB +This function will attempt to look up an Ethernet address in the DTB that was passed in from cboot. It does so by first trying to locate the -primary ethernet device for the board (identified by the "ethernet" +default Ethernet device for the board (identified by the "ethernet" alias) and if found, reads the "local-mac-address" property. If the "ethernet" alias does not exist, or if it points to a device tree node that doesn't exist, or if the device tree node that it points to does @@ -2320,8 +2607,16 @@ will fall back to the legacy mechanism of looking for the MAC address stored in the "nvidia,ethernet-mac" or "nvidia,ether-mac" properties of the "/chosen" node. +The MAC address is then written to the default Ethernet device for the +board (again identified by the "ethernet" alias) in U-Boot's control +DTB. This allows the device driver for that device to read the MAC +address from the standard location in device tree. + Signed-off-by: Thierry Reding --- +Changes in v5: +- write MAC to DT rather than an environment variable + Changes in v4: - also check the /chosen/nvidia,ethernet-mac property for compatibility with Tegra210 @@ -2330,8 +2625,8 @@ Changes in v2: - make dummy static inline to avoid duplicate definitions arch/arm/include/asm/arch-tegra/cboot.h | 6 ++ - arch/arm/mach-tegra/cboot.c | 92 ++++++++++++++++++++----- - 2 files changed, 81 insertions(+), 17 deletions(-) + arch/arm/mach-tegra/cboot.c | 97 ++++++++++++++++++++----- + 2 files changed, 86 insertions(+), 17 deletions(-) diff --git a/arch/arm/include/asm/arch-tegra/cboot.h b/arch/arm/include/asm/arch-tegra/cboot.h index b3441ec178b3..021c24617575 100644 @@ -2358,7 +2653,7 @@ index b3441ec178b3..021c24617575 100644 #endif diff --git a/arch/arm/mach-tegra/cboot.c b/arch/arm/mach-tegra/cboot.c -index a302ca45f39b..6c6d06d89a5d 100644 +index a302ca45f39b..628909f29137 100644 --- a/arch/arm/mach-tegra/cboot.c +++ b/arch/arm/mach-tegra/cboot.c @@ -4,6 +4,7 @@ @@ -2369,7 +2664,7 @@ index a302ca45f39b..6c6d06d89a5d 100644 #include #include #include -@@ -465,46 +466,103 @@ static int set_fdt_addr(void) +@@ -465,46 +466,108 @@ static int set_fdt_addr(void) * Attempt to use /chosen/nvidia,ether-mac in the cboot DTB to U-Boot's * ethaddr environment variable if possible. */ @@ -2485,26 +2780,134 @@ index a302ca45f39b..6c6d06d89a5d 100644 /* Ignore errors here; not all cases care about Ethernet addresses */ - set_ethaddr_from_cboot(); + err = cboot_get_ethaddr(fdt, mac); -+ if (!err) -+ eth_env_set_enetaddr("ethaddr", mac); ++ if (!err) { ++ void *blob = (void *)gd->fdt_blob; ++ ++ err = fdtdec_set_ethernet_mac_address(blob, mac, sizeof(mac)); ++ if (err < 0) ++ printf("failed to set MAC address %pM: %d\n", mac, err); ++ } return 0; } -From patchwork Thu Apr 4 11:59:38 2019 +From patchwork Mon Apr 15 09:32:31 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [U-Boot, v4, - 15/19] ARM: tegra: Enable position independent build for 64-bit +Subject: [U-Boot,v5,19/27] ARM: tegra: Import cbootargs value from cboot DTB X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1077212 +X-Patchwork-Id: 1085534 X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190404115942.17947-16-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de, Stephen Warren , - Jonathan Hunter -Date: Thu, 4 Apr 2019 13:59:38 +0200 +Message-Id: <20190415093239.27509-20-thierry.reding@gmail.com> +To: Tom Warren , + Simon Glass +Cc: u-boot@lists.denx.de, Jon Hunter +Date: Mon, 15 Apr 2019 11:32:31 +0200 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +Read the boot arguments passed by cboot via the /chosen/bootargs +property and store it in the cbootargs environment variable. + +Signed-off-by: Thierry Reding +--- + arch/arm/mach-tegra/cboot.c | 47 +++++++++++++++++++++++++++++++++++++ + 1 file changed, 47 insertions(+) + +diff --git a/arch/arm/mach-tegra/cboot.c b/arch/arm/mach-tegra/cboot.c +index 628909f29137..a829ef794f2d 100644 +--- a/arch/arm/mach-tegra/cboot.c ++++ b/arch/arm/mach-tegra/cboot.c +@@ -8,7 +8,9 @@ + #include + #include + #include ++#include + ++#include + #include + + #include +@@ -546,10 +548,49 @@ out: + return err; + } + ++static char *strip(const char *ptr) ++{ ++ const char *end; ++ ++ while (*ptr && isblank(*ptr)) ++ ptr++; ++ ++ /* empty string */ ++ if (*ptr == '\0') ++ return strdup(ptr); ++ ++ end = ptr; ++ ++ while (end[1]) ++ end++; ++ ++ while (isblank(*end)) ++ end--; ++ ++ return strndup(ptr, end - ptr + 1); ++} ++ ++static char *cboot_get_bootargs(const void *fdt) ++{ ++ const char *args; ++ int offset, len; ++ ++ offset = fdt_path_offset(fdt, "/chosen"); ++ if (offset < 0) ++ return NULL; ++ ++ args = fdt_getprop(fdt, offset, "bootargs", &len); ++ if (!args) ++ return NULL; ++ ++ return strip(args); ++} ++ + int cboot_late_init(void) + { + const void *fdt = (const void *)cboot_boot_x0; + uint8_t mac[ETH_ALEN]; ++ char *bootargs; + int err; + + set_calculated_env_vars(); +@@ -569,5 +610,11 @@ int cboot_late_init(void) + printf("failed to set MAC address %pM: %d\n", mac, err); + } + ++ bootargs = cboot_get_bootargs(fdt); ++ if (bootargs) { ++ env_set("cbootargs", bootargs); ++ free(bootargs); ++ } ++ + return 0; + } + +From patchwork Mon Apr 15 09:32:32 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot, v5, + 20/27] ARM: tegra: Enable position independent build for 64-bit +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1085539 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190415093239.27509-21-thierry.reding@gmail.com> +To: Tom Warren , + Simon Glass +Cc: u-boot@lists.denx.de, Jon Hunter +Date: Mon, 15 Apr 2019 11:32:32 +0200 From: Thierry Reding List-Id: U-Boot discussion @@ -2587,19 +2990,19 @@ index e48e0a1a14ec..8e9c45690dce 100644 CONFIG_TARGET_P2571=y CONFIG_NR_DRAM_BANKS=2 -From patchwork Thu Apr 4 11:59:39 2019 +From patchwork Mon Apr 15 09:32:33 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v4,16/19] p2371-2180: Pass Ethernet MAC to the kernel +Subject: [U-Boot,v5,21/27] p2371-2180: Pass Ethernet MAC to the kernel X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1077196 +X-Patchwork-Id: 1085536 X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190404115942.17947-17-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de, Stephen Warren , - Jonathan Hunter -Date: Thu, 4 Apr 2019 13:59:39 +0200 +Message-Id: <20190415093239.27509-22-thierry.reding@gmail.com> +To: Tom Warren , + Simon Glass +Cc: u-boot@lists.denx.de, Jon Hunter +Date: Mon, 15 Apr 2019 11:32:33 +0200 From: Thierry Reding List-Id: U-Boot discussion @@ -2698,19 +3101,19 @@ index 4923d330de6c..0ee4913a0469 100644 CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra210 (P2371-2180) # " -From patchwork Thu Apr 4 11:59:40 2019 +From patchwork Mon Apr 15 09:32:34 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v4,17/19] p2771-0000: Pass Ethernet MAC to the kernel +Subject: [U-Boot,v5,22/27] p2771-0000: Pass Ethernet MAC to the kernel X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1077208 +X-Patchwork-Id: 1085542 X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190404115942.17947-18-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de, Stephen Warren , - Jonathan Hunter -Date: Thu, 4 Apr 2019 13:59:40 +0200 +Message-Id: <20190415093239.27509-23-thierry.reding@gmail.com> +To: Tom Warren , + Simon Glass +Cc: u-boot@lists.denx.de, Jon Hunter +Date: Mon, 15 Apr 2019 11:32:34 +0200 From: Thierry Reding List-Id: U-Boot discussion @@ -2813,176 +3216,1410 @@ index 459b67fd195f..20d4393838d6 100644 CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra186 (P2771-0000-500) # " -From patchwork Thu Apr 4 11:59:41 2019 +From patchwork Mon Apr 15 09:32:35 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v4,18/19] lib: Implement strndup() +Subject: [U-Boot,v5,23/27] p2371-2180: Add support for framebuffer carveouts X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1077221 +X-Patchwork-Id: 1085537 X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190404115942.17947-19-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de, Stephen Warren , - Jonathan Hunter -Date: Thu, 4 Apr 2019 13:59:41 +0200 +Message-Id: <20190415093239.27509-24-thierry.reding@gmail.com> +To: Tom Warren , + Simon Glass +Cc: u-boot@lists.denx.de, Jon Hunter +Date: Mon, 15 Apr 2019 11:32:35 +0200 From: Thierry Reding List-Id: U-Boot discussion From: Thierry Reding +If early firmware initialized the display hardware and the display +controllers are scanning out a framebuffer (e.g. a splash screen), make +sure to pass information about the memory location of that framebuffer +to the kernel before booting to avoid the kernel from using that memory +for the buddy allocator. + +This same mechanism can also be used in the kernel to set up early SMMU +mappings and avoid SMMU faults caused by the display controller reading +from memory for which it has no mapping. + +Reviewed-by: Simon Glass Signed-off-by: Thierry Reding --- - include/linux/string.h | 1 + - lib/string.c | 23 +++++++++++++++++++++++ - 2 files changed, 24 insertions(+) +Changes in v4: +- add reviewed-by from Simon -diff --git a/include/linux/string.h b/include/linux/string.h -index 36066207392e..5d63be4ce5b0 100644 ---- a/include/linux/string.h -+++ b/include/linux/string.h -@@ -94,6 +94,7 @@ size_t strcspn(const char *s, const char *reject); - #ifndef __HAVE_ARCH_STRDUP - extern char * strdup(const char *); - #endif -+extern char * strndup(const char *, size_t); - #ifndef __HAVE_ARCH_STRSWAB - extern char * strswab(const char *); - #endif -diff --git a/lib/string.c b/lib/string.c -index af17c16f616d..9b779ddc3bbe 100644 ---- a/lib/string.c -+++ b/lib/string.c -@@ -326,6 +326,29 @@ char * strdup(const char *s) - } - #endif - -+char * strndup(const char *s, size_t n) -+{ -+ size_t len; -+ char *new; -+ -+ if (s == NULL) -+ return NULL; -+ -+ len = strlen(s); -+ -+ if (n < len) -+ len = n; -+ -+ new = malloc(len + 1); -+ if (new == NULL) -+ return NULL; -+ -+ strncpy(new, s, len); -+ new[len] = '\0'; -+ -+ return new; -+} -+ - #ifndef __HAVE_ARCH_STRSPN - /** - * strspn - Calculate the length of the initial substring of @s which only - -From patchwork Thu Apr 4 11:59:42 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot,v4,19/19] ARM: tegra: Import cbootargs value from cboot DTB -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1077205 -X-Patchwork-Delegate: twarren@nvidia.com -Message-Id: <20190404115942.17947-20-thierry.reding@gmail.com> -To: Tom Warren -Cc: u-boot@lists.denx.de, Stephen Warren , - Jonathan Hunter -Date: Thu, 4 Apr 2019 13:59:42 +0200 -From: Thierry Reding -List-Id: U-Boot discussion - -From: Thierry Reding - -Read the boot arguments passed by cboot via the /chosen/bootargs -property and store it in the cbootargs environment variable. - -Signed-off-by: Thierry Reding ---- - arch/arm/mach-tegra/cboot.c | 47 +++++++++++++++++++++++++++++++++++++ + board/nvidia/p2371-2180/p2371-2180.c | 47 ++++++++++++++++++++++++++++ 1 file changed, 47 insertions(+) -diff --git a/arch/arm/mach-tegra/cboot.c b/arch/arm/mach-tegra/cboot.c -index 6c6d06d89a5d..3f42ffeb73c0 100644 ---- a/arch/arm/mach-tegra/cboot.c -+++ b/arch/arm/mach-tegra/cboot.c -@@ -8,7 +8,9 @@ - #include - #include - #include -+#include +diff --git a/board/nvidia/p2371-2180/p2371-2180.c b/board/nvidia/p2371-2180/p2371-2180.c +index a444d692d7ea..4985302d6bc2 100644 +--- a/board/nvidia/p2371-2180/p2371-2180.c ++++ b/board/nvidia/p2371-2180/p2371-2180.c +@@ -6,6 +6,7 @@ -+#include - #include - - #include -@@ -546,10 +548,49 @@ out: - return err; + #include + #include ++#include + #include + #include + #include +@@ -138,9 +139,55 @@ static void ft_mac_address_setup(void *fdt) + } } -+static char *strip(const char *ptr) ++static int ft_copy_carveout(void *dst, const void *src, const char *node) +{ -+ const char *end; ++ struct fdt_memory fb; ++ int err; + -+ while (*ptr && isblank(*ptr)) -+ ptr++; ++ err = fdtdec_get_carveout(src, node, "memory-region", 0, &fb); ++ if (err < 0) { ++ if (err != -FDT_ERR_NOTFOUND) ++ printf("failed to get carveout for %s: %d\n", node, ++ err); + -+ /* empty string */ -+ if (*ptr == '\0') -+ return strdup(ptr); -+ -+ end = ptr; -+ -+ while (end[1]) -+ end++; -+ -+ while (isblank(*end)) -+ end--; -+ -+ return strndup(ptr, end - ptr + 1); -+} -+ -+static char *cboot_get_bootargs(const void *fdt) -+{ -+ const char *args; -+ int offset, len; -+ -+ offset = fdt_path_offset(fdt, "/chosen"); -+ if (offset < 0) -+ return NULL; -+ -+ args = fdt_getprop(fdt, offset, "bootargs", &len); -+ if (!args) -+ return NULL; -+ -+ return strip(args); -+} -+ - int cboot_late_init(void) - { - const void *fdt = (const void *)cboot_boot_x0; - uint8_t mac[ETH_ALEN]; -+ char *bootargs; - int err; - - set_calculated_env_vars(); -@@ -564,5 +605,11 @@ int cboot_late_init(void) - if (!err) - eth_env_set_enetaddr("ethaddr", mac); - -+ bootargs = cboot_get_bootargs(fdt); -+ if (bootargs) { -+ env_set("cbootargs", bootargs); -+ free(bootargs); ++ return err; + } + ++ err = fdtdec_set_carveout(dst, node, "memory-region", 0, "framebuffer", ++ &fb); ++ if (err < 0) { ++ printf("failed to set carveout for %s: %d\n", node, err); ++ return err; ++ } ++ ++ return 0; ++} ++ ++static void ft_carveout_setup(void *fdt) ++{ ++ const void *cboot_fdt = (const void *)cboot_boot_x0; ++ static const char * const nodes[] = { ++ "/host1x@50000000/dc@54200000", ++ "/host1x@50000000/dc@54240000", ++ }; ++ unsigned int i; ++ int err; ++ ++ for (i = 0; i < ARRAY_SIZE(nodes); i++) { ++ err = ft_copy_carveout(fdt, cboot_fdt, nodes[i]); ++ if (err < 0) { ++ if (err != -FDT_ERR_NOTFOUND) ++ printf("failed to copy carveout for %s: %d\n", ++ nodes[i], err); ++ continue; ++ } ++ } ++} ++ + int ft_board_setup(void *fdt, bd_t *bd) + { + ft_mac_address_setup(fdt); ++ ft_carveout_setup(fdt); + return 0; } + +From patchwork Mon Apr 15 09:32:36 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot,v5,24/27] p2771-0000: Add support for framebuffer carveouts +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1085535 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190415093239.27509-25-thierry.reding@gmail.com> +To: Tom Warren , + Simon Glass +Cc: u-boot@lists.denx.de, Jon Hunter +Date: Mon, 15 Apr 2019 11:32:36 +0200 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +If early firmware initialized the display hardware and the display +controllers are scanning out a framebuffer (e.g. a splash screen), make +sure to pass information about the memory location of that framebuffer +to the kernel before booting to avoid the kernel from using that memory +for the buddy allocator. + +This same mechanism can also be used in the kernel to set up early SMMU +mappings and avoid SMMU faults caused by the display controller reading +from memory for which it has no mapping. + +Reviewed-by: Simon Glass +Signed-off-by: Thierry Reding +--- +Changes in v4: +- add reviewed-by from Simon + + board/nvidia/p2771-0000/p2771-0000.c | 66 ++++++++++++++++++++++++++-- + 1 file changed, 62 insertions(+), 4 deletions(-) + +diff --git a/board/nvidia/p2771-0000/p2771-0000.c b/board/nvidia/p2771-0000/p2771-0000.c +index fe22067f6571..d294c7ae0136 100644 +--- a/board/nvidia/p2771-0000/p2771-0000.c ++++ b/board/nvidia/p2771-0000/p2771-0000.c +@@ -5,6 +5,7 @@ + + #include + #include ++#include + #include + #include + #include +@@ -56,7 +57,7 @@ int tegra_pcie_board_init(void) + } + #endif + +-int ft_board_setup(void *fdt, bd_t *bd) ++static void ft_mac_address_setup(void *fdt) + { + const void *cboot_fdt = (const void *)cboot_boot_x0; + uint8_t mac[ETH_ALEN], local_mac[ETH_ALEN]; +@@ -69,13 +70,15 @@ int ft_board_setup(void *fdt, bd_t *bd) + + path = fdt_get_alias(fdt, "ethernet"); + if (!path) +- return 0; ++ return; + + debug("ethernet alias found: %s\n", path); + + offset = fdt_path_offset(fdt, path); +- if (offset < 0) +- return 0; ++ if (offset < 0) { ++ printf("ethernet alias points to absent node %s\n", path); ++ return; ++ } + + if (is_valid_ethaddr(local_mac)) { + err = fdt_setprop(fdt, offset, "local-mac-address", local_mac, +@@ -92,6 +95,61 @@ int ft_board_setup(void *fdt, bd_t *bd) + debug("MAC address set: %pM\n", mac); + } + } ++} ++ ++static int ft_copy_carveout(void *dst, const void *src, const char *node) ++{ ++ struct fdt_memory fb; ++ int err; ++ ++ err = fdtdec_get_carveout(src, node, "memory-region", 0, &fb); ++ if (err < 0) { ++ if (err != -FDT_ERR_NOTFOUND) ++ printf("failed to get carveout for %s: %d\n", node, ++ err); ++ ++ return err; ++ } ++ ++ err = fdtdec_set_carveout(dst, node, "memory-region", 0, "framebuffer", ++ &fb); ++ if (err < 0) { ++ printf("failed to set carveout for %s: %d\n", node, err); ++ return err; ++ } ++ ++ return 0; ++} ++ ++static void ft_carveout_setup(void *fdt) ++{ ++ const void *cboot_fdt = (const void *)cboot_boot_x0; ++ static const char * const nodes[] = { ++ "/host1x@13e00000/display-hub@15200000/display@15200000", ++ "/host1x@13e00000/display-hub@15200000/display@15210000", ++ "/host1x@13e00000/display-hub@15200000/display@15220000", ++ }; ++ unsigned int i; ++ int err; ++ ++ for (i = 0; i < ARRAY_SIZE(nodes); i++) { ++ printf("copying carveout for %s...\n", nodes[i]); ++ ++ err = ft_copy_carveout(fdt, cboot_fdt, nodes[i]); ++ if (err < 0) { ++ if (err != -FDT_ERR_NOTFOUND) ++ printf("failed to copy carveout for %s: %d\n", ++ nodes[i], err); ++ ++ continue; ++ } ++ } ++} ++ ++int ft_board_setup(void *fdt, bd_t *bd) ++{ ++ ft_mac_address_setup(fdt); ++ ft_carveout_setup(fdt); + + return 0; + } + +From patchwork Mon Apr 15 09:32:37 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot,v5,25/27] ARM: tegra: Rename pcie-controller to pcie +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1085545 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190415093239.27509-26-thierry.reding@gmail.com> +To: Tom Warren , + Simon Glass +Cc: u-boot@lists.denx.de, Jon Hunter +Date: Mon, 15 Apr 2019 11:32:37 +0200 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +Recent versions of DTC have checks for PCI host bridge device tree nodes +that are named something other than "pci" or "pcie". Fix all occurrences +of such nodes for Tegra boards to avoid potential warnings from DTC. + +Signed-off-by: Thierry Reding +--- + arch/arm/dts/tegra124-apalis.dts | 2 +- + arch/arm/dts/tegra124-cei-tk1-som.dts | 2 +- + arch/arm/dts/tegra124-jetson-tk1.dts | 2 +- + arch/arm/dts/tegra124.dtsi | 2 +- + arch/arm/dts/tegra186-p2771-0000-000.dts | 2 +- + arch/arm/dts/tegra186-p2771-0000-500.dts | 2 +- + arch/arm/dts/tegra186.dtsi | 2 +- + arch/arm/dts/tegra20-harmony.dts | 2 +- + arch/arm/dts/tegra20-trimslice.dts | 2 +- + arch/arm/dts/tegra20.dtsi | 2 +- + arch/arm/dts/tegra210-p2371-2180.dts | 2 +- + arch/arm/dts/tegra210.dtsi | 2 +- + arch/arm/dts/tegra30-apalis.dts | 2 +- + arch/arm/dts/tegra30-beaver.dts | 2 +- + arch/arm/dts/tegra30-cardhu.dts | 2 +- + arch/arm/dts/tegra30.dtsi | 2 +- + 16 files changed, 16 insertions(+), 16 deletions(-) + +diff --git a/arch/arm/dts/tegra124-apalis.dts b/arch/arm/dts/tegra124-apalis.dts +index fe08d3ea7304..a962c0a2f0ae 100644 +--- a/arch/arm/dts/tegra124-apalis.dts ++++ b/arch/arm/dts/tegra124-apalis.dts +@@ -77,7 +77,7 @@ + reg = <0x0 0x80000000 0x0 0x80000000>; + }; + +- pcie-controller@01003000 { ++ pcie@1003000 { + status = "okay"; + avddio-pex-supply = <&vdd_1v05>; + avdd-pex-pll-supply = <&vdd_1v05>; +diff --git a/arch/arm/dts/tegra124-cei-tk1-som.dts b/arch/arm/dts/tegra124-cei-tk1-som.dts +index b1dd4181ac03..e5b41f3183cd 100644 +--- a/arch/arm/dts/tegra124-cei-tk1-som.dts ++++ b/arch/arm/dts/tegra124-cei-tk1-som.dts +@@ -29,7 +29,7 @@ + reg = <0x80000000 0x80000000>; + }; + +- pcie-controller@01003000 { ++ pcie@1003000 { + status = "okay"; + + avddio-pex-supply = <&vdd_1v05_run>; +diff --git a/arch/arm/dts/tegra124-jetson-tk1.dts b/arch/arm/dts/tegra124-jetson-tk1.dts +index d6420436cde8..59e080a8af6f 100644 +--- a/arch/arm/dts/tegra124-jetson-tk1.dts ++++ b/arch/arm/dts/tegra124-jetson-tk1.dts +@@ -29,7 +29,7 @@ + reg = <0x80000000 0x80000000>; + }; + +- pcie-controller@01003000 { ++ pcie@1003000 { + status = "okay"; + + avddio-pex-supply = <&vdd_1v05_run>; +diff --git a/arch/arm/dts/tegra124.dtsi b/arch/arm/dts/tegra124.dtsi +index 83d63480471b..f473ba28e4a6 100644 +--- a/arch/arm/dts/tegra124.dtsi ++++ b/arch/arm/dts/tegra124.dtsi +@@ -14,7 +14,7 @@ + interrupt-parent = <&lic>; + + +- pcie-controller@01003000 { ++ pcie@1003000 { + compatible = "nvidia,tegra124-pcie"; + device_type = "pci"; + reg = <0x01003000 0x00000800 /* PADS registers */ +diff --git a/arch/arm/dts/tegra186-p2771-0000-000.dts b/arch/arm/dts/tegra186-p2771-0000-000.dts +index d97c6fd3d09a..84e850d6fca6 100644 +--- a/arch/arm/dts/tegra186-p2771-0000-000.dts ++++ b/arch/arm/dts/tegra186-p2771-0000-000.dts +@@ -11,7 +11,7 @@ + power-gpios = <&gpio_main TEGRA_MAIN_GPIO(P, 5) GPIO_ACTIVE_HIGH>; + }; + +- pcie-controller@10003000 { ++ pcie@10003000 { + status = "okay"; + + pci@1,0 { +diff --git a/arch/arm/dts/tegra186-p2771-0000-500.dts b/arch/arm/dts/tegra186-p2771-0000-500.dts +index 393a8b246a0b..1ac8ab431e90 100644 +--- a/arch/arm/dts/tegra186-p2771-0000-500.dts ++++ b/arch/arm/dts/tegra186-p2771-0000-500.dts +@@ -11,7 +11,7 @@ + power-gpios = <&gpio_main TEGRA_MAIN_GPIO(P, 6) GPIO_ACTIVE_HIGH>; + }; + +- pcie-controller@10003000 { ++ pcie@10003000 { + status = "okay"; + + pci@1,0 { +diff --git a/arch/arm/dts/tegra186.dtsi b/arch/arm/dts/tegra186.dtsi +index dd9e3b869de7..0a9db9825b85 100644 +--- a/arch/arm/dts/tegra186.dtsi ++++ b/arch/arm/dts/tegra186.dtsi +@@ -217,7 +217,7 @@ + #interrupt-cells = <2>; + }; + +- pcie-controller@10003000 { ++ pcie@10003000 { + compatible = "nvidia,tegra186-pcie"; + device_type = "pci"; + reg = <0x0 0x10003000 0x0 0x00000800 /* PADS registers */ +diff --git a/arch/arm/dts/tegra20-harmony.dts b/arch/arm/dts/tegra20-harmony.dts +index 0c907054dbd4..7fe7d52096c4 100644 +--- a/arch/arm/dts/tegra20-harmony.dts ++++ b/arch/arm/dts/tegra20-harmony.dts +@@ -599,7 +599,7 @@ + nvidia,sys-clock-req-active-high; + }; + +- pcie-controller@80003000 { ++ pcie@80003000 { + status = "okay"; + + avdd-pex-supply = <&pci_vdd_reg>; +diff --git a/arch/arm/dts/tegra20-trimslice.dts b/arch/arm/dts/tegra20-trimslice.dts +index 31f509ab12c8..e19001ee2bdf 100644 +--- a/arch/arm/dts/tegra20-trimslice.dts ++++ b/arch/arm/dts/tegra20-trimslice.dts +@@ -30,7 +30,7 @@ + spi-max-frequency = <25000000>; + }; + +- pcie-controller@80003000 { ++ pcie@80003000 { + status = "okay"; + + avdd-pex-supply = <&pci_vdd_reg>; +diff --git a/arch/arm/dts/tegra20.dtsi b/arch/arm/dts/tegra20.dtsi +index e21ee258b378..275b3432bd88 100644 +--- a/arch/arm/dts/tegra20.dtsi ++++ b/arch/arm/dts/tegra20.dtsi +@@ -580,7 +580,7 @@ + reset-names = "fuse"; + }; + +- pcie-controller@80003000 { ++ pcie@80003000 { + compatible = "nvidia,tegra20-pcie"; + device_type = "pci"; + reg = <0x80003000 0x00000800 /* PADS registers */ +diff --git a/arch/arm/dts/tegra210-p2371-2180.dts b/arch/arm/dts/tegra210-p2371-2180.dts +index da4349bd039f..c2f497c524af 100644 +--- a/arch/arm/dts/tegra210-p2371-2180.dts ++++ b/arch/arm/dts/tegra210-p2371-2180.dts +@@ -21,7 +21,7 @@ + reg = <0x0 0x80000000 0x0 0xc0000000>; + }; + +- pcie-controller@01003000 { ++ pcie@1003000 { + status = "okay"; + + pci@1,0 { +diff --git a/arch/arm/dts/tegra210.dtsi b/arch/arm/dts/tegra210.dtsi +index 229fed04529a..3ec54b11c43f 100644 +--- a/arch/arm/dts/tegra210.dtsi ++++ b/arch/arm/dts/tegra210.dtsi +@@ -11,7 +11,7 @@ + #address-cells = <2>; + #size-cells = <2>; + +- pcie-controller@01003000 { ++ pcie@1003000 { + compatible = "nvidia,tegra210-pcie"; + device_type = "pci"; + reg = <0x0 0x01003000 0x0 0x00000800 /* PADS registers */ +diff --git a/arch/arm/dts/tegra30-apalis.dts b/arch/arm/dts/tegra30-apalis.dts +index 1a9ce2720acd..77502dfdb478 100644 +--- a/arch/arm/dts/tegra30-apalis.dts ++++ b/arch/arm/dts/tegra30-apalis.dts +@@ -32,7 +32,7 @@ + reg = <0x80000000 0x40000000>; + }; + +- pcie-controller@00003000 { ++ pcie@3000 { + status = "okay"; + avdd-pexa-supply = <&vdd2_reg>; + vdd-pexa-supply = <&vdd2_reg>; +diff --git a/arch/arm/dts/tegra30-beaver.dts b/arch/arm/dts/tegra30-beaver.dts +index f5fbbe849e26..9bb097b08136 100644 +--- a/arch/arm/dts/tegra30-beaver.dts ++++ b/arch/arm/dts/tegra30-beaver.dts +@@ -28,7 +28,7 @@ + reg = <0x80000000 0x7ff00000>; + }; + +- pcie-controller@00003000 { ++ pcie@3000 { + status = "okay"; + + avdd-pexa-supply = <&ldo1_reg>; +diff --git a/arch/arm/dts/tegra30-cardhu.dts b/arch/arm/dts/tegra30-cardhu.dts +index 5b9798c5a874..7534861e40d9 100644 +--- a/arch/arm/dts/tegra30-cardhu.dts ++++ b/arch/arm/dts/tegra30-cardhu.dts +@@ -27,7 +27,7 @@ + reg = <0x80000000 0x40000000>; + }; + +- pcie-controller@00003000 { ++ pcie@3000 { + status = "okay"; + + /* AVDD_PEXA and VDD_PEXA inputs are grounded on Cardhu. */ +diff --git a/arch/arm/dts/tegra30.dtsi b/arch/arm/dts/tegra30.dtsi +index 5030065cbdfe..f198bc0edbe8 100644 +--- a/arch/arm/dts/tegra30.dtsi ++++ b/arch/arm/dts/tegra30.dtsi +@@ -10,7 +10,7 @@ + compatible = "nvidia,tegra30"; + interrupt-parent = <&lic>; + +- pcie-controller@00003000 { ++ pcie@3000 { + compatible = "nvidia,tegra30-pcie"; + device_type = "pci"; + reg = <0x00003000 0x00000800 /* PADS registers */ + +From patchwork Mon Apr 15 09:32:38 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot, v5, + 26/27] ARM: tegra: Mark built-in Ethernet as default on Jetson TX2 +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1085540 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190415093239.27509-27-thierry.reding@gmail.com> +To: Tom Warren , + Simon Glass +Cc: u-boot@lists.denx.de, Jon Hunter +Date: Mon, 15 Apr 2019 11:32:38 +0200 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +Add an "ethernet" alias that points to the default network interface, +which is the built-in EQoS on Jetson TX2. + +Signed-off-by: Thierry Reding +--- + arch/arm/dts/tegra186-p2771-0000.dtsi | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/arch/arm/dts/tegra186-p2771-0000.dtsi b/arch/arm/dts/tegra186-p2771-0000.dtsi +index a1319dc4936f..7cda0b41f74b 100644 +--- a/arch/arm/dts/tegra186-p2771-0000.dtsi ++++ b/arch/arm/dts/tegra186-p2771-0000.dtsi +@@ -9,6 +9,7 @@ + }; + + aliases { ++ ethernet = "/ethernet@2490000"; + mmc0 = "/sdhci@3460000"; + mmc1 = "/sdhci@3400000"; + i2c0 = "/bpmp/i2c"; +@@ -28,6 +29,7 @@ + ethernet@2490000 { + status = "okay"; + phy-reset-gpios = <&gpio_main TEGRA_MAIN_GPIO(M, 4) GPIO_ACTIVE_LOW>; ++ local-mac-address = [ 00 00 00 00 00 00 ]; + }; + + i2c@3160000 { + +From patchwork Mon Apr 15 09:32:39 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot, v5, + 27/27] ARM: tegra: Add NVIDIA Jetson Nano Developer Kit support +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1085538 +X-Patchwork-Delegate: twarren@nvidia.com +Message-Id: <20190415093239.27509-28-thierry.reding@gmail.com> +To: Tom Warren , + Simon Glass +Cc: u-boot@lists.denx.de, Jon Hunter +Date: Mon, 15 Apr 2019 11:32:39 +0200 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +The Jetson Nano Developer Kit is a Tegra X1 based development board. It +is similar to Jetson TX1 but it is not pin compatible. It features 4 GB +of LPDDR4, an SPI NOR flash for early boot firmware and an SD card slot +used for storage. + +HDMI 2.0 or DP 1.2 are available for display, four USB ports (3 USB 2.0 +and 1 USB 3.0) can be used to attach a variety of peripherals and a PCI +Ethernet controller provides onboard network connectivity. + +A 40-pin header on the board can be used to extend the capabilities and +exposed interfaces of the Jetson Nano. + +Signed-off-by: Thierry Reding +--- +Changes in v5: +- add "ethernet" alias and store an empty MAC address as placeholder + +Changes in v3: +- rename "Development Kit" to "Developer Kit" +- drop alias for non-existent eMMC interface +- import pinmux from A02 spreadsheet +- drop preboot support for now +- fixup text base + + arch/arm/dts/Makefile | 3 +- + arch/arm/dts/tegra210-p3450-0000.dts | 135 +++++++++ + arch/arm/mach-tegra/tegra210/Kconfig | 7 + + board/nvidia/p3450-0000/Kconfig | 12 + + board/nvidia/p3450-0000/MAINTAINERS | 6 + + board/nvidia/p3450-0000/Makefile | 8 + + board/nvidia/p3450-0000/p3450-0000.c | 198 +++++++++++++ + .../p3450-0000/pinmux-config-p3450-0000.h | 265 ++++++++++++++++++ + configs/p3450-0000_defconfig | 55 ++++ + include/configs/p3450-0000.h | 34 +++ + 10 files changed, 722 insertions(+), 1 deletion(-) + create mode 100644 arch/arm/dts/tegra210-p3450-0000.dts + create mode 100644 board/nvidia/p3450-0000/Kconfig + create mode 100644 board/nvidia/p3450-0000/MAINTAINERS + create mode 100644 board/nvidia/p3450-0000/Makefile + create mode 100644 board/nvidia/p3450-0000/p3450-0000.c + create mode 100644 board/nvidia/p3450-0000/pinmux-config-p3450-0000.h + create mode 100644 configs/p3450-0000_defconfig + create mode 100644 include/configs/p3450-0000.h + +diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile +index 8167cdb4e856..f8d3441663c0 100644 +--- a/arch/arm/dts/Makefile ++++ b/arch/arm/dts/Makefile +@@ -127,7 +127,8 @@ dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \ + tegra210-e2220-1170.dtb \ + tegra210-p2371-0000.dtb \ + tegra210-p2371-2180.dtb \ +- tegra210-p2571.dtb ++ tegra210-p2571.dtb \ ++ tegra210-p3450-0000.dtb + + dtb-$(CONFIG_ARCH_MVEBU) += \ + armada-3720-db.dtb \ +diff --git a/arch/arm/dts/tegra210-p3450-0000.dts b/arch/arm/dts/tegra210-p3450-0000.dts +new file mode 100644 +index 000000000000..d45ee9afc016 +--- /dev/null ++++ b/arch/arm/dts/tegra210-p3450-0000.dts +@@ -0,0 +1,135 @@ ++/dts-v1/; ++ ++#include "tegra210.dtsi" ++ ++/ { ++ model = "NVIDIA Jetson Nano Developer Kit"; ++ compatible = "nvidia,p3450-0000", "nvidia,tegra210"; ++ ++ chosen { ++ stdout-path = &uarta; ++ }; ++ ++ aliases { ++ ethernet = "/pcie@1003000/pci@2,0/ethernet@0,0"; ++ i2c0 = "/i2c@7000d000"; ++ i2c2 = "/i2c@7000c400"; ++ i2c3 = "/i2c@7000c500"; ++ i2c4 = "/i2c@7000c700"; ++ sdhci0 = "/sdhci@700b0000"; ++ spi0 = "/spi@70410000"; ++ usb0 = "/usb@7d000000"; ++ }; ++ ++ memory { ++ reg = <0x0 0x80000000 0x0 0xc0000000>; ++ }; ++ ++ pcie@1003000 { ++ status = "okay"; ++ ++ pci@1,0 { ++ status = "okay"; ++ }; ++ ++ pci@2,0 { ++ status = "okay"; ++ ++ ethernet@0,0 { ++ reg = <0x000000 0 0 0 0>; ++ local-mac-address = [ 00 00 00 00 00 00 ]; ++ }; ++ }; ++ }; ++ ++ serial@70006000 { ++ status = "okay"; ++ }; ++ ++ padctl@7009f000 { ++ pinctrl-0 = <&padctl_default>; ++ pinctrl-names = "default"; ++ ++ padctl_default: pinmux { ++ xusb { ++ nvidia,lanes = "otg-1", "otg-2"; ++ nvidia,function = "xusb"; ++ nvidia,iddq = <0>; ++ }; ++ ++ usb3 { ++ nvidia,lanes = "pcie-5", "pcie-6"; ++ nvidia,function = "usb3"; ++ nvidia,iddq = <0>; ++ }; ++ ++ pcie-x1 { ++ nvidia,lanes = "pcie-0"; ++ nvidia,function = "pcie-x1"; ++ nvidia,iddq = <0>; ++ }; ++ ++ pcie-x4 { ++ nvidia,lanes = "pcie-1", "pcie-2", ++ "pcie-3", "pcie-4"; ++ nvidia,function = "pcie-x4"; ++ nvidia,iddq = <0>; ++ }; ++ ++ sata { ++ nvidia,lanes = "sata-0"; ++ nvidia,function = "sata"; ++ nvidia,iddq = <0>; ++ }; ++ }; ++ }; ++ ++ sdhci@700b0000 { ++ status = "okay"; ++ cd-gpios = <&gpio TEGRA_GPIO(Z, 1) GPIO_ACTIVE_LOW>; ++ power-gpios = <&gpio TEGRA_GPIO(Z, 3) GPIO_ACTIVE_HIGH>; ++ bus-width = <4>; ++ }; ++ ++ i2c@7000c400 { ++ status = "okay"; ++ clock-frequency = <400000>; ++ }; ++ ++ i2c@7000c500 { ++ status = "okay"; ++ clock-frequency = <400000>; ++ }; ++ ++ i2c@7000c700 { ++ status = "okay"; ++ clock-frequency = <400000>; ++ }; ++ ++ i2c@7000d000 { ++ status = "okay"; ++ clock-frequency = <400000>; ++ }; ++ ++ spi@70410000 { ++ status = "okay"; ++ }; ++ ++ usb@7d000000 { ++ status = "okay"; ++ dr_mode = "peripheral"; ++ }; ++ ++ clocks { ++ compatible = "simple-bus"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ clk32k_in: clock@0 { ++ compatible = "fixed-clock"; ++ reg = <0>; ++ #clock-cells = <0>; ++ clock-frequency = <32768>; ++ }; ++ }; ++}; +diff --git a/arch/arm/mach-tegra/tegra210/Kconfig b/arch/arm/mach-tegra/tegra210/Kconfig +index 250738aed312..ea28392c0f3a 100644 +--- a/arch/arm/mach-tegra/tegra210/Kconfig ++++ b/arch/arm/mach-tegra/tegra210/Kconfig +@@ -35,6 +35,12 @@ config TARGET_P2571 + help + P2571 is a P2530 married to a P1963 I/O board + ++config TARGET_P3450_0000 ++ bool "NVIDIA Jetson Nano Developer Kit" ++ select BOARD_LATE_INIT ++ help ++ P3450-0000 is a P3448 CPU board married to a P3449 I/O board. ++ + endchoice + + config SYS_SOC +@@ -47,5 +53,6 @@ source "board/nvidia/e2220-1170/Kconfig" + source "board/nvidia/p2371-0000/Kconfig" + source "board/nvidia/p2371-2180/Kconfig" + source "board/nvidia/p2571/Kconfig" ++source "board/nvidia/p3450-0000/Kconfig" + + endif +diff --git a/board/nvidia/p3450-0000/Kconfig b/board/nvidia/p3450-0000/Kconfig +new file mode 100644 +index 000000000000..7a08cd88675f +--- /dev/null ++++ b/board/nvidia/p3450-0000/Kconfig +@@ -0,0 +1,12 @@ ++if TARGET_P3450_0000 ++ ++config SYS_BOARD ++ default "p3450-0000" ++ ++config SYS_VENDOR ++ default "nvidia" ++ ++config SYS_CONFIG_NAME ++ default "p3450-0000" ++ ++endif +diff --git a/board/nvidia/p3450-0000/MAINTAINERS b/board/nvidia/p3450-0000/MAINTAINERS +new file mode 100644 +index 000000000000..40700066bf39 +--- /dev/null ++++ b/board/nvidia/p3450-0000/MAINTAINERS +@@ -0,0 +1,6 @@ ++P3450-0000 BOARD ++M: Tom Warren ++S: Maintained ++F: board/nvidia/p3450-0000/ ++F: include/configs/p3450-0000.h ++F: configs/p3450-0000_defconfig +diff --git a/board/nvidia/p3450-0000/Makefile b/board/nvidia/p3450-0000/Makefile +new file mode 100644 +index 000000000000..993c506d8200 +--- /dev/null ++++ b/board/nvidia/p3450-0000/Makefile +@@ -0,0 +1,8 @@ ++# ++# (C) Copyright 2018 ++# NVIDIA Corporation ++# ++# SPDX-License-Identifier: GPL-2.0+ ++# ++ ++obj-y += p3450-0000.o +diff --git a/board/nvidia/p3450-0000/p3450-0000.c b/board/nvidia/p3450-0000/p3450-0000.c +new file mode 100644 +index 000000000000..432179e92605 +--- /dev/null ++++ b/board/nvidia/p3450-0000/p3450-0000.c +@@ -0,0 +1,198 @@ ++/* ++ * (C) Copyright 2018 ++ * NVIDIA Corporation ++ * ++ * SPDX-License-Identifier: GPL-2.0+ ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include "../p2571/max77620_init.h" ++#include "pinmux-config-p3450-0000.h" ++ ++void pin_mux_mmc(void) ++{ ++ struct udevice *dev; ++ uchar val; ++ int ret; ++ ++ /* Turn on MAX77620 LDO2 to 3.3V for SD card power */ ++ debug("%s: Set LDO2 for VDDIO_SDMMC_AP power to 3.3V\n", __func__); ++ ret = i2c_get_chip_for_busnum(0, MAX77620_I2C_ADDR_7BIT, 1, &dev); ++ if (ret) { ++ printf("%s: Cannot find MAX77620 I2C chip\n", __func__); ++ return; ++ } ++ /* 0xF2 for 3.3v, enabled: bit7:6 = 11 = enable, bit5:0 = voltage */ ++ val = 0xF2; ++ ret = dm_i2c_write(dev, MAX77620_CNFG1_L2_REG, &val, 1); ++ if (ret) ++ printf("i2c_write 0 0x3c 0x27 failed: %d\n", ret); ++ ++ /* Disable LDO4 discharge */ ++ ret = dm_i2c_read(dev, MAX77620_CNFG2_L4_REG, &val, 1); ++ if (ret) { ++ printf("i2c_read 0 0x3c 0x2c failed: %d\n", ret); ++ } else { ++ val &= ~BIT(1); /* ADE */ ++ ret = dm_i2c_write(dev, MAX77620_CNFG2_L4_REG, &val, 1); ++ if (ret) ++ printf("i2c_write 0 0x3c 0x2c failed: %d\n", ret); ++ } ++ ++ /* Set MBLPD */ ++ ret = dm_i2c_read(dev, MAX77620_CNFGGLBL1_REG, &val, 1); ++ if (ret) { ++ printf("i2c_write 0 0x3c 0x00 failed: %d\n", ret); ++ } else { ++ val |= BIT(6); /* MBLPD */ ++ ret = dm_i2c_write(dev, MAX77620_CNFGGLBL1_REG, &val, 1); ++ if (ret) ++ printf("i2c_write 0 0x3c 0x00 failed: %d\n", ret); ++ } ++} ++ ++/* ++ * Routine: pinmux_init ++ * Description: Do individual peripheral pinmux configs ++ */ ++void pinmux_init(void) ++{ ++ pinmux_clear_tristate_input_clamping(); ++ ++ gpio_config_table(p3450_0000_gpio_inits, ++ ARRAY_SIZE(p3450_0000_gpio_inits)); ++ ++ pinmux_config_pingrp_table(p3450_0000_pingrps, ++ ARRAY_SIZE(p3450_0000_pingrps)); ++ ++ pinmux_config_drvgrp_table(p3450_0000_drvgrps, ++ ARRAY_SIZE(p3450_0000_drvgrps)); ++} ++ ++#ifdef CONFIG_PCI_TEGRA ++int tegra_pcie_board_init(void) ++{ ++ struct udevice *dev; ++ uchar val; ++ int ret; ++ ++ /* Turn on MAX77620 LDO1 to 1.05V for PEX power */ ++ debug("%s: Set LDO1 for PEX power to 1.05V\n", __func__); ++ ret = i2c_get_chip_for_busnum(0, MAX77620_I2C_ADDR_7BIT, 1, &dev); ++ if (ret) { ++ printf("%s: Cannot find MAX77620 I2C chip\n", __func__); ++ return -1; ++ } ++ /* 0xCA for 1.05v, enabled: bit7:6 = 11 = enable, bit5:0 = voltage */ ++ val = 0xCA; ++ ret = dm_i2c_write(dev, MAX77620_CNFG1_L1_REG, &val, 1); ++ if (ret) ++ printf("i2c_write 0 0x3c 0x25 failed: %d\n", ret); ++ ++ return 0; ++} ++#endif /* PCI */ ++ ++static void ft_mac_address_setup(void *fdt) ++{ ++ const void *cboot_fdt = (const void *)cboot_boot_x0; ++ uint8_t mac[ETH_ALEN], local_mac[ETH_ALEN]; ++ const char *path; ++ int offset, err; ++ ++ err = cboot_get_ethaddr(cboot_fdt, local_mac); ++ if (err < 0) ++ memset(local_mac, 0, ETH_ALEN); ++ ++ path = fdt_get_alias(fdt, "ethernet"); ++ if (!path) ++ return; ++ ++ debug("ethernet alias found: %s\n", path); ++ ++ offset = fdt_path_offset(fdt, path); ++ if (offset < 0) { ++ printf("ethernet alias points to absent node %s\n", path); ++ return; ++ } ++ ++ if (is_valid_ethaddr(local_mac)) { ++ err = fdt_setprop(fdt, offset, "local-mac-address", local_mac, ++ ETH_ALEN); ++ if (!err) ++ debug("Local MAC address set: %pM\n", local_mac); ++ } ++ ++ if (eth_env_get_enetaddr("ethaddr", mac)) { ++ if (memcmp(local_mac, mac, ETH_ALEN) != 0) { ++ err = fdt_setprop(fdt, offset, "mac-address", mac, ++ ETH_ALEN); ++ if (!err) ++ debug("MAC address set: %pM\n", mac); ++ } ++ } ++} ++ ++static int ft_copy_carveout(void *dst, const void *src, const char *node) ++{ ++ struct fdt_memory fb; ++ int err; ++ ++ err = fdtdec_get_carveout(src, node, "memory-region", 0, &fb); ++ if (err < 0) { ++ if (err != -FDT_ERR_NOTFOUND) ++ printf("failed to get carveout for %s: %d\n", node, ++ err); ++ ++ return err; ++ } ++ ++ err = fdtdec_set_carveout(dst, node, "memory-region", 0, "framebuffer", ++ &fb); ++ if (err < 0) { ++ printf("failed to set carveout for %s: %d\n", node, err); ++ return err; ++ } ++ ++ return 0; ++} ++ ++static void ft_carveout_setup(void *fdt) ++{ ++ const void *cboot_fdt = (const void *)cboot_boot_x0; ++ static const char * const nodes[] = { ++ "/host1x@50000000/dc@54200000", ++ "/host1x@50000000/dc@54240000", ++ }; ++ unsigned int i; ++ int err; ++ ++ for (i = 0; i < ARRAY_SIZE(nodes); i++) { ++ printf("copying carveout for %s...\n", nodes[i]); ++ ++ err = ft_copy_carveout(fdt, cboot_fdt, nodes[i]); ++ if (err < 0) { ++ if (err != -FDT_ERR_NOTFOUND) ++ printf("failed to copy carveout for %s: %d\n", ++ nodes[i], err); ++ ++ continue; ++ } ++ } ++} ++ ++int ft_board_setup(void *fdt, bd_t *bd) ++{ ++ ft_mac_address_setup(fdt); ++ ft_carveout_setup(fdt); ++ ++ return 0; ++} +diff --git a/board/nvidia/p3450-0000/pinmux-config-p3450-0000.h b/board/nvidia/p3450-0000/pinmux-config-p3450-0000.h +new file mode 100644 +index 000000000000..722da4973542 +--- /dev/null ++++ b/board/nvidia/p3450-0000/pinmux-config-p3450-0000.h +@@ -0,0 +1,265 @@ ++/* ++ * Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved. ++ * ++ * SPDX-License-Identifier: GPL-2.0+ ++ */ ++ ++/* ++ * THIS FILE IS AUTO-GENERATED - DO NOT EDIT! ++ * ++ * To generate this file, use the tegra-pinmux-scripts tool available from ++ * https://github.com/NVIDIA/tegra-pinmux-scripts ++ * Run "board-to-uboot.py p3450-0000". ++ */ ++ ++#ifndef _PINMUX_CONFIG_P3450_0000_H_ ++#define _PINMUX_CONFIG_P3450_0000_H_ ++ ++#define GPIO_INIT(_port, _gpio, _init) \ ++ { \ ++ .gpio = TEGRA_GPIO(_port, _gpio), \ ++ .init = TEGRA_GPIO_INIT_##_init, \ ++ } ++ ++static const struct tegra_gpio_config p3450_0000_gpio_inits[] = { ++ /* port, pin, init_val */ ++ GPIO_INIT(A, 5, IN), ++ GPIO_INIT(A, 6, OUT1), ++ GPIO_INIT(B, 4, IN), ++ GPIO_INIT(B, 5, IN), ++ GPIO_INIT(B, 6, IN), ++ GPIO_INIT(B, 7, IN), ++ GPIO_INIT(C, 0, IN), ++ GPIO_INIT(C, 1, IN), ++ GPIO_INIT(C, 2, IN), ++ GPIO_INIT(C, 3, IN), ++ GPIO_INIT(C, 4, IN), ++ GPIO_INIT(E, 6, IN), ++ GPIO_INIT(G, 2, IN), ++ GPIO_INIT(G, 3, IN), ++ GPIO_INIT(H, 0, OUT0), ++ GPIO_INIT(H, 2, IN), ++ GPIO_INIT(H, 3, OUT0), ++ GPIO_INIT(H, 4, OUT0), ++ GPIO_INIT(H, 5, IN), ++ GPIO_INIT(H, 6, IN), ++ GPIO_INIT(H, 7, OUT0), ++ GPIO_INIT(I, 0, OUT0), ++ GPIO_INIT(I, 1, IN), ++ GPIO_INIT(I, 2, OUT0), ++ GPIO_INIT(J, 4, IN), ++ GPIO_INIT(J, 5, IN), ++ GPIO_INIT(J, 6, IN), ++ GPIO_INIT(J, 7, IN), ++ GPIO_INIT(S, 5, IN), ++ GPIO_INIT(S, 7, OUT0), ++ GPIO_INIT(T, 0, OUT0), ++ GPIO_INIT(V, 0, IN), ++ GPIO_INIT(V, 1, IN), ++ GPIO_INIT(X, 3, OUT1), ++ GPIO_INIT(X, 4, IN), ++ GPIO_INIT(X, 5, IN), ++ GPIO_INIT(X, 6, IN), ++ GPIO_INIT(Y, 1, IN), ++ GPIO_INIT(Y, 2, IN), ++ GPIO_INIT(Z, 0, IN), ++ GPIO_INIT(Z, 2, IN), ++ GPIO_INIT(Z, 3, OUT0), ++ GPIO_INIT(BB, 0, IN), ++ GPIO_INIT(CC, 4, IN), ++ GPIO_INIT(DD, 0, IN), ++}; ++ ++#define PINCFG(_pingrp, _mux, _pull, _tri, _io, _od, _e_io_hv) \ ++ { \ ++ .pingrp = PMUX_PINGRP_##_pingrp, \ ++ .func = PMUX_FUNC_##_mux, \ ++ .pull = PMUX_PULL_##_pull, \ ++ .tristate = PMUX_TRI_##_tri, \ ++ .io = PMUX_PIN_##_io, \ ++ .od = PMUX_PIN_OD_##_od, \ ++ .e_io_hv = PMUX_PIN_E_IO_HV_##_e_io_hv, \ ++ .lock = PMUX_PIN_LOCK_DEFAULT, \ ++ } ++ ++static const struct pmux_pingrp_config p3450_0000_pingrps[] = { ++ /* pingrp, mux, pull, tri, e_input, od, e_io_hv */ ++ PINCFG(PEX_L0_RST_N_PA0, PE0, NORMAL, NORMAL, OUTPUT, DISABLE, HIGH), ++ PINCFG(PEX_L0_CLKREQ_N_PA1, PE0, NORMAL, NORMAL, INPUT, DISABLE, HIGH), ++ PINCFG(PEX_WAKE_N_PA2, PE, NORMAL, NORMAL, INPUT, DISABLE, HIGH), ++ PINCFG(PEX_L1_RST_N_PA3, PE1, NORMAL, NORMAL, OUTPUT, DISABLE, HIGH), ++ PINCFG(PEX_L1_CLKREQ_N_PA4, PE1, NORMAL, NORMAL, INPUT, DISABLE, HIGH), ++ PINCFG(SATA_LED_ACTIVE_PA5, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(PA6, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(DAP1_FS_PB0, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(DAP1_DIN_PB1, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(DAP1_DOUT_PB2, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(DAP1_SCLK_PB3, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(SPI2_MOSI_PB4, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(SPI2_MISO_PB5, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(SPI2_SCK_PB6, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(SPI2_CS0_PB7, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(SPI1_MOSI_PC0, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(SPI1_MISO_PC1, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(SPI1_SCK_PC2, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(SPI1_CS0_PC3, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(SPI1_CS1_PC4, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(SPI4_SCK_PC5, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(SPI4_CS0_PC6, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(SPI4_MOSI_PC7, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(SPI4_MISO_PD0, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(UART3_TX_PD1, UARTC, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(UART3_RX_PD2, UARTC, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(UART3_RTS_PD3, UARTC, UP, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(UART3_CTS_PD4, UARTC, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(DMIC1_CLK_PE0, I2S3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(DMIC1_DAT_PE1, I2S3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(DMIC2_CLK_PE2, I2S3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(DMIC2_DAT_PE3, I2S3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(DMIC3_CLK_PE4, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(DMIC3_DAT_PE5, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(PE6, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(PE7, PWM3, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(GEN3_I2C_SCL_PF0, I2C3, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), ++ PINCFG(GEN3_I2C_SDA_PF1, I2C3, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), ++ PINCFG(UART2_TX_PG0, UARTB, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(UART2_RX_PG1, UARTB, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(UART2_RTS_PG2, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(UART2_CTS_PG3, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(WIFI_EN_PH0, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(WIFI_RST_PH1, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(WIFI_WAKE_AP_PH2, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(AP_WAKE_BT_PH3, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(BT_RST_PH4, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(BT_WAKE_AP_PH5, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(PH6, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(AP_WAKE_NFC_PH7, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(NFC_EN_PI0, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(NFC_INT_PI1, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(GPS_EN_PI2, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(GPS_RST_PI3, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(UART4_TX_PI4, UARTD, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(UART4_RX_PI5, UARTD, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(UART4_RTS_PI6, UARTD, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(UART4_CTS_PI7, UARTD, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(GEN1_I2C_SDA_PJ0, I2C1, NORMAL, NORMAL, INPUT, DISABLE, HIGH), ++ PINCFG(GEN1_I2C_SCL_PJ1, I2C1, NORMAL, NORMAL, INPUT, DISABLE, HIGH), ++ PINCFG(GEN2_I2C_SCL_PJ2, I2C2, NORMAL, NORMAL, INPUT, DISABLE, HIGH), ++ PINCFG(GEN2_I2C_SDA_PJ3, I2C2, NORMAL, NORMAL, INPUT, DISABLE, HIGH), ++ PINCFG(DAP4_FS_PJ4, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(DAP4_DIN_PJ5, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(DAP4_DOUT_PJ6, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(DAP4_SCLK_PJ7, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(PK0, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(PK1, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(PK2, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(PK3, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(PK4, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(PK5, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(PK6, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(PK7, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(PL0, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(PL1, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(SDMMC1_CLK_PM0, SDMMC1, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(SDMMC1_CMD_PM1, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(SDMMC1_DAT3_PM2, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(SDMMC1_DAT2_PM3, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(SDMMC1_DAT1_PM4, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(SDMMC1_DAT0_PM5, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(SDMMC3_CLK_PP0, SDMMC3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(SDMMC3_CMD_PP1, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(SDMMC3_DAT3_PP2, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(SDMMC3_DAT2_PP3, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(SDMMC3_DAT1_PP4, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(SDMMC3_DAT0_PP5, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(CAM1_MCLK_PS0, EXTPERIPH3, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(CAM2_MCLK_PS1, EXTPERIPH3, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(CAM_I2C_SCL_PS2, I2CVI, NORMAL, NORMAL, INPUT, DISABLE, HIGH), ++ PINCFG(CAM_I2C_SDA_PS3, I2CVI, NORMAL, NORMAL, INPUT, DISABLE, HIGH), ++ PINCFG(CAM_RST_PS4, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(CAM_AF_EN_PS5, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(CAM_FLASH_EN_PS6, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(CAM1_PWDN_PS7, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(CAM2_PWDN_PT0, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(CAM1_STROBE_PT1, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(UART1_TX_PU0, UARTA, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(UART1_RX_PU1, UARTA, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(UART1_RTS_PU2, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(UART1_CTS_PU3, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(LCD_BL_PWM_PV0, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(LCD_BL_EN_PV1, DEFAULT, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(LCD_RST_PV2, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(LCD_GPIO1_PV3, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(LCD_GPIO2_PV4, PWM1, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(AP_READY_PV5, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(TOUCH_RST_PV6, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(TOUCH_CLK_PV7, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(MODEM_WAKE_AP_PX0, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(TOUCH_INT_PX1, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(MOTION_INT_PX2, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(ALS_PROX_INT_PX3, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(TEMP_ALERT_PX4, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(BUTTON_POWER_ON_PX5, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(BUTTON_VOL_UP_PX6, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(BUTTON_VOL_DOWN_PX7, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(BUTTON_SLIDE_SW_PY0, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(BUTTON_HOME_PY1, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(LCD_TE_PY2, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(PWR_I2C_SCL_PY3, I2CPMU, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), ++ PINCFG(PWR_I2C_SDA_PY4, I2CPMU, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), ++ PINCFG(CLK_32K_OUT_PY5, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(PZ0, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(PZ1, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(PZ2, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(PZ3, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(PZ4, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(PZ5, SOC, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(DAP2_FS_PAA0, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(DAP2_SCLK_PAA1, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(DAP2_DIN_PAA2, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(DAP2_DOUT_PAA3, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(AUD_MCLK_PBB0, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(DVFS_PWM_PBB1, CLDVFS, NORMAL, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(DVFS_CLK_PBB2, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(GPIO_X1_AUD_PBB3, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(GPIO_X3_AUD_PBB4, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(HDMI_CEC_PCC0, CEC, NORMAL, NORMAL, INPUT, DISABLE, HIGH), ++ PINCFG(HDMI_INT_DP_HPD_PCC1, DP, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), ++ PINCFG(SPDIF_OUT_PCC2, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(SPDIF_IN_PCC3, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(USB_VBUS_EN0_PCC4, DEFAULT, UP, NORMAL, INPUT, DISABLE, NORMAL), ++ PINCFG(USB_VBUS_EN1_PCC5, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, NORMAL), ++ PINCFG(DP_HPD0_PCC6, DP, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(PCC7, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, NORMAL), ++ PINCFG(SPI2_CS1_PDD0, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(QSPI_SCK_PEE0, QSPI, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(QSPI_CS_N_PEE1, QSPI, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(QSPI_IO0_PEE2, QSPI, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(QSPI_IO1_PEE3, QSPI, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(QSPI_IO2_PEE4, QSPI, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(QSPI_IO3_PEE5, QSPI, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(CORE_PWR_REQ, CORE, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(CPU_PWR_REQ, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(PWR_INT_N, PMI, UP, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(CLK_32K_IN, CLK, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), ++ PINCFG(JTAG_RTCK, JTAG, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(CLK_REQ, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), ++ PINCFG(SHUTDOWN, SHUTDOWN, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), ++}; ++ ++#define DRVCFG(_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) \ ++ { \ ++ .drvgrp = PMUX_DRVGRP_##_drvgrp, \ ++ .slwf = _slwf, \ ++ .slwr = _slwr, \ ++ .drvup = _drvup, \ ++ .drvdn = _drvdn, \ ++ .lpmd = PMUX_LPMD_##_lpmd, \ ++ .schmt = PMUX_SCHMT_##_schmt, \ ++ .hsm = PMUX_HSM_##_hsm, \ ++ } ++ ++static const struct pmux_drvgrp_config p3450_0000_drvgrps[] = { ++}; ++ ++#endif /* PINMUX_CONFIG_P3450_0000_H */ +diff --git a/configs/p3450-0000_defconfig b/configs/p3450-0000_defconfig +new file mode 100644 +index 000000000000..3a95028279d3 +--- /dev/null ++++ b/configs/p3450-0000_defconfig +@@ -0,0 +1,55 @@ ++CONFIG_ARM=y ++CONFIG_TEGRA=y ++CONFIG_SYS_TEXT_BASE=0x80080000 ++CONFIG_TEGRA210=y ++CONFIG_TARGET_P3450_0000=y ++CONFIG_NR_DRAM_BANKS=2 ++CONFIG_OF_SYSTEM_SETUP=y ++CONFIG_OF_BOARD_SETUP=y ++CONFIG_CONSOLE_MUX=y ++CONFIG_SYS_STDIO_DEREGISTER=y ++CONFIG_SYS_PROMPT="Tegra210 (P3450-0000) # " ++# CONFIG_CMD_IMI is not set ++CONFIG_CMD_DFU=y ++# CONFIG_CMD_FLASH is not set ++CONFIG_CMD_GPIO=y ++CONFIG_CMD_I2C=y ++CONFIG_CMD_MMC=y ++CONFIG_CMD_PCI=y ++CONFIG_CMD_SF=y ++CONFIG_CMD_SPI=y ++CONFIG_CMD_USB=y ++CONFIG_CMD_USB_MASS_STORAGE=y ++# CONFIG_CMD_SETEXPR is not set ++# CONFIG_CMD_NFS is not set ++CONFIG_CMD_EXT4_WRITE=y ++CONFIG_OF_LIVE=y ++CONFIG_DEFAULT_DEVICE_TREE="tegra210-p3450-0000" ++CONFIG_DFU_MMC=y ++CONFIG_DFU_RAM=y ++CONFIG_DFU_SF=y ++CONFIG_SYS_I2C_TEGRA=y ++CONFIG_SPI_FLASH=y ++CONFIG_SF_DEFAULT_MODE=0 ++CONFIG_SF_DEFAULT_SPEED=24000000 ++CONFIG_SPI_FLASH_WINBOND=y ++CONFIG_RTL8169=y ++CONFIG_PCI=y ++CONFIG_DM_PCI=y ++CONFIG_DM_PCI_COMPAT=y ++CONFIG_PCI_TEGRA=y ++CONFIG_SYS_NS16550=y ++CONFIG_TEGRA114_SPI=y ++CONFIG_USB=y ++CONFIG_DM_USB=y ++CONFIG_USB_EHCI_HCD=y ++CONFIG_USB_EHCI_TEGRA=y ++CONFIG_USB_GADGET=y ++CONFIG_USB_GADGET_MANUFACTURER="NVIDIA" ++CONFIG_USB_GADGET_VENDOR_NUM=0x0955 ++CONFIG_USB_GADGET_PRODUCT_NUM=0x701a ++CONFIG_CI_UDC=y ++CONFIG_USB_GADGET_DOWNLOAD=y ++CONFIG_USB_HOST_ETHER=y ++CONFIG_USB_ETHER_ASIX=y ++# CONFIG_ENV_IS_IN_MMC is not set +diff --git a/include/configs/p3450-0000.h b/include/configs/p3450-0000.h +new file mode 100644 +index 000000000000..ee819b7573b0 +--- /dev/null ++++ b/include/configs/p3450-0000.h +@@ -0,0 +1,34 @@ ++/* SPDX-License-Identifier: GPL-2.0+ */ ++/* ++ * (C) Copyright 2018-2019 NVIDIA Corporation. All rights reserved. ++ */ ++ ++#ifndef _P3450_0000_H ++#define _P3450_0000_H ++ ++#include ++ ++#include "tegra210-common.h" ++ ++/* High-level configuration options */ ++#define CONFIG_TEGRA_BOARD_STRING "NVIDIA P3450-0000" ++ ++/* Board-specific serial config */ ++#define CONFIG_TEGRA_ENABLE_UARTA ++ ++/* Only MMC1/PXE/DHCP for now, add USB back in later when supported */ ++#define BOOT_TARGET_DEVICES(func) \ ++ func(MMC, mmc, 0) \ ++ func(PXE, pxe, na) \ ++ func(DHCP, dhcp, na) ++ ++/* SPI */ ++#define CONFIG_SPI_FLASH_SIZE (4 << 20) ++ ++#include "tegra-common-usb-gadget.h" ++#include "tegra-common-post.h" ++ ++/* Crystal is 38.4MHz. clk_m runs at half that rate */ ++#define COUNTER_FREQUENCY 19200000 ++ ++#endif /* _P3450_0000_H */ diff --git a/arm-tegra-defaine-fdtfile-for-all-devices.patch b/arm-tegra-defaine-fdtfile-for-all-devices.patch new file mode 100644 index 0000000..50c1c1f --- /dev/null +++ b/arm-tegra-defaine-fdtfile-for-all-devices.patch @@ -0,0 +1,162 @@ +From 1e93c98419e6a1ea62ef697ed915617024eb6da0 Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Thu, 18 Apr 2019 14:03:33 +0100 +Subject: [PATCH] arm: tegra: defaine fdtfile for all devices + +Signed-off-by: Peter Robinson +--- + include/configs/tegra-common.h | 6 ++++++ + include/configs/tegra114-common.h | 1 + + include/configs/tegra124-common.h | 1 + + include/configs/tegra186-common.h | 1 + + include/configs/tegra20-common.h | 1 + + include/configs/tegra210-common.h | 1 + + include/configs/tegra30-common.h | 1 + + 7 files changed, 12 insertions(+) + +diff --git a/include/configs/tegra-common.h b/include/configs/tegra-common.h +index 84f671d00c..c3e16d8cfc 100644 +--- a/include/configs/tegra-common.h ++++ b/include/configs/tegra-common.h +@@ -56,6 +56,12 @@ + #define CONFIG_SYS_MEMTEST_START (NV_PA_SDRC_CS0 + 0x600000) + #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x100000) + ++#ifdef CONFIG_ARM64 ++#define FDTFILE "nvidia/" CONFIG_DEFAULT_DEVICE_TREE ".dtb" ++#else ++#define FDTFILE CONFIG_DEFAULT_DEVICE_TREE ".dtb" ++#endif ++ + /*----------------------------------------------------------------------- + * Physical Memory Map + */ +diff --git a/include/configs/tegra114-common.h b/include/configs/tegra114-common.h +index 1aa4412645..0c44a7673b 100644 +--- a/include/configs/tegra114-common.h ++++ b/include/configs/tegra114-common.h +@@ -50,6 +50,7 @@ + "scriptaddr=0x90000000\0" \ + "pxefile_addr_r=0x90100000\0" \ + "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ ++ "fdtfile=" FDTFILE "\0" \ + "fdt_addr_r=0x83000000\0" \ + "ramdisk_addr_r=0x83100000\0" + +diff --git a/include/configs/tegra124-common.h b/include/configs/tegra124-common.h +index 3530684164..29da06c8f7 100644 +--- a/include/configs/tegra124-common.h ++++ b/include/configs/tegra124-common.h +@@ -52,6 +52,7 @@ + "scriptaddr=0x90000000\0" \ + "pxefile_addr_r=0x90100000\0" \ + "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ ++ "fdtfile=" FDTFILE "\0" \ + "fdt_addr_r=0x83000000\0" \ + "ramdisk_addr_r=0x83100000\0" + +diff --git a/include/configs/tegra186-common.h b/include/configs/tegra186-common.h +index b4936cc731..5c3ad35c76 100644 +--- a/include/configs/tegra186-common.h ++++ b/include/configs/tegra186-common.h +@@ -49,6 +49,7 @@ + "scriptaddr=0x90000000\0" \ + "pxefile_addr_r=0x90100000\0" \ + "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ ++ "fdtfile=" FDTFILE "\0" \ + "fdt_addr_r=0x82000000\0" \ + "ramdisk_addr_r=0x82100000\0" + +diff --git a/include/configs/tegra20-common.h b/include/configs/tegra20-common.h +index e58477e289..73c94d993b 100644 +--- a/include/configs/tegra20-common.h ++++ b/include/configs/tegra20-common.h +@@ -51,6 +51,7 @@ + "scriptaddr=0x10000000\0" \ + "pxefile_addr_r=0x10100000\0" \ + "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ ++ "fdtfile=" FDTFILE "\0" \ + "fdt_addr_r=0x03000000\0" \ + "ramdisk_addr_r=0x03100000\0" + +diff --git a/include/configs/tegra210-common.h b/include/configs/tegra210-common.h +index 1c533118ad..69e446ed58 100644 +--- a/include/configs/tegra210-common.h ++++ b/include/configs/tegra210-common.h +@@ -46,6 +46,7 @@ + "scriptaddr=0x90000000\0" \ + "pxefile_addr_r=0x90100000\0" \ + "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ ++ "fdtfile=" FDTFILE "\0" \ + "fdt_addr_r=0x82000000\0" \ + "ramdisk_addr_r=0x82100000\0" + +diff --git a/include/configs/tegra30-common.h b/include/configs/tegra30-common.h +index 2d8948d9d9..27696009cd 100644 +--- a/include/configs/tegra30-common.h ++++ b/include/configs/tegra30-common.h +@@ -47,6 +47,7 @@ + "scriptaddr=0x90000000\0" \ + "pxefile_addr_r=0x90100000\0" \ + "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ ++ "fdtfile=" FDTFILE "\0" \ + "fdt_addr_r=0x83000000\0" \ + "ramdisk_addr_r=0x83100000\0" + +-- +2.21.0 +From 267dc15aa8f247362b04387d6a1ab01d94d41aef Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Thu, 18 Apr 2019 15:44:59 +0100 +Subject: [PATCH] add BOOTENV_EFI_SET_FDTFILE_FALLBACK for tegra186 because tx2 + variants + +Signed-off-by: Peter Robinson +--- + include/config_distro_bootcmd.h | 2 ++ + include/configs/tegra186-common.h | 7 ++++++- + 2 files changed, 8 insertions(+), 1 deletion(-) + +diff --git a/include/config_distro_bootcmd.h b/include/config_distro_bootcmd.h +index 4993303f4d..cd317bb457 100644 +--- a/include/config_distro_bootcmd.h ++++ b/include/config_distro_bootcmd.h +@@ -118,8 +118,10 @@ + "setenv efi_fdtfile ${soc}-${board}${boardver}.dtb; " \ + "fi; " + #else ++#ifndef BOOTENV_EFI_SET_FDTFILE_FALLBACK + #define BOOTENV_EFI_SET_FDTFILE_FALLBACK + #endif ++#endif + + + #define BOOTENV_SHARED_EFI \ +diff --git a/include/configs/tegra186-common.h b/include/configs/tegra186-common.h +index 5c3ad35c76..d5f21e0907 100644 +--- a/include/configs/tegra186-common.h ++++ b/include/configs/tegra186-common.h +@@ -20,6 +20,12 @@ + /* Generic Interrupt Controller */ + #define CONFIG_GICV2 + ++#undef FDTFILE ++#define BOOTENV_EFI_SET_FDTFILE_FALLBACK \ ++ "if test -z \"${fdtfile}\" -a -n \"${soc}\"; then " \ ++ "setenv efi_fdtfile ${vendor}/${soc}-${board}${boardver}.dtb; " \ ++ "fi; " ++ + /* + * Memory layout for where various images get loaded by boot scripts: + * +@@ -49,7 +55,6 @@ + "scriptaddr=0x90000000\0" \ + "pxefile_addr_r=0x90100000\0" \ + "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ +- "fdtfile=" FDTFILE "\0" \ + "fdt_addr_r=0x82000000\0" \ + "ramdisk_addr_r=0x82100000\0" + +-- +2.21.0 + diff --git a/net-eth-uclass-Write-MAC-address-to-hardware-after-probe.patch b/net-eth-uclass-Write-MAC-address-to-hardware-after-probe.patch index 2896af8..237b4a6 100644 --- a/net-eth-uclass-Write-MAC-address-to-hardware-after-probe.patch +++ b/net-eth-uclass-Write-MAC-address-to-hardware-after-probe.patch @@ -1,16 +1,15 @@ -From patchwork Fri Mar 8 19:51:25 2019 +From patchwork Tue Apr 16 16:24:16 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [U-Boot, - 1/3] net: eth-uclass: Write MAC address to hardware after probe +Subject: [U-Boot, v2, + 1/2] net: eth-uclass: Write MAC address to hardware after probe X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1053669 -Message-Id: <20190308195127.32711-1-thierry.reding@gmail.com> -To: Joe Hershberger -Cc: u-boot@lists.denx.de, Stephen Warren , - Tom Warren -Date: Fri, 8 Mar 2019 20:51:25 +0100 +X-Patchwork-Id: 1086417 +Message-Id: <20190416162417.25799-1-thierry.reding@gmail.com> +To: Simon Glass , Joe Hershberger +Cc: u-boot@lists.denx.de +Date: Tue, 16 Apr 2019 18:24:16 +0200 From: Thierry Reding List-Id: U-Boot discussion @@ -44,104 +43,155 @@ index 2ef20df19203..4225aabf1fa1 100644 } -From patchwork Fri Mar 8 19:51:26 2019 +From patchwork Tue Apr 16 16:24:17 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [U-Boot,2/3] net: rtl8169: Implement ->hwaddr_write() callback +Subject: [U-Boot,v2,2/2] net: eth-uclass: Support device tree MAC addresses X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1053670 -Message-Id: <20190308195127.32711-2-thierry.reding@gmail.com> -To: Joe Hershberger -Cc: u-boot@lists.denx.de, Stephen Warren , - Tom Warren -Date: Fri, 8 Mar 2019 20:51:26 +0100 +X-Patchwork-Id: 1086418 +Message-Id: <20190416162417.25799-2-thierry.reding@gmail.com> +To: Simon Glass , Joe Hershberger +Cc: u-boot@lists.denx.de +Date: Tue, 16 Apr 2019 18:24:17 +0200 From: Thierry Reding List-Id: U-Boot discussion From: Thierry Reding -Implement this callback that allows the MAC address to be set for the -Ethernet card. This is necessary in order for the device to be able to -receive packets for the MAC address that U-Boot advertises. +Add the standard Ethernet device tree bindings (imported from v5.0 of +the Linux kernel) and implement support for reading the MAC address for +Ethernet devices in the Ethernet uclass. If the "mac-address" property +exists, the MAC address will be parsed from that. If that property does +not exist, the "local-mac-address" property will be tried as fallback. +MAC addresses from device tree take precedence over the ones stored in +a network interface card's ROM. + +Acked-by: Joe Hershberger Signed-off-by: Thierry Reding --- - drivers/net/rtl8169.c | 18 ++++++++++++++++++ - 1 file changed, 18 insertions(+) +Changes in v2: +- use dev_read_u8_array_ptr() -diff --git a/drivers/net/rtl8169.c b/drivers/net/rtl8169.c -index a78f3d233f1a..27e27b34176b 100644 ---- a/drivers/net/rtl8169.c -+++ b/drivers/net/rtl8169.c -@@ -941,6 +941,23 @@ static void rtl_halt(struct eth_device *dev) + .../devicetree/bindings/net/ethernet.txt | 66 +++++++++++++++++++ + net/eth-uclass.c | 26 +++++++- + 2 files changed, 89 insertions(+), 3 deletions(-) + create mode 100644 Documentation/devicetree/bindings/net/ethernet.txt + +diff --git a/Documentation/devicetree/bindings/net/ethernet.txt b/Documentation/devicetree/bindings/net/ethernet.txt +new file mode 100644 +index 000000000000..cfc376bc977a +--- /dev/null ++++ b/Documentation/devicetree/bindings/net/ethernet.txt +@@ -0,0 +1,66 @@ ++The following properties are common to the Ethernet controllers: ++ ++NOTE: All 'phy*' properties documented below are Ethernet specific. For the ++generic PHY 'phys' property, see ++Documentation/devicetree/bindings/phy/phy-bindings.txt. ++ ++- local-mac-address: array of 6 bytes, specifies the MAC address that was ++ assigned to the network device; ++- mac-address: array of 6 bytes, specifies the MAC address that was last used by ++ the boot program; should be used in cases where the MAC address assigned to ++ the device by the boot program is different from the "local-mac-address" ++ property; ++- nvmem-cells: phandle, reference to an nvmem node for the MAC address; ++- nvmem-cell-names: string, should be "mac-address" if nvmem is to be used; ++- max-speed: number, specifies maximum speed in Mbit/s supported by the device; ++- max-frame-size: number, maximum transfer unit (IEEE defined MTU), rather than ++ the maximum frame size (there's contradiction in the Devicetree ++ Specification). ++- phy-mode: string, operation mode of the PHY interface. This is now a de-facto ++ standard property; supported values are: ++ * "internal" ++ * "mii" ++ * "gmii" ++ * "sgmii" ++ * "qsgmii" ++ * "tbi" ++ * "rev-mii" ++ * "rmii" ++ * "rgmii" (RX and TX delays are added by the MAC when required) ++ * "rgmii-id" (RGMII with internal RX and TX delays provided by the PHY, the ++ MAC should not add the RX or TX delays in this case) ++ * "rgmii-rxid" (RGMII with internal RX delay provided by the PHY, the MAC ++ should not add an RX delay in this case) ++ * "rgmii-txid" (RGMII with internal TX delay provided by the PHY, the MAC ++ should not add an TX delay in this case) ++ * "rtbi" ++ * "smii" ++ * "xgmii" ++ * "trgmii" ++ * "2000base-x", ++ * "2500base-x", ++ * "rxaui" ++ * "xaui" ++ * "10gbase-kr" (10GBASE-KR, XFI, SFI) ++- phy-connection-type: the same as "phy-mode" property but described in the ++ Devicetree Specification; ++- phy-handle: phandle, specifies a reference to a node representing a PHY ++ device; this property is described in the Devicetree Specification and so ++ preferred; ++- phy: the same as "phy-handle" property, not recommended for new bindings. ++- phy-device: the same as "phy-handle" property, not recommended for new ++ bindings. ++- rx-fifo-depth: the size of the controller's receive fifo in bytes. This ++ is used for components that can have configurable receive fifo sizes, ++ and is useful for determining certain configuration settings such as ++ flow control thresholds. ++- tx-fifo-depth: the size of the controller's transmit fifo in bytes. This ++ is used for components that can have configurable fifo sizes. ++- managed: string, specifies the PHY management type. Supported values are: ++ "auto", "in-band-status". "auto" is the default, it usess MDIO for ++ management if fixed-link is not specified. ++ ++Child nodes of the Ethernet controller are typically the individual PHY devices ++connected via the MDIO bus (sometimes the MDIO bus controller is separate). ++They are described in the phy.txt file in this same directory. ++For non-MDIO PHY management see fixed-link.txt. +diff --git a/net/eth-uclass.c b/net/eth-uclass.c +index 4225aabf1fa1..c6d5ec013bd8 100644 +--- a/net/eth-uclass.c ++++ b/net/eth-uclass.c +@@ -455,6 +455,23 @@ static int eth_pre_unbind(struct udevice *dev) + return 0; } - #endif -+#ifdef CONFIG_DM_ETH -+static int rtl8169_write_hwaddr(struct udevice *dev) ++static bool eth_dev_get_mac_address(struct udevice *dev, u8 mac[ARP_HLEN]) +{ -+ struct eth_pdata *plat = dev_get_platdata(dev); -+ unsigned int i; ++ const uint8_t *p; + -+ RTL_W8(Cfg9346, Cfg9346_Unlock); ++ p = dev_read_u8_array_ptr(dev, "mac-address", ARP_HLEN); ++ if (!p) ++ p = dev_read_u8_array_ptr(dev, "local-mac-address", ARP_HLEN); + -+ for (i = 0; i < MAC_ADDR_LEN; i++) -+ RTL_W8(MAC0 + i, plat->enetaddr[i]); ++ if (!p) { ++ memset(mac, 0, ARP_HLEN); ++ return false; ++ } + -+ RTL_W8(Cfg9346, Cfg9346_Lock); -+ -+ return 0; ++ memcpy(mac, p, ARP_HLEN); ++ return true; +} -+#endif + - /************************************************************************** - INIT - Look for an adapter, this routine's visible to the outside - ***************************************************************************/ -@@ -1195,6 +1212,7 @@ static const struct eth_ops rtl8169_eth_ops = { - .send = rtl8169_eth_send, - .recv = rtl8169_eth_recv, - .stop = rtl8169_eth_stop, -+ .write_hwaddr = rtl8169_write_hwaddr, - }; + static int eth_post_probe(struct udevice *dev) + { + struct eth_device_priv *priv = dev->uclass_priv; +@@ -489,9 +506,12 @@ static int eth_post_probe(struct udevice *dev) - static const struct udevice_id rtl8169_eth_ids[] = { - -From patchwork Fri Mar 8 19:51:27 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [U-Boot,3/3] net: rtl8169: Support RTL-8168h/8111h -X-Patchwork-Submitter: Thierry Reding -X-Patchwork-Id: 1053671 -Message-Id: <20190308195127.32711-3-thierry.reding@gmail.com> -To: Joe Hershberger -Cc: u-boot@lists.denx.de, Stephen Warren , - Tom Warren -Date: Fri, 8 Mar 2019 20:51:27 +0100 -From: Thierry Reding -List-Id: U-Boot discussion - -From: Thierry Reding - -This version of the RTL-8168 is present on some development boards and -is compatible with this driver. Add support for identifying this version -of the chip so that U-Boot won't complain about it being unknown. - -Signed-off-by: Thierry Reding ---- - drivers/net/rtl8169.c | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/drivers/net/rtl8169.c b/drivers/net/rtl8169.c -index 27e27b34176b..bc052e72564b 100644 ---- a/drivers/net/rtl8169.c -+++ b/drivers/net/rtl8169.c -@@ -257,6 +257,7 @@ static struct { - {"RTL-8168/8111g", 0x4c, 0xff7e1880,}, - {"RTL-8101e", 0x34, 0xff7e1880,}, - {"RTL-8100e", 0x32, 0xff7e1880,}, -+ {"RTL-8168h/8111h", 0x54, 0xff7e1880,}, - }; + priv->state = ETH_STATE_INIT; - enum _DescStatusBit { +- /* Check if the device has a MAC address in ROM */ +- if (eth_get_ops(dev)->read_rom_hwaddr) +- eth_get_ops(dev)->read_rom_hwaddr(dev); ++ /* Check if the device has a MAC address in device tree */ ++ if (!eth_dev_get_mac_address(dev, pdata->enetaddr)) { ++ /* Check if the device has a MAC address in ROM */ ++ if (eth_get_ops(dev)->read_rom_hwaddr) ++ eth_get_ops(dev)->read_rom_hwaddr(dev); ++ } + + eth_env_get_enetaddr_by_index("eth", dev->seq, env_enetaddr); + if (!is_zero_ethaddr(env_enetaddr)) { diff --git a/net-rtl8169-Implement---hwaddr_write-callback.patch b/net-rtl8169-Implement---hwaddr_write-callback.patch new file mode 100644 index 0000000..984e860 --- /dev/null +++ b/net-rtl8169-Implement---hwaddr_write-callback.patch @@ -0,0 +1,102 @@ +From patchwork Tue Apr 16 16:20:29 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot, RESEND, + 1/2] net: rtl8169: Implement ->hwaddr_write() callback +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1086411 +Message-Id: <20190416162030.13590-1-thierry.reding@gmail.com> +To: Joe Hershberger +Cc: u-boot@lists.denx.de +Date: Tue, 16 Apr 2019 18:20:29 +0200 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +Implement this callback that allows the MAC address to be set for the +Ethernet card. This is necessary in order for the device to be able to +receive packets for the MAC address that U-Boot advertises. + +Signed-off-by: Thierry Reding +Acked-by: Joe Hershberger +--- + drivers/net/rtl8169.c | 18 ++++++++++++++++++ + 1 file changed, 18 insertions(+) + +diff --git a/drivers/net/rtl8169.c b/drivers/net/rtl8169.c +index a78f3d233f1a..27e27b34176b 100644 +--- a/drivers/net/rtl8169.c ++++ b/drivers/net/rtl8169.c +@@ -941,6 +941,23 @@ static void rtl_halt(struct eth_device *dev) + } + #endif + ++#ifdef CONFIG_DM_ETH ++static int rtl8169_write_hwaddr(struct udevice *dev) ++{ ++ struct eth_pdata *plat = dev_get_platdata(dev); ++ unsigned int i; ++ ++ RTL_W8(Cfg9346, Cfg9346_Unlock); ++ ++ for (i = 0; i < MAC_ADDR_LEN; i++) ++ RTL_W8(MAC0 + i, plat->enetaddr[i]); ++ ++ RTL_W8(Cfg9346, Cfg9346_Lock); ++ ++ return 0; ++} ++#endif ++ + /************************************************************************** + INIT - Look for an adapter, this routine's visible to the outside + ***************************************************************************/ +@@ -1195,6 +1212,7 @@ static const struct eth_ops rtl8169_eth_ops = { + .send = rtl8169_eth_send, + .recv = rtl8169_eth_recv, + .stop = rtl8169_eth_stop, ++ .write_hwaddr = rtl8169_write_hwaddr, + }; + + static const struct udevice_id rtl8169_eth_ids[] = { + +From patchwork Tue Apr 16 16:20:30 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot,RESEND,2/2] net: rtl8169: Support RTL-8168h/8111h +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1086412 +Message-Id: <20190416162030.13590-2-thierry.reding@gmail.com> +To: Joe Hershberger +Cc: u-boot@lists.denx.de +Date: Tue, 16 Apr 2019 18:20:30 +0200 +From: Thierry Reding +List-Id: U-Boot discussion + +From: Thierry Reding + +This version of the RTL-8168 is present on some development boards and +is compatible with this driver. Add support for identifying this version +of the chip so that U-Boot won't complain about it being unknown. + +Signed-off-by: Thierry Reding +Acked-by: Joe Hershberger +--- + drivers/net/rtl8169.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/drivers/net/rtl8169.c b/drivers/net/rtl8169.c +index 27e27b34176b..bc052e72564b 100644 +--- a/drivers/net/rtl8169.c ++++ b/drivers/net/rtl8169.c +@@ -257,6 +257,7 @@ static struct { + {"RTL-8168/8111g", 0x4c, 0xff7e1880,}, + {"RTL-8101e", 0x34, 0xff7e1880,}, + {"RTL-8100e", 0x32, 0xff7e1880,}, ++ {"RTL-8168h/8111h", 0x54, 0xff7e1880,}, + }; + + enum _DescStatusBit { diff --git a/sources b/sources index 71120c2..176ad87 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2019.04-rc4.tar.bz2) = 33a57e4acb51dbe04123055b159a5b3a933ea8340aa81a4148572ee5fc12288413a6c6c0b80b6fe099ac79ea6359be2d9034ead1edfcc0403895f3f8eb56746e +SHA512 (u-boot-2019.04.tar.bz2) = 357fe94b5b043885472ea1b7dcbbac601d0c1f7c64f71026b9e1279b53160847c6478d6ec98a2f678e562db21e39037d6e6fbc1e6b19beaac02ca14e93c5de0e diff --git a/uboot-tools.spec b/uboot-tools.spec index 688536a..83a5539 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,8 +1,8 @@ -%global candidate rc4 +#global candidate rc4 Name: uboot-tools Version: 2019.04 -Release: 0.9%{?candidate:.%{candidate}}%{?dist} +Release: 1%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -18,17 +18,19 @@ Source5: 10-devicetree.install Patch1: uefi-use-Fedora-specific-path-name.patch # general fixes -Patch2: uefi-distro-load-FDT-from-any-partition-on-boot-device.patch -Patch3: usb-kbd-fixes.patch -Patch4: uefi-rc5-fixes.patch +Patch2: usb-kbd-fixes.patch +Patch3: uefi-distro-load-FDT-from-any-partition-on-boot-device.patch +Patch4: uefi-fix-memory-calculation-overflow-on-32-bit-systems.patch +Patch5: uefi-Change-FDT-memory-type-from-runtime-data-to-boot-services-data.patch # Board fixes and enablement Patch10: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch Patch11: dragonboard-fixes.patch -Patch12: ARM-tegra-Miscellaneous-improvements.patch -Patch13: ARM-tegra-Add-support-for-framebuffer-carveouts.patch -Patch14: ARM-tegra-Add-NVIDIA-Jetson-Nano-Developer-Kit-support.patch +Patch12: ARM-tegra-Add-support-for-framebuffer-carveouts.patch +Patch13: ARM-tegra-Miscellaneous-improvements.patch Patch15: net-eth-uclass-Write-MAC-address-to-hardware-after-probe.patch +Patch16: net-rtl8169-Implement---hwaddr_write-callback.patch +Patch17: arm-tegra-defaine-fdtfile-for-all-devices.patch BuildRequires: bc BuildRequires: dtc @@ -303,6 +305,10 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Sun Apr 14 2019 Peter Robinson 2019.04-1 +- 2019.04 +- Fixes for AllWinner and NVIDIA Jetson devices + * Thu Apr 4 2019 Peter Robinson 2019.04-0.9-rc4 - Latest Tegra patch revision diff --git a/uefi-Change-FDT-memory-type-from-runtime-data-to-boot-services-data.patch b/uefi-Change-FDT-memory-type-from-runtime-data-to-boot-services-data.patch new file mode 100644 index 0000000..33c93b6 --- /dev/null +++ b/uefi-Change-FDT-memory-type-from-runtime-data-to-boot-services-data.patch @@ -0,0 +1,54 @@ +From patchwork Fri Apr 12 18:26:28 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot, + U-boot] : Change FDT memory type from runtime data to boot services + data +X-Patchwork-Submitter: Ilias Apalodimas +X-Patchwork-Id: 1084888 +X-Patchwork-Delegate: xypron.glpk@gmx.de +Message-Id: <1555093588-21916-1-git-send-email-ilias.apalodimas@linaro.org> +To: u-boot@lists.denx.de, + xypron.glpk@gmx.de +Cc: Ilias Apalodimas , agraf@csgraf.de, + ard.biesheuvel@linaro.org +Date: Fri, 12 Apr 2019 21:26:28 +0300 +From: Ilias Apalodimas +List-Id: U-Boot discussion + +Following Ard's suggestion: +Runtime data sections are intended for data that is used by the runtime +services implementation. +Let's change the type to EFI_BOOT_SERVICES_DATA + +This also fixes booting of armv7 using efi and fdtcontroladdr + +Suggested-by: Ard Biesheuvel +Signed-off-by: Ilias Apalodimas +Acked-by: Ard Biesheuvel +Reviewed-by: Heinrich Schuchardt +--- + cmd/bootefi.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/cmd/bootefi.c b/cmd/bootefi.c +index 3619a20e6433..15ee4af45667 100644 +--- a/cmd/bootefi.c ++++ b/cmd/bootefi.c +@@ -111,13 +111,13 @@ static efi_status_t copy_fdt(void **fdtp) + new_fdt_addr = (uintptr_t)map_sysmem(fdt_ram_start + 0x7f00000 + + fdt_size, 0); + ret = efi_allocate_pages(EFI_ALLOCATE_MAX_ADDRESS, +- EFI_RUNTIME_SERVICES_DATA, fdt_pages, ++ EFI_BOOT_SERVICES_DATA, fdt_pages, + &new_fdt_addr); + if (ret != EFI_SUCCESS) { + /* If we can't put it there, put it somewhere */ + new_fdt_addr = (ulong)memalign(EFI_PAGE_SIZE, fdt_size); + ret = efi_allocate_pages(EFI_ALLOCATE_MAX_ADDRESS, +- EFI_RUNTIME_SERVICES_DATA, fdt_pages, ++ EFI_BOOT_SERVICES_DATA, fdt_pages, + &new_fdt_addr); + if (ret != EFI_SUCCESS) { + printf("ERROR: Failed to reserve space for FDT\n"); diff --git a/uefi-fix-memory-calculation-overflow-on-32-bit-systems.patch b/uefi-fix-memory-calculation-overflow-on-32-bit-systems.patch new file mode 100644 index 0000000..bdb0108 --- /dev/null +++ b/uefi-fix-memory-calculation-overflow-on-32-bit-systems.patch @@ -0,0 +1,46 @@ +From patchwork Tue Apr 9 20:58:30 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [U-Boot] efi: fix memory calculation overflow on 32-bit systems +X-Patchwork-Submitter: Patrick Wildt +X-Patchwork-Id: 1082739 +X-Patchwork-Delegate: xypron.glpk@gmx.de +Message-Id: <20190409205830.GA5818@nyx.fritz.box> +To: u-boot@lists.denx.de +Date: Tue, 9 Apr 2019 22:58:30 +0200 +From: Patrick Wildt +List-Id: U-Boot discussion + +Hi, + +There are Cubox-i machines out there with nearly 4 GiB of RAM. The +RAM starts at 0x10000000 with a size of 0xf0000000. Thus the end +of RAM is at 0x100000000. This overflows a 32-bit integer, which +should be fine since in the EFI memory code the variables used are +all 64-bit with a fixed size. Unfortunately EFI_PAGE_MASK, which is +used in the EFI memory code to remove the lower bits, is based on +the EFI_PAGE_SIZE macro which, uses 1UL with a shift. This means +the resulting mask is UL, which is only 32-bit on ARMv7. Use ULL to +make sure that even on 32-bit platforms we use a 64-bit long mask. +Without this there will be no memory available in the EFI memory map +and bootefi will fail allocating pages. + +Best regards, +Patrick +Reviewed-by: Heinrich Schuchardt +Reviewed-by: Patrick Delaunay + +diff --git a/include/efi.h b/include/efi.h +index d98441ab19d..3c9d20f8c0b 100644 +--- a/include/efi.h ++++ b/include/efi.h +@@ -190,7 +190,7 @@ enum efi_mem_type { + #define EFI_MEM_DESC_VERSION 1 + + #define EFI_PAGE_SHIFT 12 +-#define EFI_PAGE_SIZE (1UL << EFI_PAGE_SHIFT) ++#define EFI_PAGE_SIZE (1ULL << EFI_PAGE_SHIFT) + #define EFI_PAGE_MASK (EFI_PAGE_SIZE - 1) + + struct efi_mem_desc { diff --git a/uefi-rc5-fixes.patch b/uefi-rc5-fixes.patch deleted file mode 100644 index fd36553..0000000 --- a/uefi-rc5-fixes.patch +++ /dev/null @@ -1,245 +0,0 @@ -From 306b16718edddd660b84bf3c6627ce5d41b53ce7 Mon Sep 17 00:00:00 2001 -From: Heinrich Schuchardt -Date: Mon, 18 Mar 2019 20:01:59 +0100 -Subject: [PATCH 01/25] efi_loader: correct parameter size in efi_allocate_pool - -efi_allocate_pages() expects a (uint64_t *) pointer to pass the address of -the assigned memory. If we pass the address of a pointer here, an illegal -memory access occurs on 32bit systems. - -Fixes: 282a06cbcae8 ("efi_loader: Expose U-Boot addresses in memory map -for sandbox") -Signed-off-by: Heinrich Schuchardt ---- - lib/efi_loader/efi_memory.c | 5 +++-- - 1 file changed, 3 insertions(+), 2 deletions(-) - -diff --git a/lib/efi_loader/efi_memory.c b/lib/efi_loader/efi_memory.c -index ebd2b36c03..55622d2fb4 100644 ---- a/lib/efi_loader/efi_memory.c -+++ b/lib/efi_loader/efi_memory.c -@@ -440,6 +440,7 @@ efi_status_t efi_free_pages(uint64_t memory, efi_uintn_t pages) - efi_status_t efi_allocate_pool(int pool_type, efi_uintn_t size, void **buffer) - { - efi_status_t r; -+ u64 addr; - struct efi_pool_allocation *alloc; - u64 num_pages = efi_size_in_pages(size + - sizeof(struct efi_pool_allocation)); -@@ -453,9 +454,9 @@ efi_status_t efi_allocate_pool(int pool_type, efi_uintn_t size, void **buffer) - } - - r = efi_allocate_pages(EFI_ALLOCATE_ANY_PAGES, pool_type, num_pages, -- (uint64_t *)&alloc); -- -+ &addr); - if (r == EFI_SUCCESS) { -+ alloc = (struct efi_pool_allocation *)(uintptr_t)addr; - alloc->num_pages = num_pages; - *buffer = alloc->data; - } --- -2.20.1 - -From bd3b7478d1e17b4d487d276f5cc0e4f4ef9fc4b7 Mon Sep 17 00:00:00 2001 -From: Heinrich Schuchardt -Date: Tue, 19 Mar 2019 12:30:27 +0100 -Subject: [PATCH 02/25] efi_loader: endless loop in add_strings_package() - -Avoid an endless loop in add_strings_package(). - -Suggested-by: Takahiro Akashi -Reported-by: Coverity (CID 185833) -Signed-off-by: Heinrich Schuchardt ---- - lib/efi_loader/efi_hii.c | 5 ++--- - 1 file changed, 2 insertions(+), 3 deletions(-) - -diff --git a/lib/efi_loader/efi_hii.c b/lib/efi_loader/efi_hii.c -index 3a966fa4df..61b71dec62 100644 ---- a/lib/efi_loader/efi_hii.c -+++ b/lib/efi_loader/efi_hii.c -@@ -227,9 +227,8 @@ out: - error: - if (stbl) { - free(stbl->language); -- if (idx > 0) -- while (--idx >= 0) -- free(stbl->strings[idx].string); -+ while (idx > 0) -+ free(stbl->strings[--idx].string); - free(stbl->strings); - } - free(stbl); --- -2.20.1 - -From e7dae584b05feaf507c5b85a704a2c1d25abffc9 Mon Sep 17 00:00:00 2001 -From: Heinrich Schuchardt -Date: Tue, 19 Mar 2019 18:36:21 +0100 -Subject: [PATCH 03/25] efi_loader: missing return in - efi_get_next_variable_name() - -Add a missing return statement in efi_get_next_variable_name(). - -Reported-by: Coverity (CID 185834) -Signed-off-by: Heinrich Schuchardt ---- - lib/efi_loader/efi_variable.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/lib/efi_loader/efi_variable.c b/lib/efi_loader/efi_variable.c -index e0d7f5736d..699f4184d9 100644 ---- a/lib/efi_loader/efi_variable.c -+++ b/lib/efi_loader/efi_variable.c -@@ -335,7 +335,7 @@ efi_status_t EFIAPI efi_get_next_variable_name(efi_uintn_t *variable_name_size, - EFI_ENTRY("%p \"%ls\" %pUl", variable_name_size, variable_name, vendor); - - if (!variable_name_size || !variable_name || !vendor) -- EFI_EXIT(EFI_INVALID_PARAMETER); -+ return EFI_EXIT(EFI_INVALID_PARAMETER); - - if (variable_name[0]) { - /* check null-terminated string */ --- -2.20.1 - -From 1fd7a4764103781e424ef687034da06de3cb60b7 Mon Sep 17 00:00:00 2001 -From: Heinrich Schuchardt -Date: Tue, 19 Mar 2019 18:44:05 +0100 -Subject: [PATCH 04/25] efi_loader: memory leak in efi_dump_single_var() - -A misplaced return statement lead to a memory leak in -efi_dump_single_var(). - -Reported-by: Coverity (CID 185829) -Signed-off-by: Heinrich Schuchardt ---- - cmd/nvedit_efi.c | 1 - - 1 file changed, 1 deletion(-) - -diff --git a/cmd/nvedit_efi.c b/cmd/nvedit_efi.c -index ca32566a61..e65b38dbf3 100644 ---- a/cmd/nvedit_efi.c -+++ b/cmd/nvedit_efi.c -@@ -80,7 +80,6 @@ static void efi_dump_single_var(u16 *name, efi_guid_t *guid) - printf(", DataSize = 0x%zx\n", size); - print_hex_dump(" ", DUMP_PREFIX_OFFSET, 16, 1, data, size, true); - -- return; - out: - free(data); - } --- -2.20.1 - -From d5974af7f7626777b5c41894f75c813ff35c1793 Mon Sep 17 00:00:00 2001 -From: Heinrich Schuchardt -Date: Tue, 19 Mar 2019 18:58:58 +0100 -Subject: [PATCH 05/25] efi_loader: remove superfluous check in - efi_setup_loaded_image() - -It does not make any sense to check if a pointer is NULL if we have -dereferenced it before. - -Reported-by: Coverity (CID 185827) -Signed-off-by: Heinrich Schuchardt ---- - lib/efi_loader/efi_boottime.c | 6 ++---- - 1 file changed, 2 insertions(+), 4 deletions(-) - -diff --git a/lib/efi_loader/efi_boottime.c b/lib/efi_loader/efi_boottime.c -index bd8b8a17ae..4fc550d9f3 100644 ---- a/lib/efi_loader/efi_boottime.c -+++ b/lib/efi_loader/efi_boottime.c -@@ -1581,10 +1581,8 @@ efi_status_t efi_setup_loaded_image(struct efi_device_path *device_path, - goto failure; - #endif - -- if (info_ptr) -- *info_ptr = info; -- if (handle_ptr) -- *handle_ptr = obj; -+ *info_ptr = info; -+ *handle_ptr = obj; - - return ret; - failure: --- -2.20.1 - -From 1646e0928c8eb052bfa2283a6ab8d9f2a92a10e9 Mon Sep 17 00:00:00 2001 -From: Heinrich Schuchardt -Date: Tue, 19 Mar 2019 19:16:23 +0100 -Subject: [PATCH 06/25] efi_loader: superfluous conversion in efi_file_open() - -printf("%ls", ..) expects u16 * as argument to print. There is not need for -a conversion to wchar_t *. - -Signed-off-by: Heinrich Schuchardt ---- - lib/efi_loader/efi_file.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/lib/efi_loader/efi_file.c b/lib/efi_loader/efi_file.c -index 3a7323765b..bc715218a1 100644 ---- a/lib/efi_loader/efi_file.c -+++ b/lib/efi_loader/efi_file.c -@@ -226,7 +226,7 @@ static efi_status_t EFIAPI efi_file_open(struct efi_file_handle *file, - efi_status_t ret; - - EFI_ENTRY("%p, %p, \"%ls\", %llx, %llu", file, new_handle, -- (wchar_t *)file_name, open_mode, attributes); -+ file_name, open_mode, attributes); - - /* Check parameters */ - if (!file || !new_handle || !file_name) { --- -2.20.1 - -From d0bd87612f410a723d5ddb3001e805485e3efb4f Mon Sep 17 00:00:00 2001 -From: Heinrich Schuchardt -Date: Tue, 19 Mar 2019 20:08:46 +0100 -Subject: [PATCH 07/25] efi_selftest: fix test_hii_string_get_string() - -The check testing the string result of get_string() returned the wrong -result. The result was ignored. - -Use efi_st_strcmp_16_8() for the string comparison. - -Signed-off-by: Heinrich Schuchardt ---- - lib/efi_selftest/efi_selftest_hii.c | 17 ++++------------- - 1 file changed, 4 insertions(+), 13 deletions(-) - -diff --git a/lib/efi_selftest/efi_selftest_hii.c b/lib/efi_selftest/efi_selftest_hii.c -index 8a0b3bc353..f4b70f7950 100644 ---- a/lib/efi_selftest/efi_selftest_hii.c -+++ b/lib/efi_selftest/efi_selftest_hii.c -@@ -783,19 +783,10 @@ static int test_hii_string_get_string(void) - goto out; - } - --#if 1 -- u16 *c1, *c2; -- -- for (c1 = string, c2 = L"Japanese"; *c1 == *c2; c1++, c2++) -- ; -- if (!*c1 && !*c2) -- result = EFI_ST_SUCCESS; -- else -- result = EFI_ST_FAILURE; --#else -- /* TODO: %ls */ -- efi_st_printf("got string is %s (can be wrong)\n", string); --#endif -+ if (efi_st_strcmp_16_8(string, "Japanese")) { -+ efi_st_error("get_string returned incorrect string\n"); -+ goto out; -+ } - - result = EFI_ST_SUCCESS; - --- -2.20.1 - From 4f63e87d513d60bad5ab2fcb64b29b3b1bac9018 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Sat, 4 May 2019 11:22:48 +0100 Subject: [PATCH 6/6] Build and ship pre built SD/SPI SPL bits for all rk3399 boards --- uboot-tools.spec | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/uboot-tools.spec b/uboot-tools.spec index 83a5539..39ac882 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -2,7 +2,7 @@ Name: uboot-tools Version: 2019.04 -Release: 1%{?candidate:.%{candidate}}%{?dist} +Release: 2%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -140,7 +140,7 @@ do # End ATF make $(echo $board)_defconfig O=builds/$(echo $board)/ make HOSTCC="gcc $RPM_OPT_FLAGS" CROSS_COMPILE="" %{?_smp_mflags} V=1 O=builds/$(echo $board)/ - rk33xx=(evb-rk3399 firefly-rk3399) + rk33xx=(evb-rk3399 ficus-rk3399 firefly-rk3399 puma-rk3399 rock960-rk3399) if [[ " ${rk33xx[*]} " == *" $board "* ]]; then echo "Board: $board using rk33xx" make HOSTCC="gcc $RPM_OPT_FLAGS" CROSS_COMPILE="" u-boot.itb V=1 O=builds/$(echo $board)/ @@ -305,6 +305,9 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Sat May 4 2019 Peter Robinson 2019.04-2 +- Build and ship pre built SD/SPI SPL bits for all rk3399 boards + * Sun Apr 14 2019 Peter Robinson 2019.04-1 - 2019.04 - Fixes for AllWinner and NVIDIA Jetson devices