Tegra Jetson TX-series improvements

This commit is contained in:
Peter Robinson 2019-03-20 11:39:59 +00:00
parent 982620b114
commit dca146ee9f
7 changed files with 3452 additions and 489 deletions

File diff suppressed because it is too large Load Diff

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@ -33,6 +33,7 @@ orangepi_zero_plus2
p212
p2371-2180
p2771-0000-500
p3450-0000
pine64-lts
pine64_plus
pinebook

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@ -0,0 +1,147 @@
From patchwork Fri Mar 8 19:51:25 2019
Content-Type: text/plain; charset="utf-8"
MIME-Version: 1.0
Content-Transfer-Encoding: 7bit
Subject: [U-Boot,
1/3] net: eth-uclass: Write MAC address to hardware after probe
X-Patchwork-Submitter: Thierry Reding <thierry.reding@gmail.com>
X-Patchwork-Id: 1053669
Message-Id: <20190308195127.32711-1-thierry.reding@gmail.com>
To: Joe Hershberger <joe.hershberger@ni.com>
Cc: u-boot@lists.denx.de, Stephen Warren <swarren@nvidia.com>,
Tom Warren <twarren@nvidia.com>
Date: Fri, 8 Mar 2019 20:51:25 +0100
From: Thierry Reding <thierry.reding@gmail.com>
List-Id: U-Boot discussion <u-boot.lists.denx.de>
From: Thierry Reding <treding@nvidia.com>
In order for the device to use the proper MAC address, which can have
been configured in the environment prior to the device being registered,
ensure that the MAC address is written after the device has been probed.
For devices that are registered before the network stack is initialized,
this is already done during eth_initialize(). If the Ethernet device is
on a bus that is not initialized on early boot, such as PCI, the device
is not available at the time eth_initialize() is called, so we need the
MAC address programming to also happen after probe.
Signed-off-by: Thierry Reding <treding@nvidia.com>
---
net/eth-uclass.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/net/eth-uclass.c b/net/eth-uclass.c
index 2ef20df19203..4225aabf1fa1 100644
--- a/net/eth-uclass.c
+++ b/net/eth-uclass.c
@@ -524,6 +524,8 @@ static int eth_post_probe(struct udevice *dev)
#endif
}
+ eth_write_hwaddr(dev);
+
return 0;
}
From patchwork Fri Mar 8 19:51:26 2019
Content-Type: text/plain; charset="utf-8"
MIME-Version: 1.0
Content-Transfer-Encoding: 7bit
Subject: [U-Boot,2/3] net: rtl8169: Implement ->hwaddr_write() callback
X-Patchwork-Submitter: Thierry Reding <thierry.reding@gmail.com>
X-Patchwork-Id: 1053670
Message-Id: <20190308195127.32711-2-thierry.reding@gmail.com>
To: Joe Hershberger <joe.hershberger@ni.com>
Cc: u-boot@lists.denx.de, Stephen Warren <swarren@nvidia.com>,
Tom Warren <twarren@nvidia.com>
Date: Fri, 8 Mar 2019 20:51:26 +0100
From: Thierry Reding <thierry.reding@gmail.com>
List-Id: U-Boot discussion <u-boot.lists.denx.de>
From: Thierry Reding <treding@nvidia.com>
Implement this callback that allows the MAC address to be set for the
Ethernet card. This is necessary in order for the device to be able to
receive packets for the MAC address that U-Boot advertises.
Signed-off-by: Thierry Reding <treding@nvidia.com>
---
drivers/net/rtl8169.c | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
diff --git a/drivers/net/rtl8169.c b/drivers/net/rtl8169.c
index a78f3d233f1a..27e27b34176b 100644
--- a/drivers/net/rtl8169.c
+++ b/drivers/net/rtl8169.c
@@ -941,6 +941,23 @@ static void rtl_halt(struct eth_device *dev)
}
#endif
+#ifdef CONFIG_DM_ETH
+static int rtl8169_write_hwaddr(struct udevice *dev)
+{
+ struct eth_pdata *plat = dev_get_platdata(dev);
+ unsigned int i;
+
+ RTL_W8(Cfg9346, Cfg9346_Unlock);
+
+ for (i = 0; i < MAC_ADDR_LEN; i++)
+ RTL_W8(MAC0 + i, plat->enetaddr[i]);
+
+ RTL_W8(Cfg9346, Cfg9346_Lock);
+
+ return 0;
+}
+#endif
+
/**************************************************************************
INIT - Look for an adapter, this routine's visible to the outside
***************************************************************************/
@@ -1195,6 +1212,7 @@ static const struct eth_ops rtl8169_eth_ops = {
.send = rtl8169_eth_send,
.recv = rtl8169_eth_recv,
.stop = rtl8169_eth_stop,
+ .write_hwaddr = rtl8169_write_hwaddr,
};
static const struct udevice_id rtl8169_eth_ids[] = {
From patchwork Fri Mar 8 19:51:27 2019
Content-Type: text/plain; charset="utf-8"
MIME-Version: 1.0
Content-Transfer-Encoding: 7bit
Subject: [U-Boot,3/3] net: rtl8169: Support RTL-8168h/8111h
X-Patchwork-Submitter: Thierry Reding <thierry.reding@gmail.com>
X-Patchwork-Id: 1053671
Message-Id: <20190308195127.32711-3-thierry.reding@gmail.com>
To: Joe Hershberger <joe.hershberger@ni.com>
Cc: u-boot@lists.denx.de, Stephen Warren <swarren@nvidia.com>,
Tom Warren <twarren@nvidia.com>
Date: Fri, 8 Mar 2019 20:51:27 +0100
From: Thierry Reding <thierry.reding@gmail.com>
List-Id: U-Boot discussion <u-boot.lists.denx.de>
From: Thierry Reding <treding@nvidia.com>
This version of the RTL-8168 is present on some development boards and
is compatible with this driver. Add support for identifying this version
of the chip so that U-Boot won't complain about it being unknown.
Signed-off-by: Thierry Reding <treding@nvidia.com>
---
drivers/net/rtl8169.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/net/rtl8169.c b/drivers/net/rtl8169.c
index 27e27b34176b..bc052e72564b 100644
--- a/drivers/net/rtl8169.c
+++ b/drivers/net/rtl8169.c
@@ -257,6 +257,7 @@ static struct {
{"RTL-8168/8111g", 0x4c, 0xff7e1880,},
{"RTL-8101e", 0x34, 0xff7e1880,},
{"RTL-8100e", 0x32, 0xff7e1880,},
+ {"RTL-8168h/8111h", 0x54, 0xff7e1880,},
};
enum _DescStatusBit {

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@ -1,20 +1,18 @@
From c8b9f0c2ca0a4270db811867ad051e75efa4100a Mon Sep 17 00:00:00 2001
From 80dda7644f2691d599bc87a7a96645bda0305424 Mon Sep 17 00:00:00 2001
From: Peter Robinson <pbrobinson@gmail.com>
Date: Wed, 5 Sep 2018 11:13:40 +0100
Subject: [PATCH] tegra: TXx: Add CONFIG_EFI_LOADER_BOUNCE_BUFFER
The Jetson TX series needs EFI loader bounce buffer enabled otherwise grub doesn't see
the storage when it loads.
Date: Wed, 20 Mar 2019 09:29:49 +0000
Subject: [PATCH] tegra: TX: Add CONFIG_EFI_LOADER_BOUNCE_BUFFER
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
---
configs/p2371-2180_defconfig | 1 +
configs/p2771-0000-000_defconfig | 1 +
configs/p2771-0000-500_defconfig | 1 +
3 files changed, 3 insertions(+)
configs/p3450-0000_defconfig | 1 +
4 files changed, 4 insertions(+)
diff --git a/configs/p2371-2180_defconfig b/configs/p2371-2180_defconfig
index d9dcf7e014..156a1cbcf9 100644
index b662ef1431..c1b87a8071 100644
--- a/configs/p2371-2180_defconfig
+++ b/configs/p2371-2180_defconfig
@@ -5,6 +5,7 @@ CONFIG_TEGRA210=y
@ -26,29 +24,41 @@ index d9dcf7e014..156a1cbcf9 100644
CONFIG_SYS_STDIO_DEREGISTER=y
CONFIG_SYS_PROMPT="Tegra210 (P2371-2180) # "
diff --git a/configs/p2771-0000-000_defconfig b/configs/p2771-0000-000_defconfig
index 2bf2e31359..15ea2fc6d6 100644
index ad0802067e..799a06e454 100644
--- a/configs/p2771-0000-000_defconfig
+++ b/configs/p2771-0000-000_defconfig
@@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x80080000
CONFIG_TEGRA186=y
CONFIG_NR_DRAM_BANKS=8
CONFIG_NR_DRAM_BANKS=1026
CONFIG_OF_SYSTEM_SETUP=y
+CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
CONFIG_CONSOLE_MUX=y
CONFIG_SYS_STDIO_DEREGISTER=y
CONFIG_SYS_PROMPT="Tegra186 (P2771-0000-000) # "
diff --git a/configs/p2771-0000-500_defconfig b/configs/p2771-0000-500_defconfig
index 1e33c1f95b..a32b6a866e 100644
index 459b67fd19..6193cff822 100644
--- a/configs/p2771-0000-500_defconfig
+++ b/configs/p2771-0000-500_defconfig
@@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x80080000
CONFIG_TEGRA186=y
CONFIG_NR_DRAM_BANKS=8
CONFIG_NR_DRAM_BANKS=1026
CONFIG_OF_SYSTEM_SETUP=y
+CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
CONFIG_CONSOLE_MUX=y
CONFIG_SYS_STDIO_DEREGISTER=y
CONFIG_SYS_PROMPT="Tegra186 (P2771-0000-500) # "
diff --git a/configs/p3450-0000_defconfig b/configs/p3450-0000_defconfig
index 32c2b65a29..6da9daebe5 100644
--- a/configs/p3450-0000_defconfig
+++ b/configs/p3450-0000_defconfig
@@ -7,6 +7,7 @@ CONFIG_TARGET_P3450_0000=y
CONFIG_NR_DRAM_BANKS=2
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_OF_BOARD_SETUP=y
+CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
CONFIG_CONSOLE_MUX=y
CONFIG_SYS_STDIO_DEREGISTER=y
CONFIG_SYS_PROMPT="Tegra210 (P3450-0000) # "
--
2.19.0.rc0
2.20.1

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@ -1,472 +0,0 @@
From a2872b1e2f81e04f92f0970e18c6c8a40640eea8 Mon Sep 17 00:00:00 2001
From: Peter Robinson <pbrobinson@gmail.com>
Date: Wed, 5 Sep 2018 12:11:40 +0100
Subject: [PATCH] tegra fix tx1
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
---
arch/arm/include/asm/arch-tegra/xusb-padctl.h | 1 +
arch/arm/mach-tegra/board.c | 4 +-
arch/arm/mach-tegra/board2.c | 12 ++++
arch/arm/mach-tegra/dt-setup.c | 5 +-
arch/arm/mach-tegra/gpu.c | 2 +
.../mach-tegra/{tegra186 => }/nvtboot_board.c | 70 +++++++++++++++++++
.../mach-tegra/{tegra186 => }/nvtboot_ll.S | 0
.../mach-tegra/{tegra186 => }/nvtboot_mem.c | 0
arch/arm/mach-tegra/tegra186/Makefile | 6 +-
arch/arm/mach-tegra/tegra210/Makefile | 3 +
arch/arm/mach-tegra/tegra210/clock.c | 19 -----
arch/arm/mach-tegra/tegra210/xusb-padctl.c | 68 +++++++++++-------
arch/arm/mach-tegra/xusb-padctl-dummy.c | 4 ++
configs/p2371-0000_defconfig | 2 +-
configs/p2371-2180_defconfig | 2 +-
configs/p2571_defconfig | 2 +-
16 files changed, 146 insertions(+), 54 deletions(-)
rename arch/arm/mach-tegra/{tegra186 => }/nvtboot_board.c (84%)
rename arch/arm/mach-tegra/{tegra186 => }/nvtboot_ll.S (100%)
rename arch/arm/mach-tegra/{tegra186 => }/nvtboot_mem.c (100%)
diff --git a/arch/arm/include/asm/arch-tegra/xusb-padctl.h b/arch/arm/include/asm/arch-tegra/xusb-padctl.h
index deccdf455d..7e14d8109d 100644
--- a/arch/arm/include/asm/arch-tegra/xusb-padctl.h
+++ b/arch/arm/include/asm/arch-tegra/xusb-padctl.h
@@ -16,6 +16,7 @@ struct tegra_xusb_phy;
struct tegra_xusb_phy *tegra_xusb_phy_get(unsigned int type);
void tegra_xusb_padctl_init(void);
+void tegra_xusb_padctl_exit(void);
int tegra_xusb_phy_prepare(struct tegra_xusb_phy *phy);
int tegra_xusb_phy_enable(struct tegra_xusb_phy *phy);
int tegra_xusb_phy_disable(struct tegra_xusb_phy *phy);
diff --git a/arch/arm/mach-tegra/board.c b/arch/arm/mach-tegra/board.c
index f8fc042a1d..ddef228831 100644
--- a/arch/arm/mach-tegra/board.c
+++ b/arch/arm/mach-tegra/board.c
@@ -35,7 +35,7 @@ enum {
static bool from_spl __attribute__ ((section(".data")));
-#ifndef CONFIG_SPL_BUILD
+#if !defined(CONFIG_SPL_BUILD) && !defined(CONFIG_TEGRA210)
void save_boot_params(u32 r0, u32 r1, u32 r2, u32 r3)
{
from_spl = r0 != UBOOT_NOT_LOADED_FROM_SPL;
@@ -66,6 +66,7 @@ bool tegra_cpu_is_non_secure(void)
}
#endif
+#if !defined(CONFIG_ARM64)
/* Read the RAM size directly from the memory controller */
static phys_size_t query_sdram_size(void)
{
@@ -122,6 +123,7 @@ int dram_init(void)
gd->ram_size = query_sdram_size();
return 0;
}
+#endif
static int uart_configs[] = {
#if defined(CONFIG_TEGRA20)
diff --git a/arch/arm/mach-tegra/board2.c b/arch/arm/mach-tegra/board2.c
index 421a71b301..22ecd99760 100644
--- a/arch/arm/mach-tegra/board2.c
+++ b/arch/arm/mach-tegra/board2.c
@@ -171,6 +171,12 @@ int board_init(void)
return nvidia_board_init();
}
+void board_cleanup_before_linux(void)
+{
+ /* power down UPHY PLL */
+ tegra_xusb_padctl_exit();
+}
+
#ifdef CONFIG_BOARD_EARLY_INIT_F
static void __gpio_early_init(void)
{
@@ -220,9 +226,14 @@ int board_late_init(void)
#endif
start_cpu_fan();
+#if defined(CONFIG_TEGRA210)
+ tegra_soc_board_init_late();
+#endif
+
return 0;
}
+#ifndef CONFIG_TEGRA210
/*
* In some SW environments, a memory carve-out exists to house a secure
* monitor, a trusted OS, and/or various statically allocated media buffers.
@@ -348,3 +359,4 @@ ulong board_get_usable_ram_top(ulong total_size)
{
return CONFIG_SYS_SDRAM_BASE + usable_ram_size_below_4g();
}
+#endif
diff --git a/arch/arm/mach-tegra/dt-setup.c b/arch/arm/mach-tegra/dt-setup.c
index 8ac723f41e..a961fab20f 100644
--- a/arch/arm/mach-tegra/dt-setup.c
+++ b/arch/arm/mach-tegra/dt-setup.c
@@ -12,12 +12,10 @@
*/
int ft_system_setup(void *blob, bd_t *bd)
{
+#if !defined(CONFIG_ARM64)
const char *gpu_compats[] = {
#if defined(CONFIG_TEGRA124)
"nvidia,gk20a",
-#endif
-#if defined(CONFIG_TEGRA210)
- "nvidia,gm20b",
#endif
};
int i, ret;
@@ -28,6 +26,7 @@ int ft_system_setup(void *blob, bd_t *bd)
if (ret)
return ret;
}
+#endif
return 0;
}
diff --git a/arch/arm/mach-tegra/gpu.c b/arch/arm/mach-tegra/gpu.c
index e047f67821..3b8c1a0434 100644
--- a/arch/arm/mach-tegra/gpu.c
+++ b/arch/arm/mach-tegra/gpu.c
@@ -17,6 +17,7 @@ static bool _configured;
void tegra_gpu_config(void)
{
+#if !defined(CONFIG_ARM64)
struct mc_ctlr *mc = (struct mc_ctlr *)NV_PA_MC_BASE;
#if defined(CONFIG_TEGRA_SUPPORT_NON_SECURE)
@@ -34,6 +35,7 @@ void tegra_gpu_config(void)
debug("configured VPR\n");
_configured = true;
+#endif
}
#if defined(CONFIG_OF_LIBFDT)
diff --git a/arch/arm/mach-tegra/tegra186/nvtboot_board.c b/arch/arm/mach-tegra/nvtboot_board.c
similarity index 84%
rename from arch/arm/mach-tegra/tegra186/nvtboot_board.c
rename to arch/arm/mach-tegra/nvtboot_board.c
index 83c0e931ea..7b98b502ef 100644
--- a/arch/arm/mach-tegra/tegra186/nvtboot_board.c
+++ b/arch/arm/mach-tegra/nvtboot_board.c
@@ -5,6 +5,7 @@
#include <stdlib.h>
#include <common.h>
+#include <linux/ctype.h>
#include <fdt_support.h>
#include <fdtdec.h>
#include <asm/arch/tegra.h>
@@ -270,6 +271,27 @@ static void set_calculated_env_vars(void)
free(vars);
}
+char *strstrip(char *s)
+{
+ size_t size;
+ char *end;
+
+ size = strlen(s);
+
+ if (!size)
+ return s;
+
+ end = s + size - 1;
+ while (end >= s && isblank(*end))
+ end--;
+ *(end + 1) = '\0';
+
+ while (*s && isblank(*s))
+ s++;
+
+ return s;
+}
+
static int set_fdt_addr(void)
{
int ret;
@@ -283,6 +305,7 @@ static int set_fdt_addr(void)
return 0;
}
+#if defined(CONFIG_TEGRA186)
/*
* Attempt to use /chosen/nvidia,ether-mac in the nvtboot DTB to U-Boot's
* ethaddr environment variable if possible.
@@ -316,6 +339,49 @@ static int set_ethaddr_from_nvtboot(void)
return 0;
}
+#endif
+
+static int set_cbootargs(void)
+{
+ const void *nvtboot_blob = (void *)nvtboot_boot_x0;
+ const void *prop;
+ char *bargs, *s;
+ int node, len, ret = 0;
+
+ /*
+ * Save the bootargs passed in the DTB by the previous bootloader
+ * (CBoot) to the env. (pointer in reg x0)
+ */
+
+ debug("%s: nvtboot_blob = %p\n", __func__, nvtboot_blob);
+
+ node = fdt_path_offset(nvtboot_blob, "/chosen");
+ if (node < 0) {
+ pr_err("Can't find /chosen node in nvtboot DTB");
+ return node;
+ }
+ debug("%s: found 'chosen' node: %d\n", __func__, node);
+
+ prop = fdt_getprop(nvtboot_blob, node, "bootargs", &len);
+ if (!prop) {
+ pr_err("Can't find /chosen/bootargs property in nvtboot DTB");
+ return -ENOENT;
+ }
+ debug("%s: found 'bootargs' property, len =%d\n", __func__, len);
+
+ /* CBoot seems to add trailing whitespace - strip it here */
+ s = strdup((char *)prop);
+ bargs = strstrip(s);
+ debug("%s: bootargs = %s!\n", __func__, bargs);
+
+ /* Set cbootargs to env for later use by extlinux files */
+ ret = env_set("cbootargs", bargs);
+ if (ret)
+ printf("Failed to set cbootargs from cboot DTB: %d\n", ret);
+
+ free(s);
+ return ret;
+}
int tegra_soc_board_init_late(void)
{
@@ -325,8 +391,12 @@ int tegra_soc_board_init_late(void)
* extlinux.conf or boot script content.
*/
set_fdt_addr();
+#if defined(CONFIG_TEGRA186)
/* Ignore errors here; not all cases care about Ethernet addresses */
set_ethaddr_from_nvtboot();
+#endif
+ /* Save CBoot bootargs to env */
+ set_cbootargs();
return 0;
}
diff --git a/arch/arm/mach-tegra/tegra186/nvtboot_ll.S b/arch/arm/mach-tegra/nvtboot_ll.S
similarity index 100%
rename from arch/arm/mach-tegra/tegra186/nvtboot_ll.S
rename to arch/arm/mach-tegra/nvtboot_ll.S
diff --git a/arch/arm/mach-tegra/tegra186/nvtboot_mem.c b/arch/arm/mach-tegra/nvtboot_mem.c
similarity index 100%
rename from arch/arm/mach-tegra/tegra186/nvtboot_mem.c
rename to arch/arm/mach-tegra/nvtboot_mem.c
diff --git a/arch/arm/mach-tegra/tegra186/Makefile b/arch/arm/mach-tegra/tegra186/Makefile
index 56f3378ece..1a43ef7a45 100644
--- a/arch/arm/mach-tegra/tegra186/Makefile
+++ b/arch/arm/mach-tegra/tegra186/Makefile
@@ -4,6 +4,6 @@
obj-y += ../board186.o
obj-y += cache.o
-obj-y += nvtboot_board.o
-obj-y += nvtboot_ll.o
-obj-y += nvtboot_mem.o
+obj-y += ../nvtboot_board.o
+obj-y += ../nvtboot_ll.o
+obj-y += ../nvtboot_mem.o
diff --git a/arch/arm/mach-tegra/tegra210/Makefile b/arch/arm/mach-tegra/tegra210/Makefile
index b6012fc7ba..6de6d810eb 100644
--- a/arch/arm/mach-tegra/tegra210/Makefile
+++ b/arch/arm/mach-tegra/tegra210/Makefile
@@ -8,5 +8,8 @@
obj-y += clock.o
obj-y += funcmux.o
obj-y += pinmux.o
+obj-y += ../nvtboot_board.o
+obj-y += ../nvtboot_ll.o
+obj-y += ../nvtboot_mem.o
obj-y += xusb-padctl.o
obj-y += ../xusb-padctl-common.o
diff --git a/arch/arm/mach-tegra/tegra210/clock.c b/arch/arm/mach-tegra/tegra210/clock.c
index 06068c4b7b..341c97f16d 100644
--- a/arch/arm/mach-tegra/tegra210/clock.c
+++ b/arch/arm/mach-tegra/tegra210/clock.c
@@ -1235,25 +1235,6 @@ int tegra_plle_enable(void)
value &= ~PLLE_SS_CNTL_INTERP_RESET;
writel(value, NV_PA_CLK_RST_BASE + PLLE_SS_CNTL);
- /* 7. Enable HW power sequencer for PLLE */
-
- value = readl(NV_PA_CLK_RST_BASE + PLLE_MISC);
- value &= ~PLLE_MISC_IDDQ_SWCTL;
- writel(value, NV_PA_CLK_RST_BASE + PLLE_MISC);
-
- value = readl(NV_PA_CLK_RST_BASE + PLLE_AUX);
- value &= ~PLLE_AUX_SS_SWCTL;
- value &= ~PLLE_AUX_ENABLE_SWCTL;
- value |= PLLE_AUX_SS_SEQ_INCLUDE;
- value |= PLLE_AUX_USE_LOCKDET;
- writel(value, NV_PA_CLK_RST_BASE + PLLE_AUX);
-
- /* 8. Wait 1 us */
-
- udelay(1);
- value |= PLLE_AUX_SEQ_ENABLE;
- writel(value, NV_PA_CLK_RST_BASE + PLLE_AUX);
-
return 0;
}
diff --git a/arch/arm/mach-tegra/tegra210/xusb-padctl.c b/arch/arm/mach-tegra/tegra210/xusb-padctl.c
index ab6684f027..64dc297ae2 100644
--- a/arch/arm/mach-tegra/tegra210/xusb-padctl.c
+++ b/arch/arm/mach-tegra/tegra210/xusb-padctl.c
@@ -170,6 +170,17 @@ static int phy_unprepare(struct tegra_xusb_phy *phy)
return tegra_xusb_padctl_disable(phy->padctl);
}
+#define XUSB_PADCTL_USB3_PAD_MUX 0x28
+#define XUSB_PADCTL_USB3_PAD_MUX_FORCE_PCIE_PAD_IDDQ_DISABLE (1 << 0)
+#define XUSB_PADCTL_USB3_PAD_MUX_FORCE_PCIE_PAD_IDDQ_DISABLE_MASK0 (1 << 1)
+#define XUSB_PADCTL_USB3_PAD_MUX_FORCE_PCIE_PAD_IDDQ_DISABLE_MASK1 (1 << 2)
+#define XUSB_PADCTL_USB3_PAD_MUX_FORCE_PCIE_PAD_IDDQ_DISABLE_MASK2 (1 << 3)
+#define XUSB_PADCTL_USB3_PAD_MUX_FORCE_PCIE_PAD_IDDQ_DISABLE_MASK3 (1 << 4)
+#define XUSB_PADCTL_USB3_PAD_MUX_FORCE_PCIE_PAD_IDDQ_DISABLE_MASK4 (1 << 5)
+#define XUSB_PADCTL_USB3_PAD_MUX_FORCE_PCIE_PAD_IDDQ_DISABLE_MASK5 (1 << 6)
+#define XUSB_PADCTL_USB3_PAD_MUX_FORCE_PCIE_PAD_IDDQ_DISABLE_MASK6 (1 << 7)
+#define XUSB_PADCTL_USB3_PAD_MUX_FORCE_SATA_PAD_IDDQ_DISABLE_MASK0 (1 << 8)
+
#define XUSB_PADCTL_UPHY_PLL_P0_CTL1 0x360
#define XUSB_PADCTL_UPHY_PLL_P0_CTL1_FREQ_NDIV_MASK (0xff << 20)
#define XUSB_PADCTL_UPHY_PLL_P0_CTL1_FREQ_NDIV(x) (((x) & 0xff) << 20)
@@ -366,31 +377,6 @@ static int pcie_phy_enable(struct tegra_xusb_phy *phy)
value &= ~XUSB_PADCTL_UPHY_PLL_P0_CTL8_RCAL_CLK_EN;
padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL8);
- value = readl(NV_PA_CLK_RST_BASE + CLK_RST_XUSBIO_PLL_CFG0);
- value &= ~CLK_RST_XUSBIO_PLL_CFG0_PADPLL_RESET_SWCTL;
- value &= ~CLK_RST_XUSBIO_PLL_CFG0_CLK_ENABLE_SWCTL;
- value |= CLK_RST_XUSBIO_PLL_CFG0_PADPLL_USE_LOCKDET;
- value |= CLK_RST_XUSBIO_PLL_CFG0_PADPLL_SLEEP_IDDQ;
- writel(value, NV_PA_CLK_RST_BASE + CLK_RST_XUSBIO_PLL_CFG0);
-
- value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL1);
- value &= ~XUSB_PADCTL_UPHY_PLL_P0_CTL1_PWR_OVRD;
- padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL1);
-
- value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL2);
- value &= ~XUSB_PADCTL_UPHY_PLL_P0_CTL2_CAL_OVRD;
- padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL2);
-
- value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL8);
- value &= ~XUSB_PADCTL_UPHY_PLL_P0_CTL8_RCAL_OVRD;
- padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL8);
-
- udelay(1);
-
- value = readl(NV_PA_CLK_RST_BASE + CLK_RST_XUSBIO_PLL_CFG0);
- value |= CLK_RST_XUSBIO_PLL_CFG0_SEQ_ENABLE;
- writel(value, NV_PA_CLK_RST_BASE + CLK_RST_XUSBIO_PLL_CFG0);
-
debug("< %s()\n", __func__);
return 0;
}
@@ -454,3 +440,35 @@ void tegra_xusb_padctl_init(void)
ret = tegra_xusb_process_nodes(nodes, count, &tegra210_socdata);
debug("%s: done, ret=%d\n", __func__, ret);
}
+
+void tegra_xusb_padctl_exit(void)
+{
+ u32 value;
+
+ debug("> %s\n", __func__);
+
+ value = padctl_readl(&padctl, XUSB_PADCTL_USB3_PAD_MUX);
+ value &= ~XUSB_PADCTL_USB3_PAD_MUX_FORCE_PCIE_PAD_IDDQ_DISABLE;
+ value &= ~XUSB_PADCTL_USB3_PAD_MUX_FORCE_PCIE_PAD_IDDQ_DISABLE_MASK0;
+ value &= ~XUSB_PADCTL_USB3_PAD_MUX_FORCE_PCIE_PAD_IDDQ_DISABLE_MASK1;
+ value &= ~XUSB_PADCTL_USB3_PAD_MUX_FORCE_PCIE_PAD_IDDQ_DISABLE_MASK2;
+ value &= ~XUSB_PADCTL_USB3_PAD_MUX_FORCE_PCIE_PAD_IDDQ_DISABLE_MASK3;
+ value &= ~XUSB_PADCTL_USB3_PAD_MUX_FORCE_PCIE_PAD_IDDQ_DISABLE_MASK4;
+ value &= ~XUSB_PADCTL_USB3_PAD_MUX_FORCE_PCIE_PAD_IDDQ_DISABLE_MASK5;
+ value &= ~XUSB_PADCTL_USB3_PAD_MUX_FORCE_PCIE_PAD_IDDQ_DISABLE_MASK6;
+ value &= ~XUSB_PADCTL_USB3_PAD_MUX_FORCE_SATA_PAD_IDDQ_DISABLE_MASK0;
+ padctl_writel(&padctl, value, XUSB_PADCTL_USB3_PAD_MUX);
+
+ value = padctl_readl(&padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL1);
+ value &= ~XUSB_PADCTL_UPHY_PLL_P0_CTL1_IDDQ;
+ value &= ~XUSB_PADCTL_UPHY_PLL_P0_CTL1_SLEEP_MASK;
+ value |= XUSB_PADCTL_UPHY_PLL_P0_CTL1_SLEEP(3);
+ value &= ~XUSB_PADCTL_UPHY_PLL_P0_CTL1_ENABLE;
+ padctl_writel(&padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL1);
+
+ reset_set_enable(PERIPH_ID_PEX_USB_UPHY, 1);
+ while (padctl.enable)
+ tegra_xusb_padctl_disable(&padctl);
+
+ debug("< %s()\n", __func__);
+}
diff --git a/arch/arm/mach-tegra/xusb-padctl-dummy.c b/arch/arm/mach-tegra/xusb-padctl-dummy.c
index 3ec27a2e3a..f2d90302f6 100644
--- a/arch/arm/mach-tegra/xusb-padctl-dummy.c
+++ b/arch/arm/mach-tegra/xusb-padctl-dummy.c
@@ -36,3 +36,7 @@ int __weak tegra_xusb_phy_unprepare(struct tegra_xusb_phy *phy)
void __weak tegra_xusb_padctl_init(void)
{
}
+
+void __weak tegra_xusb_padctl_exit(void)
+{
+}
diff --git a/configs/p2371-0000_defconfig b/configs/p2371-0000_defconfig
index 02a7569205..d9b8be15e7 100644
--- a/configs/p2371-0000_defconfig
+++ b/configs/p2371-0000_defconfig
@@ -1,6 +1,6 @@
CONFIG_ARM=y
CONFIG_TEGRA=y
-CONFIG_SYS_TEXT_BASE=0x80110000
+CONFIG_SYS_TEXT_BASE=0x80080000
CONFIG_TEGRA210=y
CONFIG_TARGET_P2371_0000=y
CONFIG_NR_DRAM_BANKS=2
diff --git a/configs/p2371-2180_defconfig b/configs/p2371-2180_defconfig
index 156a1cbcf9..602c5c1fad 100644
--- a/configs/p2371-2180_defconfig
+++ b/configs/p2371-2180_defconfig
@@ -1,6 +1,6 @@
CONFIG_ARM=y
CONFIG_TEGRA=y
-CONFIG_SYS_TEXT_BASE=0x80110000
+CONFIG_SYS_TEXT_BASE=0x80080000
CONFIG_TEGRA210=y
CONFIG_TARGET_P2371_2180=y
CONFIG_NR_DRAM_BANKS=2
diff --git a/configs/p2571_defconfig b/configs/p2571_defconfig
index 5cbb1c3201..29929e2d99 100644
--- a/configs/p2571_defconfig
+++ b/configs/p2571_defconfig
@@ -1,6 +1,6 @@
CONFIG_ARM=y
CONFIG_TEGRA=y
-CONFIG_SYS_TEXT_BASE=0x80110000
+CONFIG_SYS_TEXT_BASE=0x80080000
CONFIG_TEGRA210=y
CONFIG_TARGET_P2571=y
CONFIG_NR_DRAM_BANKS=2
--
2.19.0.rc0

View File

@ -0,0 +1,37 @@
From patchwork Fri Mar 8 20:10:23 2019
Content-Type: text/plain; charset="utf-8"
MIME-Version: 1.0
Content-Transfer-Encoding: 7bit
Subject: [U-Boot] p2371-2180: Build position independent binary
X-Patchwork-Submitter: Thierry Reding <thierry.reding@gmail.com>
X-Patchwork-Id: 1053674
Message-Id: <20190308201023.2145-1-thierry.reding@gmail.com>
To: Tom Warren <twarren@nvidia.com>
Cc: u-boot@lists.denx.de, Stephen Warren <swarren@nvidia.com>
Date: Fri, 8 Mar 2019 21:10:23 +0100
From: Thierry Reding <thierry.reding@gmail.com>
List-Id: U-Boot discussion <u-boot.lists.denx.de>
From: Thierry Reding <treding@nvidia.com>
In order to support chainloading of U-Boot by an earlier bootloader,
make sure the binary is position independent, so that the earlier boot-
loader can relocate it if necessary.
Signed-off-by: Thierry Reding <treding@nvidia.com>
---
configs/p2371-2180_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/p2371-2180_defconfig b/configs/p2371-2180_defconfig
index b66459e379ac..8d7cf3fb5346 100644
--- a/configs/p2371-2180_defconfig
+++ b/configs/p2371-2180_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_TEGRA=y
CONFIG_SYS_TEXT_BASE=0x80110000
+CONFIG_POSITION_INDEPENDENT=y
CONFIG_TEGRA210=y
CONFIG_TARGET_P2371_2180=y
CONFIG_NR_DRAM_BANKS=2

View File

@ -2,7 +2,7 @@
Name: uboot-tools
Version: 2019.04
Release: 0.5%{?candidate:.%{candidate}}%{?dist}
Release: 0.6%{?candidate:.%{candidate}}%{?dist}
Summary: U-Boot utilities
License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+
URL: http://www.denx.de/wiki/U-Boot
@ -24,9 +24,10 @@ Patch3: usb-kbd-fixes.patch
# Board fixes and enablement
Patch10: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch
Patch11: dragonboard-fixes.patch
Patch12: tegra186-jetson-tx2-disable-onboard-emmc.patch
Patch13: tegra-TXx-Add-CONFIG_EFI_LOADER_BOUNCE_BUFFER.patch
Patch14: tegra-fix-tx1.patch
Patch12: ARM-tegra-Add-NVIDIA-Jetson-Nano-Developer-Kit-support.patch
Patch13: tegra-p2371-2180-Build-position-independent-binary.patch
Patch14: net-eth-uclass-Write-MAC-address-to-hardware-after-probe.patch
BuildRequires: bc
BuildRequires: dtc
@ -301,6 +302,9 @@ cp -p board/warp7/README builds/docs/README.warp7
%endif
%changelog
* Wed Mar 20 2019 Peter Robinson <pbrobinson@fedoraproject.org> 2019.04-0.6-rc4
- Tegra Jetson TX-series improvements
* Tue Mar 19 2019 Peter Robinson <pbrobinson@fedoraproject.org> 2019.04-0.5-rc4
- 2019.04 RC4