From d6fc5ecb4bd897b99b99609fcfe708d369a96daf Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Mon, 10 May 2021 22:20:20 +0100 Subject: [PATCH] 2021.07 RC2 --- ...r-sync-from-linux-for-RGMII-RX-TX-de.patch | 2977 ----------------- ...fer-overflow-in-iomux_replace_device.patch | 152 - ...parameter-check-in-efi_file_read_int.patch | 3 + rk3399-Pinebook-pro-EDP-support.patch | 1257 ------- sources | 2 +- ...ort-asymmetric-dual-rank-DRAM-on-A64.patch | 337 -- uboot-tools.spec | 19 +- usb-kbd-fixes.patch | 115 - 8 files changed, 12 insertions(+), 4850 deletions(-) delete mode 100644 0001-arm-dts-allwinner-sync-from-linux-for-RGMII-RX-TX-de.patch delete mode 100644 IOMUX-Fix-buffer-overflow-in-iomux_replace_device.patch delete mode 100644 rk3399-Pinebook-pro-EDP-support.patch delete mode 100644 sunxi-support-asymmetric-dual-rank-DRAM-on-A64.patch delete mode 100644 usb-kbd-fixes.patch diff --git a/0001-arm-dts-allwinner-sync-from-linux-for-RGMII-RX-TX-de.patch b/0001-arm-dts-allwinner-sync-from-linux-for-RGMII-RX-TX-de.patch deleted file mode 100644 index f0d3575..0000000 --- a/0001-arm-dts-allwinner-sync-from-linux-for-RGMII-RX-TX-de.patch +++ /dev/null @@ -1,2977 +0,0 @@ -From 4f26cacd28d71fd7d051b560f550863679a5f04b Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Wed, 10 Feb 2021 13:58:20 +0000 -Subject: [PATCH] arm: dts: allwinner: sync from linux for RGMII RX/TX delay - fixes - -Sync over a subset of the AllWinner dts changes from Linux 5.11 -for the RGMII RX/TX delay network fixes. - -This pulls other bits in needed to sync the whole files, the bits -are other minor fixes, or pieces of DT that don't affect U-Boot. - -Signed-off-by: Peter Robinson ---- - arch/arm/dts/axp81x.dtsi | 9 + - arch/arm/dts/sun50i-a64-bananapi-m64.dts | 10 +- - arch/arm/dts/sun50i-a64-orangepi-win.dts | 10 +- - arch/arm/dts/sun50i-a64-pine64-plus.dts | 2 +- - arch/arm/dts/sun50i-a64-sopine-baseboard.dts | 10 +- - arch/arm/dts/sun50i-a64.dtsi | 34 +- - .../dts/sun50i-h5-bananapi-m2-plus-v1.2.dts | 1 + - .../arm/dts/sun50i-h5-libretech-all-h5-cc.dts | 2 +- - arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts | 2 +- - arch/arm/dts/sun50i-h5-orangepi-pc2.dts | 23 +- - arch/arm/dts/sun50i-h5-orangepi-prime.dts | 2 +- - .../arm/dts/sun50i-h5-orangepi-zero-plus2.dts | 38 +++ - arch/arm/dts/sun7i-a20-bananapi-m1-plus.dts | 14 +- - arch/arm/dts/sun7i-a20-bananapi.dts | 24 +- - arch/arm/dts/sun7i-a20-bananapro.dts | 14 +- - arch/arm/dts/sun7i-a20-cubieboard2.dts | 24 +- - arch/arm/dts/sun7i-a20-cubietruck.dts | 14 +- - arch/arm/dts/sun7i-a20-hummingbird.dts | 21 +- - arch/arm/dts/sun7i-a20-i12-tvbox.dts | 12 +- - arch/arm/dts/sun7i-a20-icnova-swac.dts | 15 +- - arch/arm/dts/sun7i-a20-itead-ibox.dts | 4 +- - arch/arm/dts/sun7i-a20-lamobo-r1.dts | 14 +- - arch/arm/dts/sun7i-a20-m3.dts | 12 +- - arch/arm/dts/sun7i-a20-olimex-som-evb.dts | 12 +- - arch/arm/dts/sun7i-a20-olimex-som204-evb.dts | 24 +- - arch/arm/dts/sun7i-a20-olinuxino-lime.dts | 30 +- - arch/arm/dts/sun7i-a20-olinuxino-lime2.dts | 44 +-- - arch/arm/dts/sun7i-a20-olinuxino-micro.dts | 30 +- - arch/arm/dts/sun7i-a20-orangepi-mini.dts | 24 +- - arch/arm/dts/sun7i-a20-orangepi.dts | 24 +- - arch/arm/dts/sun7i-a20-pcduino3-nano.dts | 28 +- - arch/arm/dts/sun7i-a20-pcduino3.dts | 24 +- - arch/arm/dts/sun7i-a20-wexler-tab7200.dts | 12 +- - arch/arm/dts/sun7i-a20-wits-pro-a20-dkt.dts | 24 +- - arch/arm/dts/sun7i-a20.dtsi | 218 +++++++++++- - arch/arm/dts/sun8i-a83t-bananapi-m3.dts | 53 ++- - arch/arm/dts/sun8i-a83t-cubietruck-plus.dts | 71 +++- - arch/arm/dts/sun8i-a83t.dtsi | 310 ++++++++++++++++-- - arch/arm/dts/sun8i-h3-orangepi-pc-plus.dts | 5 - - arch/arm/dts/sun8i-h3-orangepi-plus2e.dts | 2 +- - arch/arm/dts/sun8i-h3-orangepi-zero-plus2.dts | 38 +++ - arch/arm/dts/sun8i-v40-bananapi-m2-berry.dts | 12 +- - arch/arm/dts/sunxi-bananapi-m2-plus.dtsi | 2 +- - 43 files changed, 947 insertions(+), 351 deletions(-) - -diff --git a/arch/arm/dts/axp81x.dtsi b/arch/arm/dts/axp81x.dtsi -index 043c717dce..1dfeeceabf 100644 ---- a/arch/arm/dts/axp81x.dtsi -+++ b/arch/arm/dts/axp81x.dtsi -@@ -48,6 +48,11 @@ - interrupt-controller; - #interrupt-cells = <1>; - -+ ac_power_supply: ac-power-supply { -+ compatible = "x-powers,axp813-ac-power-supply"; -+ status = "disabled"; -+ }; -+ - axp_adc: adc { - compatible = "x-powers,axp813-adc"; - #io-channel-cells = <1>; -@@ -166,4 +171,8 @@ - status = "disabled"; - }; - }; -+ -+ usb_power_supply: usb-power-supply { -+ compatible = "x-powers,axp813-usb-power-supply"; -+ }; - }; -diff --git a/arch/arm/dts/sun50i-a64-bananapi-m64.dts b/arch/arm/dts/sun50i-a64-bananapi-m64.dts -index 883f217efb..e5e840b9fb 100644 ---- a/arch/arm/dts/sun50i-a64-bananapi-m64.dts -+++ b/arch/arm/dts/sun50i-a64-bananapi-m64.dts -@@ -105,7 +105,7 @@ - &emac { - pinctrl-names = "default"; - pinctrl-0 = <&rgmii_pins>; -- phy-mode = "rgmii"; -+ phy-mode = "rgmii-id"; - phy-handle = <&ext_rgmii_phy>; - phy-supply = <®_dc1sw>; - status = "okay"; -@@ -331,10 +331,10 @@ - "Microphone", "Microphone Jack", - "Microphone", "Onboard Microphone"; - simple-audio-card,routing = -- "Left DAC", "AIF1 Slot 0 Left", -- "Right DAC", "AIF1 Slot 0 Right", -- "AIF1 Slot 0 Left ADC", "Left ADC", -- "AIF1 Slot 0 Right ADC", "Right ADC", -+ "Left DAC", "DACL", -+ "Right DAC", "DACR", -+ "ADCL", "Left ADC", -+ "ADCR", "Right ADC", - "Headphone Jack", "HP", - "MIC2", "Microphone Jack", - "Onboard Microphone", "MBIAS", -diff --git a/arch/arm/dts/sun50i-a64-orangepi-win.dts b/arch/arm/dts/sun50i-a64-orangepi-win.dts -index fde9c7a99b..70e31743f0 100644 ---- a/arch/arm/dts/sun50i-a64-orangepi-win.dts -+++ b/arch/arm/dts/sun50i-a64-orangepi-win.dts -@@ -120,7 +120,7 @@ - &emac { - pinctrl-names = "default"; - pinctrl-0 = <&rgmii_pins>; -- phy-mode = "rgmii"; -+ phy-mode = "rgmii-id"; - phy-handle = <&ext_rgmii_phy>; - phy-supply = <®_gmac_3v3>; - status = "okay"; -@@ -330,10 +330,10 @@ - "Microphone", "Microphone Jack", - "Microphone", "Onboard Microphone"; - simple-audio-card,routing = -- "Left DAC", "AIF1 Slot 0 Left", -- "Right DAC", "AIF1 Slot 0 Right", -- "AIF1 Slot 0 Left ADC", "Left ADC", -- "AIF1 Slot 0 Right ADC", "Right ADC", -+ "Left DAC", "DACL", -+ "Right DAC", "DACR", -+ "ADCL", "Left ADC", -+ "ADCR", "Right ADC", - "Headphone Jack", "HP", - "MIC2", "Microphone Jack", - "Onboard Microphone", "MBIAS", -diff --git a/arch/arm/dts/sun50i-a64-pine64-plus.dts b/arch/arm/dts/sun50i-a64-pine64-plus.dts -index b26181cf90..b54099b654 100644 ---- a/arch/arm/dts/sun50i-a64-pine64-plus.dts -+++ b/arch/arm/dts/sun50i-a64-pine64-plus.dts -@@ -13,7 +13,7 @@ - &emac { - pinctrl-names = "default"; - pinctrl-0 = <&rgmii_pins>; -- phy-mode = "rgmii"; -+ phy-mode = "rgmii-txid"; - phy-handle = <&ext_rgmii_phy>; - status = "okay"; - }; -diff --git a/arch/arm/dts/sun50i-a64-sopine-baseboard.dts b/arch/arm/dts/sun50i-a64-sopine-baseboard.dts -index 2f6ea9f3f6..d4069749d7 100644 ---- a/arch/arm/dts/sun50i-a64-sopine-baseboard.dts -+++ b/arch/arm/dts/sun50i-a64-sopine-baseboard.dts -@@ -79,7 +79,7 @@ - &emac { - pinctrl-names = "default"; - pinctrl-0 = <&rgmii_pins>; -- phy-mode = "rgmii"; -+ phy-mode = "rgmii-id"; - phy-handle = <&ext_rgmii_phy>; - phy-supply = <®_dc1sw>; - status = "okay"; -@@ -159,11 +159,11 @@ - simple-audio-card,widgets = "Microphone", "Microphone Jack", - "Headphone", "Headphone Jack"; - simple-audio-card,routing = -- "Left DAC", "AIF1 Slot 0 Left", -- "Right DAC", "AIF1 Slot 0 Right", -+ "Left DAC", "DACL", -+ "Right DAC", "DACR", - "Headphone Jack", "HP", -- "AIF1 Slot 0 Left ADC", "Left ADC", -- "AIF1 Slot 0 Right ADC", "Right ADC", -+ "ADCL", "Left ADC", -+ "ADCR", "Right ADC", - "MIC2", "Microphone Jack"; - status = "okay"; - }; -diff --git a/arch/arm/dts/sun50i-a64.dtsi b/arch/arm/dts/sun50i-a64.dtsi -index 8dfbcd1440..51cc30e84e 100644 ---- a/arch/arm/dts/sun50i-a64.dtsi -+++ b/arch/arm/dts/sun50i-a64.dtsi -@@ -51,7 +51,7 @@ - reg = <0>; - enable-method = "psci"; - next-level-cache = <&L2>; -- clocks = <&ccu 21>; -+ clocks = <&ccu CLK_CPUX>; - clock-names = "cpu"; - #cooling-cells = <2>; - }; -@@ -62,7 +62,7 @@ - reg = <1>; - enable-method = "psci"; - next-level-cache = <&L2>; -- clocks = <&ccu 21>; -+ clocks = <&ccu CLK_CPUX>; - clock-names = "cpu"; - #cooling-cells = <2>; - }; -@@ -73,7 +73,7 @@ - reg = <2>; - enable-method = "psci"; - next-level-cache = <&L2>; -- clocks = <&ccu 21>; -+ clocks = <&ccu CLK_CPUX>; - clock-names = "cpu"; - #cooling-cells = <2>; - }; -@@ -84,7 +84,7 @@ - reg = <3>; - enable-method = "psci"; - next-level-cache = <&L2>; -- clocks = <&ccu 21>; -+ clocks = <&ccu CLK_CPUX>; - clock-names = "cpu"; - #cooling-cells = <2>; - }; -@@ -139,10 +139,10 @@ - simple-audio-card,mclk-fs = <128>; - simple-audio-card,aux-devs = <&codec_analog>; - simple-audio-card,routing = -- "Left DAC", "AIF1 Slot 0 Left", -- "Right DAC", "AIF1 Slot 0 Right", -- "AIF1 Slot 0 Left ADC", "Left ADC", -- "AIF1 Slot 0 Right ADC", "Right ADC"; -+ "Left DAC", "DACL", -+ "Right DAC", "DACR", -+ "ADCL", "Left ADC", -+ "ADCR", "Right ADC"; - status = "disabled"; - - cpudai: simple-audio-card,cpu { -@@ -157,6 +157,7 @@ - timer { - compatible = "arm,armv8-timer"; - allwinner,erratum-unknown1; -+ arm,no-tick-in-suspend; - interrupts = , - ; -+ compatible = "allwinner,sun50i-a64-i2s", -+ "allwinner,sun8i-h3-i2s"; -+ reg = <0x01c22800 0x400>; -+ interrupts = ; -+ clocks = <&ccu CLK_BUS_I2S2>, <&ccu CLK_I2S2>; -+ clock-names = "apb", "mod"; -+ resets = <&ccu RST_BUS_I2S2>; -+ dma-names = "rx", "tx"; -+ dmas = <&dma 27>, <&dma 27>; -+ status = "disabled"; -+ }; -+ - dai: dai@1c22c00 { - #sound-dai-cells = <0>; - compatible = "allwinner,sun50i-a64-codec-i2s"; -@@ -860,7 +875,8 @@ - - codec: codec@1c22e00 { - #sound-dai-cells = <0>; -- compatible = "allwinner,sun8i-a33-codec"; -+ compatible = "allwinner,sun50i-a64-codec", -+ "allwinner,sun8i-a33-codec"; - reg = <0x01c22e00 0x600>; - interrupts = ; - clocks = <&ccu CLK_BUS_CODEC>, <&ccu CLK_AC_DIG>; -diff --git a/arch/arm/dts/sun50i-h5-bananapi-m2-plus-v1.2.dts b/arch/arm/dts/sun50i-h5-bananapi-m2-plus-v1.2.dts -index 2e2b14c0ae..8857a37915 100644 ---- a/arch/arm/dts/sun50i-h5-bananapi-m2-plus-v1.2.dts -+++ b/arch/arm/dts/sun50i-h5-bananapi-m2-plus-v1.2.dts -@@ -3,6 +3,7 @@ - - /dts-v1/; - #include "sun50i-h5.dtsi" -+#include "sun50i-h5-cpu-opp.dtsi" - #include - - / { -diff --git a/arch/arm/dts/sun50i-h5-libretech-all-h5-cc.dts b/arch/arm/dts/sun50i-h5-libretech-all-h5-cc.dts -index df1b9263ad..6e30a564c8 100644 ---- a/arch/arm/dts/sun50i-h5-libretech-all-h5-cc.dts -+++ b/arch/arm/dts/sun50i-h5-libretech-all-h5-cc.dts -@@ -36,7 +36,7 @@ - pinctrl-0 = <&emac_rgmii_pins>; - phy-supply = <®_gmac_3v3>; - phy-handle = <&ext_rgmii_phy>; -- phy-mode = "rgmii"; -+ phy-mode = "rgmii-id"; - /delete-property/ allwinner,leds-active-low; - status = "okay"; - }; -diff --git a/arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts b/arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts -index 4f9ba53ffa..9d93fe1536 100644 ---- a/arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts -+++ b/arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts -@@ -96,7 +96,7 @@ - pinctrl-0 = <&emac_rgmii_pins>; - phy-supply = <®_gmac_3v3>; - phy-handle = <&ext_rgmii_phy>; -- phy-mode = "rgmii"; -+ phy-mode = "rgmii-id"; - status = "okay"; - }; - -diff --git a/arch/arm/dts/sun50i-h5-orangepi-pc2.dts b/arch/arm/dts/sun50i-h5-orangepi-pc2.dts -index 70b5f09984..8bf2db9dcb 100644 ---- a/arch/arm/dts/sun50i-h5-orangepi-pc2.dts -+++ b/arch/arm/dts/sun50i-h5-orangepi-pc2.dts -@@ -61,6 +61,7 @@ - label = "sw4"; - linux,code = ; - gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>; -+ wakeup-source; - }; - }; - -@@ -93,6 +94,10 @@ - status = "okay"; - }; - -+&cpu0 { -+ cpu-supply = <®_vdd_cpux>; -+}; -+ - &de { - status = "okay"; - }; -@@ -118,7 +123,7 @@ - pinctrl-0 = <&emac_rgmii_pins>; - phy-supply = <®_gmac_3v3>; - phy-handle = <&ext_rgmii_phy>; -- phy-mode = "rgmii"; -+ phy-mode = "rgmii-id"; - status = "okay"; - }; - -@@ -168,6 +173,22 @@ - status = "okay"; - }; - -+&r_i2c { -+ status = "okay"; -+ -+ reg_vdd_cpux: regulator@65 { -+ compatible = "silergy,sy8106a"; -+ reg = <0x65>; -+ regulator-name = "vdd-cpux"; -+ silergy,fixed-microvolt = <1100000>; -+ regulator-min-microvolt = <1000000>; -+ regulator-max-microvolt = <1400000>; -+ regulator-ramp-delay = <200>; -+ regulator-boot-on; -+ regulator-always-on; -+ }; -+}; -+ - &spi0 { - status = "okay"; - -diff --git a/arch/arm/dts/sun50i-h5-orangepi-prime.dts b/arch/arm/dts/sun50i-h5-orangepi-prime.dts -index cb44bfa598..33ab44072e 100644 ---- a/arch/arm/dts/sun50i-h5-orangepi-prime.dts -+++ b/arch/arm/dts/sun50i-h5-orangepi-prime.dts -@@ -124,7 +124,7 @@ - pinctrl-0 = <&emac_rgmii_pins>; - phy-supply = <®_gmac_3v3>; - phy-handle = <&ext_rgmii_phy>; -- phy-mode = "rgmii"; -+ phy-mode = "rgmii-id"; - status = "okay"; - }; - -diff --git a/arch/arm/dts/sun50i-h5-orangepi-zero-plus2.dts b/arch/arm/dts/sun50i-h5-orangepi-zero-plus2.dts -index c95a685413..de19e68eb8 100644 ---- a/arch/arm/dts/sun50i-h5-orangepi-zero-plus2.dts -+++ b/arch/arm/dts/sun50i-h5-orangepi-zero-plus2.dts -@@ -30,6 +30,21 @@ - }; - }; - -+ leds { -+ compatible = "gpio-leds"; -+ -+ pwr { -+ label = "orangepi:green:pwr"; -+ gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; -+ default-state = "on"; -+ }; -+ -+ status { -+ label = "orangepi:red:status"; -+ gpios = <&pio 0 17 GPIO_ACTIVE_HIGH>; -+ }; -+ }; -+ - reg_vcc3v3: vcc3v3 { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3"; -@@ -48,6 +63,10 @@ - status = "okay"; - }; - -+&ehci0 { -+ status = "okay"; -+}; -+ - &hdmi { - status = "okay"; - }; -@@ -92,6 +111,10 @@ - status = "okay"; - }; - -+&ohci0 { -+ status = "okay"; -+}; -+ - &uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_pa_pins>; -@@ -103,3 +126,18 @@ - pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>; - status = "okay"; - }; -+ -+&usb_otg { -+ /* -+ * According to schematics CN1 MicroUSB port can be used to take -+ * external 5V to power up the board VBUS. On the contrary CN1 MicroUSB -+ * port cannot provide power externally even if the board is powered -+ * via GPIO pins. It thus makes sense to force peripheral mode. -+ */ -+ dr_mode = "peripheral"; -+ status = "okay"; -+}; -+ -+&usbphy { -+ status = "okay"; -+}; -diff --git a/arch/arm/dts/sun7i-a20-bananapi-m1-plus.dts b/arch/arm/dts/sun7i-a20-bananapi-m1-plus.dts -index e2bfe00588..8945dbb114 100644 ---- a/arch/arm/dts/sun7i-a20-bananapi-m1-plus.dts -+++ b/arch/arm/dts/sun7i-a20-bananapi-m1-plus.dts -@@ -129,14 +129,10 @@ - &gmac { - pinctrl-names = "default"; - pinctrl-0 = <&gmac_rgmii_pins>; -- phy = <&phy1>; -- phy-mode = "rgmii"; -+ phy-handle = <&phy1>; -+ phy-mode = "rgmii-id"; - phy-supply = <®_gmac_3v3>; - status = "okay"; -- -- phy1: ethernet-phy@1 { -- reg = <1>; -- }; - }; - - &hdmi { -@@ -171,6 +167,12 @@ - status = "okay"; - }; - -+&gmac_mdio { -+ phy1: ethernet-phy@1 { -+ reg = <1>; -+ }; -+}; -+ - &mmc0 { - vmmc-supply = <®_vcc3v3>; - bus-width = <4>; -diff --git a/arch/arm/dts/sun7i-a20-bananapi.dts b/arch/arm/dts/sun7i-a20-bananapi.dts -index 81bc85d398..0b3d9ae756 100644 ---- a/arch/arm/dts/sun7i-a20-bananapi.dts -+++ b/arch/arm/dts/sun7i-a20-bananapi.dts -@@ -131,14 +131,10 @@ - &gmac { - pinctrl-names = "default"; - pinctrl-0 = <&gmac_rgmii_pins>; -- phy = <&phy1>; -- phy-mode = "rgmii"; -+ phy-handle = <&phy1>; -+ phy-mode = "rgmii-id"; - phy-supply = <®_gmac_3v3>; - status = "okay"; -- -- phy1: ethernet-phy@1 { -- reg = <1>; -- }; - }; - - &hdmi { -@@ -171,6 +167,12 @@ - status = "okay"; - }; - -+&gmac_mdio { -+ phy1: ethernet-phy@1 { -+ reg = <1>; -+ }; -+}; -+ - &mmc0 { - vmmc-supply = <®_vcc3v3>; - bus-width = <4>; -@@ -246,12 +248,6 @@ - "SPI-MISO", "SPI-CE1", "", - "IO-6", "IO-3", "IO-2", "IO-0", "", "", "", "", - "", "", "", "", "", "", "", ""; -- -- usb0_id_detect_pin: usb0-id-detect-pin { -- pins = "PH4"; -- function = "gpio_in"; -- bias-pull-up; -- }; - }; - - #include "axp209.dtsi" -@@ -329,9 +325,7 @@ - }; - - &usbphy { -- pinctrl-names = "default"; -- pinctrl-0 = <&usb0_id_detect_pin>; -- usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ -+ usb0_id_det-gpios = <&pio 7 4 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PH4 */ - usb0_vbus_power-supply = <&usb_power_supply>; - usb0_vbus-supply = <®_usb0_vbus>; - usb1_vbus-supply = <®_usb1_vbus>; -diff --git a/arch/arm/dts/sun7i-a20-bananapro.dts b/arch/arm/dts/sun7i-a20-bananapro.dts -index 0176e9de01..5740f94427 100644 ---- a/arch/arm/dts/sun7i-a20-bananapro.dts -+++ b/arch/arm/dts/sun7i-a20-bananapro.dts -@@ -109,14 +109,10 @@ - &gmac { - pinctrl-names = "default"; - pinctrl-0 = <&gmac_rgmii_pins>; -- phy = <&phy1>; -- phy-mode = "rgmii"; -+ phy-handle = <&phy1>; -+ phy-mode = "rgmii-id"; - phy-supply = <®_gmac_3v3>; - status = "okay"; -- -- phy1: ethernet-phy@1 { -- reg = <1>; -- }; - }; - - &i2c0 { -@@ -143,6 +139,12 @@ - status = "okay"; - }; - -+&gmac_mdio { -+ phy1: ethernet-phy@1 { -+ reg = <1>; -+ }; -+}; -+ - &mmc0 { - vmmc-supply = <®_vcc3v3>; - bus-width = <4>; -diff --git a/arch/arm/dts/sun7i-a20-cubieboard2.dts b/arch/arm/dts/sun7i-a20-cubieboard2.dts -index 200685b0b1..b8203e4ef2 100644 ---- a/arch/arm/dts/sun7i-a20-cubieboard2.dts -+++ b/arch/arm/dts/sun7i-a20-cubieboard2.dts -@@ -115,13 +115,9 @@ - &gmac { - pinctrl-names = "default"; - pinctrl-0 = <&gmac_mii_pins>; -- phy = <&phy1>; -+ phy-handle = <&phy1>; - phy-mode = "mii"; - status = "okay"; -- -- phy1: ethernet-phy@1 { -- reg = <1>; -- }; - }; - - &hdmi { -@@ -161,6 +157,12 @@ - status = "okay"; - }; - -+&gmac_mdio { -+ phy1: ethernet-phy@1 { -+ reg = <1>; -+ }; -+}; -+ - &ohci0 { - status = "okay"; - }; -@@ -173,14 +175,6 @@ - status = "okay"; - }; - --&pio { -- usb0_id_detect_pin: usb0-id-detect-pin { -- pins = "PH4"; -- function = "gpio_in"; -- bias-pull-up; -- }; --}; -- - ®_ahci_5v { - status = "okay"; - }; -@@ -236,9 +230,7 @@ - }; - - &usbphy { -- pinctrl-names = "default"; -- pinctrl-0 = <&usb0_id_detect_pin>; -- usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ -+ usb0_id_det-gpios = <&pio 7 4 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PH4 */ - usb1_vbus-supply = <®_usb1_vbus>; - usb2_vbus-supply = <®_usb2_vbus>; - status = "okay"; -diff --git a/arch/arm/dts/sun7i-a20-cubietruck.dts b/arch/arm/dts/sun7i-a20-cubietruck.dts -index 99f531b8d2..9109ca0919 100644 ---- a/arch/arm/dts/sun7i-a20-cubietruck.dts -+++ b/arch/arm/dts/sun7i-a20-cubietruck.dts -@@ -150,13 +150,9 @@ - &gmac { - pinctrl-names = "default"; - pinctrl-0 = <&gmac_rgmii_pins>; -- phy = <&phy1>; -- phy-mode = "rgmii"; -+ phy-handle = <&phy1>; -+ phy-mode = "rgmii-id"; - status = "okay"; -- -- phy1: ethernet-phy@1 { -- reg = <1>; -- }; - }; - - &hdmi { -@@ -194,6 +190,12 @@ - status = "okay"; - }; - -+&gmac_mdio { -+ phy1: ethernet-phy@1 { -+ reg = <1>; -+ }; -+}; -+ - &mmc0 { - vmmc-supply = <®_vcc3v3>; - bus-width = <4>; -diff --git a/arch/arm/dts/sun7i-a20-hummingbird.dts b/arch/arm/dts/sun7i-a20-hummingbird.dts -index fd0153f656..3def2a3305 100644 ---- a/arch/arm/dts/sun7i-a20-hummingbird.dts -+++ b/arch/arm/dts/sun7i-a20-hummingbird.dts -@@ -100,19 +100,10 @@ - &gmac { - pinctrl-names = "default"; - pinctrl-0 = <&gmac_rgmii_pins>; -- phy = <&phy1>; -+ phy-handle = <&phy1>; - phy-mode = "rgmii"; - phy-supply = <®_gmac_vdd>; -- /* phy reset config */ -- snps,reset-gpio = <&pio 0 17 GPIO_ACTIVE_HIGH>; /* PA17 */ -- snps,reset-active-low; -- /* wait 1s after reset, otherwise fail to read phy id */ -- snps,reset-delays-us = <0 10000 1000000>; - status = "okay"; -- -- phy1: ethernet-phy@1 { -- reg = <1>; -- }; - }; - - &i2c0 { -@@ -146,6 +137,16 @@ - status = "okay"; - }; - -+&gmac_mdio { -+ phy1: ethernet-phy@1 { -+ reg = <1>; -+ reset-gpios = <&pio 0 17 GPIO_ACTIVE_LOW>; /* PA17 */ -+ reset-assert-us = <10000>; -+ /* wait 1s after reset, otherwise fail to read phy id */ -+ reset-deassert-us = <1000000>; -+ }; -+}; -+ - &mmc0 { - vmmc-supply = <®_vcc3v0>; - bus-width = <4>; -diff --git a/arch/arm/dts/sun7i-a20-i12-tvbox.dts b/arch/arm/dts/sun7i-a20-i12-tvbox.dts -index 5f1c4f573d..358ed5f1b1 100644 ---- a/arch/arm/dts/sun7i-a20-i12-tvbox.dts -+++ b/arch/arm/dts/sun7i-a20-i12-tvbox.dts -@@ -115,14 +115,10 @@ - &gmac { - pinctrl-names = "default"; - pinctrl-0 = <&gmac_mii_pins>; -- phy = <&phy1>; -+ phy-handle = <&phy1>; - phy-mode = "mii"; - phy-supply = <®_gmac_3v3>; - status = "okay"; -- -- phy1: ethernet-phy@1 { -- reg = <1>; -- }; - }; - - &i2c0 { -@@ -145,6 +141,12 @@ - status = "okay"; - }; - -+&gmac_mdio { -+ phy1: ethernet-phy@1 { -+ reg = <1>; -+ }; -+}; -+ - &mmc0 { - vmmc-supply = <®_vcc3v3>; - bus-width = <4>; -diff --git a/arch/arm/dts/sun7i-a20-icnova-swac.dts b/arch/arm/dts/sun7i-a20-icnova-swac.dts -index 949494730a..413505f45a 100644 ---- a/arch/arm/dts/sun7i-a20-icnova-swac.dts -+++ b/arch/arm/dts/sun7i-a20-icnova-swac.dts -@@ -49,7 +49,8 @@ - - / { - model = "ICnova-A20 SWAC"; -- compatible = "swac,icnova-a20-swac", "incircuit,icnova-a20", "allwinner,sun7i-a20"; -+ compatible = "incircuit,icnova-a20-swac", "incircuit,icnova-a20", -+ "allwinner,sun7i-a20"; - - aliases { - serial0 = &uart0; -@@ -75,13 +76,9 @@ - &gmac { - pinctrl-names = "default"; - pinctrl-0 = <&gmac_mii_pins>; -- phy = <&phy1>; -+ phy-handle = <&phy1>; - phy-mode = "mii"; - status = "okay"; -- -- phy1: ethernet-phy@1 { -- reg = <1>; -- }; - }; - - &i2c0 { -@@ -98,6 +95,12 @@ - status = "okay"; - }; - -+&gmac_mdio { -+ phy1: ethernet-phy@1 { -+ reg = <1>; -+ }; -+}; -+ - &mmc0 { - vmmc-supply = <®_vcc3v3>; - bus-width = <4>; -diff --git a/arch/arm/dts/sun7i-a20-itead-ibox.dts b/arch/arm/dts/sun7i-a20-itead-ibox.dts -index b90a7607d0..946c272783 100644 ---- a/arch/arm/dts/sun7i-a20-itead-ibox.dts -+++ b/arch/arm/dts/sun7i-a20-itead-ibox.dts -@@ -97,10 +97,12 @@ - &gmac { - pinctrl-names = "default"; - pinctrl-0 = <&gmac_mii_pins>; -- phy = <&phy1>; -+ phy-handle = <&phy1>; - phy-mode = "mii"; - status = "okay"; -+}; - -+&gmac_mdio { - phy1: ethernet-phy@1 { - reg = <1>; - }; -diff --git a/arch/arm/dts/sun7i-a20-lamobo-r1.dts b/arch/arm/dts/sun7i-a20-lamobo-r1.dts -index f91e1bee44..17fa8901fc 100644 ---- a/arch/arm/dts/sun7i-a20-lamobo-r1.dts -+++ b/arch/arm/dts/sun7i-a20-lamobo-r1.dts -@@ -123,8 +123,6 @@ - phy-mode = "rgmii"; - phy-supply = <®_gmac_3v3>; - status = "okay"; -- /delete-property/#address-cells; -- /delete-property/#size-cells; - - fixed-link { - speed = <1000>; -@@ -229,14 +227,6 @@ - status = "okay"; - }; - --&pio { -- usb0_id_detect_pin: usb0-id-detect-pin { -- pins = "PH4"; -- function = "gpio_in"; -- bias-pull-up; -- }; --}; -- - #include "axp209.dtsi" - - &ac_power_supply { -@@ -322,9 +312,7 @@ - }; - - &usbphy { -- pinctrl-names = "default"; -- pinctrl-0 = <&usb0_id_detect_pin>; -- usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ -+ usb0_id_det-gpios = <&pio 7 4 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PH4 */ - usb0_vbus_power-supply = <&usb_power_supply>; - usb0_vbus-supply = <®_usb0_vbus>; - usb2_vbus-supply = <®_usb2_vbus>; -diff --git a/arch/arm/dts/sun7i-a20-m3.dts b/arch/arm/dts/sun7i-a20-m3.dts -index b8a1aaaf39..6bff9e731f 100644 ---- a/arch/arm/dts/sun7i-a20-m3.dts -+++ b/arch/arm/dts/sun7i-a20-m3.dts -@@ -82,13 +82,9 @@ - &gmac { - pinctrl-names = "default"; - pinctrl-0 = <&gmac_mii_pins>; -- phy = <&phy1>; -+ phy-handle = <&phy1>; - phy-mode = "mii"; - status = "okay"; -- -- phy1: ethernet-phy@1 { -- reg = <1>; -- }; - }; - - &i2c0 { -@@ -111,6 +107,12 @@ - status = "okay"; - }; - -+&gmac_mdio { -+ phy1: ethernet-phy@1 { -+ reg = <1>; -+ }; -+}; -+ - &mmc0 { - vmmc-supply = <®_vcc3v3>; - bus-width = <4>; -diff --git a/arch/arm/dts/sun7i-a20-olimex-som-evb.dts b/arch/arm/dts/sun7i-a20-olimex-som-evb.dts -index f0e6a96e57..6f9c54b8e4 100644 ---- a/arch/arm/dts/sun7i-a20-olimex-som-evb.dts -+++ b/arch/arm/dts/sun7i-a20-olimex-som-evb.dts -@@ -111,13 +111,9 @@ - &gmac { - pinctrl-names = "default"; - pinctrl-0 = <&gmac_rgmii_pins>; -- phy = <&phy1>; -+ phy-handle = <&phy1>; - phy-mode = "rgmii"; - status = "okay"; -- -- phy1: ethernet-phy@1 { -- reg = <1>; -- }; - }; - - &hdmi { -@@ -202,6 +198,12 @@ - }; - }; - -+&gmac_mdio { -+ phy1: ethernet-phy@1 { -+ reg = <1>; -+ }; -+}; -+ - &mmc0 { - vmmc-supply = <®_vcc3v3>; - bus-width = <4>; -diff --git a/arch/arm/dts/sun7i-a20-olimex-som204-evb.dts b/arch/arm/dts/sun7i-a20-olimex-som204-evb.dts -index 823aabce04..230d62a6b8 100644 ---- a/arch/arm/dts/sun7i-a20-olimex-som204-evb.dts -+++ b/arch/arm/dts/sun7i-a20-olimex-som204-evb.dts -@@ -105,18 +105,10 @@ - &gmac { - pinctrl-names = "default"; - pinctrl-0 = <&gmac_rgmii_pins>; -- phy = <&phy3>; -+ phy-handle = <&phy3>; - phy-mode = "rgmii"; - phy-supply = <®_vcc3v3>; -- -- snps,reset-gpio = <&pio 0 17 GPIO_ACTIVE_HIGH>; -- snps,reset-active-low; -- snps,reset-delays-us = <0 10000 1000000>; - status = "okay"; -- -- phy3: ethernet-phy@3 { -- reg = <3>; -- }; - }; - - &hdmi { -@@ -161,6 +153,16 @@ - status = "okay"; - }; - -+&gmac_mdio { -+ phy3: ethernet-phy@3 { -+ reg = <3>; -+ reset-gpios = <&pio 0 17 GPIO_ACTIVE_LOW>; /* PA17 */ -+ reset-assert-us = <10000>; -+ /* wait 1s after reset, otherwise fail to read phy id */ -+ reset-deassert-us = <1000000>; -+ }; -+}; -+ - &mmc0 { - vmmc-supply = <®_vcc3v3>; - bus-width = <4>; -@@ -314,8 +316,8 @@ - }; - - &usbphy { -- usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ -- usb0_vbus_det-gpio = <&pio 7 5 GPIO_ACTIVE_HIGH>; /* PH5 */ -+ usb0_id_det-gpios = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ -+ usb0_vbus_det-gpios = <&pio 7 5 GPIO_ACTIVE_HIGH>; /* PH5 */ - usb0_vbus_power-supply = <&usb_power_supply>; - usb0_vbus-supply = <®_usb0_vbus>; - usb1_vbus-supply = <®_usb1_vbus>; -diff --git a/arch/arm/dts/sun7i-a20-olinuxino-lime.dts b/arch/arm/dts/sun7i-a20-olinuxino-lime.dts -index 5e411194bf..2adbac8601 100644 ---- a/arch/arm/dts/sun7i-a20-olinuxino-lime.dts -+++ b/arch/arm/dts/sun7i-a20-olinuxino-lime.dts -@@ -106,13 +106,9 @@ - &gmac { - pinctrl-names = "default"; - pinctrl-0 = <&gmac_mii_pins>; -- phy = <&phy1>; -+ phy-handle = <&phy1>; - phy-mode = "mii"; - status = "okay"; -- -- phy1: ethernet-phy@1 { -- reg = <1>; -- }; - }; - - &hdmi { -@@ -149,6 +145,12 @@ - }; - }; - -+&gmac_mdio { -+ phy1: ethernet-phy@1 { -+ reg = <1>; -+ }; -+}; -+ - &mmc0 { - vmmc-supply = <®_vcc3v3>; - bus-width = <4>; -@@ -174,18 +176,6 @@ - function = "gpio_out"; - drive-strength = <20>; - }; -- -- usb0_id_detect_pin: usb0-id-detect-pin { -- pins = "PH4"; -- function = "gpio_in"; -- bias-pull-up; -- }; -- -- usb0_vbus_detect_pin: usb0-vbus-detect-pin { -- pins = "PH5"; -- function = "gpio_in"; -- bias-pull-down; -- }; - }; - - ®_ahci_5v { -@@ -217,10 +207,8 @@ - }; - - &usbphy { -- pinctrl-names = "default"; -- pinctrl-0 = <&usb0_id_detect_pin>, <&usb0_vbus_detect_pin>; -- usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ -- usb0_vbus_det-gpio = <&pio 7 5 GPIO_ACTIVE_HIGH>; /* PH5 */ -+ usb0_id_det-gpios = <&pio 7 4 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PH4 */ -+ usb0_vbus_det-gpios = <&pio 7 5 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>; /* PH5 */ - usb0_vbus-supply = <®_usb0_vbus>; - usb1_vbus-supply = <®_usb1_vbus>; - usb2_vbus-supply = <®_usb2_vbus>; -diff --git a/arch/arm/dts/sun7i-a20-olinuxino-lime2.dts b/arch/arm/dts/sun7i-a20-olinuxino-lime2.dts -index 4e1c590eb0..9ba62774e8 100644 ---- a/arch/arm/dts/sun7i-a20-olinuxino-lime2.dts -+++ b/arch/arm/dts/sun7i-a20-olinuxino-lime2.dts -@@ -111,13 +111,9 @@ - &gmac { - pinctrl-names = "default"; - pinctrl-0 = <&gmac_rgmii_pins>; -- phy = <&phy1>; -+ phy-handle = <&phy1>; - phy-mode = "rgmii"; - status = "okay"; -- -- phy1: ethernet-phy@1 { -- reg = <1>; -- }; - }; - - &hdmi { -@@ -154,6 +150,12 @@ - vref-supply = <®_vcc3v0>; - }; - -+&gmac_mdio { -+ phy1: ethernet-phy@1 { -+ reg = <1>; -+ }; -+}; -+ - &mmc0 { - vmmc-supply = <®_vcc3v3>; - bus-width = <4>; -@@ -174,23 +176,17 @@ - }; - - &pio { -+ vcc-pa-supply = <®_vcc3v3>; -+ vcc-pc-supply = <®_vcc3v3>; -+ vcc-pe-supply = <®_ldo3>; -+ vcc-pf-supply = <®_vcc3v3>; -+ vcc-pg-supply = <®_ldo4>; -+ - led_pins_olinuxinolime: led-pins { - pins = "PH2"; - function = "gpio_out"; - drive-strength = <20>; - }; -- -- usb0_id_detect_pin: usb0-id-detect-pin { -- pins = "PH4"; -- function = "gpio_in"; -- bias-pull-up; -- }; -- -- usb0_vbus_detect_pin: usb0-vbus-detect-pin { -- pins = "PH5"; -- function = "gpio_in"; -- bias-pull-down; -- }; - }; - - ®_ahci_5v { -@@ -200,6 +196,14 @@ - - #include "axp209.dtsi" - -+&ac_power_supply { -+ status = "okay"; -+}; -+ -+&battery_power_supply { -+ status = "okay"; -+}; -+ - ®_dcdc2 { - regulator-always-on; - regulator-min-microvolt = <1000000>; -@@ -267,10 +271,8 @@ - }; - - &usbphy { -- pinctrl-names = "default"; -- pinctrl-0 = <&usb0_id_detect_pin>, <&usb0_vbus_detect_pin>; -- usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ -- usb0_vbus_det-gpio = <&pio 7 5 GPIO_ACTIVE_HIGH>; /* PH5 */ -+ usb0_id_det-gpios = <&pio 7 4 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PH4 */ -+ usb0_vbus_det-gpios = <&pio 7 5 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>; /* PH5 */ - usb0_vbus-supply = <®_usb0_vbus>; - usb1_vbus-supply = <®_usb1_vbus>; - usb2_vbus-supply = <®_usb2_vbus>; -diff --git a/arch/arm/dts/sun7i-a20-olinuxino-micro.dts b/arch/arm/dts/sun7i-a20-olinuxino-micro.dts -index 840ae1194a..359bd0d5b3 100644 ---- a/arch/arm/dts/sun7i-a20-olinuxino-micro.dts -+++ b/arch/arm/dts/sun7i-a20-olinuxino-micro.dts -@@ -118,13 +118,9 @@ - &gmac { - pinctrl-names = "default"; - pinctrl-0 = <&gmac_mii_pins>, <&gmac_txerr>; -- phy = <&phy1>; -+ phy-handle = <&phy1>; - phy-mode = "mii"; - status = "okay"; -- -- phy1: ethernet-phy@1 { -- reg = <1>; -- }; - }; - - &hdmi { -@@ -215,6 +211,12 @@ - }; - }; - -+&gmac_mdio { -+ phy1: ethernet-phy@1 { -+ reg = <1>; -+ }; -+}; -+ - &mmc0 { - vmmc-supply = <®_vcc3v3>; - bus-width = <4>; -@@ -252,18 +254,6 @@ - function = "gpio_out"; - drive-strength = <20>; - }; -- -- usb0_id_detect_pin: usb0-id-detect-pin { -- pins = "PH4"; -- function = "gpio_in"; -- bias-pull-up; -- }; -- -- usb0_vbus_detect_pin: usb0-vbus-detect-pin { -- pins = "PH5"; -- function = "gpio_in"; -- bias-pull-down; -- }; - }; - - #include "axp209.dtsi" -@@ -355,10 +345,8 @@ - }; - - &usbphy { -- pinctrl-names = "default"; -- pinctrl-0 = <&usb0_id_detect_pin>, <&usb0_vbus_detect_pin>; -- usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ -- usb0_vbus_det-gpio = <&pio 7 5 GPIO_ACTIVE_HIGH>; /* PH5 */ -+ usb0_id_det-gpios = <&pio 7 4 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PH4 */ -+ usb0_vbus_det-gpios = <&pio 7 5 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>; /* PH5 */ - usb0_vbus-supply = <®_usb0_vbus>; - usb1_vbus-supply = <®_usb1_vbus>; - usb2_vbus-supply = <®_usb2_vbus>; -diff --git a/arch/arm/dts/sun7i-a20-orangepi-mini.dts b/arch/arm/dts/sun7i-a20-orangepi-mini.dts -index 15881081ca..2e328d2cef 100644 ---- a/arch/arm/dts/sun7i-a20-orangepi-mini.dts -+++ b/arch/arm/dts/sun7i-a20-orangepi-mini.dts -@@ -120,14 +120,10 @@ - &gmac { - pinctrl-names = "default"; - pinctrl-0 = <&gmac_rgmii_pins>; -- phy = <&phy1>; -+ phy-handle = <&phy1>; - phy-mode = "rgmii"; - phy-supply = <®_gmac_3v3>; - status = "okay"; -- -- phy1: ethernet-phy@1 { -- reg = <1>; -- }; - }; - - &hdmi { -@@ -158,6 +154,12 @@ - status = "okay"; - }; - -+&gmac_mdio { -+ phy1: ethernet-phy@1 { -+ reg = <1>; -+ }; -+}; -+ - &mmc0 { - vmmc-supply = <®_vcc3v3>; - bus-width = <4>; -@@ -176,14 +178,6 @@ - status = "okay"; - }; - --&pio { -- usb0_id_detect_pin: usb0-id-detect-pin { -- pins = "PH4"; -- function = "gpio_in"; -- bias-pull-up; -- }; --}; -- - ®_dcdc2 { - regulator-always-on; - regulator-min-microvolt = <1000000>; -@@ -239,9 +233,7 @@ - }; - - &usbphy { -- pinctrl-names = "default"; -- pinctrl-0 = <&usb0_id_detect_pin>; -- usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ -+ usb0_id_det-gpios = <&pio 7 4 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PH4 */ - usb0_vbus_power-supply = <&usb_power_supply>; - usb0_vbus-supply = <®_usb0_vbus>; - usb1_vbus-supply = <®_usb1_vbus>; -diff --git a/arch/arm/dts/sun7i-a20-orangepi.dts b/arch/arm/dts/sun7i-a20-orangepi.dts -index d64de2e73a..d75b2e2bab 100644 ---- a/arch/arm/dts/sun7i-a20-orangepi.dts -+++ b/arch/arm/dts/sun7i-a20-orangepi.dts -@@ -96,14 +96,10 @@ - &gmac { - pinctrl-names = "default"; - pinctrl-0 = <&gmac_rgmii_pins>; -- phy = <&phy1>; -+ phy-handle = <&phy1>; - phy-mode = "rgmii"; - phy-supply = <®_gmac_3v3>; - status = "okay"; -- -- phy1: ethernet-phy@1 { -- reg = <1>; -- }; - }; - - &i2c0 { -@@ -124,6 +120,12 @@ - status = "okay"; - }; - -+&gmac_mdio { -+ phy1: ethernet-phy@1 { -+ reg = <1>; -+ }; -+}; -+ - &mmc0 { - vmmc-supply = <®_vcc3v3>; - bus-width = <4>; -@@ -135,14 +137,6 @@ - status = "okay"; - }; - --&pio { -- usb0_id_detect_pin: usb0-id-detect-pin { -- pins = "PH4"; -- function = "gpio_in"; -- bias-pull-up; -- }; --}; -- - ®_dcdc2 { - regulator-always-on; - regulator-min-microvolt = <1000000>; -@@ -198,9 +192,7 @@ - }; - - &usbphy { -- pinctrl-names = "default"; -- pinctrl-0 = <&usb0_id_detect_pin>; -- usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ -+ usb0_id_det-gpios = <&pio 7 4 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PH4 */ - usb0_vbus_power-supply = <&usb_power_supply>; - usb0_vbus-supply = <®_usb0_vbus>; - usb1_vbus-supply = <®_usb1_vbus>; -diff --git a/arch/arm/dts/sun7i-a20-pcduino3-nano.dts b/arch/arm/dts/sun7i-a20-pcduino3-nano.dts -index 538ea15fa3..bf38c66c18 100644 ---- a/arch/arm/dts/sun7i-a20-pcduino3-nano.dts -+++ b/arch/arm/dts/sun7i-a20-pcduino3-nano.dts -@@ -1,5 +1,5 @@ - /* -- * Copyright 2015 Adam Sampson -+ * Copyright 2015-2020 Adam Sampson - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual -@@ -114,13 +114,9 @@ - &gmac { - pinctrl-names = "default"; - pinctrl-0 = <&gmac_rgmii_pins>; -- phy = <&phy1>; -- phy-mode = "rgmii"; -+ phy-handle = <&phy1>; -+ phy-mode = "rgmii-id"; - status = "okay"; -- -- phy1: ethernet-phy@1 { -- reg = <1>; -- }; - }; - - &hdmi { -@@ -149,6 +145,12 @@ - status = "okay"; - }; - -+&gmac_mdio { -+ phy1: ethernet-phy@1 { -+ reg = <1>; -+ }; -+}; -+ - &mmc0 { - vmmc-supply = <®_vcc3v3>; - bus-width = <4>; -@@ -168,14 +170,6 @@ - status = "okay"; - }; - --&pio { -- usb0_id_detect_pin: usb0-id-detect-pin { -- pins = "PH4"; -- function = "gpio_in"; -- bias-pull-up; -- }; --}; -- - ®_ahci_5v { - gpio = <&pio 7 2 GPIO_ACTIVE_HIGH>; /* PH2 */ - status = "okay"; -@@ -226,9 +220,7 @@ - }; - - &usbphy { -- pinctrl-names = "default"; -- pinctrl-0 = <&usb0_id_detect_pin>; -- usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ -+ usb0_id_det-gpios = <&pio 7 4 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PH4 */ - usb1_vbus-supply = <®_usb1_vbus>; - usb2_vbus-supply = <®_usb1_vbus>; - status = "okay"; -diff --git a/arch/arm/dts/sun7i-a20-pcduino3.dts b/arch/arm/dts/sun7i-a20-pcduino3.dts -index a72ed4318d..cc8271d777 100644 ---- a/arch/arm/dts/sun7i-a20-pcduino3.dts -+++ b/arch/arm/dts/sun7i-a20-pcduino3.dts -@@ -122,13 +122,9 @@ - &gmac { - pinctrl-names = "default"; - pinctrl-0 = <&gmac_mii_pins>; -- phy = <&phy1>; -+ phy-handle = <&phy1>; - phy-mode = "mii"; - status = "okay"; -- -- phy1: ethernet-phy@1 { -- reg = <1>; -- }; - }; - - &i2c0 { -@@ -149,6 +145,12 @@ - status = "okay"; - }; - -+&gmac_mdio { -+ phy1: ethernet-phy@1 { -+ reg = <1>; -+ }; -+}; -+ - &mmc0 { - vmmc-supply = <®_vcc3v3>; - bus-width = <4>; -@@ -168,14 +170,6 @@ - status = "okay"; - }; - --&pio { -- usb0_id_detect_pin: usb0-id-detect-pin { -- pins = "PH4"; -- function = "gpio_in"; -- bias-pull-up; -- }; --}; -- - ®_ahci_5v { - gpio = <&pio 7 2 GPIO_ACTIVE_HIGH>; - status = "okay"; -@@ -226,9 +220,7 @@ - }; - - &usbphy { -- pinctrl-names = "default"; -- pinctrl-0 = <&usb0_id_detect_pin>; -- usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ -+ usb0_id_det-gpios = <&pio 7 4 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PH4 */ - usb1_vbus-supply = <®_usb1_vbus>; - usb2_vbus-supply = <®_usb2_vbus>; - status = "okay"; -diff --git a/arch/arm/dts/sun7i-a20-wexler-tab7200.dts b/arch/arm/dts/sun7i-a20-wexler-tab7200.dts -index ffade253d1..6a66b0432d 100644 ---- a/arch/arm/dts/sun7i-a20-wexler-tab7200.dts -+++ b/arch/arm/dts/sun7i-a20-wexler-tab7200.dts -@@ -156,14 +156,6 @@ - status = "okay"; - }; - --&pio { -- usb0_id_detect_pin: usb0-id-detect-pin { -- pins = "PH4"; -- function = "gpio_in"; -- bias-pull-up; -- }; --}; -- - &pwm { - pinctrl-names = "default"; - pinctrl-0 = <&pwm0_pin>; -@@ -223,9 +215,7 @@ - }; - - &usbphy { -- pinctrl-names = "default"; -- pinctrl-0 = <&usb0_id_detect_pin>; -- usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ -+ usb0_id_det-gpios = <&pio 7 4 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PH4 */ - usb0_vbus_power-supply = <&usb_power_supply>; - usb0_vbus-supply = <®_usb0_vbus>; - usb1_vbus-supply = <®_usb1_vbus>; -diff --git a/arch/arm/dts/sun7i-a20-wits-pro-a20-dkt.dts b/arch/arm/dts/sun7i-a20-wits-pro-a20-dkt.dts -index c27e56091f..3bfae98f3c 100644 ---- a/arch/arm/dts/sun7i-a20-wits-pro-a20-dkt.dts -+++ b/arch/arm/dts/sun7i-a20-wits-pro-a20-dkt.dts -@@ -81,13 +81,9 @@ - &gmac { - pinctrl-names = "default"; - pinctrl-0 = <&gmac_rgmii_pins>; -- phy = <&phy1>; -+ phy-handle = <&phy1>; - phy-mode = "rgmii"; - status = "okay"; -- -- phy1: ethernet-phy@1 { -- reg = <1>; -- }; - }; - - &i2c0 { -@@ -110,6 +106,12 @@ - - #include "axp209.dtsi" - -+&gmac_mdio { -+ phy1: ethernet-phy@1 { -+ reg = <1>; -+ }; -+}; -+ - &mmc0 { - vmmc-supply = <®_vcc3v3>; - bus-width = <4>; -@@ -145,14 +147,6 @@ - status = "okay"; - }; - --&pio { -- usb0_id_detect_pin: usb0-id-detect-pin { -- pins = "PH4"; -- function = "gpio_in"; -- bias-pull-up; -- }; --}; -- - ®_dcdc2 { - regulator-always-on; - regulator-min-microvolt = <1000000>; -@@ -206,9 +200,7 @@ - }; - - &usbphy { -- pinctrl-names = "default"; -- pinctrl-0 = <&usb0_id_detect_pin>; -- usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ -+ usb0_id_det-gpios = <&pio 7 4 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PH4 */ - usb0_vbus_power-supply = <&usb_power_supply>; - usb0_vbus-supply = <®_usb0_vbus>; - usb1_vbus-supply = <®_usb1_vbus>; -diff --git a/arch/arm/dts/sun7i-a20.dtsi b/arch/arm/dts/sun7i-a20.dtsi -index 641a8fa6d4..6d6a37940d 100644 ---- a/arch/arm/dts/sun7i-a20.dtsi -+++ b/arch/arm/dts/sun7i-a20.dtsi -@@ -47,6 +47,7 @@ - #include - #include - #include -+#include - - / { - interrupt-parent = <&gic>; -@@ -180,7 +181,7 @@ - default-pool { - compatible = "shared-dma-pool"; - size = <0x6000000>; -- alloc-ranges = <0x4a000000 0x6000000>; -+ alloc-ranges = <0x40000000 0x10000000>; - reusable; - linux,cma-default; - }; -@@ -333,7 +334,7 @@ - #dma-cells = <2>; - }; - -- nfc: nand@1c03000 { -+ nfc: nand-controller@1c03000 { - compatible = "allwinner,sun4i-a10-nand"; - reg = <0x01c03000 0x1000>; - interrupts = ; -@@ -376,6 +377,16 @@ - num-cs = <1>; - }; - -+ csi0: csi@1c09000 { -+ compatible = "allwinner,sun7i-a20-csi0"; -+ reg = <0x01c09000 0x1000>; -+ interrupts = ; -+ clocks = <&ccu CLK_AHB_CSI0>, <&ccu CLK_CSI_SCLK>, <&ccu CLK_DRAM_CSI0>; -+ clock-names = "bus", "isp", "ram"; -+ resets = <&ccu RST_CSI0>; -+ status = "disabled"; -+ }; -+ - emac: ethernet@1c0b000 { - compatible = "allwinner,sun4i-a10-emac"; - reg = <0x01c0b000 0x1000>; -@@ -394,11 +405,12 @@ - }; - - tcon0: lcd-controller@1c0c000 { -- compatible = "allwinner,sun7i-a20-tcon"; -+ compatible = "allwinner,sun7i-a20-tcon0", -+ "allwinner,sun7i-a20-tcon"; - reg = <0x01c0c000 0x1000>; - interrupts = ; -- resets = <&ccu RST_TCON0>; -- reset-names = "lcd"; -+ resets = <&ccu RST_TCON0>, <&ccu RST_LVDS>; -+ reset-names = "lcd", "lvds"; - clocks = <&ccu CLK_AHB_LCD0>, - <&ccu CLK_TCON0_CH0>, - <&ccu CLK_TCON0_CH1>; -@@ -406,6 +418,7 @@ - "tcon-ch0", - "tcon-ch1"; - clock-output-names = "tcon0-pixel-clock"; -+ #clock-cells = <0>; - dmas = <&dma SUN4I_DMA_DEDICATED 14>; - - ports { -@@ -443,7 +456,8 @@ - }; - - tcon1: lcd-controller@1c0d000 { -- compatible = "allwinner,sun7i-a20-tcon"; -+ compatible = "allwinner,sun7i-a20-tcon1", -+ "allwinner,sun7i-a20-tcon"; - reg = <0x01c0d000 0x1000>; - interrupts = ; - resets = <&ccu RST_TCON1>; -@@ -455,6 +469,7 @@ - "tcon-ch0", - "tcon-ch1"; - clock-output-names = "tcon1-pixel-clock"; -+ #clock-cells = <0>; - dmas = <&dma SUN4I_DMA_DEDICATED 15>; - - ports { -@@ -586,13 +601,14 @@ - phy-names = "usb"; - extcon = <&usbphy 0>; - allwinner,sram = <&otg_sram 1>; -+ dr_mode = "otg"; - status = "disabled"; - }; - - usbphy: phy@1c13400 { - #phy-cells = <1>; - compatible = "allwinner,sun7i-a20-usb-phy"; -- reg = <0x01c13400 0x10 0x01c14800 0x4 0x01c1c800 0x4>; -+ reg = <0x01c13400 0x10>, <0x01c14800 0x4>, <0x01c1c800 0x4>; - reg-names = "phy_ctrl", "pmu1", "pmu2"; - clocks = <&ccu CLK_USB_PHY>; - clock-names = "usb_phy"; -@@ -716,6 +732,17 @@ - status = "disabled"; - }; - -+ csi1: csi@1c1d000 { -+ compatible = "allwinner,sun7i-a20-csi1", -+ "allwinner,sun4i-a10-csi1"; -+ reg = <0x01c1d000 0x1000>; -+ interrupts = ; -+ clocks = <&ccu CLK_AHB_CSI1>, <&ccu CLK_DRAM_CSI1>; -+ clock-names = "bus", "ram"; -+ resets = <&ccu RST_CSI1>; -+ status = "disabled"; -+ }; -+ - spi3: spi@1c1f000 { - compatible = "allwinner,sun4i-a10-spi"; - reg = <0x01c1f000 0x1000>; -@@ -751,21 +778,70 @@ - #interrupt-cells = <3>; - #gpio-cells = <3>; - -+ /omit-if-no-ref/ -+ can_pa_pins: can-pa-pins { -+ pins = "PA16", "PA17"; -+ function = "can"; -+ }; -+ -+ /omit-if-no-ref/ - can_ph_pins: can-ph-pins { - pins = "PH20", "PH21"; - function = "can"; - }; - -+ /omit-if-no-ref/ - clk_out_a_pin: clk-out-a-pin { - pins = "PI12"; - function = "clk_out_a"; - }; - -+ /omit-if-no-ref/ - clk_out_b_pin: clk-out-b-pin { - pins = "PI13"; - function = "clk_out_b"; - }; - -+ /omit-if-no-ref/ -+ csi0_8bits_pins: csi-8bits-pins { -+ pins = "PE0", "PE2", "PE3", "PE4", "PE5", -+ "PE6", "PE7", "PE8", "PE9", "PE10", -+ "PE11"; -+ function = "csi0"; -+ }; -+ -+ /omit-if-no-ref/ -+ csi0_clk_pin: csi-clk-pin { -+ pins = "PE1"; -+ function = "csi0"; -+ }; -+ -+ /omit-if-no-ref/ -+ csi1_8bits_pg_pins: csi1-8bits-pg-pins { -+ pins = "PG0", "PG2", "PG3", "PG4", "PG5", -+ "PG6", "PG7", "PG8", "PG9", "PG10", -+ "PG11"; -+ function = "csi1"; -+ }; -+ -+ /omit-if-no-ref/ -+ csi1_24bits_ph_pins: csi1-24bits-ph-pins { -+ pins = "PH0", "PH1", "PH2", "PH3", "PH4", -+ "PH5", "PH6", "PH7", "PH8", "PH9", -+ "PH10", "PH11", "PH12", "PH13", "PH14", -+ "PH15", "PH16", "PH17", "PH18", "PH19", -+ "PH20", "PH21", "PH22", "PH23", "PH24", -+ "PH25", "PH26", "PH27"; -+ function = "csi1"; -+ }; -+ -+ /omit-if-no-ref/ -+ csi1_clk_pg_pin: csi1-clk-pg-pin { -+ pins = "PG1"; -+ function = "csi1"; -+ }; -+ -+ /omit-if-no-ref/ - emac_pa_pins: emac-pa-pins { - pins = "PA0", "PA1", "PA2", - "PA3", "PA4", "PA5", "PA6", -@@ -775,6 +851,17 @@ - function = "emac"; - }; - -+ /omit-if-no-ref/ -+ emac_ph_pins: emac-ph-pins { -+ pins = "PH8", "PH9", "PH10", "PH11", -+ "PH14", "PH15", "PH16", "PH17", -+ "PH18", "PH19", "PH20", "PH21", -+ "PH22", "PH23", "PH24", "PH25", -+ "PH26"; -+ function = "emac"; -+ }; -+ -+ /omit-if-no-ref/ - gmac_mii_pins: gmac-mii-pins { - pins = "PA0", "PA1", "PA2", - "PA3", "PA4", "PA5", "PA6", -@@ -784,6 +871,7 @@ - function = "gmac"; - }; - -+ /omit-if-no-ref/ - gmac_rgmii_pins: gmac-rgmii-pins { - pins = "PA0", "PA1", "PA2", - "PA3", "PA4", "PA5", "PA6", -@@ -798,46 +886,69 @@ - drive-strength = <40>; - }; - -+ /omit-if-no-ref/ - i2c0_pins: i2c0-pins { - pins = "PB0", "PB1"; - function = "i2c0"; - }; - -+ /omit-if-no-ref/ - i2c1_pins: i2c1-pins { - pins = "PB18", "PB19"; - function = "i2c1"; - }; - -+ /omit-if-no-ref/ - i2c2_pins: i2c2-pins { - pins = "PB20", "PB21"; - function = "i2c2"; - }; - -+ /omit-if-no-ref/ - i2c3_pins: i2c3-pins { - pins = "PI0", "PI1"; - function = "i2c3"; - }; - -+ /omit-if-no-ref/ - ir0_rx_pin: ir0-rx-pin { - pins = "PB4"; - function = "ir0"; - }; - -+ /omit-if-no-ref/ - ir0_tx_pin: ir0-tx-pin { - pins = "PB3"; - function = "ir0"; - }; - -+ /omit-if-no-ref/ - ir1_rx_pin: ir1-rx-pin { - pins = "PB23"; - function = "ir1"; - }; - -+ /omit-if-no-ref/ - ir1_tx_pin: ir1-tx-pin { - pins = "PB22"; - function = "ir1"; - }; - -+ /omit-if-no-ref/ -+ lcd_lvds0_pins: lcd-lvds0-pins { -+ pins = "PD0", "PD1", "PD2", "PD3", "PD4", -+ "PD5", "PD6", "PD7", "PD8", "PD9"; -+ function = "lvds0"; -+ }; -+ -+ /omit-if-no-ref/ -+ lcd_lvds1_pins: lcd-lvds1-pins { -+ pins = "PD10", "PD11", "PD12", "PD13", "PD14", -+ "PD15", "PD16", "PD17", "PD18", "PD19"; -+ function = "lvds1"; -+ }; -+ -+ /omit-if-no-ref/ - mmc0_pins: mmc0-pins { - pins = "PF0", "PF1", "PF2", - "PF3", "PF4", "PF5"; -@@ -846,6 +957,7 @@ - bias-pull-up; - }; - -+ /omit-if-no-ref/ - mmc2_pins: mmc2-pins { - pins = "PC6", "PC7", "PC8", - "PC9", "PC10", "PC11"; -@@ -854,6 +966,7 @@ - bias-pull-up; - }; - -+ /omit-if-no-ref/ - mmc3_pins: mmc3-pins { - pins = "PI4", "PI5", "PI6", - "PI7", "PI8", "PI9"; -@@ -862,127 +975,206 @@ - bias-pull-up; - }; - -+ /omit-if-no-ref/ - ps2_0_pins: ps2-0-pins { - pins = "PI20", "PI21"; - function = "ps2"; - }; - -+ /omit-if-no-ref/ - ps2_1_ph_pins: ps2-1-ph-pins { - pins = "PH12", "PH13"; - function = "ps2"; - }; - -+ /omit-if-no-ref/ - pwm0_pin: pwm0-pin { - pins = "PB2"; - function = "pwm"; - }; - -+ /omit-if-no-ref/ - pwm1_pin: pwm1-pin { - pins = "PI3"; - function = "pwm"; - }; - -+ /omit-if-no-ref/ - spdif_tx_pin: spdif-tx-pin { - pins = "PB13"; - function = "spdif"; - bias-pull-up; - }; - -+ /omit-if-no-ref/ - spi0_pi_pins: spi0-pi-pins { - pins = "PI11", "PI12", "PI13"; - function = "spi0"; - }; - -+ /omit-if-no-ref/ - spi0_cs0_pi_pin: spi0-cs0-pi-pin { - pins = "PI10"; - function = "spi0"; - }; - -+ /omit-if-no-ref/ - spi0_cs1_pi_pin: spi0-cs1-pi-pin { - pins = "PI14"; - function = "spi0"; - }; - -+ /omit-if-no-ref/ - spi1_pi_pins: spi1-pi-pins { - pins = "PI17", "PI18", "PI19"; - function = "spi1"; - }; - -+ /omit-if-no-ref/ - spi1_cs0_pi_pin: spi1-cs0-pi-pin { - pins = "PI16"; - function = "spi1"; - }; - -+ /omit-if-no-ref/ - spi2_pb_pins: spi2-pb-pins { - pins = "PB15", "PB16", "PB17"; - function = "spi2"; - }; - -+ /omit-if-no-ref/ - spi2_cs0_pb_pin: spi2-cs0-pb-pin { - pins = "PB14"; - function = "spi2"; - }; - -+ /omit-if-no-ref/ - spi2_pc_pins: spi2-pc-pins { - pins = "PC20", "PC21", "PC22"; - function = "spi2"; - }; - -+ /omit-if-no-ref/ - spi2_cs0_pc_pin: spi2-cs0-pc-pin { - pins = "PC19"; - function = "spi2"; - }; - -+ /omit-if-no-ref/ - uart0_pb_pins: uart0-pb-pins { - pins = "PB22", "PB23"; - function = "uart0"; - }; - -+ /omit-if-no-ref/ -+ uart0_pf_pins: uart0-pf-pins { -+ pins = "PF2", "PF4"; -+ function = "uart0"; -+ }; -+ -+ /omit-if-no-ref/ -+ uart1_pa_pins: uart1-pa-pins { -+ pins = "PA10", "PA11"; -+ function = "uart1"; -+ }; -+ -+ /omit-if-no-ref/ -+ uart1_cts_rts_pa_pins: uart1-cts-rts-pa-pins { -+ pins = "PA12", "PA13"; -+ function = "uart1"; -+ }; -+ -+ /omit-if-no-ref/ -+ uart2_pa_pins: uart2-pa-pins { -+ pins = "PA2", "PA3"; -+ function = "uart2"; -+ }; -+ -+ /omit-if-no-ref/ -+ uart2_cts_rts_pa_pins: uart2-cts-rts-pa-pins { -+ pins = "PA0", "PA1"; -+ function = "uart2"; -+ }; -+ -+ /omit-if-no-ref/ - uart2_pi_pins: uart2-pi-pins { - pins = "PI18", "PI19"; - function = "uart2"; - }; - -+ /omit-if-no-ref/ - uart2_cts_rts_pi_pins: uart2-cts-rts-pi-pins { - pins = "PI16", "PI17"; - function = "uart2"; - }; - -+ /omit-if-no-ref/ - uart3_pg_pins: uart3-pg-pins { - pins = "PG6", "PG7"; - function = "uart3"; - }; - -+ /omit-if-no-ref/ - uart3_cts_rts_pg_pins: uart3-cts-rts-pg-pins { - pins = "PG8", "PG9"; - function = "uart3"; - }; - -+ /omit-if-no-ref/ - uart3_ph_pins: uart3-ph-pins { - pins = "PH0", "PH1"; - function = "uart3"; - }; - -+ /omit-if-no-ref/ -+ uart3_cts_rts_ph_pins: uart3-cts-rts-ph-pins { -+ pins = "PH2", "PH3"; -+ function = "uart3"; -+ }; -+ -+ /omit-if-no-ref/ - uart4_pg_pins: uart4-pg-pins { - pins = "PG10", "PG11"; - function = "uart4"; - }; - -+ /omit-if-no-ref/ - uart4_ph_pins: uart4-ph-pins { - pins = "PH4", "PH5"; - function = "uart4"; - }; - -+ /omit-if-no-ref/ -+ uart5_ph_pins: uart5-ph-pins { -+ pins = "PH6", "PH7"; -+ function = "uart5"; -+ }; -+ -+ /omit-if-no-ref/ - uart5_pi_pins: uart5-pi-pins { - pins = "PI10", "PI11"; - function = "uart5"; - }; - -+ /omit-if-no-ref/ -+ uart6_pa_pins: uart6-pa-pins { -+ pins = "PA12", "PA13"; -+ function = "uart6"; -+ }; -+ -+ /omit-if-no-ref/ - uart6_pi_pins: uart6-pi-pins { - pins = "PI12", "PI13"; - function = "uart6"; - }; - -+ /omit-if-no-ref/ -+ uart7_pa_pins: uart7-pa-pins { -+ pins = "PA14", "PA15"; -+ function = "uart7"; -+ }; -+ -+ /omit-if-no-ref/ - uart7_pi_pins: uart7-pi-pins { - pins = "PI20", "PI21"; - function = "uart7"; -@@ -1004,6 +1196,8 @@ - wdt: watchdog@1c20c90 { - compatible = "allwinner,sun4i-a10-wdt"; - reg = <0x01c20c90 0x10>; -+ interrupts = ; -+ clocks = <&osc24M>; - }; - - rtc: rtc@1c20d00 { -@@ -1326,8 +1520,12 @@ - snps,fixed-burst; - snps,force_sf_dma_mode; - status = "disabled"; -- #address-cells = <1>; -- #size-cells = <0>; -+ -+ gmac_mdio: mdio { -+ compatible = "snps,dwmac-mdio"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ }; - }; - - hstimer@1c60000 { -@@ -1341,7 +1539,7 @@ - }; - - gic: interrupt-controller@1c81000 { -- compatible = "arm,gic-400", "arm,cortex-a7-gic", "arm,cortex-a15-gic"; -+ compatible = "arm,gic-400"; - reg = <0x01c81000 0x1000>, - <0x01c82000 0x2000>, - <0x01c84000 0x2000>, -diff --git a/arch/arm/dts/sun8i-a83t-bananapi-m3.dts b/arch/arm/dts/sun8i-a83t-bananapi-m3.dts -index eaff6fa401..431f70234d 100644 ---- a/arch/arm/dts/sun8i-a83t-bananapi-m3.dts -+++ b/arch/arm/dts/sun8i-a83t-bananapi-m3.dts -@@ -107,6 +107,14 @@ - }; - }; - -+&cpu0 { -+ cpu-supply = <®_dcdc2>; -+}; -+ -+&cpu100 { -+ cpu-supply = <®_dcdc3>; -+}; -+ - &de { - status = "okay"; - }; -@@ -123,7 +131,7 @@ - pinctrl-0 = <&emac_rgmii_pins>; - phy-supply = <®_sw>; - phy-handle = <&rgmii_phy>; -- phy-mode = "rgmii"; -+ phy-mode = "rgmii-id"; - allwinner,rx-delay-ps = <700>; - allwinner,tx-delay-ps = <700>; - status = "okay"; -@@ -183,6 +191,11 @@ - status = "okay"; - }; - -+&r_cir { -+ clock-frequency = <3000000>; -+ status = "okay"; -+}; -+ - &r_rsb { - status = "okay"; - -@@ -224,6 +237,14 @@ - - #include "axp81x.dtsi" - -+&ac_power_supply { -+ status = "okay"; -+}; -+ -+&battery_power_supply { -+ status = "okay"; -+}; -+ - ®_aldo1 { - regulator-always-on; - regulator-min-microvolt = <1800000>; -@@ -301,8 +322,8 @@ - - ®_dldo3 { - regulator-always-on; -- regulator-min-microvolt = <2500000>; -- regulator-max-microvolt = <2500000>; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; - regulator-name = "vcc-pd"; - }; - -@@ -350,11 +371,37 @@ - status = "okay"; - }; - -+&uart1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>; -+ uart-has-rtscts; -+ status = "okay"; -+ -+ bluetooth { -+ compatible = "brcm,bcm43438-bt"; -+ clocks = <&ac100_rtc 1>; -+ clock-names = "lpo"; -+ vbat-supply = <®_dldo1>; -+ vddio-supply = <®_dldo1>; -+ device-wakeup-gpios = <&pio 7 9 GPIO_ACTIVE_HIGH>; /* PH9 */ -+ host-wakeup-gpios = <&r_pio 0 5 GPIO_ACTIVE_HIGH>; /* PL5 */ -+ shutdown-gpios = <&r_pio 0 4 GPIO_ACTIVE_HIGH>; /* PL4 */ -+ }; -+}; -+ - &usb_otg { -+ dr_mode = "otg"; -+ status = "okay"; -+}; -+ -+&usb_power_supply { - status = "okay"; - }; - - &usbphy { -+ usb0_id_det-gpios = <&pio 7 11 GPIO_ACTIVE_HIGH>; /* PH11 */ -+ usb0_vbus_power-supply = <&usb_power_supply>; -+ usb0_vbus-supply = <®_drivevbus>; - usb1_vbus-supply = <®_usb1_vbus>; - status = "okay"; - }; -diff --git a/arch/arm/dts/sun8i-a83t-cubietruck-plus.dts b/arch/arm/dts/sun8i-a83t-cubietruck-plus.dts -index 5dba4fc310..d8326a5c68 100644 ---- a/arch/arm/dts/sun8i-a83t-cubietruck-plus.dts -+++ b/arch/arm/dts/sun8i-a83t-cubietruck-plus.dts -@@ -60,6 +60,17 @@ - stdout-path = "serial0:115200n8"; - }; - -+ hdmi-connector { -+ compatible = "hdmi-connector"; -+ type = "a"; -+ -+ port { -+ hdmi_con_in: endpoint { -+ remote-endpoint = <&hdmi_out_con>; -+ }; -+ }; -+ }; -+ - leds { - compatible = "gpio-leds"; - -@@ -90,7 +101,7 @@ - initial-mode = <1>; /* initialize in HUB mode */ - disabled-ports = <1>; - intn-gpios = <&pio 7 5 GPIO_ACTIVE_HIGH>; /* PH5 */ -- reset-gpios = <&pio 4 16 GPIO_ACTIVE_HIGH>; /* PE16 */ -+ reset-gpios = <&pio 4 16 GPIO_ACTIVE_LOW>; /* PE16 */ - connect-gpios = <&pio 4 17 GPIO_ACTIVE_HIGH>; /* PE17 */ - refclk-frequency = <19200000>; - }; -@@ -145,6 +156,18 @@ - }; - }; - -+&cpu0 { -+ cpu-supply = <®_dcdc2>; -+}; -+ -+&cpu100 { -+ cpu-supply = <®_dcdc3>; -+}; -+ -+&de { -+ status = "okay"; -+}; -+ - &ehci0 { - /* GL830 USB-to-SATA bridge here */ - status = "okay"; -@@ -160,10 +183,20 @@ - pinctrl-0 = <&emac_rgmii_pins>; - phy-supply = <®_dldo4>; - phy-handle = <&rgmii_phy>; -- phy-mode = "rgmii"; -+ phy-mode = "rgmii-id"; -+ status = "okay"; -+}; -+ -+&hdmi { - status = "okay"; - }; - -+&hdmi_out { -+ hdmi_out_con: endpoint { -+ remote-endpoint = <&hdmi_con_in>; -+ }; -+}; -+ - &mdio { - rgmii_phy: ethernet-phy@1 { - compatible = "ethernet-phy-ieee802.3-c22"; -@@ -239,6 +272,14 @@ - - #include "axp81x.dtsi" - -+&ac_power_supply { -+ status = "okay"; -+}; -+ -+&battery_power_supply { -+ status = "okay"; -+}; -+ - ®_aldo1 { - regulator-always-on; - regulator-min-microvolt = <1800000>; -@@ -386,11 +427,37 @@ - status = "okay"; - }; - -+&uart1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>; -+ uart-has-rtscts; -+ status = "okay"; -+ -+ bluetooth { -+ compatible = "brcm,bcm4330-bt"; -+ clocks = <&ac100_rtc 1>; -+ clock-names = "lpo"; -+ vbat-supply = <®_dcdc1>; -+ vddio-supply = <®_sw>; -+ device-wakeup-gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; /* PL10 */ -+ host-wakeup-gpios = <&r_pio 0 8 GPIO_ACTIVE_HIGH>; /* PL8 */ -+ shutdown-gpios = <&r_pio 0 4 GPIO_ACTIVE_HIGH>; /* PL4 */ -+ }; -+}; -+ - &usb_otg { -+ dr_mode = "otg"; -+ status = "okay"; -+}; -+ -+&usb_power_supply { - status = "okay"; - }; - - &usbphy { -+ usb0_id_det-gpios = <&pio 7 11 GPIO_ACTIVE_HIGH>; /* PH11 */ -+ usb0_vbus_power-supply = <&usb_power_supply>; -+ usb0_vbus-supply = <®_drivevbus>; - usb1_vbus-supply = <®_usb1_vbus>; - usb2_vbus-supply = <®_usb2_vbus>; - status = "okay"; -diff --git a/arch/arm/dts/sun8i-a83t.dtsi b/arch/arm/dts/sun8i-a83t.dtsi -index 2be23d6009..c010b27fdb 100644 ---- a/arch/arm/dts/sun8i-a83t.dtsi -+++ b/arch/arm/dts/sun8i-a83t.dtsi -@@ -50,6 +50,7 @@ - #include - #include - #include -+#include - - / { - interrupt-parent = <&gic>; -@@ -61,79 +62,91 @@ - #size-cells = <0>; - - cpu0: cpu@0 { -- clocks = <&ccu CLK_C0CPUX>; -- clock-names = "cpu"; - compatible = "arm,cortex-a7"; - device_type = "cpu"; -+ clocks = <&ccu CLK_C0CPUX>; - operating-points-v2 = <&cpu0_opp_table>; - cci-control-port = <&cci_control0>; - enable-method = "allwinner,sun8i-a83t-smp"; - reg = <0>; -+ #cooling-cells = <2>; - }; - -- cpu@1 { -+ cpu1: cpu@1 { - compatible = "arm,cortex-a7"; - device_type = "cpu"; -+ clocks = <&ccu CLK_C0CPUX>; - operating-points-v2 = <&cpu0_opp_table>; - cci-control-port = <&cci_control0>; - enable-method = "allwinner,sun8i-a83t-smp"; - reg = <1>; -+ #cooling-cells = <2>; - }; - -- cpu@2 { -+ cpu2: cpu@2 { - compatible = "arm,cortex-a7"; - device_type = "cpu"; -+ clocks = <&ccu CLK_C0CPUX>; - operating-points-v2 = <&cpu0_opp_table>; - cci-control-port = <&cci_control0>; - enable-method = "allwinner,sun8i-a83t-smp"; - reg = <2>; -+ #cooling-cells = <2>; - }; - -- cpu@3 { -+ cpu3: cpu@3 { - compatible = "arm,cortex-a7"; - device_type = "cpu"; -+ clocks = <&ccu CLK_C0CPUX>; - operating-points-v2 = <&cpu0_opp_table>; - cci-control-port = <&cci_control0>; - enable-method = "allwinner,sun8i-a83t-smp"; - reg = <3>; -+ #cooling-cells = <2>; - }; - - cpu100: cpu@100 { -- clocks = <&ccu CLK_C1CPUX>; -- clock-names = "cpu"; - compatible = "arm,cortex-a7"; - device_type = "cpu"; -+ clocks = <&ccu CLK_C1CPUX>; - operating-points-v2 = <&cpu1_opp_table>; - cci-control-port = <&cci_control1>; - enable-method = "allwinner,sun8i-a83t-smp"; - reg = <0x100>; -+ #cooling-cells = <2>; - }; - -- cpu@101 { -+ cpu101: cpu@101 { - compatible = "arm,cortex-a7"; - device_type = "cpu"; -+ clocks = <&ccu CLK_C1CPUX>; - operating-points-v2 = <&cpu1_opp_table>; - cci-control-port = <&cci_control1>; - enable-method = "allwinner,sun8i-a83t-smp"; - reg = <0x101>; -+ #cooling-cells = <2>; - }; - -- cpu@102 { -+ cpu102: cpu@102 { - compatible = "arm,cortex-a7"; - device_type = "cpu"; -+ clocks = <&ccu CLK_C1CPUX>; - operating-points-v2 = <&cpu1_opp_table>; - cci-control-port = <&cci_control1>; - enable-method = "allwinner,sun8i-a83t-smp"; - reg = <0x102>; -+ #cooling-cells = <2>; - }; - -- cpu@103 { -+ cpu103: cpu@103 { - compatible = "arm,cortex-a7"; - device_type = "cpu"; -+ clocks = <&ccu CLK_C1CPUX>; - operating-points-v2 = <&cpu1_opp_table>; - cci-control-port = <&cci_control1>; - enable-method = "allwinner,sun8i-a83t-smp"; - reg = <0x103>; -+ #cooling-cells = <2>; - }; - }; - -@@ -187,11 +200,6 @@ - status = "disabled"; - }; - -- memory { -- reg = <0x40000000 0x80000000>; -- device_type = "memory"; -- }; -- - cpu0_opp_table: opp_table0 { - compatible = "operating-points-v2"; - opp-shared; -@@ -306,16 +314,27 @@ - - display_clocks: clock@1000000 { - compatible = "allwinner,sun8i-a83t-de2-clk"; -- reg = <0x01000000 0x100000>; -- clocks = <&ccu CLK_PLL_DE>, -- <&ccu CLK_BUS_DE>; -- clock-names = "mod", -- "bus"; -+ reg = <0x01000000 0x10000>; -+ clocks = <&ccu CLK_BUS_DE>, -+ <&ccu CLK_PLL_DE>; -+ clock-names = "bus", -+ "mod"; - resets = <&ccu RST_BUS_DE>; - #clock-cells = <1>; - #reset-cells = <1>; - }; - -+ rotate: rotate@1020000 { -+ compatible = "allwinner,sun8i-a83t-de2-rotate"; -+ reg = <0x1020000 0x10000>; -+ interrupts = ; -+ clocks = <&display_clocks CLK_BUS_ROT>, -+ <&display_clocks CLK_ROT>; -+ clock-names = "bus", -+ "mod"; -+ resets = <&display_clocks RST_ROT>; -+ }; -+ - mixer0: mixer@1100000 { - compatible = "allwinner,sun8i-a83t-de2-mixer-0"; - reg = <0x01100000 0x100000>; -@@ -338,6 +357,11 @@ - reg = <0>; - remote-endpoint = <&tcon0_in_mixer0>; - }; -+ -+ mixer0_out_tcon1: endpoint@1 { -+ reg = <1>; -+ remote-endpoint = <&tcon1_in_mixer0>; -+ }; - }; - }; - }; -@@ -356,9 +380,17 @@ - #size-cells = <0>; - - mixer1_out: port@1 { -+ #address-cells = <1>; -+ #size-cells = <0>; - reg = <1>; - -- mixer1_out_tcon1: endpoint { -+ mixer1_out_tcon0: endpoint@0 { -+ reg = <0>; -+ remote-endpoint = <&tcon0_in_mixer1>; -+ }; -+ -+ mixer1_out_tcon1: endpoint@1 { -+ reg = <1>; - remote-endpoint = <&tcon1_in_mixer1>; - }; - }; -@@ -425,6 +457,7 @@ - clocks = <&ccu CLK_BUS_TCON0>, <&ccu CLK_TCON0>; - clock-names = "ahb", "tcon-ch0"; - clock-output-names = "tcon-pixel-clock"; -+ #clock-cells = <0>; - resets = <&ccu RST_BUS_TCON0>, <&ccu RST_BUS_LVDS>; - reset-names = "lcd", "lvds"; - -@@ -441,11 +474,14 @@ - reg = <0>; - remote-endpoint = <&mixer0_out_tcon0>; - }; -+ -+ tcon0_in_mixer1: endpoint@1 { -+ reg = <1>; -+ remote-endpoint = <&mixer1_out_tcon0>; -+ }; - }; - - tcon0_out: port@1 { -- #address-cells = <1>; -- #size-cells = <0>; - reg = <1>; - }; - }; -@@ -465,9 +501,17 @@ - #size-cells = <0>; - - tcon1_in: port@0 { -+ #address-cells = <1>; -+ #size-cells = <0>; - reg = <0>; - -- tcon1_in_mixer1: endpoint { -+ tcon1_in_mixer0: endpoint@0 { -+ reg = <0>; -+ remote-endpoint = <&mixer0_out_tcon1>; -+ }; -+ -+ tcon1_in_mixer1: endpoint@1 { -+ reg = <1>; - remote-endpoint = <&mixer1_out_tcon1>; - }; - }; -@@ -549,6 +593,31 @@ - sid: eeprom@1c14000 { - compatible = "allwinner,sun8i-a83t-sid"; - reg = <0x1c14000 0x400>; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ -+ ths_calibration: thermal-sensor-calibration@34 { -+ reg = <0x34 8>; -+ }; -+ }; -+ -+ crypto: crypto@1c15000 { -+ compatible = "allwinner,sun8i-a83t-crypto"; -+ reg = <0x01c15000 0x1000>; -+ interrupts = ; -+ resets = <&ccu RST_BUS_SS>; -+ clocks = <&ccu CLK_BUS_SS>, <&ccu CLK_SS>; -+ clock-names = "bus", "mod"; -+ }; -+ -+ msgbox: mailbox@1c17000 { -+ compatible = "allwinner,sun8i-a83t-msgbox", -+ "allwinner,sun6i-a31-msgbox"; -+ reg = <0x01c17000 0x1000>; -+ clocks = <&ccu CLK_BUS_MSGBOX>; -+ resets = <&ccu RST_BUS_MSGBOX>; -+ interrupts = ; -+ #mbox-cells = <1>; - }; - - usb_otg: usb@1c19000 { -@@ -562,6 +631,7 @@ - phys = <&usbphy 0>; - phy-names = "usb"; - extcon = <&usbphy 0>; -+ dr_mode = "otg"; - status = "disabled"; - }; - -@@ -649,6 +719,20 @@ - #interrupt-cells = <3>; - #gpio-cells = <3>; - -+ /omit-if-no-ref/ -+ csi_8bit_parallel_pins: csi-8bit-parallel-pins { -+ pins = "PE0", "PE2", "PE3", "PE6", "PE7", -+ "PE8", "PE9", "PE10", "PE11", -+ "PE12", "PE13"; -+ function = "csi"; -+ }; -+ -+ /omit-if-no-ref/ -+ csi_mclk_pin: csi-mclk-pin { -+ pins = "PE1"; -+ function = "csi"; -+ }; -+ - emac_rgmii_pins: emac-rgmii-pins { - pins = "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", - "PD11", "PD12", "PD13", "PD14", "PD18", -@@ -676,6 +760,12 @@ - function = "i2c1"; - }; - -+ /omit-if-no-ref/ -+ i2c2_pe_pins: i2c2-pe-pins { -+ pins = "PE14", "PE15"; -+ function = "i2c2"; -+ }; -+ - i2c2_ph_pins: i2c2-ph-pins { - pins = "PH4", "PH5"; - function = "i2c2"; -@@ -747,10 +837,16 @@ - pins = "PG8", "PG9"; - function = "uart1"; - }; -+ -+ /omit-if-no-ref/ -+ uart2_pb_pins: uart2-pb-pins { -+ pins = "PB0", "PB1"; -+ function = "uart2"; -+ }; - }; - - timer@1c20c00 { -- compatible = "allwinner,sun4i-a10-timer"; -+ compatible = "allwinner,sun8i-a23-timer"; - reg = <0x01c20c00 0xa0>; - interrupts = , - ; -@@ -852,6 +948,39 @@ - status = "disabled"; - }; - -+ uart2: serial@1c28800 { -+ compatible = "snps,dw-apb-uart"; -+ reg = <0x01c28800 0x400>; -+ interrupts = ; -+ reg-shift = <2>; -+ reg-io-width = <4>; -+ clocks = <&ccu CLK_BUS_UART2>; -+ resets = <&ccu RST_BUS_UART2>; -+ status = "disabled"; -+ }; -+ -+ uart3: serial@1c28c00 { -+ compatible = "snps,dw-apb-uart"; -+ reg = <0x01c28c00 0x400>; -+ interrupts = ; -+ reg-shift = <2>; -+ reg-io-width = <4>; -+ clocks = <&ccu CLK_BUS_UART3>; -+ resets = <&ccu RST_BUS_UART3>; -+ status = "disabled"; -+ }; -+ -+ uart4: serial@1c29000 { -+ compatible = "snps,dw-apb-uart"; -+ reg = <0x01c29000 0x400>; -+ interrupts = ; -+ reg-shift = <2>; -+ reg-io-width = <4>; -+ clocks = <&ccu CLK_BUS_UART4>; -+ resets = <&ccu RST_BUS_UART4>; -+ status = "disabled"; -+ }; -+ - i2c0: i2c@1c2ac00 { - compatible = "allwinner,sun8i-a83t-i2c", - "allwinner,sun6i-a31-i2c"; -@@ -898,12 +1027,10 @@ - reg = <0x01c30000 0x104>; - interrupts = ; - interrupt-names = "macirq"; -- resets = <&ccu 13>; -- reset-names = "stmmaceth"; -- clocks = <&ccu 27>; -+ clocks = <&ccu CLK_BUS_EMAC>; - clock-names = "stmmaceth"; -- #address-cells = <1>; -- #size-cells = <0>; -+ resets = <&ccu RST_BUS_EMAC>; -+ reset-names = "stmmaceth"; - status = "disabled"; - - mdio: mdio { -@@ -914,7 +1041,7 @@ - }; - - gic: interrupt-controller@1c81000 { -- compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic"; -+ compatible = "arm,gic-400"; - reg = <0x01c81000 0x1000>, - <0x01c82000 0x2000>, - <0x01c84000 0x2000>, -@@ -924,6 +1051,21 @@ - interrupts = ; - }; - -+ csi: camera@1cb0000 { -+ compatible = "allwinner,sun8i-a83t-csi"; -+ reg = <0x01cb0000 0x1000>; -+ interrupts = ; -+ clocks = <&ccu CLK_BUS_CSI>, -+ <&ccu CLK_CSI_SCLK>, -+ <&ccu CLK_DRAM_CSI>; -+ clock-names = "bus", "mod", "ram"; -+ resets = <&ccu RST_BUS_CSI>; -+ status = "disabled"; -+ -+ csi_in: port { -+ }; -+ }; -+ - hdmi: hdmi@1ee0000 { - compatible = "allwinner,sun8i-a83t-dw-hdmi"; - reg = <0x01ee0000 0x10000>; -@@ -935,7 +1077,7 @@ - resets = <&ccu RST_BUS_HDMI1>; - reset-names = "ctrl"; - phys = <&hdmi_phy>; -- phy-names = "hdmi-phy"; -+ phy-names = "phy"; - pinctrl-names = "default"; - pinctrl-0 = <&hdmi_pins>; - status = "disabled"; -@@ -981,7 +1123,7 @@ - compatible = "allwinner,sun8i-a83t-r-ccu"; - reg = <0x01f01400 0x400>; - clocks = <&osc24M>, <&osc16Md512>, <&osc16M>, -- <&ccu 6>; -+ <&ccu CLK_PLL_PERIPH>; - clock-names = "hosc", "losc", "iosc", "pll-periph"; - #clock-cells = <1>; - #reset-cells = <1>; -@@ -992,6 +1134,26 @@ - reg = <0x1f01c00 0x400>; - }; - -+ r_cir: ir@1f02000 { -+ compatible = "allwinner,sun8i-a83t-ir", -+ "allwinner,sun6i-a31-ir"; -+ clocks = <&r_ccu CLK_APB0_IR>, <&r_ccu CLK_IR>; -+ clock-names = "apb", "ir"; -+ resets = <&r_ccu RST_APB0_IR>; -+ interrupts = ; -+ reg = <0x01f02000 0x400>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&r_cir_pin>; -+ status = "disabled"; -+ }; -+ -+ r_lradc: lradc@1f03c00 { -+ compatible = "allwinner,sun8i-a83t-r-lradc"; -+ reg = <0x01f03c00 0x100>; -+ interrupts = ; -+ status = "disabled"; -+ }; -+ - r_pio: pinctrl@1f02c00 { - compatible = "allwinner,sun8i-a83t-r-pinctrl"; - reg = <0x01f02c00 0x400>; -@@ -1004,6 +1166,11 @@ - interrupt-controller; - #interrupt-cells = <3>; - -+ r_cir_pin: r-cir-pin { -+ pins = "PL12"; -+ function = "s_cir_rx"; -+ }; -+ - r_rsb_pins: r-rsb-pins { - pins = "PL0", "PL1"; - function = "s_rsb"; -@@ -1026,5 +1193,82 @@ - #address-cells = <1>; - #size-cells = <0>; - }; -+ -+ ths: thermal-sensor@1f04000 { -+ compatible = "allwinner,sun8i-a83t-ths"; -+ reg = <0x01f04000 0x100>; -+ interrupts = ; -+ nvmem-cells = <&ths_calibration>; -+ nvmem-cell-names = "calibration"; -+ #thermal-sensor-cells = <1>; -+ }; -+ }; -+ -+ thermal-zones { -+ cpu0_thermal: cpu0-thermal { -+ polling-delay-passive = <0>; -+ polling-delay = <0>; -+ thermal-sensors = <&ths 0>; -+ -+ trips { -+ cpu0_hot: cpu-hot { -+ temperature = <80000>; -+ hysteresis = <2000>; -+ type = "passive"; -+ }; -+ -+ cpu0_very_hot: cpu-very-hot { -+ temperature = <100000>; -+ hysteresis = <0>; -+ type = "critical"; -+ }; -+ }; -+ -+ cooling-maps { -+ cpu-hot-limit { -+ trip = <&cpu0_hot>; -+ cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, -+ <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, -+ <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, -+ <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; -+ }; -+ }; -+ }; -+ -+ cpu1_thermal: cpu1-thermal { -+ polling-delay-passive = <0>; -+ polling-delay = <0>; -+ thermal-sensors = <&ths 1>; -+ -+ trips { -+ cpu1_hot: cpu-hot { -+ temperature = <80000>; -+ hysteresis = <2000>; -+ type = "passive"; -+ }; -+ -+ cpu1_very_hot: cpu-very-hot { -+ temperature = <100000>; -+ hysteresis = <0>; -+ type = "critical"; -+ }; -+ }; -+ -+ cooling-maps { -+ cpu-hot-limit { -+ trip = <&cpu1_hot>; -+ cooling-device = <&cpu100 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, -+ <&cpu101 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, -+ <&cpu102 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, -+ <&cpu103 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; -+ }; -+ }; -+ }; -+ -+ gpu_thermal: gpu-thermal { -+ polling-delay-passive = <0>; -+ polling-delay = <0>; -+ thermal-sensors = <&ths 2>; -+ }; - }; - }; -diff --git a/arch/arm/dts/sun8i-h3-orangepi-pc-plus.dts b/arch/arm/dts/sun8i-h3-orangepi-pc-plus.dts -index 71fb732089..babf4cf1b2 100644 ---- a/arch/arm/dts/sun8i-h3-orangepi-pc-plus.dts -+++ b/arch/arm/dts/sun8i-h3-orangepi-pc-plus.dts -@@ -53,11 +53,6 @@ - }; - }; - --&emac { -- /* LEDs changed to active high on the plus */ -- /delete-property/ allwinner,leds-active-low; --}; -- - &mmc1 { - vmmc-supply = <®_vcc3v3>; - bus-width = <4>; -diff --git a/arch/arm/dts/sun8i-h3-orangepi-plus2e.dts b/arch/arm/dts/sun8i-h3-orangepi-plus2e.dts -index 6dbf7b2e0c..b6ca45d18e 100644 ---- a/arch/arm/dts/sun8i-h3-orangepi-plus2e.dts -+++ b/arch/arm/dts/sun8i-h3-orangepi-plus2e.dts -@@ -67,7 +67,7 @@ - pinctrl-0 = <&emac_rgmii_pins>; - phy-supply = <®_gmac_3v3>; - phy-handle = <&ext_rgmii_phy>; -- phy-mode = "rgmii"; -+ phy-mode = "rgmii-id"; - status = "okay"; - }; - -diff --git a/arch/arm/dts/sun8i-h3-orangepi-zero-plus2.dts b/arch/arm/dts/sun8i-h3-orangepi-zero-plus2.dts -index b8f46e2802..251bbab7d7 100644 ---- a/arch/arm/dts/sun8i-h3-orangepi-zero-plus2.dts -+++ b/arch/arm/dts/sun8i-h3-orangepi-zero-plus2.dts -@@ -70,6 +70,21 @@ - }; - }; - -+ leds { -+ compatible = "gpio-leds"; -+ -+ pwr { -+ label = "orangepi:green:pwr"; -+ gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; -+ default-state = "on"; -+ }; -+ -+ status { -+ label = "orangepi:red:status"; -+ gpios = <&pio 0 17 GPIO_ACTIVE_HIGH>; -+ }; -+ }; -+ - reg_vcc3v3: vcc3v3 { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3"; -@@ -88,6 +103,10 @@ - status = "okay"; - }; - -+&ehci0 { -+ status = "okay"; -+}; -+ - &hdmi { - status = "okay"; - }; -@@ -132,8 +151,27 @@ - status = "okay"; - }; - -+&ohci0 { -+ status = "okay"; -+}; -+ - &uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_pa_pins>; - status = "okay"; - }; -+ -+&usb_otg { -+ /* -+ * According to schematics CN1 MicroUSB port can be used to take -+ * external 5V to power up the board VBUS. On the contrary CN1 MicroUSB -+ * port cannot provide power externally even if the board is powered -+ * via GPIO pins. It thus makes sense to force peripheral mode. -+ */ -+ dr_mode = "peripheral"; -+ status = "okay"; -+}; -+ -+&usbphy { -+ status = "okay"; -+}; -diff --git a/arch/arm/dts/sun8i-v40-bananapi-m2-berry.dts b/arch/arm/dts/sun8i-v40-bananapi-m2-berry.dts -index 15c22b06fc..47954551f5 100644 ---- a/arch/arm/dts/sun8i-v40-bananapi-m2-berry.dts -+++ b/arch/arm/dts/sun8i-v40-bananapi-m2-berry.dts -@@ -120,7 +120,7 @@ - pinctrl-names = "default"; - pinctrl-0 = <&gmac_rgmii_pins>; - phy-handle = <&phy1>; -- phy-mode = "rgmii"; -+ phy-mode = "rgmii-id"; - phy-supply = <®_dc1sw>; - status = "okay"; - }; -@@ -198,16 +198,16 @@ - }; - - ®_dc1sw { -- regulator-min-microvolt = <3000000>; -- regulator-max-microvolt = <3000000>; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; - regulator-name = "vcc-gmac-phy"; - }; - - ®_dcdc1 { - regulator-always-on; -- regulator-min-microvolt = <3000000>; -- regulator-max-microvolt = <3000000>; -- regulator-name = "vcc-3v0"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-name = "vcc-3v3"; - }; - - ®_dcdc2 { -diff --git a/arch/arm/dts/sunxi-bananapi-m2-plus.dtsi b/arch/arm/dts/sunxi-bananapi-m2-plus.dtsi -index 39263e74fb..8e5cb3b3fd 100644 ---- a/arch/arm/dts/sunxi-bananapi-m2-plus.dtsi -+++ b/arch/arm/dts/sunxi-bananapi-m2-plus.dtsi -@@ -126,7 +126,7 @@ - pinctrl-0 = <&emac_rgmii_pins>; - phy-supply = <®_gmac_3v3>; - phy-handle = <&ext_rgmii_phy>; -- phy-mode = "rgmii"; -+ phy-mode = "rgmii-id"; - - status = "okay"; - }; --- -2.29.2 - diff --git a/IOMUX-Fix-buffer-overflow-in-iomux_replace_device.patch b/IOMUX-Fix-buffer-overflow-in-iomux_replace_device.patch deleted file mode 100644 index d2c55f6..0000000 --- a/IOMUX-Fix-buffer-overflow-in-iomux_replace_device.patch +++ /dev/null @@ -1,152 +0,0 @@ -From patchwork Sun Apr 25 23:08:03 2021 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Yuichiro Goto -X-Patchwork-Id: 1470141 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; 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- Sun, 25 Apr 2021 16:08:58 -0700 (PDT) -Received: from lubuntu1804.flets-east.jp (p1086-maru1shinjuku.tokyo.ocn.ne.jp. - [61.208.220.86]) - by smtp.gmail.com with ESMTPSA id i63sm9669769pfg.112.2021.04.25.16.08.57 - (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); - Sun, 25 Apr 2021 16:08:58 -0700 (PDT) -From: Yuichiro Goto -To: u-boot@lists.denx.de -Cc: Yuichiro Goto , Peter Robinson , - Andy Shevchenko , - Nicolas Saenz Julienne -Subject: [PATCH v3] IOMUX: Fix buffer overflow in iomux_replace_device() -Date: Mon, 26 Apr 2021 08:08:03 +0900 -Message-Id: <20210425230803.3055-1-goto@k-tech.co.jp> -X-Mailer: git-send-email 2.17.1 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.34 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.4 at phobos.denx.de -X-Virus-Status: Clean - -Use of strcat() against an uninitialized buffer would lead -to buffer overflow. This patch fixes it. - -Fixes: 694cd5618c ("IOMUX: Introduce iomux_replace_device()") -Signed-off-by: Yuichiro Goto -Cc: Peter Robinson -Cc: Andy Shevchenko -Cc: Nicolas Saenz Julienne -Reviewed-by: Andy Shevchenko ---- - -Changes for v3: -- Add a Fixes tag in commit message -- Refactor the patch per suggestion from Andy Shevchenko - -Changes for v2: -- Add "IOMUX" in title - - common/iomux.c | 8 ++++++-- - 1 file changed, 6 insertions(+), 2 deletions(-) - -diff --git a/common/iomux.c b/common/iomux.c -index b9088aa3b5..c428f7110a 100644 ---- a/common/iomux.c -+++ b/common/iomux.c -@@ -158,8 +158,12 @@ int iomux_replace_device(const int console, const char *old, const char *new) - return -ENOMEM; - } - -- strcat(tmp, ","); -- strcat(tmp, name); -+ if (arg) { -+ strcat(tmp, ","); -+ strcat(tmp, name); -+ } -+ else -+ strcpy(tmp, name); - - arg = tmp; - size = strlen(tmp) + 1; diff --git a/efi_loader-loosen-buffer-parameter-check-in-efi_file_read_int.patch b/efi_loader-loosen-buffer-parameter-check-in-efi_file_read_int.patch index b221ddd..8bbf9d9 100644 --- a/efi_loader-loosen-buffer-parameter-check-in-efi_file_read_int.patch +++ b/efi_loader-loosen-buffer-parameter-check-in-efi_file_read_int.patch @@ -4,6 +4,7 @@ MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Peng Fan (OSS)" X-Patchwork-Id: 1471143 +X-Patchwork-Delegate: xypron.glpk@gmx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org @@ -187,6 +188,8 @@ Cc: Heinrich Schuchardt Cc: Stefan Sørensen Tested-by: Peter Robinson Signed-off-by: Peng Fan +Reviewed-by: Heinrich Schuchardt +Tested-by: Michal Simek --- V2: diff --git a/rk3399-Pinebook-pro-EDP-support.patch b/rk3399-Pinebook-pro-EDP-support.patch deleted file mode 100644 index 43a52ad..0000000 --- a/rk3399-Pinebook-pro-EDP-support.patch +++ /dev/null @@ -1,1257 +0,0 @@ -From patchwork Fri Mar 5 10:27:46 2021 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: "Arnaud Patard (Rtp)" -X-Patchwork-Id: 1447757 -X-Patchwork-Delegate: agust@denx.de -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de - (client-ip=85.214.62.61; helo=phobos.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; receiver=) -Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) - (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) - key-exchange X25519 server-signature RSA-PSS (4096 bits)) - (No client certificate requested) - by ozlabs.org (Postfix) with ESMTPS id 4DsPKq3YGqz9sRR - for ; Fri, 5 Mar 2021 21:36:31 +1100 (AEDT) -Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) - by phobos.denx.de (Postfix) with ESMTP id 18DC78269D; - Fri, 5 Mar 2021 11:35:59 +0100 (CET) -Authentication-Results: phobos.denx.de; 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Fri, 5 Mar 2021 11:35:41 +0100 (CET) -Message-ID: <20210305103307.004041703@rtp-net.org> -User-Agent: quilt/0.66 -Date: Fri, 05 Mar 2021 11:27:46 +0100 -From: Arnaud Patard (Rtp) -To: u-boot@lists.denx.de -Cc: Kever Yang , - Anatolij Gustschin , - Philipp Tomsich , - Peter Robinson , - Samuel Dionne-Riel , - Alper Nebi Yasak , - Arnaud Patard -Subject: [patch v4 1/9] rockchip: video: vop: Use endpoint compatible string - to find VOP mode -References: <20210305102745.078091129@rtp-net.org> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.34 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.4 at phobos.denx.de -X-Virus-Status: Clean - -The current code is using an hard coded enum and the of node reg value of -endpoint to find out if the endpoint is mipi/hdmi/lvds/edp/dp. The order -is different between rk3288, rk3399 vop little, rk3399 vop big. - -A possible solution would be to make sure that the rk3288.dtsi and -rk3399.dtsi files have "expected" reg value or an other solution is -to find the kind of endpoint by comparing the endpoint compatible value. - -This patch is implementing the more flexible second solution. - -Signed-off-by: Arnaud Patard -Tested-by: Peter Robinson - -Index: u-boot/arch/arm/include/asm/arch-rockchip/vop_rk3288.h -=================================================================== ---- u-boot.orig/arch/arm/include/asm/arch-rockchip/vop_rk3288.h -+++ u-boot/arch/arm/include/asm/arch-rockchip/vop_rk3288.h -@@ -85,26 +85,13 @@ enum { - LB_RGB_1280X8 = 0x5 - }; - --#if defined(CONFIG_ROCKCHIP_RK3399) - enum vop_modes { - VOP_MODE_EDP = 0, - VOP_MODE_MIPI, - VOP_MODE_HDMI, -- VOP_MODE_MIPI1, -- VOP_MODE_DP, -- VOP_MODE_NONE, --}; --#else --enum vop_modes { -- VOP_MODE_EDP = 0, -- VOP_MODE_HDMI, - VOP_MODE_LVDS, -- VOP_MODE_MIPI, -- VOP_MODE_NONE, -- VOP_MODE_AUTO_DETECT, -- VOP_MODE_UNKNOWN, -+ VOP_MODE_DP, - }; --#endif - - /* VOP_VERSION_INFO */ - #define M_FPGA_VERSION (0xffff << 16) -Index: u-boot/drivers/video/rockchip/rk_vop.c -=================================================================== ---- u-boot.orig/drivers/video/rockchip/rk_vop.c -+++ u-boot/drivers/video/rockchip/rk_vop.c -@@ -236,12 +236,11 @@ static int rk_display_init(struct udevic - struct clk clk; - enum video_log2_bpp l2bpp; - ofnode remote; -+ const char *compat; - - debug("%s(%s, %lu, %s)\n", __func__, - dev_read_name(dev), fbbase, ofnode_get_name(ep_node)); - -- vop_id = ofnode_read_s32_default(ep_node, "reg", -1); -- debug("vop_id=%d\n", vop_id); - ret = ofnode_read_u32(ep_node, "remote-endpoint", &remote_phandle); - if (ret) - return ret; -@@ -283,6 +282,28 @@ static int rk_display_init(struct udevic - if (disp) - break; - }; -+ compat = ofnode_get_property(remote, "compatible", NULL); -+ if (!compat) { -+ debug("%s(%s): Failed to find compatible property\n", -+ __func__, dev_read_name(dev)); -+ return -EINVAL; -+ } -+ if (strstr(compat, "edp")) { -+ vop_id = VOP_MODE_EDP; -+ } else if (strstr(compat, "mipi")) { -+ vop_id = VOP_MODE_MIPI; -+ } else if (strstr(compat, "hdmi")) { -+ vop_id = VOP_MODE_HDMI; -+ } else if (strstr(compat, "cdn-dp")) { -+ vop_id = VOP_MODE_DP; -+ } else if (strstr(compat, "lvds")) { -+ vop_id = VOP_MODE_LVDS; -+ } else { -+ debug("%s(%s): Failed to find vop mode for %s\n", -+ __func__, dev_read_name(dev), compat); -+ return -EINVAL; -+ } -+ debug("vop_id=%d\n", vop_id); - - disp_uc_plat = dev_get_uclass_plat(disp); - debug("Found device '%s', disp_uc_priv=%p\n", disp->name, disp_uc_plat); - -From patchwork Fri Mar 5 10:27:47 2021 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: "Arnaud Patard (Rtp)" -X-Patchwork-Id: 1447760 -X-Patchwork-Delegate: agust@denx.de -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de - (client-ip=85.214.62.61; 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Fri, 5 Mar 2021 11:35:43 +0100 (CET) -Authentication-Results: phobos.denx.de; - dmarc=pass (p=none dis=none) header.from=rtp-net.org -Authentication-Results: phobos.denx.de; - spf=pass smtp.mailfrom=arnaud.patard@rtp-net.org -Received: by lechat.rtp-net.org (Postfix, from userid 1000) - id 2D11018084F; Fri, 5 Mar 2021 11:35:41 +0100 (CET) -Message-ID: <20210305103307.057540339@rtp-net.org> -User-Agent: quilt/0.66 -Date: Fri, 05 Mar 2021 11:27:47 +0100 -From: Arnaud Patard (Rtp) -To: u-boot@lists.denx.de -Cc: Kever Yang , - Anatolij Gustschin , - Philipp Tomsich , - Peter Robinson , - Samuel Dionne-Riel , - Alper Nebi Yasak , - Arnaud Patard -Subject: [patch v4 2/9] rockchip: video: edp: Add rk3399 support -References: <20210305102745.078091129@rtp-net.org> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.34 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.4 at phobos.denx.de -X-Virus-Status: Clean - -According to linux commit "drm/rockchip: analogix_dp: add rk3399 eDP -support" (82872e42bb1501dd9e60ca430f4bae45a469aa64), rk3288 and rk3399 -eDP IPs are nearly the same, the difference is in the grf register -(SOC_CON6 versus SOC_CON20). So, change the code to use the right -register on each IP. - -The clocks don't seem to be the same, the eDP clock is not at index 1 -on rk3399, so don't try changing the clock at index 1 to rate 0 on -rk3399. - -Signed-off-by: Arnaud Patard -Tested-by: Peter Robinson - -Index: u-boot/drivers/video/rockchip/rk_edp.c -=================================================================== ---- u-boot.orig/drivers/video/rockchip/rk_edp.c -+++ u-boot/drivers/video/rockchip/rk_edp.c -@@ -17,11 +17,10 @@ - #include - #include - #include -+#include - #include - #include --#include --#include --#include -+#include - - #define MAX_CR_LOOP 5 - #define MAX_EQ_LOOP 5 -@@ -37,18 +36,42 @@ static const char * const pre_emph_names - #define DP_VOLTAGE_MAX DP_TRAIN_VOLTAGE_SWING_1200 - #define DP_PRE_EMPHASIS_MAX DP_TRAIN_PRE_EMPHASIS_9_5 - -+#define RK3288_GRF_SOC_CON6 0x025c -+#define RK3288_GRF_SOC_CON12 0x0274 -+#define RK3399_GRF_SOC_CON20 0x6250 -+#define RK3399_GRF_SOC_CON25 0x6264 -+ -+enum rockchip_dp_types { -+ RK3288_DP = 0, -+ RK3399_EDP -+}; -+ -+struct rockchip_dp_data { -+ unsigned long reg_vop_big_little; -+ unsigned long reg_vop_big_little_sel; -+ unsigned long reg_ref_clk_sel; -+ unsigned long ref_clk_sel_bit; -+ enum rockchip_dp_types chip_type; -+}; -+ - struct rk_edp_priv { - struct rk3288_edp *regs; -- struct rk3288_grf *grf; -+ void *grf; - struct udevice *panel; - struct link_train link_train; - u8 train_set[4]; - }; - --static void rk_edp_init_refclk(struct rk3288_edp *regs) -+static void rk_edp_init_refclk(struct rk3288_edp *regs, enum rockchip_dp_types chip_type) - { - writel(SEL_24M, ®s->analog_ctl_2); -- writel(REF_CLK_24M, ®s->pll_reg_1); -+ u32 reg; -+ -+ reg = REF_CLK_24M; -+ if (chip_type == RK3288_DP) -+ reg ^= REF_CLK_MASK; -+ writel(reg, ®s->pll_reg_1); -+ - - writel(LDO_OUTPUT_V_SEL_145 | KVCO_DEFALUT | CHG_PUMP_CUR_SEL_5US | - V2L_CUR_SEL_1MA, ®s->pll_reg_2); -@@ -1029,6 +1052,8 @@ static int rk_edp_probe(struct udevice * - struct display_plat *uc_plat = dev_get_uclass_plat(dev); - struct rk_edp_priv *priv = dev_get_priv(dev); - struct rk3288_edp *regs = priv->regs; -+ struct rockchip_dp_data *edp_data = (struct rockchip_dp_data *)dev_get_driver_data(dev); -+ - struct clk clk; - int ret; - -@@ -1043,16 +1068,17 @@ static int rk_edp_probe(struct udevice * - int vop_id = uc_plat->source_id; - debug("%s, uc_plat=%p, vop_id=%u\n", __func__, uc_plat, vop_id); - -- ret = clk_get_by_index(dev, 1, &clk); -- if (ret >= 0) { -- ret = clk_set_rate(&clk, 0); -- clk_free(&clk); -- } -- if (ret) { -- debug("%s: Failed to set EDP clock: ret=%d\n", __func__, ret); -- return ret; -+ if (edp_data->chip_type == RK3288_DP) { -+ ret = clk_get_by_index(dev, 1, &clk); -+ if (ret >= 0) { -+ ret = clk_set_rate(&clk, 0); -+ clk_free(&clk); -+ } -+ if (ret) { -+ debug("%s: Failed to set EDP clock: ret=%d\n", __func__, ret); -+ return ret; -+ } - } -- - ret = clk_get_by_index(uc_plat->src_dev, 0, &clk); - if (ret >= 0) { - ret = clk_set_rate(&clk, 192000000); -@@ -1065,15 +1091,17 @@ static int rk_edp_probe(struct udevice * - } - - /* grf_edp_ref_clk_sel: from internal 24MHz or 27MHz clock */ -- rk_setreg(&priv->grf->soc_con12, 1 << 4); -+ rk_setreg(priv->grf + edp_data->reg_ref_clk_sel, -+ edp_data->ref_clk_sel_bit); - - /* select epd signal from vop0 or vop1 */ -- rk_clrsetreg(&priv->grf->soc_con6, (1 << 5), -- (vop_id == 1) ? (1 << 5) : (0 << 5)); -+ rk_clrsetreg(priv->grf + edp_data->reg_vop_big_little, -+ edp_data->reg_vop_big_little_sel, -+ (vop_id == 1) ? edp_data->reg_vop_big_little_sel : 0); - - rockchip_edp_wait_hpd(priv); - -- rk_edp_init_refclk(regs); -+ rk_edp_init_refclk(regs, edp_data->chip_type); - rk_edp_init_interrupt(regs); - rk_edp_enable_sw_function(regs); - ret = rk_edp_init_analog_func(regs); -@@ -1089,8 +1117,25 @@ static const struct dm_display_ops dp_ro - .enable = rk_edp_enable, - }; - -+static const struct rockchip_dp_data rk3399_edp = { -+ .reg_vop_big_little = RK3399_GRF_SOC_CON20, -+ .reg_vop_big_little_sel = BIT(5), -+ .reg_ref_clk_sel = RK3399_GRF_SOC_CON25, -+ .ref_clk_sel_bit = BIT(11), -+ .chip_type = RK3399_EDP, -+}; -+ -+static const struct rockchip_dp_data rk3288_dp = { -+ .reg_vop_big_little = RK3288_GRF_SOC_CON6, -+ .reg_vop_big_little_sel = BIT(5), -+ .reg_ref_clk_sel = RK3288_GRF_SOC_CON12, -+ .ref_clk_sel_bit = BIT(4), -+ .chip_type = RK3288_DP, -+}; -+ - static const struct udevice_id rockchip_dp_ids[] = { -- { .compatible = "rockchip,rk3288-edp" }, -+ { .compatible = "rockchip,rk3288-edp", .data = (ulong)&rk3288_dp }, -+ { .compatible = "rockchip,rk3399-edp", .data = (ulong)&rk3399_edp }, - { } - }; - -Index: u-boot/arch/arm/include/asm/arch-rockchip/edp_rk3288.h -=================================================================== ---- u-boot.orig/arch/arm/include/asm/arch-rockchip/edp_rk3288.h -+++ u-boot/arch/arm/include/asm/arch-rockchip/edp_rk3288.h -@@ -232,8 +232,9 @@ check_member(rk3288_edp, pll_reg_5, 0xa0 - #define PD_CH0 (0x1 << 0) - - /* pll_reg_1 */ --#define REF_CLK_24M (0x1 << 1) --#define REF_CLK_27M (0x0 << 1) -+#define REF_CLK_24M (0x1 << 0) -+#define REF_CLK_27M (0x0 << 0) -+#define REF_CLK_MASK (0x1 << 0) - - /* line_map */ - #define LANE3_MAP_LOGIC_LANE_0 (0x0 << 6) - -From patchwork Fri Mar 5 10:27:48 2021 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: "Arnaud Patard (Rtp)" -X-Patchwork-Id: 1447758 -X-Patchwork-Delegate: agust@denx.de -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de - (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; receiver=) -Received: from phobos.denx.de (phobos.denx.de - [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) - (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) - key-exchange X25519 server-signature RSA-PSS (4096 bits)) - (No client certificate requested) - by ozlabs.org (Postfix) with ESMTPS id 4DsPL32w8Bz9sRR - for ; Fri, 5 Mar 2021 21:36:43 +1100 (AEDT) -Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) - by phobos.denx.de (Postfix) with ESMTP id 44C1D82082; - Fri, 5 Mar 2021 11:36:04 +0100 (CET) -Authentication-Results: phobos.denx.de; - dmarc=fail (p=none dis=none) header.from=rtp-net.org -Authentication-Results: phobos.denx.de; - spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de -Received: by phobos.denx.de (Postfix, from userid 109) - id 5F86A8204C; Fri, 5 Mar 2021 11:35:51 +0100 (CET) -X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de -X-Spam-Level: -X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE - autolearn=ham autolearn_force=no version=3.4.2 -Received: from lechat.rtp-net.org (lechat.rtp-net.org - [IPv6:2001:bc8:3430:1000::c0f:fee]) - (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) - (No client certificate requested) - by phobos.denx.de (Postfix) with ESMTPS id 1AEBD825C6 - for ; Fri, 5 Mar 2021 11:35:44 +0100 (CET) -Authentication-Results: phobos.denx.de; - dmarc=pass (p=none dis=none) header.from=rtp-net.org -Authentication-Results: phobos.denx.de; - spf=pass smtp.mailfrom=arnaud.patard@rtp-net.org -Received: by lechat.rtp-net.org (Postfix, from userid 1000) - id 3E0CC180475; Fri, 5 Mar 2021 11:35:41 +0100 (CET) -Message-ID: <20210305103307.112947687@rtp-net.org> -User-Agent: quilt/0.66 -Date: Fri, 05 Mar 2021 11:27:48 +0100 -From: Arnaud Patard (Rtp) -To: u-boot@lists.denx.de -Cc: Kever Yang , - Anatolij Gustschin , - Philipp Tomsich , - Peter Robinson , - Samuel Dionne-Riel , - Alper Nebi Yasak , - Arnaud Patard -Subject: [patch v4 3/9] Rockchip: video: edp: Change interrupt polarity - configuration -References: <20210305102745.078091129@rtp-net.org> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.34 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.4 at phobos.denx.de -X-Virus-Status: Clean - -The linux code is setting polarity configuration to 3 but -uboot code is setting it to 1. Change the configuration to match the -linux configuration - -Signed-off-by: Arnaud Patard -Tested-by: Peter Robinson - -Index: u-boot/arch/arm/include/asm/arch-rockchip/edp_rk3288.h -=================================================================== ---- u-boot.orig/arch/arm/include/asm/arch-rockchip/edp_rk3288.h -+++ u-boot/arch/arm/include/asm/arch-rockchip/edp_rk3288.h -@@ -297,7 +297,9 @@ check_member(rk3288_edp, pll_reg_5, 0xa0 - - /* int_ctl */ - #define SOFT_INT_CTRL (0x1 << 2) --#define INT_POL (0x1 << 0) -+#define INT_POL1 (0x1 << 1) -+#define INT_POL0 (0x1 << 0) -+#define INT_POL (INT_POL0 | INT_POL1) - - /* sys_ctl_1 */ - #define DET_STA (0x1 << 2) - -From patchwork Fri Mar 5 10:27:49 2021 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: "Arnaud Patard (Rtp)" -X-Patchwork-Id: 1447759 -X-Patchwork-Delegate: agust@denx.de -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; 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Fri, 5 Mar 2021 11:35:44 +0100 (CET) -Authentication-Results: phobos.denx.de; - dmarc=pass (p=none dis=none) header.from=rtp-net.org -Authentication-Results: phobos.denx.de; - spf=pass smtp.mailfrom=arnaud.patard@rtp-net.org -Received: by lechat.rtp-net.org (Postfix, from userid 1000) - id 61DE01808B6; Fri, 5 Mar 2021 11:35:41 +0100 (CET) -Message-ID: <20210305103307.175518624@rtp-net.org> -User-Agent: quilt/0.66 -Date: Fri, 05 Mar 2021 11:27:49 +0100 -From: Arnaud Patard (Rtp) -To: u-boot@lists.denx.de -Cc: Kever Yang , - Anatolij Gustschin , - Philipp Tomsich , - Peter Robinson , - Samuel Dionne-Riel , - Alper Nebi Yasak , - Arnaud Patard -Subject: [patch v4 4/9] Rockchip: video: vop: Reserve efi fb memory -References: <20210305102745.078091129@rtp-net.org> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.34 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.4 at phobos.denx.de -X-Virus-Status: Clean - -When booting with EFI and graphics, the memory used for framebuffer -has to be reserved, otherwise it may leads to kernel memory -overwrite. - -Signed-off-by: Arnaud Patard -Tested-by: Peter Robinson - -Index: u-boot/drivers/video/rockchip/rk_vop.c -=================================================================== ---- u-boot.orig/drivers/video/rockchip/rk_vop.c -+++ u-boot/drivers/video/rockchip/rk_vop.c -@@ -21,6 +21,8 @@ - #include - #include - #include -+#include -+#include - #include - #include - #include -@@ -395,6 +397,11 @@ int rk_vop_probe(struct udevice *dev) - if (!(gd->flags & GD_FLG_RELOC)) - return 0; - -+#if defined(CONFIG_EFI_LOADER) -+ debug("Adding to EFI map %d @ %lx\n", plat->size, plat->base); -+ efi_add_memory_map(plat->base, plat->size, EFI_RESERVED_MEMORY_TYPE); -+#endif -+ - priv->regs = (struct rk3288_vop *)dev_read_addr(dev); - - /* - -From patchwork Fri Mar 5 10:27:50 2021 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: "Arnaud Patard (Rtp)" -X-Patchwork-Id: 1447756 -X-Patchwork-Delegate: agust@denx.de -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de - (client-ip=85.214.62.61; helo=phobos.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; receiver=) -Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) - (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) - key-exchange X25519 server-signature RSA-PSS (4096 bits)) - (No client certificate requested) - by ozlabs.org (Postfix) with ESMTPS id 4DsPKd3f7rz9sRR - for ; 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- dmarc=pass (p=none dis=none) header.from=rtp-net.org -Authentication-Results: phobos.denx.de; - spf=pass smtp.mailfrom=arnaud.patard@rtp-net.org -Received: by lechat.rtp-net.org (Postfix, from userid 1000) - id 71166180A1E; Fri, 5 Mar 2021 11:35:41 +0100 (CET) -Message-ID: <20210305103307.228214963@rtp-net.org> -User-Agent: quilt/0.66 -Date: Fri, 05 Mar 2021 11:27:50 +0100 -From: Arnaud Patard (Rtp) -To: u-boot@lists.denx.de -Cc: Kever Yang , - Anatolij Gustschin , - Philipp Tomsich , - Peter Robinson , - Samuel Dionne-Riel , - Alper Nebi Yasak , - Arnaud Patard -Subject: [patch v4 5/9] rockchip: Pinebook Pro: Enable edp -References: <20210305102745.078091129@rtp-net.org> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.34 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.4 at phobos.denx.de -X-Virus-Status: Clean - -- uboot rockchip edp code is looking for a rockchip,panel property - for the edp dts node, so add it. - -Signed-off-by: Arnaud Patard -Tested-by: Peter Robinson - -Index: u-boot/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi -=================================================================== ---- u-boot.orig/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi -+++ u-boot/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi -@@ -16,6 +16,10 @@ - }; - }; - -+&edp { -+ rockchip,panel = <&edp_panel>; -+}; -+ - &i2c0 { - u-boot,dm-pre-reloc; - }; - -From patchwork Fri Mar 5 10:27:51 2021 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: "Arnaud Patard (Rtp)" -X-Patchwork-Id: 1447754 -X-Patchwork-Delegate: agust@denx.de -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de - (client-ip=85.214.62.61; helo=phobos.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; receiver=) -Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) - (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) - key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest - SHA256) - (No client certificate requested) - by ozlabs.org (Postfix) with ESMTPS id 4DsPKR1d2Fz9sRR - for ; Fri, 5 Mar 2021 21:36:11 +1100 (AEDT) -Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) - by phobos.denx.de (Postfix) with ESMTP id 12B478204C; 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Fri, 5 Mar 2021 11:35:41 +0100 (CET) -Message-ID: <20210305103307.290295328@rtp-net.org> -User-Agent: quilt/0.66 -Date: Fri, 05 Mar 2021 11:27:51 +0100 -From: Arnaud Patard (Rtp) -To: u-boot@lists.denx.de -Cc: Kever Yang , - Anatolij Gustschin , - Philipp Tomsich , - Peter Robinson , - Samuel Dionne-Riel , - Alper Nebi Yasak , - Arnaud Patard -Subject: [patch v4 6/9] rockchip: pwm: Fix default polarity -References: <20210305102745.078091129@rtp-net.org> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.34 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.4 at phobos.denx.de -X-Virus-Status: Clean - -In the code, the default polarity is set to positive/positive, -which is neither normal polarity or inverted polarity. It's -only the hardware default. This leads to booting linux with -wrong polarity setting. - -Update the code to use PWM_DUTY_POSTIVE | PWM_INACTIVE_NEGATIVE -by default instead. - -Signed-off-by: Arnaud Patard -Tested-by: Peter Robinson - -Index: u-boot/drivers/pwm/rk_pwm.c -=================================================================== ---- u-boot.orig/drivers/pwm/rk_pwm.c -+++ u-boot/drivers/pwm/rk_pwm.c -@@ -147,7 +147,7 @@ static int rk_pwm_probe(struct udevice * - priv->data = (struct rockchip_pwm_data *)dev_get_driver_data(dev); - - if (priv->data->supports_polarity) -- priv->conf_polarity = PWM_DUTY_POSTIVE | PWM_INACTIVE_POSTIVE; -+ priv->conf_polarity = PWM_DUTY_POSTIVE | PWM_INACTIVE_NEGATIVE; - - return 0; - } - -From patchwork Fri Mar 5 10:27:52 2021 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: "Arnaud Patard (Rtp)" -X-Patchwork-Id: 1447761 -X-Patchwork-Delegate: agust@denx.de -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; 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Fri, 5 Mar 2021 11:35:44 +0100 (CET) -Authentication-Results: phobos.denx.de; - dmarc=pass (p=none dis=none) header.from=rtp-net.org -Authentication-Results: phobos.denx.de; - spf=pass smtp.mailfrom=arnaud.patard@rtp-net.org -Received: by lechat.rtp-net.org (Postfix, from userid 1000) - id E7A2D180ACE; Fri, 5 Mar 2021 11:35:41 +0100 (CET) -Message-ID: <20210305103307.342131644@rtp-net.org> -User-Agent: quilt/0.66 -Date: Fri, 05 Mar 2021 11:27:52 +0100 -From: Arnaud Patard (Rtp) -To: u-boot@lists.denx.de -Cc: Kever Yang , - Anatolij Gustschin , - Philipp Tomsich , - Peter Robinson , - Samuel Dionne-Riel , - Alper Nebi Yasak , - Arnaud Patard -Subject: [patch v4 7/9] rockchip: video: vop: Fix format of fbbase in debug - string -References: <20210305102745.078091129@rtp-net.org> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.34 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.4 at phobos.denx.de -X-Virus-Status: Clean - -The debug string printing the device name, framebuffer address and of node -is using %lu as format for the framebuffer address, which is not so nice. -Change it to %lx. - -Signed-off-by: Arnaud Patard -Tested-by: Peter Robinson - -Index: u-boot/drivers/video/rockchip/rk_vop.c -=================================================================== ---- u-boot.orig/drivers/video/rockchip/rk_vop.c -+++ u-boot/drivers/video/rockchip/rk_vop.c -@@ -240,7 +240,7 @@ static int rk_display_init(struct udevic - ofnode remote; - const char *compat; - -- debug("%s(%s, %lu, %s)\n", __func__, -+ debug("%s(%s, 0x%lx, %s)\n", __func__, - dev_read_name(dev), fbbase, ofnode_get_name(ep_node)); - - ret = ofnode_read_u32(ep_node, "remote-endpoint", &remote_phandle); - -From patchwork Fri Mar 5 10:27:53 2021 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: "Arnaud Patard (Rtp)" -X-Patchwork-Id: 1447762 -X-Patchwork-Delegate: agust@denx.de -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de - (client-ip=85.214.62.61; helo=phobos.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; receiver=) -Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) - (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) - key-exchange X25519 server-signature RSA-PSS (4096 bits)) - (No client certificate requested) - by ozlabs.org (Postfix) with ESMTPS id 4DsPLx35qQz9sRR - for ; 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- dmarc=pass (p=none dis=none) header.from=rtp-net.org -Authentication-Results: phobos.denx.de; - spf=pass smtp.mailfrom=arnaud.patard@rtp-net.org -Received: by lechat.rtp-net.org (Postfix, from userid 1000) - id F37E5180A23; Fri, 5 Mar 2021 11:35:41 +0100 (CET) -Message-ID: <20210305103307.395781510@rtp-net.org> -User-Agent: quilt/0.66 -Date: Fri, 05 Mar 2021 11:27:53 +0100 -From: Arnaud Patard (Rtp) -To: u-boot@lists.denx.de -Cc: Kever Yang , - Anatolij Gustschin , - Philipp Tomsich , - Peter Robinson , - Samuel Dionne-Riel , - Alper Nebi Yasak , - Arnaud Patard -Subject: [patch v4 8/9] rockchip: video: edp: Add missing reset support -References: <20210305102745.078091129@rtp-net.org> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.34 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.4 at phobos.denx.de -X-Virus-Status: Clean - -In order to ensure that the eDP registers are in correct state, -add missing support for the eDP reset lines found in the device-tree. - - -Signed-off-by: Arnaud Patard -Tested-by: Peter Robinson - -Index: u-boot/drivers/video/rockchip/rk_edp.c -=================================================================== ---- u-boot.orig/drivers/video/rockchip/rk_edp.c -+++ u-boot/drivers/video/rockchip/rk_edp.c -@@ -8,11 +8,13 @@ - #include - #include - #include -+#include - #include - #include - #include - #include - #include -+#include - #include - #include - #include -@@ -1053,6 +1055,7 @@ static int rk_edp_probe(struct udevice * - struct rk_edp_priv *priv = dev_get_priv(dev); - struct rk3288_edp *regs = priv->regs; - struct rockchip_dp_data *edp_data = (struct rockchip_dp_data *)dev_get_driver_data(dev); -+ struct reset_ctl dp_rst; - - struct clk clk; - int ret; -@@ -1065,6 +1068,25 @@ static int rk_edp_probe(struct udevice * - return ret; - } - -+ ret = reset_get_by_name(dev, "dp", &dp_rst); -+ if (ret) { -+ dev_err(dev, "failed to get dp reset (ret=%d)\n", ret); -+ return ret; -+ } -+ -+ ret = reset_assert(&dp_rst); -+ if (ret) { -+ dev_err(dev, "failed to assert dp reset (ret=%d)\n", ret); -+ return ret; -+ } -+ udelay(20); -+ -+ ret = reset_deassert(&dp_rst); -+ if (ret) { -+ dev_err(dev, "failed to deassert dp reset (ret=%d)\n", ret); -+ return ret; -+ } -+ - int vop_id = uc_plat->source_id; - debug("%s, uc_plat=%p, vop_id=%u\n", __func__, uc_plat, vop_id); - - -From patchwork Fri Mar 5 10:27:54 2021 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: "Arnaud Patard (Rtp)" -X-Patchwork-Id: 1447763 -X-Patchwork-Delegate: agust@denx.de -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; 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Fri, 5 Mar 2021 11:35:44 +0100 (CET) -Authentication-Results: phobos.denx.de; - dmarc=pass (p=none dis=none) header.from=rtp-net.org -Authentication-Results: phobos.denx.de; - spf=pass smtp.mailfrom=arnaud.patard@rtp-net.org -Received: by lechat.rtp-net.org (Postfix, from userid 1000) - id 329B7180B08; Fri, 5 Mar 2021 11:35:42 +0100 (CET) -Message-ID: <20210305103307.447309277@rtp-net.org> -User-Agent: quilt/0.66 -Date: Fri, 05 Mar 2021 11:27:54 +0100 -From: Arnaud Patard (Rtp) -To: u-boot@lists.denx.de -Cc: Kever Yang , - Anatolij Gustschin , - Philipp Tomsich , - Peter Robinson , - Samuel Dionne-Riel , - Alper Nebi Yasak , - Arnaud Patard -Subject: [patch v4 9/9] rockchip: video: vop: Add reset support -References: <20210305102745.078091129@rtp-net.org> -MIME-Version: 1.0 -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.34 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.4 at phobos.denx.de -X-Virus-Status: Clean - -In order to ensure that the VOP registers are in correct state, -add missing support for the VOP reset lines found in the device-tree - -Signed-off-by: Arnaud Patard -Tested-by: Peter Robinson - -Index: u-boot/drivers/video/rockchip/rk_vop.c -=================================================================== ---- u-boot.orig/drivers/video/rockchip/rk_vop.c -+++ u-boot/drivers/video/rockchip/rk_vop.c -@@ -8,9 +8,11 @@ - #include - #include - #include -+#include - #include - #include - #include -+#include - #include - #include - #include -@@ -37,14 +39,16 @@ enum vop_pol { - DCLK_INVERT = 3 - }; - --static void rkvop_enable(struct rk3288_vop *regs, ulong fbbase, -+static void rkvop_enable(struct udevice *dev, struct rk3288_vop *regs, ulong fbbase, - int fb_bits_per_pixel, -- const struct display_timing *edid) -+ const struct display_timing *edid, -+ struct reset_ctl *dclk_rst) - { - u32 lb_mode; - u32 rgb_mode; - u32 hactive = edid->hactive.typ; - u32 vactive = edid->vactive.typ; -+ int ret; - - writel(V_ACT_WIDTH(hactive - 1) | V_ACT_HEIGHT(vactive - 1), - ®s->win0_act_info); -@@ -92,6 +96,18 @@ static void rkvop_enable(struct rk3288_v - - writel(fbbase, ®s->win0_yrgb_mst); - writel(0x01, ®s->reg_cfg_done); /* enable reg config */ -+ -+ ret = reset_assert(dclk_rst); -+ if (ret) { -+ dev_warn(dev, "failed to assert dclk reset (ret=%d)\n", ret); -+ return; -+ } -+ udelay(20); -+ -+ ret = reset_deassert(dclk_rst); -+ if (ret) -+ dev_warn(dev, "failed to deassert dclk reset (ret=%d)\n", ret); -+ - } - - static void rkvop_set_pin_polarity(struct udevice *dev, -@@ -239,6 +255,7 @@ static int rk_display_init(struct udevic - enum video_log2_bpp l2bpp; - ofnode remote; - const char *compat; -+ struct reset_ctl dclk_rst; - - debug("%s(%s, 0x%lx, %s)\n", __func__, - dev_read_name(dev), fbbase, ofnode_get_name(ep_node)); -@@ -355,7 +372,14 @@ static int rk_display_init(struct udevic - } - - rkvop_mode_set(dev, &timing, vop_id); -- rkvop_enable(regs, fbbase, 1 << l2bpp, &timing); -+ -+ ret = reset_get_by_name(dev, "dclk", &dclk_rst); -+ if (ret) { -+ dev_err(dev, "failed to get dclk reset (ret=%d)\n", ret); -+ return ret; -+ } -+ -+ rkvop_enable(dev, regs, fbbase, 1 << l2bpp, &timing, &dclk_rst); - - ret = display_enable(disp, 1 << l2bpp, &timing); - if (ret) -@@ -392,11 +416,31 @@ int rk_vop_probe(struct udevice *dev) - struct rk_vop_priv *priv = dev_get_priv(dev); - int ret = 0; - ofnode port, node; -+ struct reset_ctl ahb_rst; - - /* Before relocation we don't need to do anything */ - if (!(gd->flags & GD_FLG_RELOC)) - return 0; - -+ ret = reset_get_by_name(dev, "ahb", &ahb_rst); -+ if (ret) { -+ dev_err(dev, "failed to get ahb reset (ret=%d)\n", ret); -+ return ret; -+ } -+ -+ ret = reset_assert(&ahb_rst); -+ if (ret) { -+ dev_err(dev, "failed to assert ahb reset (ret=%d)\n", ret); -+ return ret; -+ } -+ udelay(20); -+ -+ ret = reset_deassert(&ahb_rst); -+ if (ret) { -+ dev_err(dev, "failed to deassert ahb reset (ret=%d)\n", ret); -+ return ret; -+ } -+ - #if defined(CONFIG_EFI_LOADER) - debug("Adding to EFI map %d @ %lx\n", plat->size, plat->base); - efi_add_memory_map(plat->base, plat->size, EFI_RESERVED_MEMORY_TYPE); diff --git a/sources b/sources index 0be2497..d89c8d2 100644 --- a/sources +++ b/sources @@ -1 +1 @@ -SHA512 (u-boot-2021.04.tar.bz2) = c24835a520bfd528032614576ca552e55e6de129372e72e22e80e0d45dc5c1c75aa4aad80e856d5bbd7146ec092cac52a6f352253cf3fdf9fe536f5e87782803 +SHA512 (u-boot-2021.07-rc2.tar.bz2) = 3d753a7e85894fd0ecbe9ffcf6da6cc8f5e5d26cb1ec2505035c2183729d1b3ae5e4ece6ecdd93125f50627cd3e358cd911570c366e7e9dafac2c1369ca49697 diff --git a/sunxi-support-asymmetric-dual-rank-DRAM-on-A64.patch b/sunxi-support-asymmetric-dual-rank-DRAM-on-A64.patch deleted file mode 100644 index c2b6946..0000000 --- a/sunxi-support-asymmetric-dual-rank-DRAM-on-A64.patch +++ /dev/null @@ -1,337 +0,0 @@ -From patchwork Thu Feb 25 16:13:24 2021 -Content-Type: text/plain; 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a=rsa-sha256; c=simple/simple; d=aosc.io; s=default; - t=1614269631; bh=p5Qg+eI0X+uHI/vb/v+Q5hqIyhUcxanqxa0s3F6kzsk=; - h=From:To:Cc:Subject:Date:In-Reply-To:References:From; - b=HIUK4Nk2y/BejXaMIQECyQ7r0JiiRWWbURK29vtVJOxbvSa5uDI5eMKRpJPD1FM0C - FcHWJD/H2cXjFNbCk9Ogmfwhcw2wgyXx0AranW4WXH8qg4g8uzYrAqN9nKGhbmDZ3n - ds22TcdBpaiuxNCOmVjRPJvWBZhWtTxLREQv27fw= -From: Icenowy Zheng -To: Jagan Teki , - Andre Przywara -Cc: u-boot@lists.denx.de, linux-sunxi@googlegroups.com, - Icenowy Zheng -Subject: [PATCH 1/2] sunxi: support asymmetric dual rank DRAM on A64/R40 -Date: Fri, 26 Feb 2021 00:13:24 +0800 -Message-Id: <20210225161325.94019-2-icenowy@aosc.io> -X-Mailer: git-send-email 2.30.0 -In-Reply-To: <20210225161325.94019-1-icenowy@aosc.io> -References: <20210225161325.94019-1-icenowy@aosc.io> -MIME-Version: 1.0 -X-Rspamd-Server: mail20.mymailcheap.com -X-Spamd-Result: default: False [4.90 / 20.00]; ARC_NA(0.00)[]; - RCVD_VIA_SMTP_AUTH(0.00)[]; - R_DKIM_ALLOW(0.00)[aosc.io:s=default]; - RECEIVED_SPAMHAUS_PBL(0.00)[59.41.161.221:received]; - FROM_HAS_DN(0.00)[]; TO_DN_SOME(0.00)[]; - R_MISSING_CHARSET(2.50)[]; TO_MATCH_ENVRCPT_ALL(0.00)[]; - MIME_GOOD(-0.10)[text/plain]; DMARC_NA(0.00)[aosc.io]; - BROKEN_CONTENT_TYPE(1.50)[]; R_SPF_SOFTFAIL(0.00)[~all:c]; - RCPT_COUNT_FIVE(0.00)[5]; ML_SERVERS(-3.10)[148.251.23.173]; - DKIM_TRACE(0.00)[aosc.io:+]; MID_CONTAINS_FROM(1.00)[]; - RCVD_NO_TLS_LAST(0.10)[]; FROM_EQ_ENVFROM(0.00)[]; - MIME_TRACE(0.00)[0:+]; - ASN(0.00)[asn:24940, ipnet:148.251.0.0/16, country:DE]; - RCVD_COUNT_TWO(0.00)[2]; - HFILTER_HELO_BAREIP(3.00)[148.251.23.173,1] -X-Rspamd-Queue-Id: 623DD41AAC -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.34 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.4 at phobos.denx.de -X-Virus-Status: Clean - -Previously we have known that R40 has a configuration register for its -rank 1, which allows different configuration than rank 0. Reverse -engineering of newest libdram of A64 from Allwinner shows that A64 has -this register too. It's bit 0 (which enables dual rank in rank 0 -configuration register) means a dedicated rank size setup is used for -rank 1. - -Now, Pine64 scheduled to use a 3GiB LPDDR3 DRAM chip (which has 2GiB -rank 0 and 1GiB rank 1) on PinePhone, that makes asymmetric dual rank -DRAM support necessary. - -Add this support. The code could support both A64 and R40, but because -dual rank detection is broken on R40 now, we cannot really use it on R40 -currently. - -Signed-off-by: Icenowy Zheng ---- - .../include/asm/arch-sunxi/dram_sunxi_dw.h | 11 ++- - arch/arm/mach-sunxi/dram_sunxi_dw.c | 94 +++++++++++++++---- - 2 files changed, 82 insertions(+), 23 deletions(-) - -diff --git a/arch/arm/include/asm/arch-sunxi/dram_sunxi_dw.h b/arch/arm/include/asm/arch-sunxi/dram_sunxi_dw.h -index a5a7ebde44..e843c14202 100644 ---- a/arch/arm/include/asm/arch-sunxi/dram_sunxi_dw.h -+++ b/arch/arm/include/asm/arch-sunxi/dram_sunxi_dw.h -@@ -215,12 +215,17 @@ struct sunxi_mctl_ctl_reg { - #define NR_OF_BYTE_LANES (32 / BITS_PER_BYTE) - /* The eight data lines (DQn) plus DM, DQS and DQSN */ - #define LINES_PER_BYTE_LANE (BITS_PER_BYTE + 3) --struct dram_para { -+ -+struct rank_para { - u16 page_size; -- u8 bus_full_width; -- u8 dual_rank; - u8 row_bits; - u8 bank_bits; -+}; -+ -+struct dram_para { -+ u8 dual_rank; -+ u8 bus_full_width; -+ struct rank_para ranks[2]; - const u8 dx_read_delays[NR_OF_BYTE_LANES][LINES_PER_BYTE_LANE]; - const u8 dx_write_delays[NR_OF_BYTE_LANES][LINES_PER_BYTE_LANE]; - const u8 ac_delays[31]; -diff --git a/arch/arm/mach-sunxi/dram_sunxi_dw.c b/arch/arm/mach-sunxi/dram_sunxi_dw.c -index d0600011ff..2b9d631d49 100644 ---- a/arch/arm/mach-sunxi/dram_sunxi_dw.c -+++ b/arch/arm/mach-sunxi/dram_sunxi_dw.c -@@ -399,11 +399,19 @@ static void mctl_set_cr(uint16_t socid, struct dram_para *para) - #else - #error Unsupported DRAM type! - #endif -- (para->bank_bits == 3 ? MCTL_CR_EIGHT_BANKS : MCTL_CR_FOUR_BANKS) | -+ (para->ranks[0].bank_bits == 3 ? MCTL_CR_EIGHT_BANKS : MCTL_CR_FOUR_BANKS) | - MCTL_CR_BUS_FULL_WIDTH(para->bus_full_width) | - (para->dual_rank ? MCTL_CR_DUAL_RANK : MCTL_CR_SINGLE_RANK) | -- MCTL_CR_PAGE_SIZE(para->page_size) | -- MCTL_CR_ROW_BITS(para->row_bits), &mctl_com->cr); -+ MCTL_CR_PAGE_SIZE(para->ranks[0].page_size) | -+ MCTL_CR_ROW_BITS(para->ranks[0].row_bits), &mctl_com->cr); -+ -+ if (para->dual_rank && (socid == SOCID_A64 || socid == SOCID_R40)) { -+ writel((para->ranks[1].bank_bits == 3 ? MCTL_CR_EIGHT_BANKS : MCTL_CR_FOUR_BANKS) | -+ MCTL_CR_BUS_FULL_WIDTH(para->bus_full_width) | -+ MCTL_CR_DUAL_RANK | -+ MCTL_CR_PAGE_SIZE(para->ranks[1].page_size) | -+ MCTL_CR_ROW_BITS(para->ranks[1].row_bits), &mctl_com->cr_r1); -+ } - - if (socid == SOCID_R40) { - if (para->dual_rank) -@@ -646,35 +654,63 @@ static int mctl_channel_init(uint16_t socid, struct dram_para *para) - return 0; - } - --static void mctl_auto_detect_dram_size(uint16_t socid, struct dram_para *para) -+/* -+ * Test if memory at offset offset matches memory at a certain base -+ */ -+static bool mctl_mem_matches_base(u32 offset, ulong base) -+{ -+ /* Try to write different values to RAM at two addresses */ -+ writel(0, base); -+ writel(0xaa55aa55, base + offset); -+ dsb(); -+ /* Check if the same value is actually observed when reading back */ -+ return readl(base) == -+ readl(base + offset); -+} -+ -+static void mctl_auto_detect_dram_size_rank(uint16_t socid, struct dram_para *para, ulong base, struct rank_para *rank) - { - /* detect row address bits */ -- para->page_size = 512; -- para->row_bits = 16; -- para->bank_bits = 2; -+ rank->page_size = 512; -+ rank->row_bits = 16; -+ rank->bank_bits = 2; - mctl_set_cr(socid, para); - -- for (para->row_bits = 11; para->row_bits < 16; para->row_bits++) -- if (mctl_mem_matches((1 << (para->row_bits + para->bank_bits)) * para->page_size)) -+ for (rank->row_bits = 11; rank->row_bits < 16; rank->row_bits++) -+ if (mctl_mem_matches_base((1 << (rank->row_bits + rank->bank_bits)) * rank->page_size, base)) - break; - - /* detect bank address bits */ -- para->bank_bits = 3; -+ rank->bank_bits = 3; - mctl_set_cr(socid, para); - -- for (para->bank_bits = 2; para->bank_bits < 3; para->bank_bits++) -- if (mctl_mem_matches((1 << para->bank_bits) * para->page_size)) -+ for (rank->bank_bits = 2; rank->bank_bits < 3; rank->bank_bits++) -+ if (mctl_mem_matches_base((1 << rank->bank_bits) * rank->page_size, base)) - break; - - /* detect page size */ -- para->page_size = 8192; -+ rank->page_size = 8192; - mctl_set_cr(socid, para); - -- for (para->page_size = 512; para->page_size < 8192; para->page_size *= 2) -- if (mctl_mem_matches(para->page_size)) -+ for (rank->page_size = 512; rank->page_size < 8192; rank->page_size *= 2) -+ if (mctl_mem_matches_base(rank->page_size, base)) - break; - } - -+static unsigned long mctl_calc_rank_size(struct rank_para *rank) -+{ -+ return (1UL << (rank->row_bits + rank->bank_bits)) * rank->page_size; -+} -+ -+static void mctl_auto_detect_dram_size(uint16_t socid, struct dram_para *para) -+{ -+ mctl_auto_detect_dram_size_rank(socid, para, (ulong)CONFIG_SYS_SDRAM_BASE, ¶->ranks[0]); -+ -+ if ((socid == SOCID_A64 || socid == SOCID_R40) && para->dual_rank) { -+ mctl_auto_detect_dram_size_rank(socid, para, (ulong)CONFIG_SYS_SDRAM_BASE + mctl_calc_rank_size(¶->ranks[0]), ¶->ranks[1]); -+ } -+} -+ - /* - * The actual values used here are taken from Allwinner provided boot0 - * binaries, though they are probably board specific, so would likely benefit -@@ -769,12 +805,23 @@ unsigned long sunxi_dram_init(void) - struct sunxi_mctl_ctl_reg * const mctl_ctl = - (struct sunxi_mctl_ctl_reg *)SUNXI_DRAM_CTL0_BASE; - -+ unsigned long size; -+ - struct dram_para para = { - .dual_rank = 1, - .bus_full_width = 1, -- .row_bits = 15, -- .bank_bits = 3, -- .page_size = 4096, -+ .ranks = { -+ { -+ .row_bits = 15, -+ .bank_bits = 3, -+ .page_size = 4096, -+ }, -+ { -+ .row_bits = 15, -+ .bank_bits = 3, -+ .page_size = 4096, -+ } -+ }, - - #if defined(CONFIG_MACH_SUN8I_H3) - .dx_read_delays = SUN8I_H3_DX_READ_DELAYS, -@@ -846,6 +893,13 @@ unsigned long sunxi_dram_init(void) - mctl_auto_detect_dram_size(socid, ¶); - mctl_set_cr(socid, ¶); - -- return (1UL << (para.row_bits + para.bank_bits)) * para.page_size * -- (para.dual_rank ? 2 : 1); -+ size = mctl_calc_rank_size(¶.ranks[0]); -+ if (socid == SOCID_A64 || socid == SOCID_R40) { -+ if (para.dual_rank) -+ size += mctl_calc_rank_size(¶.ranks[1]); -+ } else if (para.dual_rank) { -+ size *= 2; -+ } -+ -+ return size; - } diff --git a/uboot-tools.spec b/uboot-tools.spec index 3176c3a..4d7c27d 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,8 +1,8 @@ -#global candidate rc1 +%global candidate rc2 Name: uboot-tools -Version: 2021.04 -Release: 3%{?candidate:.%{candidate}}%{?dist} +Version: 2021.07 +Release: 0.1%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -21,20 +21,14 @@ Patch2: efi_loader-loosen-buffer-parameter-check-in-efi_file_read_int.patch # RPi - uses RPI firmware device tree for HAT support Patch3: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch -# Revert an upstream regression -Patch9: IOMUX-Fix-buffer-overflow-in-iomux_replace_device.patch # Board fixes and enablement # AllWinner improvements Patch10: AllWinner-PineTab.patch # TI fixes Patch11: 0001-Fix-BeagleAI-detection.patch # Rockchips improvements -Patch12: rk3399-Pinebook-pro-EDP-support.patch -Patch13: phy-rockchip-inno-usb2-fix-hang-when-multiple-controllers-exit.patch -Patch14: rockchip-fix-mmc-numbering.patch -# Fixes for Allwinner network issues -Patch15: 0001-arm-dts-allwinner-sync-from-linux-for-RGMII-RX-TX-de.patch -Patch16: sunxi-support-asymmetric-dual-rank-DRAM-on-A64.patch +Patch12: phy-rockchip-inno-usb2-fix-hang-when-multiple-controllers-exit.patch +Patch13: rockchip-fix-mmc-numbering.patch BuildRequires: bc BuildRequires: dtc @@ -261,6 +255,9 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Mon May 10 2021 Peter Robinson - 2021.07-0.1.rc2 +- Update to 2021.07 RC2 + * Wed Apr 28 2021 Peter Robinson - 2021.04-3 - Upstream fix for console regression (rhbz 1946278) - Fix for fallback.efi crash (rhbz 1733817) diff --git a/usb-kbd-fixes.patch b/usb-kbd-fixes.patch deleted file mode 100644 index fb6a0e0..0000000 --- a/usb-kbd-fixes.patch +++ /dev/null @@ -1,115 +0,0 @@ -From a49845f198af088c4e5e0019edbf519344d78c97 Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Tue, 4 Dec 2018 15:29:14 +0000 -Subject: [PATCH] usb kbd fixes - -Signed-off-by: Peter Robinson ---- - common/usb_kbd.c | 66 +++++++++++++++++++++++++++++++++++------------ - include/console.h | 2 -- - 2 files changed, 50 insertions(+), 18 deletions(-) - -diff --git a/common/usb_kbd.c b/common/usb_kbd.c -index 020f0d4117f..47674ce4458 100644 ---- a/common/usb_kbd.c -+++ b/common/usb_kbd.c -@@ -518,25 +518,59 @@ static int probe_usb_keyboard(struct usb_device *dev) - return error; - - stdinname = env_get("stdin"); --#if CONFIG_IS_ENABLED(CONSOLE_MUX) -- error = iomux_doenv(stdin, stdinname); -- if (error) -- return error; --#else -- /* Check if this is the standard input device. */ -- if (strcmp(stdinname, DEVNAME)) -- return 1; -+ if (CONFIG_IS_ENABLED(CONSOLE_MUX)) { -+ char *devname = DEVNAME; -+ char *newstdin = NULL; -+ /* -+ * stdin might not be set yet.. either way, with console- -+ * mux the sensible thing to do is add ourselves to the -+ * list of stdio devices: -+ */ -+ if (stdinname && !strstr(stdinname, DEVNAME)) { -+ newstdin = malloc(strlen(stdinname) + -+ strlen(","DEVNAME) + 1); -+ sprintf(newstdin, "%s,"DEVNAME, stdinname); -+ stdinname = newstdin; -+ } else if (!stdinname) { -+ stdinname = devname; -+ } -+ error = iomux_doenv(stdin, stdinname); -+ free(newstdin); -+ if (error) -+ goto unregister_stdio; -+ } else { -+ /* Check if this is the standard input device. */ -+ if (strcmp(stdinname, DEVNAME)) { -+ error = -1; -+ goto unregister_stdio; -+ } - -- /* Reassign the console */ -- if (overwrite_console()) -- return 1; -+ /* Reassign the console */ -+ if (overwrite_console()) { -+ error = -1; -+ goto unregister_stdio; -+ } - -- error = console_assign(stdin, DEVNAME); -- if (error) -- return error; --#endif -+ error = console_assign(stdin, DEVNAME); -+ if (error) -+ goto unregister_stdio; -+ } -+ -+ return 0; - -+unregister_stdio: -+ /* -+ * If probe fails, the device will be removed.. leaving dangling -+ * pointers if the stdio device is not unregistered. If u-boot -+ * is built without stdio_deregister(), just pretend to succeed -+ * in order to avoid dangling pointers. -+ */ -+#if CONFIG_IS_ENABLED(SYS_STDIO_DEREGISTER) -+ stdio_deregister(DEVNAME, 1); -+ return error; -+#else - return 0; -+#endif - } - - #if !CONFIG_IS_ENABLED(DM_USB) -@@ -642,7 +676,7 @@ static int usb_kbd_remove(struct udevice *dev) - - return 0; - err: -- printf("%s: warning, ret=%d", __func__, ret); -+ printf("%s: warning, ret=%d\n", __func__, ret); - return ret; - } - -diff --git a/include/console.h b/include/console.h -index e935c601f12..6382ec8e0d6 100644 ---- a/include/console.h -+++ b/include/console.h -@@ -56,8 +56,6 @@ int console_announce_r(void); - /* - * CONSOLE multiplexing. - */ --#ifdef CONFIG_CONSOLE_MUX - #include --#endif - - #endif --- -2.19.2 -