Merge remote-tracking branch 'up/master' into master-riscv64

Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
This commit is contained in:
David Abdurachmanov 2019-11-13 13:47:47 +02:00
commit bb6b35ba8b
Signed by: davidlt
GPG Key ID: 8B7F1DA0E2C9FDBB
10 changed files with 285 additions and 8043 deletions

View File

@ -1,7 +1,7 @@
From d49e0341dcc96b9a33d59579fa9defaaa4b04d1c Mon Sep 17 00:00:00 2001 From 28d382273445e8961fb8726aa5e78b3a47c60b7e Mon Sep 17 00:00:00 2001
From: Peter Robinson <pbrobinson@gmail.com> From: Peter Robinson <pbrobinson@gmail.com>
Date: Wed, 9 Oct 2019 12:15:10 +0100 Date: Tue, 12 Nov 2019 09:15:21 +0000
Subject: [PATCH] rockchip: rk3399: rock960: Update config for TPL Subject: [PATCH 1/4] rockchip: rk3399: rock960: Update config for TPL
The SPL is now running at SDRAM, and 0x10000 is used by BL31, The SPL is now running at SDRAM, and 0x10000 is used by BL31,
and the ARM SPL do not support relocate now, we need reserved and the ARM SPL do not support relocate now, we need reserved
@ -14,21 +14,19 @@ data to IRAM(The EMMC DMA can not transfer data to IRAM directly).
Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
--- ---
configs/rock960-rk3399_defconfig | 10 +++++++--- configs/rock960-rk3399_defconfig | 9 ++++++---
1 file changed, 7 insertions(+), 3 deletions(-) 1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/configs/rock960-rk3399_defconfig b/configs/rock960-rk3399_defconfig diff --git a/configs/rock960-rk3399_defconfig b/configs/rock960-rk3399_defconfig
index cb3c68db6b..f211a65587 100644 index 0d6c55ce74..6dcea04b67 100644
--- a/configs/rock960-rk3399_defconfig --- a/configs/rock960-rk3399_defconfig
+++ b/configs/rock960-rk3399_defconfig +++ b/configs/rock960-rk3399_defconfig
@@ -2,19 +2,21 @@ CONFIG_ARM=y @@ -2,18 +2,19 @@ CONFIG_ARM=y
CONFIG_ARCH_ROCKCHIP=y CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_SYS_TEXT_BASE=0x00200000
CONFIG_ROCKCHIP_RK3399=y CONFIG_ROCKCHIP_RK3399=y
-CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000 -CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x50000
CONFIG_TARGET_ROCK960_RK3399=y CONFIG_TARGET_ROCK960_RK3399=y
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_BASE=0xFF1A0000
CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART=y CONFIG_DEBUG_UART=y
@ -46,7 +44,7 @@ index cb3c68db6b..f211a65587 100644
CONFIG_SYS_PROMPT="rock960 => " CONFIG_SYS_PROMPT="rock960 => "
CONFIG_CMD_BOOTZ=y CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GPT=y CONFIG_CMD_GPT=y
@@ -56,4 +58,6 @@ CONFIG_USB_ETHER_ASIX88179=y @@ -55,4 +56,6 @@ CONFIG_USB_ETHER_ASIX88179=y
CONFIG_USB_ETHER_MCS7830=y CONFIG_USB_ETHER_MCS7830=y
CONFIG_USB_ETHER_RTL8152=y CONFIG_USB_ETHER_RTL8152=y
CONFIG_USB_ETHER_SMSC95XX=y CONFIG_USB_ETHER_SMSC95XX=y
@ -54,5 +52,5 @@ index cb3c68db6b..f211a65587 100644
+CONFIG_SPL_TINY_MEMSET=y +CONFIG_SPL_TINY_MEMSET=y
CONFIG_ERRNO_STR=y CONFIG_ERRNO_STR=y
-- --
2.21.0 2.23.0

View File

@ -0,0 +1,174 @@
From 230d1e7031d5b5ade3ce50b301fbd144d2fbdc12 Mon Sep 17 00:00:00 2001
From: Peter Robinson <pbrobinson@gmail.com>
Date: Sat, 9 Nov 2019 20:07:24 +0000
Subject: [PATCH 2/4] rockchip: dts: rk3399: move the u-boot,dm-pre-reloc to
the u-boot.dtsi
The u-boot specific pieces in the dts files should be in u-boot.dtsi
not the main files, this allows easier sync with upstream. The
rk3399.dtsi has a mix of both so move them all for consistency.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
---
arch/arm/dts/rk3399-u-boot.dtsi | 44 +++++++++++++++++++++++++++++++++
arch/arm/dts/rk3399.dtsi | 11 ---------
2 files changed, 44 insertions(+), 11 deletions(-)
diff --git a/arch/arm/dts/rk3399-u-boot.dtsi b/arch/arm/dts/rk3399-u-boot.dtsi
index 2738a3889e..410e9d452e 100644
--- a/arch/arm/dts/rk3399-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-u-boot.dtsi
@@ -3,10 +3,46 @@
* Copyright (C) 2019 Jagan Teki <jagan@amarulasolutions.com>
*/
+&cic {
+ u-boot,dm-pre-reloc;
+};
+
+&cru {
+ u-boot,dm-pre-reloc;
+};
+
+&dmc {
+ u-boot,dm-pre-reloc;
+};
+
+&grf {
+ u-boot,dm-pre-reloc;
+};
+
+&pinctrl {
+ u-boot,dm-pre-reloc;
+};
+
+&pmu {
+ u-boot,dm-pre-reloc;
+};
+
&pmu {
u-boot,dm-pre-reloc;
};
+&pmucru {
+ u-boot,dm-pre-reloc;
+};
+
+&pmusgrf {
+ u-boot,dm-pre-reloc;
+};
+
+&sdhci {
+ u-boot,dm-pre-reloc;
+};
+
&sdmmc {
u-boot,dm-pre-reloc;
};
@@ -22,3 +58,11 @@
&uart2 {
u-boot,dm-pre-reloc;
};
+
+&vopb {
+ u-boot,dm-pre-reloc;
+};
+
+&vopl {
+ u-boot,dm-pre-reloc;
+};
diff --git a/arch/arm/dts/rk3399.dtsi b/arch/arm/dts/rk3399.dtsi
index b73442ee34..3f773b10f4 100644
--- a/arch/arm/dts/rk3399.dtsi
+++ b/arch/arm/dts/rk3399.dtsi
@@ -275,7 +275,6 @@
};
sdhci: sdhci@fe330000 {
- u-boot,dm-pre-reloc;
compatible = "rockchip,rk3399-sdhci-5.1", "arasan,sdhci-5.1";
reg = <0x0 0xfe330000 0x0 0x10000>;
interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH 0>;
@@ -1072,7 +1071,6 @@
};
pmugrf: syscon@ff320000 {
- u-boot,dm-pre-reloc;
compatible = "rockchip,rk3399-pmugrf", "syscon", "simple-mfd";
reg = <0x0 0xff320000 0x0 0x1000>;
@@ -1083,7 +1081,6 @@
};
pmusgrf: syscon@ff330000 {
- u-boot,dm-pre-reloc;
compatible = "rockchip,rk3399-pmusgrf", "syscon";
reg = <0x0 0xff330000 0x0 0xe3d4>;
};
@@ -1204,7 +1201,6 @@
};
cic: syscon@ff620000 {
- u-boot,dm-pre-reloc;
compatible = "rockchip,rk3399-cic", "syscon";
reg = <0x0 0xff620000 0x0 0x100>;
};
@@ -1219,7 +1215,6 @@
};
dmc: dmc {
- u-boot,dm-pre-reloc;
compatible = "rockchip,rk3399-dmc";
devfreq-events = <&dfi>;
interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH 0>;
@@ -1268,7 +1263,6 @@
};
pmucru: pmu-clock-controller@ff750000 {
- u-boot,dm-pre-reloc;
compatible = "rockchip,rk3399-pmucru";
reg = <0x0 0xff750000 0x0 0x1000>;
rockchip,grf = <&pmugrf>;
@@ -1279,7 +1273,6 @@
};
cru: clock-controller@ff760000 {
- u-boot,dm-pre-reloc;
compatible = "rockchip,rk3399-cru";
reg = <0x0 0xff760000 0x0 0x1000>;
rockchip,grf = <&grf>;
@@ -1310,7 +1303,6 @@
};
grf: syscon@ff770000 {
- u-boot,dm-pre-reloc;
compatible = "rockchip,rk3399-grf", "syscon", "simple-mfd";
reg = <0x0 0xff770000 0x0 0x10000>;
#address-cells = <1>;
@@ -1520,7 +1512,6 @@
};
vopl: vop@ff8f0000 {
- u-boot,dm-pre-reloc;
compatible = "rockchip,rk3399-vop-lit";
reg = <0x0 0xff8f0000 0x0 0x3efc>;
interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH 0>;
@@ -1578,7 +1569,6 @@
};
vopb: vop@ff900000 {
- u-boot,dm-pre-reloc;
compatible = "rockchip,rk3399-vop-big";
reg = <0x0 0xff900000 0x0 0x3efc>;
interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH 0>;
@@ -1818,7 +1808,6 @@
};
pinctrl: pinctrl {
- u-boot,dm-pre-reloc;
compatible = "rockchip,rk3399-pinctrl";
rockchip,grf = <&grf>;
rockchip,pmu = <&pmugrf>;
--
2.23.0

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@ -0,0 +1,44 @@
From fa9f02cbd6a2baf48f76fc922e5f09755932962e Mon Sep 17 00:00:00 2001
From: Peter Robinson <pbrobinson@gmail.com>
Date: Sat, 9 Nov 2019 20:11:45 +0000
Subject: [PATCH 3/4] rockchip: dts: rk3399-evb: move u-boot,spl-boot-order to
to the u-boot.dtsi
The u-boot specific device tree directives should be in u-boot.dtsi
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
---
arch/arm/dts/rk3399-evb-u-boot.dtsi | 6 ++++++
arch/arm/dts/rk3399-evb.dts | 2 --
2 files changed, 6 insertions(+), 2 deletions(-)
diff --git a/arch/arm/dts/rk3399-evb-u-boot.dtsi b/arch/arm/dts/rk3399-evb-u-boot.dtsi
index 20910e744b..ccb33d34d1 100644
--- a/arch/arm/dts/rk3399-evb-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-evb-u-boot.dtsi
@@ -5,3 +5,9 @@
#include "rk3399-u-boot.dtsi"
#include "rk3399-sdram-lpddr3-4GB-1600.dtsi"
+
+/ {
+ chosen {
+ u-boot,spl-boot-order = &sdhci, &sdmmc;
+ };
+};
diff --git a/arch/arm/dts/rk3399-evb.dts b/arch/arm/dts/rk3399-evb.dts
index a506e8da37..8e887f3a17 100644
--- a/arch/arm/dts/rk3399-evb.dts
+++ b/arch/arm/dts/rk3399-evb.dts
@@ -15,8 +15,6 @@
chosen {
stdout-path = &uart2;
- u-boot,spl-boot-order = \
- &sdhci, &sdmmc;
};
vdd_center: vdd-center {
--
2.23.0

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@ -0,0 +1,43 @@
From e27784b9b8c96f46befa6d27a458e0e35d30ad81 Mon Sep 17 00:00:00 2001
From: Peter Robinson <pbrobinson@gmail.com>
Date: Sat, 9 Nov 2019 20:14:54 +0000
Subject: [PATCH 4/4] rockchip: dts: rk3399-firefly: move u-boot,spl-boot-order
to to the u-boot.dtsi
The u-boot specific device tree directives should be in u-boot.dtsi
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
---
arch/arm/dts/rk3399-firefly-u-boot.dtsi | 6 ++++++
arch/arm/dts/rk3399-firefly.dts | 1 -
2 files changed, 6 insertions(+), 1 deletion(-)
diff --git a/arch/arm/dts/rk3399-firefly-u-boot.dtsi b/arch/arm/dts/rk3399-firefly-u-boot.dtsi
index 67b63a8352..38e0897db9 100644
--- a/arch/arm/dts/rk3399-firefly-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-firefly-u-boot.dtsi
@@ -5,3 +5,9 @@
#include "rk3399-u-boot.dtsi"
#include "rk3399-sdram-ddr3-1600.dtsi"
+
+/ {
+ chosen {
+ u-boot,spl-boot-order = "same-as-spl", &sdhci, &sdmmc;
+ };
+};
diff --git a/arch/arm/dts/rk3399-firefly.dts b/arch/arm/dts/rk3399-firefly.dts
index a4cb64f8bd..89c67fd24c 100644
--- a/arch/arm/dts/rk3399-firefly.dts
+++ b/arch/arm/dts/rk3399-firefly.dts
@@ -14,7 +14,6 @@
chosen {
stdout-path = &uart2;
- u-boot,spl-boot-order = "same-as-spl", &sdhci, &sdmmc;
};
backlight: backlight {
--
2.23.0

File diff suppressed because it is too large Load Diff

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@ -1,108 +0,0 @@
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From: Emmanuel Vadot <manu@freebsd.org>
To: matwey.kornilov@gmail.com,
albert.u.boot@aribaud.net
Date: Tue, 8 Oct 2019 19:59:50 +0200
Message-Id: <20191008175950.77719-1-manu@freebsd.org>
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Cc: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH] rockchip: dts: rk3328: rock64: Add same-as-spl order
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rk3328 can use same-as-spl option so next loaders are loaded from the same
medium.
Add the boot order in the rock64 dts otherwise booting from sdcard
will result in u-boot looking into the eMMC.
Signed-off-by: Emmanuel Vadot <manu@freebsd.org>
---
arch/arm/dts/rk3328-rock64-u-boot.dtsi | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm/dts/rk3328-rock64-u-boot.dtsi b/arch/arm/dts/rk3328-rock64-u-boot.dtsi
index 1d441f7124..e5946d2d2d 100644
--- a/arch/arm/dts/rk3328-rock64-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-rock64-u-boot.dtsi
@@ -5,6 +5,11 @@
#include "rk3328-u-boot.dtsi"
#include "rk3328-sdram-lpddr3-1600.dtsi"
+/ {
+ chosen {
+ u-boot,spl-boot-order = "same-as-spl", &sdmmc, &emmc;
+ };
+};
&usb_host0_xhci {
status = "okay";

View File

@ -1,193 +0,0 @@
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Subject: [U-Boot] [PATCH 1/2] ram: rk3328: Use correct frequency units in
function
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Fix a pair of tests in phy_dll_bypass_set() that used incorrect units
for the DDR frequency, causing the DRAM controller to be misconfigured
in most cases.
Signed-off-by: Simon South <simon@simonsouth.net>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
---
drivers/ram/rockchip/sdram_rk3328.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/ram/rockchip/sdram_rk3328.c b/drivers/ram/rockchip/sdram_rk3328.c
index 656696ac3c..0541bbadf0 100644
--- a/drivers/ram/rockchip/sdram_rk3328.c
+++ b/drivers/ram/rockchip/sdram_rk3328.c
@@ -311,12 +311,12 @@ static void phy_dll_bypass_set(struct dram_info *dram, u32 freq)
setbits_le32(PHY_REG(phy_base, 0x56), 1 << 4);
clrbits_le32(PHY_REG(phy_base, 0x57), 1 << 3);
- if (freq <= (400 * MHz))
+ if (freq <= 400)
/* DLL bypass */
setbits_le32(PHY_REG(phy_base, 0xa4), 0x1f);
else
clrbits_le32(PHY_REG(phy_base, 0xa4), 0x1f);
- if (freq <= (680 * MHz))
+ if (freq <= 680)
tmp = 2;
else
tmp = 1;
From patchwork Sun Oct 6 16:28:14 2019
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From: Simon South <simon@simonsouth.net>
To: u-boot@lists.denx.de
Date: Sun, 6 Oct 2019 12:28:14 -0400
Message-Id: <17f58d8cdf7d32de26cb36950fa8676e0dd54d49.1570376078.git.simon@simonsouth.net>
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Subject: [U-Boot] [PATCH 2/2] ram: rk3328: Fix loading of skew values
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Fix a typo that caused incorrect values to be loaded into the DRAM
controller's deskew registers.
Signed-off-by: Simon South <simon@simonsouth.net>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
---
drivers/ram/rockchip/sdram_rk3328.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/ram/rockchip/sdram_rk3328.c b/drivers/ram/rockchip/sdram_rk3328.c
index 0541bbadf0..e84c9be6a2 100644
--- a/drivers/ram/rockchip/sdram_rk3328.c
+++ b/drivers/ram/rockchip/sdram_rk3328.c
@@ -394,7 +394,7 @@ static void phy_cfg(struct dram_info *dram,
copy_to_reg(PHY_REG(phy_base, 0x70),
&sdram_params->skew.cs0_dm0_skew[0], 44 * 4);
copy_to_reg(PHY_REG(phy_base, 0xc0),
- &sdram_params->skew.cs0_dm1_skew[0], 44 * 4);
+ &sdram_params->skew.cs1_dm0_skew[0], 44 * 4);
}
static int update_refresh_reg(struct dram_info *dram)

File diff suppressed because it is too large Load Diff

View File

@ -1 +1 @@
SHA512 (u-boot-2020.01-rc1.tar.bz2) = f376101af005423bbfdb20b1563662ef208fb2c2cac000a2796e67e90e17acd1f422f5e60ccaee8d7a4723faf306e254571dcc3222c32821ace3b379f83b6f09 SHA512 (u-boot-2020.01-rc2.tar.bz2) = c03acd2192b75245387d470b549dbb401549e006400974439a3b13f2efc089f3508eda9bc01d30cd3ceddfb599f3121f0da6e686a007224a34a00b2fb5c533e9

View File

@ -1,8 +1,8 @@
%global candidate rc1 %global candidate rc2
Name: uboot-tools Name: uboot-tools
Version: 2020.01 Version: 2020.01
Release: 0.1%{?candidate:.%{candidate}}.0.riscv64%{?dist} Release: 0.3%{?candidate:.%{candidate}}.0.riscv64%{?dist}
Summary: U-Boot utilities Summary: U-Boot utilities
License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+
URL: http://www.denx.de/wiki/U-Boot URL: http://www.denx.de/wiki/U-Boot
@ -27,11 +27,10 @@ Patch5: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch
Patch6: dragonboard-fixes.patch Patch6: dragonboard-fixes.patch
Patch7: ARM-tegra-Add-NVIDIA-Jetson-Nano.patch Patch7: ARM-tegra-Add-NVIDIA-Jetson-Nano.patch
Patch8: arm-tegra-defaine-fdtfile-for-all-devices.patch Patch8: arm-tegra-defaine-fdtfile-for-all-devices.patch
Patch9: rockchip-rk3399-rock960-Update-config-for-TPL.patch Patch10: 0001-rockchip-rk3399-rock960-Update-config-for-TPL.patch
Patch10: rockchip-dts-rk3328-rock64-Add-same-as-spl-order.patch Patch11: 0002-rockchip-dts-rk3399-move-the-u-boot-dm-pre-reloc-to-.patch
Patch11: rockchip-rk3328-Fix-memory-instability-on-ROCK64.patch Patch12: 0003-rockchip-dts-rk3399-evb-move-u-boot-spl-boot-order-t.patch
Patch12: fdt-Switch-to-the-latest-libfdt-sort-of.patch Patch13: 0004-rockchip-dts-rk3399-firefly-move-u-boot-spl-boot-ord.patch
Patch13: scripts-Convert-to-Python-3.patch
Patch14: tools-fix-version.h.patch Patch14: tools-fix-version.h.patch
# PXE depends on fdt_addr (mandatory) # PXE depends on fdt_addr (mandatory)
@ -335,11 +334,19 @@ cp -p board/warp7/README builds/docs/README.warp7
%endif %endif
%changelog %changelog
<<<<<<< HEAD
* Fri Nov 1 2019 David Abdurachmanov <david.abdurachmanov@sifive.com> 2020.01-0.1.0.riscv64 * Fri Nov 1 2019 David Abdurachmanov <david.abdurachmanov@sifive.com> 2020.01-0.1.0.riscv64
- Add support for RISC-V (riscv64) - Add support for RISC-V (riscv64)
- Define kernel_gz_size and kernel_gz_addr_r for QEMU virt and SiFive FU540 boards - Define kernel_gz_size and kernel_gz_addr_r for QEMU virt and SiFive FU540 boards
to support Image.gz with booti to support Image.gz with booti
- Add 'addappend' label to PXE/EXTLINUX configuration - Add 'addappend' label to PXE/EXTLINUX configuration
=======
* Tue Nov 12 2019 Peter Robinson <pbrobinson@fedoraproject.org> 2020.01-0.3
- 2020.01 RC2
* Tue Nov 5 2019 Peter Robinson <pbrobinson@fedoraproject.org> 2020.01-0.2
- Include new ATF 2.2
>>>>>>> up/master
* Wed Oct 30 2019 Peter Robinson <pbrobinson@fedoraproject.org> 2020.01-0.1 * Wed Oct 30 2019 Peter Robinson <pbrobinson@fedoraproject.org> 2020.01-0.1
- 2020.01 RC1 - 2020.01 RC1