Remove obsolete patch for RISC-V
The changes were merged upstream. Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
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@ -1,34 +0,0 @@
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diff --git a/include/configs/qemu-riscv.h b/include/configs/qemu-riscv.h
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index 2588c5a..b7110ed 100644
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--- a/include/configs/qemu-riscv.h
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+++ b/include/configs/qemu-riscv.h
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@@ -15,7 +15,7 @@
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#define CONFIG_SYS_MALLOC_LEN SZ_8M
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-#define CONFIG_SYS_BOOTM_LEN SZ_16M
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+#define CONFIG_SYS_BOOTM_LEN SZ_64M
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#define CONFIG_STANDALONE_LOAD_ADDR 0x80200000
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@@ -41,11 +41,15 @@
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"fdt_high=0xffffffffffffffff\0" \
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"initrd_high=0xffffffffffffffff\0" \
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- "kernel_addr_r=0x81000000\0" \
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- "fdt_addr_r=0x82000000\0" \
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- "scriptaddr=0x82100000\0" \
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- "pxefile_addr_r=0x82200000\0" \
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- "ramdisk_addr_r=0x82300000\0" \
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+ "kernel_addr_r=0x84000000\0" \
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+ "fdt_addr_r=0x88000000\0" \
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+ "scriptaddr=0x88100000\0" \
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+ "pxefile_addr_r=0x88200000\0" \
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+ "ramdisk_addr_r=0x88300000\0" \
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BOOTENV
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+#define CONFIG_PREBOOT \
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+ "setenv fdt_addr ${fdtcontroladdr};" \
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+ "fdt addr ${fdtcontroladdr};"
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+
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#endif /* __CONFIG_H */
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@ -27,9 +27,6 @@ Patch8: ARM-tegra-Add-NVIDIA-Jetson-Nano.patch
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Patch9: arm-tegra-defaine-fdtfile-for-all-devices.patch
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Patch9: arm-tegra-defaine-fdtfile-for-all-devices.patch
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Patch10: 0001-configs-tinker-rk3288-disable-CONFIG_SPL_I2C_SUPPORT.patch
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Patch10: 0001-configs-tinker-rk3288-disable-CONFIG_SPL_I2C_SUPPORT.patch
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# RISC-V (riscv64)
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Patch30: u-boot-2019.04-rc4-riscv.patch
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BuildRequires: bc
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BuildRequires: bc
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BuildRequires: dtc
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BuildRequires: dtc
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BuildRequires: make
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BuildRequires: make
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