Remove obsolete patch for RISC-V

The changes were merged upstream.

Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
This commit is contained in:
David Abdurachmanov 2019-06-21 18:02:00 +03:00
parent 85b660c788
commit b8d8a2c629
Signed by: davidlt
GPG Key ID: 8B7F1DA0E2C9FDBB
2 changed files with 0 additions and 37 deletions

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@ -1,34 +0,0 @@
diff --git a/include/configs/qemu-riscv.h b/include/configs/qemu-riscv.h
index 2588c5a..b7110ed 100644
--- a/include/configs/qemu-riscv.h
+++ b/include/configs/qemu-riscv.h
@@ -15,7 +15,7 @@
#define CONFIG_SYS_MALLOC_LEN SZ_8M
-#define CONFIG_SYS_BOOTM_LEN SZ_16M
+#define CONFIG_SYS_BOOTM_LEN SZ_64M
#define CONFIG_STANDALONE_LOAD_ADDR 0x80200000
@@ -41,11 +41,15 @@
#define CONFIG_EXTRA_ENV_SETTINGS \
"fdt_high=0xffffffffffffffff\0" \
"initrd_high=0xffffffffffffffff\0" \
- "kernel_addr_r=0x81000000\0" \
- "fdt_addr_r=0x82000000\0" \
- "scriptaddr=0x82100000\0" \
- "pxefile_addr_r=0x82200000\0" \
- "ramdisk_addr_r=0x82300000\0" \
+ "kernel_addr_r=0x84000000\0" \
+ "fdt_addr_r=0x88000000\0" \
+ "scriptaddr=0x88100000\0" \
+ "pxefile_addr_r=0x88200000\0" \
+ "ramdisk_addr_r=0x88300000\0" \
BOOTENV
+#define CONFIG_PREBOOT \
+ "setenv fdt_addr ${fdtcontroladdr};" \
+ "fdt addr ${fdtcontroladdr};"
+
#endif /* __CONFIG_H */

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@ -27,9 +27,6 @@ Patch8: ARM-tegra-Add-NVIDIA-Jetson-Nano.patch
Patch9: arm-tegra-defaine-fdtfile-for-all-devices.patch
Patch10: 0001-configs-tinker-rk3288-disable-CONFIG_SPL_I2C_SUPPORT.patch
# RISC-V (riscv64)
Patch30: u-boot-2019.04-rc4-riscv.patch
BuildRequires: bc
BuildRequires: dtc
BuildRequires: make