cleanup some old patches
This commit is contained in:
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7b988dd8fc
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@ -1,244 +0,0 @@
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From 53f3d6e9219a36f375e27150b8ec1088624f1aa0 Mon Sep 17 00:00:00 2001
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From: Peter Robinson <pbrobinson@gmail.com>
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Date: Tue, 21 Dec 2021 17:25:35 +0000
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Subject: [PATCH] udoo_neo: Move to DM for REGUALTOR/PMIC/I2C drivers
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This moves over the PMIC power init to DM and the associated i2c and
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regulator bits.
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Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
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---
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board/udoo/neo/neo.c | 139 +++----------------------------------
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configs/udoo_neo_defconfig | 10 +--
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include/configs/udoo_neo.h | 5 --
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3 files changed, 15 insertions(+), 139 deletions(-)
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diff --git a/board/udoo/neo/neo.c b/board/udoo/neo/neo.c
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index 5e40583ab4..9e2a66996c 100644
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--- a/board/udoo/neo/neo.c
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+++ b/board/udoo/neo/neo.c
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@@ -51,11 +51,6 @@ enum {
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PAD_CTL_PUS_22K_UP | PAD_CTL_SPEED_LOW | \
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PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS)
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-#define I2C_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
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- PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
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- PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \
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- PAD_CTL_ODE)
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-
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#define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_PUE | \
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PAD_CTL_SPEED_MED | \
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PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST)
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@@ -83,135 +78,25 @@ int dram_init(void)
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return 0;
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}
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-#ifdef CONFIG_SYS_I2C_MXC
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-#define PC MUX_PAD_CTRL(I2C_PAD_CTRL)
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-/* I2C1 for PMIC */
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-static struct i2c_pads_info i2c_pad_info1 = {
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- .scl = {
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- .i2c_mode = MX6_PAD_GPIO1_IO00__I2C1_SCL | PC,
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- .gpio_mode = MX6_PAD_GPIO1_IO00__GPIO1_IO_0 | PC,
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- .gp = IMX_GPIO_NR(1, 0),
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- },
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- .sda = {
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- .i2c_mode = MX6_PAD_GPIO1_IO01__I2C1_SDA | PC,
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- .gpio_mode = MX6_PAD_GPIO1_IO01__GPIO1_IO_1 | PC,
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- .gp = IMX_GPIO_NR(1, 1),
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- },
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-};
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-#endif
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-
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-#if CONFIG_IS_ENABLED(POWER_LEGACY)
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int power_init_board(void)
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{
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- struct pmic *p;
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- int ret;
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- unsigned int reg, rev_id;
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-
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- ret = power_pfuze3000_init(PFUZE3000_I2C_BUS);
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- if (ret)
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- return ret;
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-
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- p = pmic_get("PFUZE3000");
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- ret = pmic_probe(p);
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- if (ret)
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- return ret;
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+ struct udevice *dev;
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+ int ret, dev_id, rev_id;
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- pmic_reg_read(p, PFUZE3000_DEVICEID, ®);
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- pmic_reg_read(p, PFUZE3000_REVID, &rev_id);
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- printf("PMIC: PFUZE3000 DEV_ID=0x%x REV_ID=0x%x\n", reg, rev_id);
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-
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- /* disable Low Power Mode during standby mode */
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- pmic_reg_read(p, PFUZE3000_LDOGCTL, ®);
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- reg |= 0x1;
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- ret = pmic_reg_write(p, PFUZE3000_LDOGCTL, reg);
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- if (ret)
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+ ret = pmic_get("pfuze3000@8", &dev);
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+ if (ret == -ENODEV)
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+ return 0;
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+ if (ret != 0)
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return ret;
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- ret = pmic_reg_write(p, PFUZE3000_SW1AMODE, 0xc);
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- if (ret)
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- return ret;
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+ dev_id = pmic_reg_read(dev, PFUZE3000_DEVICEID);
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+ rev_id = pmic_reg_read(dev, PFUZE3000_REVID);
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+ printf("PMIC: PFUZE3000 DEV_ID=0x%x REV_ID=0x%x\n", dev_id, rev_id);
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- ret = pmic_reg_write(p, PFUZE3000_SW1BMODE, 0xc);
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- if (ret)
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- return ret;
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-
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- ret = pmic_reg_write(p, PFUZE3000_SW2MODE, 0xc);
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- if (ret)
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- return ret;
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-
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- ret = pmic_reg_write(p, PFUZE3000_SW3MODE, 0xc);
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- if (ret)
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- return ret;
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-
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- /* set SW1A standby voltage 0.975V */
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- pmic_reg_read(p, PFUZE3000_SW1ASTBY, ®);
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- reg &= ~0x3f;
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- reg |= PFUZE3000_SW1AB_SETP(9750);
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- ret = pmic_reg_write(p, PFUZE3000_SW1ASTBY, reg);
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- if (ret)
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- return ret;
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-
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- /* set SW1B standby voltage 0.975V */
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- pmic_reg_read(p, PFUZE3000_SW1BSTBY, ®);
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- reg &= ~0x3f;
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- reg |= PFUZE3000_SW1AB_SETP(9750);
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- ret = pmic_reg_write(p, PFUZE3000_SW1BSTBY, reg);
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- if (ret)
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- return ret;
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-
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- /* set SW1A/VDD_ARM_IN step ramp up time from 16us to 4us/25mV */
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- pmic_reg_read(p, PFUZE3000_SW1ACONF, ®);
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- reg &= ~0xc0;
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- reg |= 0x40;
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- ret = pmic_reg_write(p, PFUZE3000_SW1ACONF, reg);
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- if (ret)
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- return ret;
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-
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- /* set SW1B/VDD_SOC_IN step ramp up time from 16us to 4us/25mV */
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- pmic_reg_read(p, PFUZE3000_SW1BCONF, ®);
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- reg &= ~0xc0;
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- reg |= 0x40;
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- ret = pmic_reg_write(p, PFUZE3000_SW1BCONF, reg);
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- if (ret)
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- return ret;
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-
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- /* set VDD_ARM_IN to 1.350V */
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- pmic_reg_read(p, PFUZE3000_SW1AVOLT, ®);
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- reg &= ~0x3f;
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- reg |= PFUZE3000_SW1AB_SETP(13500);
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- ret = pmic_reg_write(p, PFUZE3000_SW1AVOLT, reg);
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- if (ret)
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- return ret;
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-
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- /* set VDD_SOC_IN to 1.350V */
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- pmic_reg_read(p, PFUZE3000_SW1BVOLT, ®);
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- reg &= ~0x3f;
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- reg |= PFUZE3000_SW1AB_SETP(13500);
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- ret = pmic_reg_write(p, PFUZE3000_SW1BVOLT, reg);
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- if (ret)
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- return ret;
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-
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- /* set DDR_1_5V to 1.350V */
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- pmic_reg_read(p, PFUZE3000_SW3VOLT, ®);
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- reg &= ~0x0f;
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- reg |= PFUZE3000_SW3_SETP(13500);
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- ret = pmic_reg_write(p, PFUZE3000_SW3VOLT, reg);
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- if (ret)
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- return ret;
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-
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- /* set VGEN2_1V5 to 1.5V */
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- pmic_reg_read(p, PFUZE3000_VLDO2CTL, ®);
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- reg &= ~0x0f;
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- reg |= PFUZE3000_VLDO_SETP(15000);
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- /* enable */
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- reg |= 0x10;
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- ret = pmic_reg_write(p, PFUZE3000_VLDO2CTL, reg);
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- if (ret)
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- return ret;
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+ pmic_clrsetbits(dev, PFUZE3000_LDOGCTL, 0, 1);
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return 0;
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}
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-#endif
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static iomux_v3_cfg_t const uart1_pads[] = {
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MX6_PAD_GPIO1_IO04__UART1_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
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@@ -294,10 +179,6 @@ int board_init(void)
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gpio_request(IMX_GPIO_NR(4, 16), "ncp692");
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gpio_direction_output(IMX_GPIO_NR(4, 16) , 1);
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-#ifdef CONFIG_SYS_I2C_MXC
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- setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
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-#endif
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-
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setup_fec();
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return 0;
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diff --git a/configs/udoo_neo_defconfig b/configs/udoo_neo_defconfig
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index ca08de1bd4..9177bdba65 100644
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--- a/configs/udoo_neo_defconfig
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+++ b/configs/udoo_neo_defconfig
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@@ -10,8 +10,9 @@ CONFIG_ENV_SIZE=0x2000
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CONFIG_ENV_OFFSET=0x80000
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CONFIG_MX6SX=y
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CONFIG_TARGET_UDOO_NEO=y
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-CONFIG_SYS_I2C_MXC_I2C1=y
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+CONFIG_DM_I2C=y
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CONFIG_DM_GPIO=y
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+CONFIG_DM_MMC=y
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CONFIG_DEFAULT_DEVICE_TREE="imx6sx-udoo-neo-basic"
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CONFIG_SPL_TEXT_BASE=0x00908000
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CONFIG_SPL_MMC=y
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@@ -39,8 +40,6 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y
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CONFIG_SYS_MMC_ENV_DEV=1
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CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
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CONFIG_BOUNCE_BUFFER=y
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-CONFIG_SYS_I2C_LEGACY=y
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-CONFIG_SPL_SYS_I2C_LEGACY=y
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CONFIG_SYS_I2C_MXC=y
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CONFIG_FSL_USDHC=y
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CONFIG_PHYLIB=y
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@@ -52,11 +51,12 @@ CONFIG_FEC_MXC=y
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CONFIG_MII=y
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CONFIG_PINCTRL=y
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CONFIG_PINCTRL_IMX6=y
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-CONFIG_POWER_LEGACY=y
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-CONFIG_POWER_I2C=y
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+CONFIG_DM_PMIC=y
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+CONFIG_DM_PMIC_PFUZE100=y
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CONFIG_DM_REGULATOR=y
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CONFIG_DM_REGULATOR_ANATOP=y
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CONFIG_DM_REGULATOR_FIXED=y
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+CONFIG_DM_REGULATOR_PFUZE100=y
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CONFIG_USB=y
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CONFIG_DM_USB=y
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CONFIG_USB_STORAGE=y
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diff --git a/include/configs/udoo_neo.h b/include/configs/udoo_neo.h
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index 3a7cb050b1..ac13c3e57f 100644
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--- a/include/configs/udoo_neo.h
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+++ b/include/configs/udoo_neo.h
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@@ -68,9 +68,4 @@
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#define CONFIG_SYS_INIT_SP_ADDR \
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(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
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-/* PMIC */
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-#define CONFIG_POWER_PFUZE3000
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-#define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08
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-#define PFUZE3000_I2C_BUS 0
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-
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#endif /* __CONFIG_H */
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--
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2.34.1
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@ -1,115 +0,0 @@
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From 8b0274a733cd1ce39ad9ad18e1bd8efdd02a40b7 Mon Sep 17 00:00:00 2001
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From: Rob Clark <robdclark@gmail.com>
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Date: Wed, 21 Jun 2017 14:21:15 -0400
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Subject: [PATCH 1/3] WIP: fix usb
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---
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common/usb_storage.c | 4 ++--
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1 file changed, 2 insertions(+), 2 deletions(-)
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diff --git a/common/usb_storage.c b/common/usb_storage.c
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index d92ebb6eb19..9df3c3daaf4 100644
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--- a/common/usb_storage.c
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+++ b/common/usb_storage.c
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@@ -1016,7 +1016,7 @@ static int usb_request_sense(struct scsi_cmd *srb, struct us_data *ss)
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static int usb_test_unit_ready(struct scsi_cmd *srb, struct us_data *ss)
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{
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- int retries = 10;
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+ int retries = 20;
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do {
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memset(&srb->cmd[0], 0, 12);
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@@ -1039,7 +1039,7 @@ static int usb_test_unit_ready(struct scsi_cmd *srb, struct us_data *ss)
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if ((srb->sense_buf[2] == 0x02) &&
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(srb->sense_buf[12] == 0x3a))
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return -1;
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- mdelay(100);
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+ mdelay(250);
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} while (retries--);
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return -1;
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--
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2.19.1
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From 7bf41d74ca9d58bc2243b7688f8987c1d373ea56 Mon Sep 17 00:00:00 2001
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From: Rob Clark <robdclark@gmail.com>
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Date: Mon, 3 Jul 2017 08:34:37 -0400
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Subject: [PATCH 2/3] HACK: disable emmc
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Hitting some timeout which makes boot take much longer. And
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uefi/boot/rootfs partitions will be on sd-card or usb disk, etc,
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so we can just ignore emmc.
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---
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arch/arm/dts/dragonboard410c.dts | 2 ++
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1 file changed, 2 insertions(+)
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diff --git a/arch/arm/dts/dragonboard410c.dts b/arch/arm/dts/dragonboard410c.dts
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index fa348bc621e..bfe7f15d5ed 100644
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--- a/arch/arm/dts/dragonboard410c.dts
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+++ b/arch/arm/dts/dragonboard410c.dts
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@@ -106,6 +106,7 @@
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#phy-cells = <0>;
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};
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+/*
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sdhci@07824000 {
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compatible = "qcom,sdhci-msm-v4";
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reg = <0x7824900 0x11c 0x7824000 0x800>;
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@@ -115,6 +116,7 @@
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clock = <&clkc 0>;
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clock-frequency = <100000000>;
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};
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+*/
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sdhci@07864000 {
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compatible = "qcom,sdhci-msm-v4";
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--
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2.19.1
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From 871fe802cf3ab593b9332c4f36ab2b3f179d51ae Mon Sep 17 00:00:00 2001
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From: Peter Robinson <pbrobinson@gmail.com>
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Date: Tue, 4 Sep 2018 12:21:59 +0100
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Subject: [PATCH 3/3] add options for dm410c config
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---
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configs/dragonboard410c_defconfig | 10 ++++++++++
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1 file changed, 10 insertions(+)
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diff --git a/configs/dragonboard410c_defconfig b/configs/dragonboard410c_defconfig
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index a55abaf8df5..4ece0cafbe4 100644
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--- a/configs/dragonboard410c_defconfig
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+++ b/configs/dragonboard410c_defconfig
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@@ -7,6 +7,8 @@ CONFIG_NR_DRAM_BANKS=1
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# CONFIG_ANDROID_BOOT_IMAGE is not set
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CONFIG_FIT=y
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CONFIG_OF_BOARD_SETUP=y
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+CONFIG_FAT_WRITE=y
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+CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
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CONFIG_MISC_INIT_R=y
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# CONFIG_DISPLAY_CPUINFO is not set
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# CONFIG_DISPLAY_BOARDINFO is not set
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@@ -41,6 +43,13 @@ CONFIG_DM_PMIC=y
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CONFIG_PMIC_PM8916=y
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CONFIG_MSM_SERIAL=y
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CONFIG_SPMI_MSM=y
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+CONFIG_DM_ETH=y
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+CONFIG_DM_KEYBOARD=y
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+CONFIG_DM_VIDEO=y
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+# CONFG_VIDEO_BPP8 is not set
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+CONFIG_NO_FB_CLEAR=y
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+CONFIG_VIDEO_SIMPLE=y
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+CONFIG_USB_KEYBOARD=y
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CONFIG_USB=y
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CONFIG_DM_USB=y
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CONFIG_USB_EHCI_HCD=y
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@@ -57,5 +66,6 @@ CONFIG_USB_HOST_ETHER=y
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CONFIG_USB_ETHER_ASIX=y
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CONFIG_USB_ETHER_ASIX88179=y
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CONFIG_USB_ETHER_MCS7830=y
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+CONFIG_USB_ETHER_RTL8152=y
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CONFIG_USB_ETHER_SMSC95XX=y
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CONFIG_OF_LIBFDT_OVERLAY=y
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--
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2.19.1
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@ -25,7 +25,6 @@ Patch5: rpi-bcm2835_sdhost-firmware-managed-clock.patch
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# Rockchips improvements
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Patch8: 0001-Revert-spi-spi-uclass-Add-support-to-manually-reloca.patch
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Patch9: rockchip-Add-initial-support-for-the-PinePhone-Pro.patch
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# Patch9: 0001-udoo_neo-Move-to-DM-for-REGUALTOR-PMIC-I2C-drivers.patch
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BuildRequires: bc
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BuildRequires: bison
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