cleanup some old patches

This commit is contained in:
Peter Robinson 2022-03-29 21:36:14 +01:00
parent 7b988dd8fc
commit b6626c87f4
3 changed files with 0 additions and 360 deletions

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@ -1,244 +0,0 @@
From 53f3d6e9219a36f375e27150b8ec1088624f1aa0 Mon Sep 17 00:00:00 2001
From: Peter Robinson <pbrobinson@gmail.com>
Date: Tue, 21 Dec 2021 17:25:35 +0000
Subject: [PATCH] udoo_neo: Move to DM for REGUALTOR/PMIC/I2C drivers
This moves over the PMIC power init to DM and the associated i2c and
regulator bits.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
---
board/udoo/neo/neo.c | 139 +++----------------------------------
configs/udoo_neo_defconfig | 10 +--
include/configs/udoo_neo.h | 5 --
3 files changed, 15 insertions(+), 139 deletions(-)
diff --git a/board/udoo/neo/neo.c b/board/udoo/neo/neo.c
index 5e40583ab4..9e2a66996c 100644
--- a/board/udoo/neo/neo.c
+++ b/board/udoo/neo/neo.c
@@ -51,11 +51,6 @@ enum {
PAD_CTL_PUS_22K_UP | PAD_CTL_SPEED_LOW | \
PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS)
-#define I2C_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
- PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
- PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \
- PAD_CTL_ODE)
-
#define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_PUE | \
PAD_CTL_SPEED_MED | \
PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST)
@@ -83,135 +78,25 @@ int dram_init(void)
return 0;
}
-#ifdef CONFIG_SYS_I2C_MXC
-#define PC MUX_PAD_CTRL(I2C_PAD_CTRL)
-/* I2C1 for PMIC */
-static struct i2c_pads_info i2c_pad_info1 = {
- .scl = {
- .i2c_mode = MX6_PAD_GPIO1_IO00__I2C1_SCL | PC,
- .gpio_mode = MX6_PAD_GPIO1_IO00__GPIO1_IO_0 | PC,
- .gp = IMX_GPIO_NR(1, 0),
- },
- .sda = {
- .i2c_mode = MX6_PAD_GPIO1_IO01__I2C1_SDA | PC,
- .gpio_mode = MX6_PAD_GPIO1_IO01__GPIO1_IO_1 | PC,
- .gp = IMX_GPIO_NR(1, 1),
- },
-};
-#endif
-
-#if CONFIG_IS_ENABLED(POWER_LEGACY)
int power_init_board(void)
{
- struct pmic *p;
- int ret;
- unsigned int reg, rev_id;
-
- ret = power_pfuze3000_init(PFUZE3000_I2C_BUS);
- if (ret)
- return ret;
-
- p = pmic_get("PFUZE3000");
- ret = pmic_probe(p);
- if (ret)
- return ret;
+ struct udevice *dev;
+ int ret, dev_id, rev_id;
- pmic_reg_read(p, PFUZE3000_DEVICEID, &reg);
- pmic_reg_read(p, PFUZE3000_REVID, &rev_id);
- printf("PMIC: PFUZE3000 DEV_ID=0x%x REV_ID=0x%x\n", reg, rev_id);
-
- /* disable Low Power Mode during standby mode */
- pmic_reg_read(p, PFUZE3000_LDOGCTL, &reg);
- reg |= 0x1;
- ret = pmic_reg_write(p, PFUZE3000_LDOGCTL, reg);
- if (ret)
+ ret = pmic_get("pfuze3000@8", &dev);
+ if (ret == -ENODEV)
+ return 0;
+ if (ret != 0)
return ret;
- ret = pmic_reg_write(p, PFUZE3000_SW1AMODE, 0xc);
- if (ret)
- return ret;
+ dev_id = pmic_reg_read(dev, PFUZE3000_DEVICEID);
+ rev_id = pmic_reg_read(dev, PFUZE3000_REVID);
+ printf("PMIC: PFUZE3000 DEV_ID=0x%x REV_ID=0x%x\n", dev_id, rev_id);
- ret = pmic_reg_write(p, PFUZE3000_SW1BMODE, 0xc);
- if (ret)
- return ret;
-
- ret = pmic_reg_write(p, PFUZE3000_SW2MODE, 0xc);
- if (ret)
- return ret;
-
- ret = pmic_reg_write(p, PFUZE3000_SW3MODE, 0xc);
- if (ret)
- return ret;
-
- /* set SW1A standby voltage 0.975V */
- pmic_reg_read(p, PFUZE3000_SW1ASTBY, &reg);
- reg &= ~0x3f;
- reg |= PFUZE3000_SW1AB_SETP(9750);
- ret = pmic_reg_write(p, PFUZE3000_SW1ASTBY, reg);
- if (ret)
- return ret;
-
- /* set SW1B standby voltage 0.975V */
- pmic_reg_read(p, PFUZE3000_SW1BSTBY, &reg);
- reg &= ~0x3f;
- reg |= PFUZE3000_SW1AB_SETP(9750);
- ret = pmic_reg_write(p, PFUZE3000_SW1BSTBY, reg);
- if (ret)
- return ret;
-
- /* set SW1A/VDD_ARM_IN step ramp up time from 16us to 4us/25mV */
- pmic_reg_read(p, PFUZE3000_SW1ACONF, &reg);
- reg &= ~0xc0;
- reg |= 0x40;
- ret = pmic_reg_write(p, PFUZE3000_SW1ACONF, reg);
- if (ret)
- return ret;
-
- /* set SW1B/VDD_SOC_IN step ramp up time from 16us to 4us/25mV */
- pmic_reg_read(p, PFUZE3000_SW1BCONF, &reg);
- reg &= ~0xc0;
- reg |= 0x40;
- ret = pmic_reg_write(p, PFUZE3000_SW1BCONF, reg);
- if (ret)
- return ret;
-
- /* set VDD_ARM_IN to 1.350V */
- pmic_reg_read(p, PFUZE3000_SW1AVOLT, &reg);
- reg &= ~0x3f;
- reg |= PFUZE3000_SW1AB_SETP(13500);
- ret = pmic_reg_write(p, PFUZE3000_SW1AVOLT, reg);
- if (ret)
- return ret;
-
- /* set VDD_SOC_IN to 1.350V */
- pmic_reg_read(p, PFUZE3000_SW1BVOLT, &reg);
- reg &= ~0x3f;
- reg |= PFUZE3000_SW1AB_SETP(13500);
- ret = pmic_reg_write(p, PFUZE3000_SW1BVOLT, reg);
- if (ret)
- return ret;
-
- /* set DDR_1_5V to 1.350V */
- pmic_reg_read(p, PFUZE3000_SW3VOLT, &reg);
- reg &= ~0x0f;
- reg |= PFUZE3000_SW3_SETP(13500);
- ret = pmic_reg_write(p, PFUZE3000_SW3VOLT, reg);
- if (ret)
- return ret;
-
- /* set VGEN2_1V5 to 1.5V */
- pmic_reg_read(p, PFUZE3000_VLDO2CTL, &reg);
- reg &= ~0x0f;
- reg |= PFUZE3000_VLDO_SETP(15000);
- /* enable */
- reg |= 0x10;
- ret = pmic_reg_write(p, PFUZE3000_VLDO2CTL, reg);
- if (ret)
- return ret;
+ pmic_clrsetbits(dev, PFUZE3000_LDOGCTL, 0, 1);
return 0;
}
-#endif
static iomux_v3_cfg_t const uart1_pads[] = {
MX6_PAD_GPIO1_IO04__UART1_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
@@ -294,10 +179,6 @@ int board_init(void)
gpio_request(IMX_GPIO_NR(4, 16), "ncp692");
gpio_direction_output(IMX_GPIO_NR(4, 16) , 1);
-#ifdef CONFIG_SYS_I2C_MXC
- setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
-#endif
-
setup_fec();
return 0;
diff --git a/configs/udoo_neo_defconfig b/configs/udoo_neo_defconfig
index ca08de1bd4..9177bdba65 100644
--- a/configs/udoo_neo_defconfig
+++ b/configs/udoo_neo_defconfig
@@ -10,8 +10,9 @@ CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x80000
CONFIG_MX6SX=y
CONFIG_TARGET_UDOO_NEO=y
-CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_DM_I2C=y
CONFIG_DM_GPIO=y
+CONFIG_DM_MMC=y
CONFIG_DEFAULT_DEVICE_TREE="imx6sx-udoo-neo-basic"
CONFIG_SPL_TEXT_BASE=0x00908000
CONFIG_SPL_MMC=y
@@ -39,8 +40,6 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_MMC_ENV_DEV=1
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_BOUNCE_BUFFER=y
-CONFIG_SYS_I2C_LEGACY=y
-CONFIG_SPL_SYS_I2C_LEGACY=y
CONFIG_SYS_I2C_MXC=y
CONFIG_FSL_USDHC=y
CONFIG_PHYLIB=y
@@ -52,11 +51,12 @@ CONFIG_FEC_MXC=y
CONFIG_MII=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX6=y
-CONFIG_POWER_LEGACY=y
-CONFIG_POWER_I2C=y
+CONFIG_DM_PMIC=y
+CONFIG_DM_PMIC_PFUZE100=y
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_ANATOP=y
CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_DM_REGULATOR_PFUZE100=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_STORAGE=y
diff --git a/include/configs/udoo_neo.h b/include/configs/udoo_neo.h
index 3a7cb050b1..ac13c3e57f 100644
--- a/include/configs/udoo_neo.h
+++ b/include/configs/udoo_neo.h
@@ -68,9 +68,4 @@
#define CONFIG_SYS_INIT_SP_ADDR \
(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-/* PMIC */
-#define CONFIG_POWER_PFUZE3000
-#define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08
-#define PFUZE3000_I2C_BUS 0
-
#endif /* __CONFIG_H */
--
2.34.1

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@ -1,115 +0,0 @@
From 8b0274a733cd1ce39ad9ad18e1bd8efdd02a40b7 Mon Sep 17 00:00:00 2001
From: Rob Clark <robdclark@gmail.com>
Date: Wed, 21 Jun 2017 14:21:15 -0400
Subject: [PATCH 1/3] WIP: fix usb
---
common/usb_storage.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/common/usb_storage.c b/common/usb_storage.c
index d92ebb6eb19..9df3c3daaf4 100644
--- a/common/usb_storage.c
+++ b/common/usb_storage.c
@@ -1016,7 +1016,7 @@ static int usb_request_sense(struct scsi_cmd *srb, struct us_data *ss)
static int usb_test_unit_ready(struct scsi_cmd *srb, struct us_data *ss)
{
- int retries = 10;
+ int retries = 20;
do {
memset(&srb->cmd[0], 0, 12);
@@ -1039,7 +1039,7 @@ static int usb_test_unit_ready(struct scsi_cmd *srb, struct us_data *ss)
if ((srb->sense_buf[2] == 0x02) &&
(srb->sense_buf[12] == 0x3a))
return -1;
- mdelay(100);
+ mdelay(250);
} while (retries--);
return -1;
--
2.19.1
From 7bf41d74ca9d58bc2243b7688f8987c1d373ea56 Mon Sep 17 00:00:00 2001
From: Rob Clark <robdclark@gmail.com>
Date: Mon, 3 Jul 2017 08:34:37 -0400
Subject: [PATCH 2/3] HACK: disable emmc
Hitting some timeout which makes boot take much longer. And
uefi/boot/rootfs partitions will be on sd-card or usb disk, etc,
so we can just ignore emmc.
---
arch/arm/dts/dragonboard410c.dts | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/dts/dragonboard410c.dts b/arch/arm/dts/dragonboard410c.dts
index fa348bc621e..bfe7f15d5ed 100644
--- a/arch/arm/dts/dragonboard410c.dts
+++ b/arch/arm/dts/dragonboard410c.dts
@@ -106,6 +106,7 @@
#phy-cells = <0>;
};
+/*
sdhci@07824000 {
compatible = "qcom,sdhci-msm-v4";
reg = <0x7824900 0x11c 0x7824000 0x800>;
@@ -115,6 +116,7 @@
clock = <&clkc 0>;
clock-frequency = <100000000>;
};
+*/
sdhci@07864000 {
compatible = "qcom,sdhci-msm-v4";
--
2.19.1
From 871fe802cf3ab593b9332c4f36ab2b3f179d51ae Mon Sep 17 00:00:00 2001
From: Peter Robinson <pbrobinson@gmail.com>
Date: Tue, 4 Sep 2018 12:21:59 +0100
Subject: [PATCH 3/3] add options for dm410c config
---
configs/dragonboard410c_defconfig | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/configs/dragonboard410c_defconfig b/configs/dragonboard410c_defconfig
index a55abaf8df5..4ece0cafbe4 100644
--- a/configs/dragonboard410c_defconfig
+++ b/configs/dragonboard410c_defconfig
@@ -7,6 +7,8 @@ CONFIG_NR_DRAM_BANKS=1
# CONFIG_ANDROID_BOOT_IMAGE is not set
CONFIG_FIT=y
CONFIG_OF_BOARD_SETUP=y
+CONFIG_FAT_WRITE=y
+CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
CONFIG_MISC_INIT_R=y
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
@@ -41,6 +43,13 @@ CONFIG_DM_PMIC=y
CONFIG_PMIC_PM8916=y
CONFIG_MSM_SERIAL=y
CONFIG_SPMI_MSM=y
+CONFIG_DM_ETH=y
+CONFIG_DM_KEYBOARD=y
+CONFIG_DM_VIDEO=y
+# CONFG_VIDEO_BPP8 is not set
+CONFIG_NO_FB_CLEAR=y
+CONFIG_VIDEO_SIMPLE=y
+CONFIG_USB_KEYBOARD=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_EHCI_HCD=y
@@ -57,5 +66,6 @@ CONFIG_USB_HOST_ETHER=y
CONFIG_USB_ETHER_ASIX=y
CONFIG_USB_ETHER_ASIX88179=y
CONFIG_USB_ETHER_MCS7830=y
+CONFIG_USB_ETHER_RTL8152=y
CONFIG_USB_ETHER_SMSC95XX=y
CONFIG_OF_LIBFDT_OVERLAY=y
--
2.19.1

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@ -25,7 +25,6 @@ Patch5: rpi-bcm2835_sdhost-firmware-managed-clock.patch
# Rockchips improvements
Patch8: 0001-Revert-spi-spi-uclass-Add-support-to-manually-reloca.patch
Patch9: rockchip-Add-initial-support-for-the-PinePhone-Pro.patch
# Patch9: 0001-udoo_neo-Move-to-DM-for-REGUALTOR-PMIC-I2C-drivers.patch
BuildRequires: bc
BuildRequires: bison