From aea19bdfee297ce6704f16130d83ecdd6cab808a Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Thu, 18 Jun 2020 16:01:52 +0100 Subject: [PATCH] Update various patches to latest upstream --- ...I-Fix-PSCI-support-for-OF-live-trees.patch | 300 +++++++++ mmc-sdhci-Fix-HISPD-bit-handling.patch | 122 ++-- uboot-tools.spec | 8 +- ...Load-Raspberry-Pi-4-VL805-s-firmware.patch | 623 ++++++++++++++---- 4 files changed, 874 insertions(+), 179 deletions(-) create mode 100644 firmware-PSCI-Fix-PSCI-support-for-OF-live-trees.patch diff --git a/firmware-PSCI-Fix-PSCI-support-for-OF-live-trees.patch b/firmware-PSCI-Fix-PSCI-support-for-OF-live-trees.patch new file mode 100644 index 0000000..134d436 --- /dev/null +++ b/firmware-PSCI-Fix-PSCI-support-for-OF-live-trees.patch @@ -0,0 +1,300 @@ +From patchwork Thu Jun 18 11:54:38 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Jon Hunter +X-Patchwork-Id: 1312024 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; 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Thu, 18 Jun 2020 04:54:54 -0700 +From: Jon Hunter +To: Tom Rini , Tom Warren +CC: Stephen Warren , Thierry Reding , + Peter Robinson , Heinrich Schuchardt + , , Jon Hunter + +Subject: [PATCH 1/2] firmware: PSCI: Fix PSCI support for OF live trees +Date: Thu, 18 Jun 2020 12:54:38 +0100 +Message-ID: <20200618115439.25100-1-jonathanh@nvidia.com> +X-Mailer: git-send-email 2.17.1 +X-NVConfidentiality: public +MIME-Version: 1.0 +DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; + t=1592481246; bh=06Kdq266LOYz5R2QyKOopddySBarFsUxH3Li+Ufuk5Y=; + h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: + X-NVConfidentiality:MIME-Version:Content-Type; + b=MEPdTgP3WAds3UTss1m+sIgLur+SEpPr3iBvVPk7Wh5dOizB3FW23fLfVKyqL5OtQ + gbz3WbWd7HmOEpFYdplLfUVxmxJtfrIZwvgPWj2TqEJIedeVl14ELovHD9R9Y30dkJ + FmnUv8e34oxjz2kEeEgg+T9FEo6YAt/4Jix7q76AWZMkTCDfhykFtlVztztYg9fcju + n1QlBQR2AxHQXG1v54hiTbSNoAGS0VsOdK/QQgGI1uY7YHgNOY2j8vb+VyUqF/Ku0Z + eIbJ8SO/BsNbTjMaTOJcPRRc3LO/RgLPa1p4jNoo9Iqa/q06UxdxmgIHIE1DEpr8bQ + Q2QxwRplMIT3A== +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.30rc1 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de +X-Virus-Status: Clean + +When CONFIG_OF_LIVE is enabled, dev_of_offset() cannot be used and +if used returns an invalid offset. This causes the call to +fdt_stringlist_get() in the psci_probe() to fail to read the 'method' +property from the PSCI node for the device and hence prevents PSCI +from working. Fix this by using the ofnode_read_string() API instead +of the fdt_stringlist_get() because this will handle reading the +property both when CONFIG_OF_LIVE is enabled or disabled. + +Due to the above problem and since commit 81ea00838c68 ("efi_loader: +PSCI reset and shutdown") was added, the EFI system reset has been +broken for Tegra210 and Tegra196 platforms. This also fixes the EFI +system reset for these Tegra platforms. + +Signed-off-by: Jon Hunter +--- + drivers/firmware/psci.c | 4 +--- + 1 file changed, 1 insertion(+), 3 deletions(-) + +diff --git a/drivers/firmware/psci.c b/drivers/firmware/psci.c +index e0d66d74f54d..23cf807591c4 100644 +--- a/drivers/firmware/psci.c ++++ b/drivers/firmware/psci.c +@@ -67,11 +67,9 @@ static int psci_bind(struct udevice *dev) + + static int psci_probe(struct udevice *dev) + { +- DECLARE_GLOBAL_DATA_PTR; + const char *method; + +- method = fdt_stringlist_get(gd->fdt_blob, dev_of_offset(dev), "method", +- 0, NULL); ++ method = ofnode_read_string(dev_ofnode(dev), "method"); + if (!method) { + pr_warn("missing \"method\" property\n"); + return -ENXIO; + +From patchwork Thu Jun 18 11:54:39 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Jon Hunter +X-Patchwork-Id: 1312025 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; 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Thu, 18 Jun 2020 04:55:00 -0700 +From: Jon Hunter +To: Tom Rini , Tom Warren +CC: Stephen Warren , Thierry Reding , + Peter Robinson , Heinrich Schuchardt + , , Jon Hunter + +Subject: [PATCH 2/2] ARM: tegra: Enable PSCI support for Tegra210 and Tegra186 +Date: Thu, 18 Jun 2020 12:54:39 +0100 +Message-ID: <20200618115439.25100-2-jonathanh@nvidia.com> +X-Mailer: git-send-email 2.17.1 +In-Reply-To: <20200618115439.25100-1-jonathanh@nvidia.com> +References: <20200618115439.25100-1-jonathanh@nvidia.com> +X-NVConfidentiality: public +MIME-Version: 1.0 +DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; + t=1592481201; bh=uzSllbcYKOPJL8iHAIEIHwlWoILnHTezp4ATOVF+JV4=; + h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: + In-Reply-To:References:X-NVConfidentiality:MIME-Version: + Content-Type; + b=iOzXdHGEdfeZIQXU+bHDE71+zTfyxL6xY1NHC1MlY5528MLezwOTCe7Tsw+SrrAvT + 80Kw7i+HTbIPGfj62pR8l7l6nVm/8F+MpOQtmUWMHirZcR2TSnrBowB+ncNGHZ/iFK + M8BYf+2e3sDEEhBFl5oNo61viGaXxViz5PwKQuy57dhKNlPJZTBfeSbSfNVyp3Y/81 + W0rcx4KuPtwQeKboaC6MSmpxipJ9hzESYwUXUin9kyqzs6m4qjTTrxymcPPAbckh+E + XKd+VJ/uSFayMJOutamX0tvAqPoFtm4x6zcbmzn3ZZUA1AMCZOmF5Vqqoo32wRk+eX + tFZhwM0IryDkg== +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.30rc1 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de +X-Virus-Status: Clean + +The PSCI nodes are currently not populated for the Tegra210 and Tegra186 +devices. This prevents the PSCI driver from being able to identify the +PSCI method used by these devices and causes the probe of the PSCI +driver to fail. + +Since commit 81ea00838c68 ("efi_loader: PSCI reset and shutdown") was +added, which moves the PSCI EFI system reset handler into the PSCI +driver, this has prevented the EFI system reset from working for +Tegra210 and Tegra186. Therefore, populating these nodes is necessary +to fix the EFI system reset for Tegra210 and Tegra186. + +Signed-off-by: Jon Hunter +--- + arch/arm/dts/tegra186.dtsi | 5 +++++ + arch/arm/dts/tegra210.dtsi | 5 +++++ + 2 files changed, 10 insertions(+) + +diff --git a/arch/arm/dts/tegra186.dtsi b/arch/arm/dts/tegra186.dtsi +index 0a9db9825b85..edcb7aacb8ee 100644 +--- a/arch/arm/dts/tegra186.dtsi ++++ b/arch/arm/dts/tegra186.dtsi +@@ -335,4 +335,9 @@ + status = "disabled"; + }; + }; ++ ++ psci { ++ compatible = "arm,psci-1.0"; ++ method = "smc"; ++ }; + }; +diff --git a/arch/arm/dts/tegra210.dtsi b/arch/arm/dts/tegra210.dtsi +index 3ec54b11c43f..a521a43d6cfd 100644 +--- a/arch/arm/dts/tegra210.dtsi ++++ b/arch/arm/dts/tegra210.dtsi +@@ -867,6 +867,11 @@ + }; + }; + ++ psci { ++ compatible = "arm,psci-1.0"; ++ method = "smc"; ++ }; ++ + timer { + compatible = "arm,armv8-timer"; + interrupts = -X-Patchwork-Id: 1306828 +X-Patchwork-Id: 1312150 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org @@ -15,84 +15,80 @@ Authentication-Results: ozlabs.org; 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- Wed, 10 Jun 2020 04:43:58 -0700 (PDT) + Thu, 18 Jun 2020 07:03:22 -0700 (PDT) From: Jagan Teki -To: Peng Fan , Jaehoon Chung , - Kever Yang -Cc: Marc Zyngier , sunil@amarulasolutions.com, - u-boot@lists.denx.de, linux-rockchip@lists.infradead.org, - linux-amarula@amarulasolutions.com, - Jagan Teki , - Robin Murphy -Subject: [PATCH v3] mmc: sdhci: Fix HISPD bit handling -Date: Wed, 10 Jun 2020 17:13:47 +0530 -Message-Id: <20200610114347.118501-1-jagan@amarulasolutions.com> +To: Peng Fan +Cc: u-boot@lists.denx.de, Jagan Teki , + Kever Yang , + Suniel Mahesh +Subject: [PATCH v4] mmc: sdhci: Fix HISPD bit handling +Date: Thu, 18 Jun 2020 19:33:12 +0530 +Message-Id: <20200618140312.155157-1-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de @@ -118,7 +114,8 @@ So, handle the HISPD bit based on the mmc computed selected mode(timing parameter) rather than fixed mmc card clock frequency. -Linux handle the HISPD similar like this in below commit, +Linux handle the HISPD similar like this in below commit but no +SDHCI_QUIRK_BROKEN_HISPD_MODE, commit <501639bf2173> ("mmc: sdhci: fix SDHCI_QUIRK_NO_HISPD_BIT handling") @@ -132,25 +129,31 @@ Writing GPT: mmc write failed ** Can't write to device 0 ** error! -Cc: Robin Murphy Cc: Kever Yang Cc: Peng Fan -Reviewed-by: Jaehoon Chung -Tested-by: Marc Zyngier # nanopc-t4 Tested-by: Suniel Mahesh # roc-rk3399-pc Signed-off-by: Jagan Teki --- -Changes for v3: -- use && for quirk check. +Changes for v4: +- update commit message +- simplify the logic. - drivers/mmc/sdhci.c | 23 +++++++++++++++-------- - 1 file changed, 15 insertions(+), 8 deletions(-) + drivers/mmc/sdhci.c | 23 +++++++++++++++++------ + 1 file changed, 17 insertions(+), 6 deletions(-) diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c -index 92cc8434af..a7db278a0e 100644 +index 92cc8434af..6cb702111b 100644 --- a/drivers/mmc/sdhci.c +++ b/drivers/mmc/sdhci.c -@@ -594,14 +594,21 @@ static int sdhci_set_ios(struct mmc *mmc) +@@ -567,6 +567,7 @@ static int sdhci_set_ios(struct mmc *mmc) + #endif + u32 ctrl; + struct sdhci_host *host = mmc->priv; ++ bool no_hispd_bit = false; + + if (host->ops && host->ops->set_control_reg) + host->ops->set_control_reg(host); +@@ -594,14 +595,24 @@ static int sdhci_set_ios(struct mmc *mmc) ctrl &= ~SDHCI_CTRL_4BITBUS; } @@ -159,11 +162,12 @@ index 92cc8434af..a7db278a0e 100644 - else - ctrl &= ~SDHCI_CTRL_HISPD; - -- if ((host->quirks & SDHCI_QUIRK_NO_HISPD_BIT) || -- (host->quirks & SDHCI_QUIRK_BROKEN_HISPD_MODE)) + if ((host->quirks & SDHCI_QUIRK_NO_HISPD_BIT) || + (host->quirks & SDHCI_QUIRK_BROKEN_HISPD_MODE)) - ctrl &= ~SDHCI_CTRL_HISPD; -+ if (!(host->quirks & SDHCI_QUIRK_NO_HISPD_BIT) && -+ !(host->quirks & SDHCI_QUIRK_BROKEN_HISPD_MODE)) { ++ no_hispd_bit = true; ++ ++ if (!no_hispd_bit) { + if (mmc->selected_mode == MMC_HS || + mmc->selected_mode == SD_HS || + mmc->selected_mode == MMC_DDR_52 || diff --git a/uboot-tools.spec b/uboot-tools.spec index 012dcdb..5c854bb 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -1,8 +1,9 @@ %global candidate rc4 +%global _default_patch_fuzz 2 Name: uboot-tools Version: 2020.07 -Release: 0.3%{?candidate:.%{candidate}}%{?dist} +Release: 0.4%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -25,6 +26,8 @@ Patch4: usb-kbd-fixes.patch Patch5: dragonboard-fixes.patch # mmc fix Patch6: mmc-sdhci-Fix-HISPD-bit-handling.patch +# Fix PSCI on at least tegra +Patch7: firmware-PSCI-Fix-PSCI-support-for-OF-live-trees.patch # Tegra improvements Patch10: arm-tegra-define-fdtfile-option-for-distro-boot.patch @@ -251,6 +254,9 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Thu Jun 18 2020 Peter Robinson - 2020.07-0.4.rc4 +- Update various patches to latest upstream + * Wed Jun 10 2020 Peter Robinson - 2020.07-0.3.rc4 - 2020.07 RC4 - Minor updates and other fixes diff --git a/usb-xhci-Load-Raspberry-Pi-4-VL805-s-firmware.patch b/usb-xhci-Load-Raspberry-Pi-4-VL805-s-firmware.patch index 4b5f19c..1d551d0 100644 --- a/usb-xhci-Load-Raspberry-Pi-4-VL805-s-firmware.patch +++ b/usb-xhci-Load-Raspberry-Pi-4-VL805-s-firmware.patch @@ -1,10 +1,9 @@ -From patchwork Tue May 5 16:26:06 2020 +From patchwork Fri Jun 12 16:46:29 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicolas Saenz Julienne -X-Patchwork-Id: 1283753 -X-Patchwork-Delegate: marek.vasut@gmail.com +X-Patchwork-Id: 1308405 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org @@ -16,19 +15,19 @@ Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=suse.de Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) - key-exchange X25519 server-signature RSA-PSS (4096 bits)) - (No client certificate requested) - by ozlabs.org (Postfix) with ESMTPS id 49GlV44bJCz9sT0 - for ; Wed, 6 May 2020 02:26:36 +1000 (AEST) + key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest + SHA256) (No client certificate requested) + by ozlabs.org (Postfix) with ESMTPS id 49k68q2wrsz9sRN + for ; Sat, 13 Jun 2020 02:47:37 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) - by phobos.denx.de (Postfix) with ESMTP id C14658209E; - Tue, 5 May 2020 18:26:25 +0200 (CEST) + by phobos.denx.de (Postfix) with ESMTP id 51B4181C78; + Fri, 12 Jun 2020 18:47:28 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=suse.de Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) - id 92EA581C4C; Tue, 5 May 2020 18:26:21 +0200 (CEST) + id D3D0681CD0; Fri, 12 Jun 2020 18:47:26 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,RCVD_IN_MSPIKE_H3, @@ -37,26 +36,26 @@ X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,RCVD_IN_MSPIKE_H3, Received: from mx2.suse.de (mx2.suse.de [195.135.220.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) - by phobos.denx.de (Postfix) with ESMTPS id 0042B81A66 - for ; Tue, 5 May 2020 18:26:17 +0200 (CEST) + by phobos.denx.de (Postfix) with ESMTPS id A5E2A81C78 + for ; Fri, 12 Jun 2020 18:47:23 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=suse.de Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=nsaenzjulienne@suse.de Received: from relay2.suse.de (unknown [195.135.220.254]) - by mx2.suse.de (Postfix) with ESMTP id 01199AED5; - Tue, 5 May 2020 16:26:19 +0000 (UTC) + by mx2.suse.de (Postfix) with ESMTP id 93F95AC64; + Fri, 12 Jun 2020 16:47:26 +0000 (UTC) From: Nicolas Saenz Julienne To: mbrugger@suse.com, u-boot@lists.denx.de, bmeng.cn@gmail.com, marex@denx.de, linux-kernel@vger.kernel.org Cc: sjg@chromium.org, m.szyprowski@samsung.com, s.nawrocki@samsung.com, mark.kettenis@xs4all.nl, Nicolas Saenz Julienne -Subject: [PATCH v3 1/2] arm: rpi: Add function to trigger VL805's firmware load -Date: Tue, 5 May 2020 18:26:06 +0200 -Message-Id: <20200505162607.334-2-nsaenzjulienne@suse.de> +Subject: [PATCH v4 1/5] arm: rpi: Add function to trigger VL805's firmware load +Date: Fri, 12 Jun 2020 18:46:29 +0200 +Message-Id: <20200612164632.25648-2-nsaenzjulienne@suse.de> X-Mailer: git-send-email 2.26.2 -In-Reply-To: <20200505162607.334-1-nsaenzjulienne@suse.de> -References: <20200505162607.334-1-nsaenzjulienne@suse.de> +In-Reply-To: <20200612164632.25648-1-nsaenzjulienne@suse.de> +References: <20200612164632.25648-1-nsaenzjulienne@suse.de> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.30rc1 @@ -81,17 +80,13 @@ informs VideCore that VL805 may need its firmware loaded. Signed-off-by: Nicolas Saenz Julienne --- -Changes since v2: - - Correct wrong function name in comment - - Add better comment on rpi_firmware_init_vl805() - Changes since v1: - Rename function so it's not mistaken with regular firmware loading - +--- arch/arm/mach-bcm283x/include/mach/mbox.h | 13 +++++++ arch/arm/mach-bcm283x/include/mach/msg.h | 7 ++++ - arch/arm/mach-bcm283x/msg.c | 45 +++++++++++++++++++++++ - 3 files changed, 65 insertions(+) + arch/arm/mach-bcm283x/msg.c | 46 +++++++++++++++++++++++ + 3 files changed, 66 insertions(+) diff --git a/arch/arm/mach-bcm283x/include/mach/mbox.h b/arch/arm/mach-bcm283x/include/mach/mbox.h index 60e226ce1d..2ae2d3d97c 100644 @@ -118,7 +113,7 @@ index 60e226ce1d..2ae2d3d97c 100644 * Pass a raw u32 message to the VC, and receive a raw u32 back. * diff --git a/arch/arm/mach-bcm283x/include/mach/msg.h b/arch/arm/mach-bcm283x/include/mach/msg.h -index 4afb08631b..f5213dd0e0 100644 +index 4afb08631b..e45c1bf010 100644 --- a/arch/arm/mach-bcm283x/include/mach/msg.h +++ b/arch/arm/mach-bcm283x/include/mach/msg.h @@ -48,4 +48,11 @@ int bcm2835_set_video_params(int *widthp, int *heightp, int depth_bpp, @@ -126,7 +121,7 @@ index 4afb08631b..f5213dd0e0 100644 ulong *fb_sizep, int *pitchp); +/** -+ * bcm2711_notify_vl805_reset() - get vl805's firmware loaded ++ * bcm2711_load_vl805_firmware() - get vl805's firmware loaded + * + * @return 0 if OK, -EIO on error + */ @@ -134,10 +129,18 @@ index 4afb08631b..f5213dd0e0 100644 + #endif diff --git a/arch/arm/mach-bcm283x/msg.c b/arch/arm/mach-bcm283x/msg.c -index 94b75283f8..f8ef531652 100644 +index 94b75283f8..347aece3cd 100644 --- a/arch/arm/mach-bcm283x/msg.c +++ b/arch/arm/mach-bcm283x/msg.c -@@ -40,6 +40,12 @@ struct msg_setup { +@@ -7,6 +7,7 @@ + #include + #include + #include ++#include + + struct msg_set_power_state { + struct bcm2835_mbox_hdr hdr; +@@ -40,6 +41,12 @@ struct msg_setup { u32 end_tag; }; @@ -150,18 +153,16 @@ index 94b75283f8..f8ef531652 100644 int bcm2835_power_on_module(u32 module) { ALLOC_CACHE_ALIGN_BUFFER(struct msg_set_power_state, msg_pwr, 1); -@@ -151,3 +157,42 @@ int bcm2835_set_video_params(int *widthp, int *heightp, int depth_bpp, +@@ -151,3 +158,42 @@ int bcm2835_set_video_params(int *widthp, int *heightp, int depth_bpp, return 0; } + +/* -+ * The Raspberry Pi 4 gets its USB functionality from VL805, a PCIe chip that -+ * implements xHCI. After a PCI reset, VL805's firmware may either be loaded -+ * directly from an EEPROM or, if not present, by the SoC's co-processor, -+ * VideoCore. RPi4's VideoCore OS contains both the non public firmware load -+ * logic and the VL805 firmware blob. This function triggers the aforementioned -+ * process. ++ * On the Raspberry Pi 4, after a PCI reset, VL805's (the xHCI chip) firmware ++ * may either be loaded directly from an EEPROM or, if not present, by the ++ * SoC's VideoCore. This informs VideoCore that VL805 needs its firmware ++ * loaded. + */ +int bcm2711_notify_vl805_reset(void) +{ @@ -190,42 +191,42 @@ index 94b75283f8..f8ef531652 100644 + return -EIO; + } + ++ udelay(200); ++ + return 0; +} + -From patchwork Tue May 5 16:26:07 2020 +From patchwork Fri Jun 12 16:46:30 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicolas Saenz Julienne -X-Patchwork-Id: 1283757 -X-Patchwork-Delegate: marek.vasut@gmail.com +X-Patchwork-Id: 1308409 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de - (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; + (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=suse.de -Received: from phobos.denx.de (phobos.denx.de - [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) +Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) - by ozlabs.org (Postfix) with ESMTPS id 49GlVQ0MyZz9sT0 - for ; Wed, 6 May 2020 02:26:52 +1000 (AEST) + by ozlabs.org (Postfix) with ESMTPS id 49k69h2xb7z9s1x + for ; Sat, 13 Jun 2020 02:48:24 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) - by phobos.denx.de (Postfix) with ESMTP id 40A20820AB; - Tue, 5 May 2020 18:26:27 +0200 (CEST) + by phobos.denx.de (Postfix) with ESMTP id 0365A81C78; + Fri, 12 Jun 2020 18:47:41 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=suse.de Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) - id A816381C4C; Tue, 5 May 2020 18:26:22 +0200 (CEST) + id 9031981CAF; Fri, 12 Jun 2020 18:47:32 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,RCVD_IN_MSPIKE_H3, @@ -234,26 +235,26 @@ X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,RCVD_IN_MSPIKE_H3, Received: from mx2.suse.de (mx2.suse.de [195.135.220.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) - by phobos.denx.de (Postfix) with ESMTPS id E5F898196A - for ; Tue, 5 May 2020 18:26:19 +0200 (CEST) + by phobos.denx.de (Postfix) with ESMTPS id 4162B81C80 + for ; Fri, 12 Jun 2020 18:47:24 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=suse.de Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=nsaenzjulienne@suse.de Received: from relay2.suse.de (unknown [195.135.220.254]) - by mx2.suse.de (Postfix) with ESMTP id EB82AAF5D; - Tue, 5 May 2020 16:26:21 +0000 (UTC) + by mx2.suse.de (Postfix) with ESMTP id 7CEA1AAD0; + Fri, 12 Jun 2020 16:47:27 +0000 (UTC) From: Nicolas Saenz Julienne To: mbrugger@suse.com, u-boot@lists.denx.de, bmeng.cn@gmail.com, marex@denx.de, linux-kernel@vger.kernel.org Cc: sjg@chromium.org, m.szyprowski@samsung.com, s.nawrocki@samsung.com, mark.kettenis@xs4all.nl, Nicolas Saenz Julienne -Subject: [PATCH v3 2/2] usb: xhci: Load Raspberry Pi 4 VL805's firmware -Date: Tue, 5 May 2020 18:26:07 +0200 -Message-Id: <20200505162607.334-3-nsaenzjulienne@suse.de> +Subject: [PATCH v4 2/5] reset: Add Raspberry Pi 4 firmware reset controller +Date: Fri, 12 Jun 2020 18:46:30 +0200 +Message-Id: <20200612164632.25648-3-nsaenzjulienne@suse.de> X-Mailer: git-send-email 2.26.2 -In-Reply-To: <20200505162607.334-1-nsaenzjulienne@suse.de> -References: <20200505162607.334-1-nsaenzjulienne@suse.de> +In-Reply-To: <20200612164632.25648-1-nsaenzjulienne@suse.de> +References: <20200612164632.25648-1-nsaenzjulienne@suse.de> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.30rc1 @@ -271,91 +272,475 @@ Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de X-Virus-Status: Clean -When needed, RPi4's co-processor (called VideoCore) has to be instructed -to load VL805's firmware (the chip providing xHCI support). VideCore's -firmware expects the board's PCIe bus to be already configured in order -for it to load the xHCI chip firmware. So we have to make sure this -happens in between the PCIe configuration and xHCI startup. - -Introduce a callback in xhci_pci_probe() to run this platform specific -routine. +Raspberry Pi 4's co-processor controls some of the board's HW +initialization process, but it's up to Linux to trigger it when +relevant. Introduce a reset controller capable of interfacing with +RPi4's co-processor that models these firmware initialization routines as +reset lines. Signed-off-by: Nicolas Saenz Julienne --- + drivers/reset/Kconfig | 10 ++++ + drivers/reset/Makefile | 1 + + drivers/reset/reset-raspberrypi.c | 60 +++++++++++++++++++ + .../reset/raspberrypi,firmware-reset.h | 13 ++++ + 4 files changed, 84 insertions(+) + create mode 100644 drivers/reset/reset-raspberrypi.c + create mode 100644 include/dt-bindings/reset/raspberrypi,firmware-reset.h -Changes since v2: - - Get rid of #ifdef CONFIG_BCM2711 - - Get rid of redundant error message - -Changes since v1: - - Create callback - - board/raspberrypi/rpi/rpi.c | 6 ++++++ - drivers/usb/host/xhci-pci.c | 6 ++++++ - include/usb/xhci.h | 3 +++ - 3 files changed, 15 insertions(+) - -diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c -index e367ba3092..dcaf45fbf2 100644 ---- a/board/raspberrypi/rpi/rpi.c -+++ b/board/raspberrypi/rpi/rpi.c -@@ -14,6 +14,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -494,3 +495,8 @@ int ft_board_setup(void *blob, bd_t *bd) +diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig +index 88d3be1593..d02c1522e5 100644 +--- a/drivers/reset/Kconfig ++++ b/drivers/reset/Kconfig +@@ -148,4 +148,14 @@ config RESET_IMX7 + help + Support for reset controller on i.MX7/8 SoCs. - return 0; - } ++config RESET_RASPBERRYPI ++ bool "Raspberry Pi 4 Firmware Reset Controller Driver" ++ depends on DM_RESET && ARCH_BCM283X ++ default USB_XHCI_PCI ++ help ++ Raspberry Pi 4's co-processor controls some of the board's HW ++ initialization process, but it's up to Linux to trigger it when ++ relevant. This driver provides a reset controller capable of ++ interfacing with RPi4's co-processor and model these firmware ++ initialization routines as reset lines. + endmenu +diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile +index 0a044d5d8c..be54dae725 100644 +--- a/drivers/reset/Makefile ++++ b/drivers/reset/Makefile +@@ -23,3 +23,4 @@ obj-$(CONFIG_RESET_MTMIPS) += reset-mtmips.o + obj-$(CONFIG_RESET_SUNXI) += reset-sunxi.o + obj-$(CONFIG_RESET_HISILICON) += reset-hisilicon.o + obj-$(CONFIG_RESET_IMX7) += reset-imx7.o ++obj-$(CONFIG_RESET_RASPBERRYPI) += reset-raspberrypi.o +diff --git a/drivers/reset/reset-raspberrypi.c b/drivers/reset/reset-raspberrypi.c +new file mode 100644 +index 0000000000..e2d284e5ac +--- /dev/null ++++ b/drivers/reset/reset-raspberrypi.c +@@ -0,0 +1,60 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Raspberry Pi 4 firmware reset driver ++ * ++ * Copyright (C) 2020 Nicolas Saenz Julienne ++ */ ++#include ++#include ++#include ++#include ++#include + -+void xhci_pci_fixup(struct udevice *dev) ++static int raspberrypi_reset_request(struct reset_ctl *reset_ctl) +{ -+ bcm2711_notify_vl805_reset(); ++ if (reset_ctl->id >= RASPBERRYPI_FIRMWARE_RESET_NUM_IDS) ++ return -EINVAL; ++ ++ return 0; +} ++ ++static int raspberrypi_reset_free(struct reset_ctl *reset_ctl) ++{ ++ return 0; ++} ++ ++static int raspberrypi_reset_assert(struct reset_ctl *reset_ctl) ++{ ++ switch (reset_ctl->id) { ++ case RASPBERRYPI_FIRMWARE_RESET_ID_USB: ++ bcm2711_notify_vl805_reset(); ++ return 0; ++ default: ++ return -EINVAL; ++ } ++} ++ ++static int raspberrypi_reset_deassert(struct reset_ctl *reset_ctl) ++{ ++ return 0; ++} ++ ++struct reset_ops raspberrypi_reset_ops = { ++ .request = raspberrypi_reset_request, ++ .rfree = raspberrypi_reset_free, ++ .rst_assert = raspberrypi_reset_assert, ++ .rst_deassert = raspberrypi_reset_deassert, ++}; ++ ++static const struct udevice_id raspberrypi_reset_ids[] = { ++ { .compatible = "raspberrypi,firmware-reset" }, ++ { } ++}; ++ ++U_BOOT_DRIVER(raspberrypi_reset) = { ++ .name = "raspberrypi-reset", ++ .id = UCLASS_RESET, ++ .of_match = raspberrypi_reset_ids, ++ .ops = &raspberrypi_reset_ops, ++}; ++ +diff --git a/include/dt-bindings/reset/raspberrypi,firmware-reset.h b/include/dt-bindings/reset/raspberrypi,firmware-reset.h +new file mode 100644 +index 0000000000..1a4f4c7927 +--- /dev/null ++++ b/include/dt-bindings/reset/raspberrypi,firmware-reset.h +@@ -0,0 +1,13 @@ ++/* SPDX-License-Identifier: GPL-2.0 */ ++/* ++ * Copyright (c) 2020 Nicolas Saenz Julienne ++ * Author: Nicolas Saenz Julienne ++ */ ++ ++#ifndef _DT_BINDINGS_RASPBERRYPI_FIRMWARE_RESET_H ++#define _DT_BINDINGS_RASPBERRYPI_FIRMWARE_RESET_H ++ ++#define RASPBERRYPI_FIRMWARE_RESET_ID_USB 0 ++#define RASPBERRYPI_FIRMWARE_RESET_NUM_IDS 1 ++ ++#endif + +From patchwork Fri Jun 12 16:46:32 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Nicolas Saenz Julienne +X-Patchwork-Id: 1308408 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; + spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de + (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; 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Fri, 12 Jun 2020 18:47:25 +0200 (CEST) +Authentication-Results: phobos.denx.de; + dmarc=none (p=none dis=none) header.from=suse.de +Authentication-Results: phobos.denx.de; + spf=pass smtp.mailfrom=nsaenzjulienne@suse.de +Received: from relay2.suse.de (unknown [195.135.220.254]) + by mx2.suse.de (Postfix) with ESMTP id 3C117ACCF; + Fri, 12 Jun 2020 16:47:29 +0000 (UTC) +From: Nicolas Saenz Julienne +To: mbrugger@suse.com, u-boot@lists.denx.de, bmeng.cn@gmail.com, marex@denx.de, + linux-kernel@vger.kernel.org +Cc: sjg@chromium.org, m.szyprowski@samsung.com, s.nawrocki@samsung.com, + mark.kettenis@xs4all.nl, Nicolas Saenz Julienne +Subject: [PATCH v4 4/5] dm: pci: Assign controller device node to root bridge +Date: Fri, 12 Jun 2020 18:46:32 +0200 +Message-Id: <20200612164632.25648-5-nsaenzjulienne@suse.de> +X-Mailer: git-send-email 2.26.2 +In-Reply-To: <20200612164632.25648-1-nsaenzjulienne@suse.de> +References: <20200612164632.25648-1-nsaenzjulienne@suse.de> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.30rc1 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de +X-Virus-Status: Clean + +There is no distinction in DT between the PCI controller device and the +root bridge, whereas such distinction exists from dm's perspective. Make +sure the root bridge ofnode is assigned to the controller's platform +device node. + +This permits setups like this to work correctly: + + pcie { + compatible = "..."; + ... + dev { + reg = <0 0 0 0 0>; + ... + }; + }; + +Without this the dev node is assigned to the root bridge and the +actual device search starts one level lower than expected. + +Signed-off-by: Nicolas Saenz Julienne +--- + drivers/pci/pci-uclass.c | 15 ++++++++++++++- + 1 file changed, 14 insertions(+), 1 deletion(-) + +diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c +index 9ab3539a49..ea27e78465 100644 +--- a/drivers/pci/pci-uclass.c ++++ b/drivers/pci/pci-uclass.c +@@ -762,7 +762,20 @@ static int pci_find_and_bind_driver(struct udevice *parent, + str = strdup(name); + if (!str) + return -ENOMEM; +- drv = bridge ? "pci_bridge_drv" : "pci_generic_drv"; ++ ++ if (bridge) { ++ drv = "pci_bridge_drv"; ++ ++ /* ++ * If we're dealing with the root bridge pass the parent device ++ * node, as there isn't a distinction in device tree between ++ * that and the actual controller platform device. ++ */ ++ if (!PCI_MASK_BUS(bdf)) ++ node = parent->node; ++ } else { ++ drv = "pci_generic_drv"; ++ } + + ret = device_bind_driver_to_node(parent, drv, str, node, devp); + if (ret) { + +From patchwork Fri Jun 12 16:46:33 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Nicolas Saenz Julienne +X-Patchwork-Id: 1308407 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; + spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de + (client-ip=85.214.62.61; helo=phobos.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; receiver=) +Authentication-Results: ozlabs.org; + dmarc=none (p=none dis=none) header.from=suse.de +Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) + (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) + key-exchange X25519 server-signature RSA-PSS (4096 bits)) + (No client certificate requested) + by ozlabs.org (Postfix) with ESMTPS id 49k69F21wdz9s1x + for ; Sat, 13 Jun 2020 02:48:01 +1000 (AEST) +Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) + by phobos.denx.de (Postfix) with ESMTP id 3049C81CF2; + Fri, 12 Jun 2020 18:47:37 +0200 (CEST) +Authentication-Results: phobos.denx.de; + dmarc=none (p=none dis=none) header.from=suse.de +Authentication-Results: phobos.denx.de; + spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de +Received: by phobos.denx.de (Postfix, from userid 109) + id 0EDC381CF5; Fri, 12 Jun 2020 18:47:31 +0200 (CEST) +X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de +X-Spam-Level: +X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,RCVD_IN_MSPIKE_H3, + RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,URIBL_BLOCKED autolearn=ham + autolearn_force=no version=3.4.2 +Received: from mx2.suse.de (mx2.suse.de [195.135.220.15]) + (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) + (No client certificate requested) + by phobos.denx.de (Postfix) with ESMTPS id 946DD81CCF + for ; Fri, 12 Jun 2020 18:47:26 +0200 (CEST) +Authentication-Results: phobos.denx.de; + dmarc=none (p=none dis=none) header.from=suse.de +Authentication-Results: phobos.denx.de; + spf=pass smtp.mailfrom=nsaenzjulienne@suse.de +Received: from relay2.suse.de (unknown [195.135.220.254]) + by mx2.suse.de (Postfix) with ESMTP id E69F8ACDB; + Fri, 12 Jun 2020 16:47:29 +0000 (UTC) +From: Nicolas Saenz Julienne +To: mbrugger@suse.com, u-boot@lists.denx.de, bmeng.cn@gmail.com, marex@denx.de, + linux-kernel@vger.kernel.org +Cc: sjg@chromium.org, m.szyprowski@samsung.com, s.nawrocki@samsung.com, + mark.kettenis@xs4all.nl, Nicolas Saenz Julienne +Subject: [PATCH v4 5/5] usb: xhci-pci: Add reset controller support +Date: Fri, 12 Jun 2020 18:46:33 +0200 +Message-Id: <20200612164632.25648-6-nsaenzjulienne@suse.de> +X-Mailer: git-send-email 2.26.2 +In-Reply-To: <20200612164632.25648-1-nsaenzjulienne@suse.de> +References: <20200612164632.25648-1-nsaenzjulienne@suse.de> +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.30rc1 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de +X-Virus-Status: Clean + +Some atypical users of xhci-pci might need to manually reset their xHCI +controller before starting the HCD setup. Check if a reset controller +device is available to the PCI bus and trigger a reset. + +Signed-off-by: Nicolas Saenz Julienne +--- + drivers/usb/host/xhci-pci.c | 38 +++++++++++++++++++++++++++++++++++-- + 1 file changed, 36 insertions(+), 2 deletions(-) + diff --git a/drivers/usb/host/xhci-pci.c b/drivers/usb/host/xhci-pci.c -index c1f60da541..1285dde1ef 100644 +index 9fb6d2f763..710524fbb1 100644 --- a/drivers/usb/host/xhci-pci.c +++ b/drivers/usb/host/xhci-pci.c -@@ -11,6 +11,10 @@ +@@ -10,9 +10,14 @@ + #include + #include + #include ++#include #include #include -+__weak void xhci_pci_fixup(struct udevice *dev) -+{ -+} ++struct xhci_pci_platdata { ++ struct reset_ctl reset; ++}; + static void xhci_pci_init(struct udevice *dev, struct xhci_hccr **ret_hccr, struct xhci_hcor **ret_hcor) { -@@ -40,6 +44,8 @@ static int xhci_pci_probe(struct udevice *dev) +@@ -39,14 +44,43 @@ static void xhci_pci_init(struct udevice *dev, struct xhci_hccr **ret_hccr, + + static int xhci_pci_probe(struct udevice *dev) + { ++ struct xhci_pci_platdata *plat = dev_get_platdata(dev); struct xhci_hccr *hccr; struct xhci_hcor *hcor; - -+ xhci_pci_fixup(dev); ++ int ret; + ++ ret = reset_get_by_index(dev, 0, &plat->reset); ++ if (ret && ret != -ENOENT) { ++ dev_err(dev, "failed to get reset\n"); ++ return ret; ++ } ++ ++ if (reset_valid(&plat->reset)) { ++ ret = reset_assert(&plat->reset); ++ if (ret) ++ return ret; ++ ++ ret = reset_deassert(&plat->reset); ++ if (ret) ++ return ret; ++ } + xhci_pci_init(dev, &hccr, &hcor); return xhci_register(dev, hccr, hcor); -diff --git a/include/usb/xhci.h b/include/usb/xhci.h -index c16106a2fc..57feed7603 100644 ---- a/include/usb/xhci.h -+++ b/include/usb/xhci.h -@@ -16,6 +16,7 @@ - #ifndef HOST_XHCI_H_ - #define HOST_XHCI_H_ + } -+#include - #include - #include - #include -@@ -1281,4 +1282,6 @@ extern struct dm_usb_ops xhci_usb_ops; - - struct xhci_ctrl *xhci_get_ctrl(struct usb_device *udev); - -+extern void xhci_pci_fixup(struct udevice *dev); ++static int xhci_pci_remove(struct udevice *dev) ++{ ++ struct xhci_pci_platdata *plat = dev_get_platdata(dev); + - #endif /* HOST_XHCI_H_ */ ++ xhci_deregister(dev); ++ if (reset_valid(&plat->reset)) ++ reset_free(&plat->reset); ++ ++ return 0; ++} ++ + static const struct udevice_id xhci_pci_ids[] = { + { .compatible = "xhci-pci" }, + { } +@@ -56,10 +90,10 @@ U_BOOT_DRIVER(xhci_pci) = { + .name = "xhci_pci", + .id = UCLASS_USB, + .probe = xhci_pci_probe, +- .remove = xhci_deregister, ++ .remove = xhci_pci_remove, + .of_match = xhci_pci_ids, + .ops = &xhci_usb_ops, +- .platdata_auto_alloc_size = sizeof(struct usb_platdata), ++ .platdata_auto_alloc_size = sizeof(struct xhci_pci_platdata), + .priv_auto_alloc_size = sizeof(struct xhci_ctrl), + .flags = DM_FLAG_ALLOC_PRIV_DMA, + }; +From f9dfaab9a697f7e1c6456bf7e05eaba39394688c Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Thu, 18 Jun 2020 14:24:13 +0100 +Subject: [PATCH] configs: Enable support for reset controllers on RPi4 + +This is required in order to access the reset controller used to +initialize the board's xHCI chip. + +Signed-off-by: Nicolas Saenz Julienne +Signed-off-by: Peter Robinson +--- + configs/rpi_4_32b_defconfig | 1 + + configs/rpi_4_defconfig | 1 + + configs/rpi_arm64_defconfig | 1 + + 3 files changed, 3 insertions(+) + +diff --git a/configs/rpi_4_32b_defconfig b/configs/rpi_4_32b_defconfig +index a36a249540..0df5c17d6e 100644 +--- a/configs/rpi_4_32b_defconfig ++++ b/configs/rpi_4_32b_defconfig +@@ -28,6 +28,7 @@ CONFIG_DM_ETH=y + CONFIG_BCMGENET=y + CONFIG_PINCTRL=y + # CONFIG_PINCTRL_GENERIC is not set ++CONFIG_DM_RESET=y + # CONFIG_REQUIRE_SERIAL_CONSOLE is not set + CONFIG_USB=y + CONFIG_DM_USB=y +diff --git a/configs/rpi_4_defconfig b/configs/rpi_4_defconfig +index f0301dc8bc..7034eb439b 100644 +--- a/configs/rpi_4_defconfig ++++ b/configs/rpi_4_defconfig +@@ -28,6 +28,7 @@ CONFIG_DM_ETH=y + CONFIG_BCMGENET=y + CONFIG_PINCTRL=y + # CONFIG_PINCTRL_GENERIC is not set ++CONFIG_DM_RESET=y + # CONFIG_REQUIRE_SERIAL_CONSOLE is not set + CONFIG_USB=y + CONFIG_DM_USB=y +diff --git a/configs/rpi_arm64_defconfig b/configs/rpi_arm64_defconfig +index d16c2388af..3663a17048 100644 +--- a/configs/rpi_arm64_defconfig ++++ b/configs/rpi_arm64_defconfig +@@ -28,6 +28,7 @@ CONFIG_DM_ETH=y + CONFIG_BCMGENET=y + CONFIG_PINCTRL=y + # CONFIG_PINCTRL_GENERIC is not set ++CONFIG_DM_RESET=y + # CONFIG_REQUIRE_SERIAL_CONSOLE is not set + CONFIG_USB=y + CONFIG_DM_USB=y +-- +2.26.2 +