Match CONFIG_NR_CPUS to Linux configuration (32)
Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
This commit is contained in:
parent
ec8b6389cf
commit
964c83d011
|
@ -0,0 +1,18 @@
|
|||
diff --git a/configs/qemu-riscv64_smode_defconfig b/configs/qemu-riscv64_smode_defconfig
|
||||
index 42ec49eb..e9b025a2 100644
|
||||
--- a/configs/qemu-riscv64_smode_defconfig
|
||||
+++ b/configs/qemu-riscv64_smode_defconfig
|
||||
@@ -17,3 +17,4 @@ CONFIG_USE_BOOTARGS=y
|
||||
CONFIG_BOOTARGS="console=ttyS0 earlycon"
|
||||
CONFIG_USE_PREBOOT=y
|
||||
CONFIG_PREBOOT="cp.l ${fdtcontroladdr} ${fdt_addr_r} 0x10000;"
|
||||
+CONFIG_NR_CPUS=32
|
||||
diff --git a/configs/sifive_fu540_defconfig b/configs/sifive_fu540_defconfig
|
||||
index dff48057..cf506dcf 100644
|
||||
--- a/configs/sifive_fu540_defconfig
|
||||
+++ b/configs/sifive_fu540_defconfig
|
||||
@@ -13,3 +13,4 @@ CONFIG_OF_PRIOR_STAGE=y
|
||||
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
|
||||
CONFIG_USE_BOOTARGS=y
|
||||
CONFIG_BOOTARGS="console=ttySIF0 earlycon"
|
||||
+CONFIG_NR_CPUS=32
|
|
@ -2,7 +2,7 @@
|
|||
|
||||
Name: uboot-tools
|
||||
Version: 2020.01
|
||||
Release: 0.6%{?candidate:.%{candidate}}.0.riscv64%{?dist}
|
||||
Release: 0.6%{?candidate:.%{candidate}}.1.riscv64%{?dist}
|
||||
Summary: U-Boot utilities
|
||||
License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+
|
||||
URL: http://www.denx.de/wiki/U-Boot
|
||||
|
@ -70,6 +70,9 @@ Patch26: uboot-riscv-def-kernel_comp_addr_r.patch
|
|||
# See: https://patchwork.ozlabs.org/patch/1196837/
|
||||
Patch27: dm-serial-handle-stdout-path-with-options-correctly.patch
|
||||
|
||||
# Match CPU number with what in Linux config
|
||||
Patch28: riscv-nr-cpus-32.patch
|
||||
|
||||
BuildRequires: bc
|
||||
BuildRequires: dtc
|
||||
BuildRequires: make
|
||||
|
@ -320,6 +323,9 @@ cp -p board/warp7/README builds/docs/README.warp7
|
|||
%endif
|
||||
|
||||
%changelog
|
||||
* Thu Dec 5 2019 David Abdurachmanov <david.abdurachmanov@sifive.com> 2020.01-0.6-rc4.1.riscv64
|
||||
- Match CONFIG_NR_CPUS to Linux configuration (32)
|
||||
|
||||
* Thu Dec 5 2019 David Abdurachmanov <david.abdurachmanov@sifive.com> 2020.01-0.6-rc4.0.riscv64
|
||||
- Add support for RISC-V (riscv64)
|
||||
- Define filesize and kernel_comp_addr_r for QEMU virt and SiFive FU540 boards
|
||||
|
|
Loading…
Reference in New Issue