diff --git a/arm-boards b/arm-boards index 61f92b6..19326dc 100644 --- a/arm-boards +++ b/arm-boards @@ -17,10 +17,10 @@ ba10_tv_box Bananapi bananapi_m1_plus bananapi_m2_berry -bananapi_m2_plus_h3 -bananapi_m2_zero -Bananapi_M2_Ultra Bananapi_m2m +bananapi_m2_plus_h3 +Bananapi_M2_Ultra +bananapi_m2_zero Bananapro chiliboard CHIP diff --git a/bcm283x-dts-Rename-U-Boot-file.patch b/bcm283x-dts-Rename-U-Boot-file.patch new file mode 100644 index 0000000..af64742 --- /dev/null +++ b/bcm283x-dts-Rename-U-Boot-file.patch @@ -0,0 +1,29 @@ +From 5051377a0b2bec1605ce97170585d693a98ec34a Mon Sep 17 00:00:00 2001 +From: Matthias Brugger +Date: Fri, 8 Nov 2019 14:49:47 +0100 +Subject: [PATCH] arm: dts: bcm283x: Rename U-Boot file + +Rename the file bcm283x-uboot.dtsi so that it get +automatically include through the scripts/Makefile.lib +using $(CONFIG_SYS_SOC))-u-boot.dtsi + +Without this uarts and pincontroller miss the property dm-pre-reloc +and the first call to bcm283x_mu_serial_ofdata_to_platdata() fails +as the pins are not set correctly. +As a result the U-Boot banner isn't shown on boot. + +Before commmit +143256b353 ("fdt: update bcm283x device tree sources to Linux 5.1-rc6 state") +we included bcm283x-uboot.dtsi directly in the device-tree file. +Which got deleted by the metioned commit. +This is a much robuster solution. + +Reported-by: Tom Rini +Reported-by: Heinrich Schuchardt +Tested-by: Tom Rini [RPi 3, 32b and 64b modes] +Signed-off-by: Matthias Brugger + +diff --git a/arch/arm/dts/bcm283x-uboot.dtsi b/arch/arm/dts/bcm283x-u-boot.dtsi +similarity index 100% +rename from arch/arm/dts/bcm283x-uboot.dtsi +rename to arch/arm/dts/bcm283x-u-boot.dtsi diff --git a/uboot-tools.spec b/uboot-tools.spec index 3289a62..7de27bb 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -2,7 +2,7 @@ Name: uboot-tools Version: 2020.01 -Release: 0.5%{?candidate:.%{candidate}}%{?dist} +Release: 0.6%{?candidate:.%{candidate}}%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -27,6 +27,9 @@ Patch6: dragonboard-fixes.patch Patch7: ARM-tegra-Add-NVIDIA-Jetson-Nano.patch Patch8: arm-tegra-defaine-fdtfile-for-all-devices.patch Patch9: tools-fix-version.h.patch +Patch10: zynqmp-Add-support-for-u-boot.itb-generation-with-ATF.patch +Patch11: zynqmp-Do-not-assing-MIO34-that-early-on-zcu100.patch +Patch12: bcm283x-dts-Rename-U-Boot-file.patch BuildRequires: bc BuildRequires: dtc @@ -118,12 +121,12 @@ do echo "Board: $board using sun50i_h6" cp /usr/share/arm-trusted-firmware/sun50i_h6/* builds/$(echo $board)/ fi - rk3328=(rock64-rk3328) + rk3328=(evb-rk3328 rock64-rk3328) if [[ " ${rk3328[*]} " == *" $board "* ]]; then echo "Board: $board using rk3328" cp /usr/share/arm-trusted-firmware/rk3328/* builds/$(echo $board)/ fi - rk3399=(evb-rk3399 ficus-rk3399 firefly-rk3399 nanopc-t4-rk3399 nanopi-m4-rk3399 nanopi-neo4-rk3399 orangepi-rk3399 orangepi-rk3399 puma-rk3399 rock960-rk3399 rock-pi-4-rk3399 rockpro64-rk3399) + rk3399=(evb-rk3399 ficus-rk3399 firefly-rk3399 nanopc-t4-rk3399 nanopi-m4-rk3399 nanopi-neo4-rk3399 orangepi-rk3399 puma-rk3399 rock960-rk3399 rock-pi-4-rk3399 rockpro64-rk3399 roc-pc-rk3399) if [[ " ${rk3399[*]} " == *" $board "* ]]; then echo "Board: $board using rk3399" cp /usr/share/arm-trusted-firmware/rk3399/* builds/$(echo $board)/ @@ -132,10 +135,10 @@ do make $(echo $board)_defconfig O=builds/$(echo $board)/ make HOSTCC="gcc $RPM_OPT_FLAGS" CROSS_COMPILE="" %{?_smp_mflags} V=1 O=builds/$(echo $board)/ if [[ " ${rk3328[*]} " == *" $board "* ]]; then - make HOSTCC="gcc $RPM_OPT_FLAGS" CROSS_COMPILE="" %{?_smp_mflags} u-boot.itb V=1 O=builds/$(echo $board)/ + builds/$(echo $board)/tools/mkimage -n rk3328 -T rksd -d builds/$(echo $board)/spl/u-boot-spl.bin builds/$(echo $board)/spl_sd.img + builds/$(echo $board)/tools/mkimage -n rk3328 -T rkspi -d builds/$(echo $board)/spl/u-boot-spl.bin builds/$(echo $board)/spl_spi.img fi if [[ " ${rk3399[*]} " == *" $board "* ]]; then - echo "Board: $board using rk3399" builds/$(echo $board)/tools/mkimage -n rk3399 -T rksd -d builds/$(echo $board)/spl/u-boot-spl.bin builds/$(echo $board)/spl_sd.img builds/$(echo $board)/tools/mkimage -n rk3399 -T rkspi -d builds/$(echo $board)/spl/u-boot-spl.bin builds/$(echo $board)/spl_spi.img fi @@ -156,7 +159,7 @@ mkdir -p $RPM_BUILD_ROOT%{_datadir}/uboot/ for board in $(cat %{_arch}-boards) do mkdir -p $RPM_BUILD_ROOT%{_datadir}/uboot/$(echo $board)/ - for file in spl/arndale-spl.bin u-boot.bin u-boot.dtb u-boot.img u-boot.imx u-boot-sunxi-with-spl.bin spl_sd.img spl_spi.img idbloader.img spl/boot.bin + for file in u-boot.bin u-boot.dtb u-boot.img u-boot-dtb.img u-boot.itb u-boot-sunxi-with-spl.bin spl_sd.img spl_spi.img idbloader.img spl/boot.bin spl/arndale-spl.bin spl/sunxi-spl.bin do if [ -f builds/$(echo $board)/$(echo $file) ]; then install -p -m 0644 builds/$(echo $board)/$(echo $file) $RPM_BUILD_ROOT%{_datadir}/uboot/$(echo $board)/ @@ -250,6 +253,9 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog +* Tue Dec 3 2019 Peter Robinson 2020.01-0.6-rc4 +- Fixes for AllWinner, Raspberry Pi, Rockchip, Xilinx ZynqMP + * Tue Dec 3 2019 Peter Robinson 2020.01-0.5-rc4 - 2020.01 RC4 diff --git a/zynqmp-Add-support-for-u-boot.itb-generation-with-ATF.patch b/zynqmp-Add-support-for-u-boot.itb-generation-with-ATF.patch new file mode 100644 index 0000000..72213b7 --- /dev/null +++ b/zynqmp-Add-support-for-u-boot.itb-generation-with-ATF.patch @@ -0,0 +1,278 @@ +From patchwork Tue Dec 3 13:34:58 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Michal Simek +X-Patchwork-Id: 1203703 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) + smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; + helo=phobos.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; + receiver=) +Authentication-Results: ozlabs.org; + dmarc=none (p=none dis=none) header.from=xilinx.com +Authentication-Results: ozlabs.org; + dkim=fail reason="signature verification failed" (2048-bit key; + unprotected) header.d=monstr-eu.20150623.gappssmtp.com + header.i=@monstr-eu.20150623.gappssmtp.com + header.b="jRbgIEeD"; dkim-atps=neutral +Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) + (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) + key-exchange X25519 server-signature RSA-PSS (4096 bits)) + (No client certificate requested) + by ozlabs.org (Postfix) with ESMTPS id 47S3BR4jKtz9sR7 + for ; + Wed, 4 Dec 2019 00:44:47 +1100 (AEDT) +Received: by phobos.denx.de (Postfix, from userid 109) + id CC7BF81624; Tue, 3 Dec 2019 14:44:44 +0100 (CET) +X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on mail.denx.de +X-Spam-Level: +X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIM_INVALID,DKIM_SIGNED, + MAILING_LIST_MULTI,RCVD_IN_MSPIKE_H2,SPF_HELO_NONE,SPF_PASS, + URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.2 +Received: from phobos.denx.de (localhost [IPv6:::1]) + by phobos.denx.de (Postfix) with ESMTP id B50BD80901; + Tue, 3 Dec 2019 14:44:12 +0100 (CET) +Authentication-Results: mail.denx.de; + dmarc=none (p=none dis=none) header.from=xilinx.com +Authentication-Results: mail.denx.de; + spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de +Authentication-Results: mail.denx.de; + dkim=fail reason="signature verification failed" (2048-bit key; + unprotected) header.d=monstr-eu.20150623.gappssmtp.com + header.i=@monstr-eu.20150623.gappssmtp.com + header.b="jRbgIEeD"; dkim-atps=neutral +Received: by phobos.denx.de (Postfix, from userid 109) + id C809980901; Tue, 3 Dec 2019 14:44:09 +0100 (CET) +Received: from mail-wr1-f68.google.com (mail-wr1-f68.google.com + [209.85.221.68]) + (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) + (No client certificate requested) + by phobos.denx.de (Postfix) with ESMTPS id 32C4081828 + for ; Tue, 3 Dec 2019 14:35:05 +0100 (CET) +Authentication-Results: mail.denx.de; + dmarc=none (p=none dis=none) header.from=xilinx.com +Authentication-Results: mail.denx.de; spf=none smtp.mailfrom=monstr@monstr.eu +Received: by mail-wr1-f68.google.com with SMTP id c14so3678946wrn.7 + for ; Tue, 03 Dec 2019 05:35:05 -0800 (PST) +DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; + d=monstr-eu.20150623.gappssmtp.com; s=20150623; + h=sender:from:to:cc:subject:date:message-id:mime-version + :content-transfer-encoding; + bh=Cm6gQWLkk/+5jek3dvRRAOkfCxAi+n+YRN+ZTQR2FHo=; + b=jRbgIEeDUORknOe9qVPm4LptQigs2tytbss1dEwuK+OXROAETXd9oUKQ4lUG+1iOvX + Tid7F+uJZ3urEn2pwCtU89SWYZAYA5XdKZgrQfk6Fs8jgoojVbHdWLCdLFDi8N6WE0TB + TefM3xfA7QwJeV9QQEJS+IqDNItUcrFBKzw09ABBVRqXsUHB2luZuaw1w72PXdcCP65o + TWHYXVjIo5BGAn4XTNDuK9LyLaSVCld5zRHZvAYfDDGReHAtXGfkpcIohgmicVPjoDZd + qpUbc+6jK7aFnXNzxxJ1eqpjvnmX+7md9aS+e96pdPJ+Q3yRKgeSXcLbiIYBhBPEuu7S + nuDg== +X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; + d=1e100.net; s=20161025; + h=x-gm-message-state:sender:from:to:cc:subject:date:message-id + :mime-version:content-transfer-encoding; + bh=Cm6gQWLkk/+5jek3dvRRAOkfCxAi+n+YRN+ZTQR2FHo=; + b=XXEYwNGUqeSbWgn8YgWbka943yZCnj3ZkdNK846QU3Ft8AplFDniryxOkYlyLB91kY + +Mn5z0e4xWL1MEaZT+2EQh53CApzWORoYeYryGsaql+hDD5zlQdm/0UkJSoLZ99slhrS + FNcNW40dU4iLXvCx7f8+/YDcF+7sYS4X1zxVxef0Sh1qPyB6ykXzbHgspO+uyBxRCZOJ + 2Xa08s7ry6p0N8mwBsUwRxaCc23wAa4L8HhdenIAw9wY7nnkhO7pW+byLeQ+NCJ4UfSH + 7pkxVk21TXyy0TC/J4TdNKHS8Gc6/8i2ajCsvCoMZ1mqt/5ZVqLUWZMfhj6Jurh42gPq + dtgQ== +X-Gm-Message-State: APjAAAU6J4Y0f3lLB9Z6GsZEAlImhG85wi6UhlX3hg1mTxyh6DyjAcvR + pI0Js+5A+34PRuDW/kk+TVvWWBu1Z04p1w== +X-Google-Smtp-Source: APXvYqxP0G+EP2youCblhWcjCu3FQ03Ed7G6Tlo0+mBMiEFAJvA1rgNQFC5gVk3s6GNdnRX3YIX1kw== +X-Received: by 2002:adf:fe12:: with SMTP id n18mr5128119wrr.158.1575380104990; + Tue, 03 Dec 2019 05:35:04 -0800 (PST) +Received: from localhost (nat-35.starnet.cz. [178.255.168.35]) + by smtp.gmail.com with ESMTPSA id + 72sm3710284wrl.73.2019.12.03.05.35.03 + (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); + Tue, 03 Dec 2019 05:35:04 -0800 (PST) +From: Michal Simek +To: u-boot@lists.denx.de, + git@xilinx.com, + pbrobinson@gmail.com +Subject: [PATCH] arm64: zynqmp: Add support for u-boot.itb generation with ATF. +Date: Tue, 3 Dec 2019 14:34:58 +0100 +Message-Id: <5568e78d8e06c2ce6a86c88ee42509a0c80fc4ef.1575380094.git.michal.simek@xilinx.com> +X-Mailer: git-send-email 2.24.0 +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.26 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Cc: Marek Vasut , Stefan Roese , + Chris Packham +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.101.4 at mail.denx.de +X-Virus-Status: Clean + +Follow i.MX, Sunxi, RISC-V and Rockchip to generate u-boot.itb which +includes U-Boot proper, ATF and DTBs in FIT format. ZynqMP supports FIT for +quite a long time but with using out of tree solution. The patch is filling +this gap. + +Tested on zcu102, zcu104 and zcu100/Ultra96. + +Signed-off-by: Michal Simek +--- + + Kconfig | 3 +- + arch/arm/mach-zynqmp/mkimage_fit_atf.sh | 99 +++++++++++++++++++++++++ + include/configs/xilinx_zynqmp.h | 6 +- + 3 files changed, 106 insertions(+), 2 deletions(-) + create mode 100755 arch/arm/mach-zynqmp/mkimage_fit_atf.sh + +diff --git a/Kconfig b/Kconfig +index e22417ec4471..7efafffec0a4 100644 +--- a/Kconfig ++++ b/Kconfig +@@ -253,7 +253,7 @@ config BUILD_TARGET + default "u-boot-spl.kwb" if ARCH_MVEBU && SPL + default "u-boot-elf.srec" if RCAR_GEN3 + default "u-boot.itb" if SPL_LOAD_FIT && (ARCH_ROCKCHIP || \ +- ARCH_SUNXI || RISCV) ++ ARCH_SUNXI || RISCV || ARCH_ZYNQMP) + default "u-boot.kwb" if KIRKWOOD + default "u-boot-with-spl.bin" if ARCH_AT91 && SPL_NAND_SUPPORT + default "u-boot-with-spl.imx" if ARCH_MX6 && SPL +@@ -481,6 +481,7 @@ config SPL_FIT_GENERATOR + depends on SPL_FIT + default "board/sunxi/mksunxi_fit_atf.sh" if SPL_LOAD_FIT && ARCH_SUNXI + default "arch/arm/mach-rockchip/make_fit_atf.py" if SPL_LOAD_FIT && ARCH_ROCKCHIP ++ default "arch/arm/mach-zynqmp/mkimage_fit_atf.sh" if SPL_LOAD_FIT && ARCH_ZYNQMP + default "arch/riscv/lib/mkimage_fit_opensbi.sh" if SPL_LOAD_FIT && RISCV + help + Specifies a (platform specific) script file to generate the FIT +diff --git a/arch/arm/mach-zynqmp/mkimage_fit_atf.sh b/arch/arm/mach-zynqmp/mkimage_fit_atf.sh +new file mode 100755 +index 000000000000..1a4f396d1c3a +--- /dev/null ++++ b/arch/arm/mach-zynqmp/mkimage_fit_atf.sh +@@ -0,0 +1,99 @@ ++#!/bin/sh ++# SPDX-License-Identifier: GPL-2.0+ ++# ++# script to generate FIT image source for Xilinx ZynqMP boards with ++# ARM Trusted Firmware and multiple device trees (given on the command line) ++# ++# usage: $0 [ [&2 ++else ++ echo "$BL31 size: " >&2 ++ ls -lct $BL31 | awk '{print $5}' >&2 ++fi ++ ++ ++ ++cat << __HEADER_EOF ++/dts-v1/; ++ ++/ { ++ description = "Configuration to load ATF before U-Boot"; ++ ++ images { ++ uboot { ++ description = "U-Boot (64-bit)"; ++ data = /incbin/("$BL33"); ++ type = "firmware"; ++ os = "u-boot"; ++ arch = "arm64"; ++ compression = "none"; ++ load = <$BL33_LOAD_ADDR>; ++ hash { ++ algo = "md5"; ++ }; ++ }; ++ atf { ++ description = "ARM Trusted Firmware"; ++ data = /incbin/("$BL31"); ++ type = "firmware"; ++ os = "arm-trusted-firmware"; ++ arch = "arm64"; ++ compression = "none"; ++ load = <$ATF_LOAD_ADDR>; ++ entry = <$ATF_LOAD_ADDR>; ++ hash { ++ algo = "md5"; ++ }; ++ }; ++__HEADER_EOF ++ ++cnt=1 ++for dtname in $* ++do ++ cat << __FDT_IMAGE_EOF ++ fdt_$cnt { ++ description = "$(basename $dtname .dtb)"; ++ data = /incbin/("$dtname"); ++ type = "flat_dt"; ++ arch = "arm64"; ++ compression = "none"; ++ hash { ++ algo = "md5"; ++ }; ++ }; ++__FDT_IMAGE_EOF ++cnt=$((cnt+1)) ++done ++ ++cat << __CONF_HEADER_EOF ++ }; ++ configurations { ++ default = "config_1"; ++ ++__CONF_HEADER_EOF ++ ++cnt=1 ++for dtname in $* ++do ++cat << __CONF_SECTION1_EOF ++ config_$cnt { ++ description = "$(basename $dtname .dtb)"; ++ firmware = "uboot"; ++ loadables = "atf"; ++ fdt = "fdt_$cnt"; ++ }; ++__CONF_SECTION1_EOF ++cnt=$((cnt+1)) ++done ++ ++cat << __ITS_EOF ++ }; ++}; ++__ITS_EOF +diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h +index ee1ceebf1291..e7eb8dbfcb45 100644 +--- a/include/configs/xilinx_zynqmp.h ++++ b/include/configs/xilinx_zynqmp.h +@@ -243,7 +243,11 @@ + # define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0 /* unused */ + # define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0 /* unused */ + # define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0 /* unused */ +-# define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" ++# if defined(CONFIG_SPL_LOAD_FIT) ++# define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.itb" ++# else ++# define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" ++# endif + #endif + + #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_DFU) diff --git a/zynqmp-Do-not-assing-MIO34-that-early-on-zcu100.patch b/zynqmp-Do-not-assing-MIO34-that-early-on-zcu100.patch new file mode 100644 index 0000000..83cc155 --- /dev/null +++ b/zynqmp-Do-not-assing-MIO34-that-early-on-zcu100.patch @@ -0,0 +1,199 @@ +From patchwork Tue Dec 3 15:33:26 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Michal Simek +X-Patchwork-Id: 1203761 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) + smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; + helo=phobos.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; + receiver=) +Authentication-Results: ozlabs.org; + dmarc=none (p=none dis=none) header.from=xilinx.com +Authentication-Results: ozlabs.org; + dkim=fail reason="signature verification failed" (2048-bit key; + unprotected) header.d=monstr-eu.20150623.gappssmtp.com + header.i=@monstr-eu.20150623.gappssmtp.com + header.b="xsfGCcKd"; dkim-atps=neutral +Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) + (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) + key-exchange X25519 server-signature RSA-PSS (4096 bits)) + (No client certificate requested) + by ozlabs.org (Postfix) with ESMTPS id 47S60l4q2Xz9sP6 + for ; + Wed, 4 Dec 2019 02:51:35 +1100 (AEDT) +Received: by phobos.denx.de (Postfix, from userid 109) + id 918E181706; Tue, 3 Dec 2019 16:51:32 +0100 (CET) +X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on mail.denx.de +X-Spam-Level: +X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIM_INVALID,DKIM_SIGNED, + MAILING_LIST_MULTI,RCVD_IN_MSPIKE_H2,SPF_HELO_NONE,SPF_PASS, + URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.2 +Received: from phobos.denx.de (localhost [IPv6:::1]) + by phobos.denx.de (Postfix) with ESMTP id CFCEB81715; + Tue, 3 Dec 2019 16:34:34 +0100 (CET) +Authentication-Results: mail.denx.de; + dmarc=none (p=none dis=none) header.from=xilinx.com +Authentication-Results: mail.denx.de; + spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de +Authentication-Results: mail.denx.de; + dkim=fail reason="signature verification failed" (2048-bit key; + unprotected) header.d=monstr-eu.20150623.gappssmtp.com + header.i=@monstr-eu.20150623.gappssmtp.com + header.b="xsfGCcKd"; dkim-atps=neutral +Received: by phobos.denx.de (Postfix, from userid 109) + id 71E9081740; Tue, 3 Dec 2019 16:34:33 +0100 (CET) +Received: from mail-wr1-f68.google.com (mail-wr1-f68.google.com + [209.85.221.68]) + (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) + (No client certificate requested) + by phobos.denx.de (Postfix) with ESMTPS id 3B4538173D + for ; Tue, 3 Dec 2019 16:33:29 +0100 (CET) +Authentication-Results: mail.denx.de; + dmarc=none (p=none dis=none) header.from=xilinx.com +Authentication-Results: mail.denx.de; spf=none smtp.mailfrom=monstr@monstr.eu +Received: by mail-wr1-f68.google.com with SMTP id y11so4206551wrt.6 + for ; Tue, 03 Dec 2019 07:33:29 -0800 (PST) +DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; + d=monstr-eu.20150623.gappssmtp.com; s=20150623; + h=sender:from:to:subject:date:message-id:mime-version + :content-transfer-encoding; + bh=FY3wavUSlq3LqJpduWDlDfRQ23fa0sS7k2hYmp1W4v4=; + b=xsfGCcKdlKNSq7/5D1KjuXn2SIyh08im6EI3N/tLYCXIe2AMeGGcrFJgXbwKrFcmW5 + cJ3I6vxbLI6lLb9+Y1Qn3I86If7jjs3FMfcwupdbEevBO178wLgaSTVGTkJZx6nLP38s + vyzBYOZ7rDRdARwPKqUaEjNBnjXj6cLSF6vSlcOYsClRq5AOQjtmMjCg5Spnh3vL6C6S + Uw7A4ec8egIepK0I8wWcVKDCrz7BzKzPkMkA8TwrM9MyudwHdyLkSOv/K1drj9r7Bxle + ++0OBo+6nbg4VSJrS3J1BOqSVTru8AQmqlEklfil0A8vfrKUF9BAV0z6yrU6oDOvxmb7 + oBGQ== +X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; + d=1e100.net; s=20161025; + h=x-gm-message-state:sender:from:to:subject:date:message-id + :mime-version:content-transfer-encoding; + bh=FY3wavUSlq3LqJpduWDlDfRQ23fa0sS7k2hYmp1W4v4=; + b=HFOn3PHDfuhrO27I3b9eZtbbFdyMus2JuR88KxfnfeovLmu3VzD2GO2k1v0bbfJrFJ + 3FUyyRMSjuTa8/xEaL/XB7Abmtw35VxtO9rcxq4Xbb5d8zi8tQVrpX63zzQZE1+hGfp1 + Zc0EL6lV2d1U2XkHCiPrSDySeUrfGohM7pNRrdLk0x5+dlsHuaX5r2PGWfnzkIsT9xhj + +hPttUIHpgVXxS6xId42gcSLku1BHdCebYIs8ro3A4Ewu2xCdqyjLBctfWKtCcyvt3AY + 1a/nuS9rgJ3nlFwxKtv340qv/UCp/3W0U3JbYG6Cnc6DvKq72eOPuqnPnyjDa1VQAlZA + q6gA== +X-Gm-Message-State: APjAAAV9fDxe7+YuhbTRQ7FQZxhVH1IaMTTvFGz12nutmEBO1FHu5PVR + RmfQmTY6L3fXPK4lQ+WtrOep+s2H8w4Weg== +X-Google-Smtp-Source: APXvYqxj+/69azSDe/nIwdR/hsgHatKZBL8p8CGOPp1Hku4BlIp/V3L90lAwr5VQJtUY+c5KmukFLQ== +X-Received: by 2002:adf:dc86:: with SMTP id r6mr6287782wrj.68.1575387208549; + Tue, 03 Dec 2019 07:33:28 -0800 (PST) +Received: from localhost (nat-35.starnet.cz. [178.255.168.35]) + by smtp.gmail.com with ESMTPSA id + h17sm4245700wrs.18.2019.12.03.07.33.27 + (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); + Tue, 03 Dec 2019 07:33:27 -0800 (PST) +From: Michal Simek +To: u-boot@lists.denx.de, + git@xilinx.com, + pbrobinson@gmail.com +Subject: [PATCH v2] arm64: zynqmp: Do not assing MIO34 that early on zcu100 +Date: Tue, 3 Dec 2019 16:33:26 +0100 +Message-Id: <175608f69633f3876bebdde1c2f7b9cf54b61716.1575387200.git.michal.simek@xilinx.com> +X-Mailer: git-send-email 2.24.0 +MIME-Version: 1.0 +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.26 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" +X-Virus-Scanned: clamav-milter 0.101.4 at mail.denx.de +X-Virus-Status: Clean + +MIO34 is connected to POWER_KILL signal. When MIO configuration is done in +psu_init() and this pin is assigned to PMU but PMU configuration is not +loaded yet. PMU gpio output is high that means board is powered off +immediately. +The patch is fixing this sequence that MIO34 stays assing to ps gpio IP. +PMU config is loaded in SPL and then pin assigned to PMU through +psu_post_config_data(). + +Signed-off-by: Michal Simek +--- + +Changes in v2: +- add missing declaration in header + + arch/arm/mach-zynqmp/include/mach/psu_init_gpl.h | 1 + + arch/arm/mach-zynqmp/psu_spl_init.c | 9 +++++++++ + arch/arm/mach-zynqmp/spl.c | 1 + + board/xilinx/zynqmp/zynqmp-zcu100-revC/psu_init_gpl.c | 7 ++++++- + 4 files changed, 17 insertions(+), 1 deletion(-) + +diff --git a/arch/arm/mach-zynqmp/include/mach/psu_init_gpl.h b/arch/arm/mach-zynqmp/include/mach/psu_init_gpl.h +index 15e54c049387..e37acda2f89e 100644 +--- a/arch/arm/mach-zynqmp/include/mach/psu_init_gpl.h ++++ b/arch/arm/mach-zynqmp/include/mach/psu_init_gpl.h +@@ -21,5 +21,6 @@ void prog_reg(unsigned long addr, unsigned long mask, + unsigned long shift, unsigned long value); + + int psu_init(void); ++unsigned long psu_post_config_data(void); + + #endif /* _PSU_INIT_GPL_H_ */ +diff --git a/arch/arm/mach-zynqmp/psu_spl_init.c b/arch/arm/mach-zynqmp/psu_spl_init.c +index b357de32358c..b6abdfd608ee 100644 +--- a/arch/arm/mach-zynqmp/psu_spl_init.c ++++ b/arch/arm/mach-zynqmp/psu_spl_init.c +@@ -77,3 +77,12 @@ __weak int psu_init(void) + */ + return -1; + } ++ ++__weak unsigned long psu_post_config_data(void) ++{ ++ /* ++ * This function is overridden by the one in ++ * board/xilinx/zynqmp/(platform)/psu_init_gpl.c, if it exists. ++ */ ++ return 0; ++} +diff --git a/arch/arm/mach-zynqmp/spl.c b/arch/arm/mach-zynqmp/spl.c +index 6ba42bb42f62..6551b33f42d0 100644 +--- a/arch/arm/mach-zynqmp/spl.c ++++ b/arch/arm/mach-zynqmp/spl.c +@@ -60,6 +60,7 @@ void spl_board_init(void) + preloader_console_init(); + ps_mode_reset(MODE_RESET); + board_init(); ++ psu_post_config_data(); + } + #endif + +diff --git a/board/xilinx/zynqmp/zynqmp-zcu100-revC/psu_init_gpl.c b/board/xilinx/zynqmp/zynqmp-zcu100-revC/psu_init_gpl.c +index e1fdabaeb9d1..585b3afc218a 100644 +--- a/board/xilinx/zynqmp/zynqmp-zcu100-revC/psu_init_gpl.c ++++ b/board/xilinx/zynqmp/zynqmp-zcu100-revC/psu_init_gpl.c +@@ -409,7 +409,6 @@ static unsigned long psu_mio_init_data(void) + psu_mask_write(0xFF18007C, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF180080, 0x000000FEU, 0x00000008U); + psu_mask_write(0xFF180084, 0x000000FEU, 0x00000008U); +- psu_mask_write(0xFF180088, 0x000000FEU, 0x00000008U); + psu_mask_write(0xFF18008C, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF180090, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF180094, 0x000000FEU, 0x00000000U); +@@ -990,3 +989,9 @@ int psu_init(void) + return 1; + return 0; + } ++ ++unsigned long psu_post_config_data(void) ++{ ++ psu_mask_write(0xFF180088, 0x000000FEU, 0x00000008U); ++ return 0; ++}