v2020.07
This commit is contained in:
Peter Robinson
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Thu, 18 Jun 2020 07:03:22 -0700 (PDT)
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From: Jagan Teki <jagan@amarulasolutions.com>
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To: Peng Fan <peng.fan@nxp.com>
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Cc: u-boot@lists.denx.de, Jagan Teki <jagan@amarulasolutions.com>,
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Kever Yang <kever.yang@rock-chips.com>,
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Suniel Mahesh <sunil@amarulasolutions.com>
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Subject: [PATCH v4] mmc: sdhci: Fix HISPD bit handling
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Date: Thu, 18 Jun 2020 19:33:12 +0530
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Message-Id: <20200618140312.155157-1-jagan@amarulasolutions.com>
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SDHCI HISPD bits need to be configured based on desired mmc
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timings mode and some HISPD quirks.
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So, handle the HISPD bit based on the mmc computed selected
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mode(timing parameter) rather than fixed mmc card clock
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frequency.
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Linux handle the HISPD similar like this in below commit but no
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SDHCI_QUIRK_BROKEN_HISPD_MODE,
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commit <501639bf2173> ("mmc: sdhci: fix SDHCI_QUIRK_NO_HISPD_BIT handling")
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This eventually fixed the mmc write issue observed in
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rk3399 sdhci controller.
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Bug log for refernece,
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=> gpt write mmc 0 $partitions
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Writing GPT: mmc write failed
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** Can't write to device 0 **
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** Can't write to device 0 **
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error!
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Cc: Kever Yang <kever.yang@rock-chips.com>
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Cc: Peng Fan <peng.fan@nxp.com>
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Tested-by: Suniel Mahesh <sunil@amarulasolutions.com> # roc-rk3399-pc
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Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
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---
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Changes for v4:
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- update commit message
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- simplify the logic.
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drivers/mmc/sdhci.c | 23 +++++++++++++++++------
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1 file changed, 17 insertions(+), 6 deletions(-)
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diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c
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index 92cc8434af..6cb702111b 100644
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--- a/drivers/mmc/sdhci.c
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+++ b/drivers/mmc/sdhci.c
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@@ -567,6 +567,7 @@ static int sdhci_set_ios(struct mmc *mmc)
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#endif
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u32 ctrl;
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struct sdhci_host *host = mmc->priv;
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+ bool no_hispd_bit = false;
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if (host->ops && host->ops->set_control_reg)
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host->ops->set_control_reg(host);
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@@ -594,14 +595,24 @@ static int sdhci_set_ios(struct mmc *mmc)
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ctrl &= ~SDHCI_CTRL_4BITBUS;
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}
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- if (mmc->clock > 26000000)
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- ctrl |= SDHCI_CTRL_HISPD;
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- else
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- ctrl &= ~SDHCI_CTRL_HISPD;
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-
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if ((host->quirks & SDHCI_QUIRK_NO_HISPD_BIT) ||
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(host->quirks & SDHCI_QUIRK_BROKEN_HISPD_MODE))
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- ctrl &= ~SDHCI_CTRL_HISPD;
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+ no_hispd_bit = true;
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+
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+ if (!no_hispd_bit) {
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+ if (mmc->selected_mode == MMC_HS ||
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+ mmc->selected_mode == SD_HS ||
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+ mmc->selected_mode == MMC_DDR_52 ||
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+ mmc->selected_mode == MMC_HS_200 ||
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+ mmc->selected_mode == MMC_HS_400 ||
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+ mmc->selected_mode == UHS_SDR25 ||
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+ mmc->selected_mode == UHS_SDR50 ||
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+ mmc->selected_mode == UHS_SDR104 ||
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+ mmc->selected_mode == UHS_DDR50)
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+ ctrl |= SDHCI_CTRL_HISPD;
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+ else
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+ ctrl &= ~SDHCI_CTRL_HISPD;
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+ }
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sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
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2
sources
2
sources
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@ -1 +1 @@
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SHA512 (u-boot-2020.07-rc5.tar.bz2) = a0a1d4749d29d2c86d4ba0d4c04ec6b0515ce2c7e3f335a1e9e2c9833ce6286f572b70be63d3e72cbb0fe3238ea0e0809152a83760f22cf1edf2de54075870b8
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SHA512 (u-boot-2020.07.tar.bz2) = df91264fe8a42e676c3f2aa09d644c6a3035cc8169bf52a8ab95efe7e542cfc758a0ef150949b0d9f03c7dec7d95f8d20a2efe2dbb60c2ef1a61c8063770478d
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@ -1,9 +1,9 @@
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%global candidate rc5
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#global candidate rc5
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%global _default_patch_fuzz 2
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Name: uboot-tools
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Version: 2020.07
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Release: 0.5%{?candidate:.%{candidate}}%{?dist}
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Release: 1%{?candidate:.%{candidate}}%{?dist}
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Summary: U-Boot utilities
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License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+
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URL: http://www.denx.de/wiki/U-Boot
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@ -24,8 +24,6 @@ Patch2: uefi-use-Fedora-specific-path-name.patch
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# Board fixes and enablement
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Patch4: usb-kbd-fixes.patch
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Patch5: dragonboard-fixes.patch
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# mmc fix
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Patch6: mmc-sdhci-Fix-HISPD-bit-handling.patch
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# Tegra improvements
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Patch10: arm-tegra-define-fdtfile-option-for-distro-boot.patch
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@ -252,6 +250,9 @@ cp -p board/warp7/README builds/docs/README.warp7
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%endif
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%changelog
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* Mon Jul 06 2020 Peter Robinson <pbrobinson@fedoraproject.org> - 2020.07-1
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- 2020.07 GA
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* Tue Jun 23 2020 Peter Robinson <pbrobinson@fedoraproject.org> - 2020.07-0.5.rc5
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- 2020.07 RC5
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