2023.04 RC5
This commit is contained in:
Peter Robinson
parent
8e7afdbb87
commit
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From: David Sebek <dasebek@gmail.com>
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To: u-boot@lists.denx.de
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Cc: jagan@amarulasolutions.com, kever.yang@rock-chips.com,
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David Sebek <dasebek@gmail.com>
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Subject: [PATCH 1/1] rockchip: Fix incorrect constant name in RAM init code
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Date: Thu, 30 Mar 2023 17:51:14 -0400
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A condition in the rk3399 RAM initialization code used the old
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CONFIG_RAM_RK3399_LPDDR4 constant name. This commit changes the
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condition to use the correct CONFIG_RAM_ROCKCHIP_LPDDR4 constant.
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Reviewed-by: Simon Glass <sjg@chromium.org>
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---
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drivers/ram/rockchip/sdram_rk3399.c | 2 +-
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1 file changed, 1 insertion(+), 1 deletion(-)
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diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ram/rockchip/sdram_rk3399.c
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index b1fea04e84..963a05c244 100644
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--- a/drivers/ram/rockchip/sdram_rk3399.c
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+++ b/drivers/ram/rockchip/sdram_rk3399.c
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@@ -2954,7 +2954,7 @@ static int sdram_init(struct dram_info *dram,
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params->ch[ch].cap_info.rank = rank;
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}
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-#if defined(CONFIG_RAM_RK3399_LPDDR4)
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+#if defined(CONFIG_RAM_ROCKCHIP_LPDDR4)
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/* LPDDR4 needs to be trained at 400MHz */
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lpddr4_set_rate(dram, params, 0);
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params->base.ddr_freq = dfs_cfgs_lpddr4[0].base.ddr_freq / MHz;
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@ -1,127 +0,0 @@
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From 6d0642494993f39440a4d6e95f88c0456ee6d689 Mon Sep 17 00:00:00 2001
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From: Antoine Mazeas <antoine@karthanis.net>
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Date: Fri, 19 Aug 2022 10:56:45 +0200
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Subject: [PATCH 1/3] rpi: Copy properties from firmware dtb to the loaded dtb
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The RPI firmware adjusts several property values in the dtb it passes
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to u-boot depending on the board/SoC revision. Inherit some of these
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when u-boot loads a dtb itself. Specificaly copy:
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* /model: The firmware provides a more specific string
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* /memreserve: The firmware defines a reserved range, better keep it
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* emmc2bus and pcie0 dma-ranges: The C0T revision of the bcm2711 Soc (as
|
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present on rpi 400 and some rpi 4B boards) has different values for
|
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these then the B0T revision. So these need to be adjusted to boot on
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these boards
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* blconfig: The firmware defines the memory area where the blconfig
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stored. Copy those over so it can be enabled.
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* /chosen/kaslr-seed: The firmware generates a kaslr seed, take advantage
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of that.
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Signed-off-by: Sjoerd Simons <sjoerd@collabora.com>
|
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Signed-off-by: Antoine Mazeas <antoine@karthanis.net>
|
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Reviewed-by: Simon Glass <sjg@chromium.org>
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Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
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---
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board/raspberrypi/rpi/rpi.c | 48 +++++++++++++++++++++++++++++++++++++
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1 file changed, 48 insertions(+)
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diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c
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index 8603c93de77..d4b059c6204 100644
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--- a/board/raspberrypi/rpi/rpi.c
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+++ b/board/raspberrypi/rpi/rpi.c
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@@ -503,10 +503,58 @@ void *board_fdt_blob_setup(int *err)
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return (void *)fw_dtb_pointer;
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}
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+int copy_property(void *dst, void *src, char *path, char *property)
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+{
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+ int dst_offset, src_offset;
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+ const fdt32_t *prop;
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+ int len;
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+
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+ src_offset = fdt_path_offset(src, path);
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+ dst_offset = fdt_path_offset(dst, path);
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+
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+ if (src_offset < 0 || dst_offset < 0)
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+ return -1;
|
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+
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+ prop = fdt_getprop(src, src_offset, property, &len);
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+ if (!prop)
|
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+ return -1;
|
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+
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+ return fdt_setprop(dst, dst_offset, property, prop, len);
|
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+}
|
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+
|
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+/* Copy tweaks from the firmware dtb to the loaded dtb */
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+void update_fdt_from_fw(void *fdt, void *fw_fdt)
|
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+{
|
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+ /* Using dtb from firmware directly; leave it alone */
|
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+ if (fdt == fw_fdt)
|
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+ return;
|
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+
|
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+ /* The firmware provides a more precie model; so copy that */
|
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+ copy_property(fdt, fw_fdt, "/", "model");
|
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+
|
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+ /* memory reserve as suggested by the firmware */
|
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+ copy_property(fdt, fw_fdt, "/", "memreserve");
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+
|
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+ /* Adjust dma-ranges for the SD card and PCI bus as they can depend on
|
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+ * the SoC revision
|
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+ */
|
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+ copy_property(fdt, fw_fdt, "emmc2bus", "dma-ranges");
|
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+ copy_property(fdt, fw_fdt, "pcie0", "dma-ranges");
|
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+
|
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+ /* Bootloader configuration template exposes as nvmem */
|
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+ if (copy_property(fdt, fw_fdt, "blconfig", "reg") == 0)
|
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+ copy_property(fdt, fw_fdt, "blconfig", "status");
|
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+
|
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+ /* kernel address randomisation seed as provided by the firmware */
|
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+ copy_property(fdt, fw_fdt, "/chosen", "kaslr-seed");
|
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+}
|
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+
|
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int ft_board_setup(void *blob, struct bd_info *bd)
|
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{
|
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int node;
|
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|
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+ update_fdt_from_fw(blob, (void *)fw_dtb_pointer);
|
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+
|
||||
node = fdt_node_offset_by_compatible(blob, -1, "simple-framebuffer");
|
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if (node < 0)
|
||||
fdt_simplefb_add_node(blob);
|
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--
|
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2.39.2
|
||||
|
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From 4a45086c0ca874858d4064ee26d45199bcab494d Mon Sep 17 00:00:00 2001
|
||||
From: Antoine Mazeas <antoine@karthanis.net>
|
||||
Date: Fri, 19 Aug 2022 10:56:46 +0200
|
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Subject: [PATCH 2/3] rpi: Copy eth PHY address from fw DT to loaded DT
|
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|
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Some Raspberry Pi 400 boards, specifically rev 1.1, have a different
|
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address for the ethernet PHY device than what is provided by the kernel
|
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DTB. The correct address is provided by the firmware, so we should carry
|
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it over into the loaded device tree so that ethernet works on such boards.
|
||||
|
||||
Signed-off-by: Antoine Mazeas <antoine@karthanis.net>
|
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Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
|
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---
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board/raspberrypi/rpi/rpi.c | 3 +++
|
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1 file changed, 3 insertions(+)
|
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|
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diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c
|
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index d4b059c6204..fc1fffedfb7 100644
|
||||
--- a/board/raspberrypi/rpi/rpi.c
|
||||
+++ b/board/raspberrypi/rpi/rpi.c
|
||||
@@ -547,6 +547,9 @@ void update_fdt_from_fw(void *fdt, void *fw_fdt)
|
||||
|
||||
/* kernel address randomisation seed as provided by the firmware */
|
||||
copy_property(fdt, fw_fdt, "/chosen", "kaslr-seed");
|
||||
+
|
||||
+ /* address of the PHY device as provided by the firmware */
|
||||
+ copy_property(fdt, fw_fdt, "ethernet0/mdio@e14/ethernet-phy@1", "reg");
|
||||
}
|
||||
|
||||
int ft_board_setup(void *blob, struct bd_info *bd)
|
||||
--
|
||||
2.39.2
|
||||
|
||||
|
|
@ -1,29 +0,0 @@
|
|||
From 0e8c94054fd80535e868900deb978a9a1ebcab67 Mon Sep 17 00:00:00 2001
|
||||
From: Peter Robinson <pbrobinson@gmail.com>
|
||||
Date: Tue, 28 Feb 2023 10:17:26 +0000
|
||||
Subject: [PATCH 3/3] rpi: Update the RPi Zero 2W DT filename
|
||||
|
||||
Update the Raspberry Pi Zero 2W device tree file
|
||||
name to match what landed upstream.
|
||||
|
||||
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
|
||||
---
|
||||
board/raspberrypi/rpi/rpi.c | 2 +-
|
||||
1 file changed, 1 insertion(+), 1 deletion(-)
|
||||
|
||||
diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c
|
||||
index fc1fffedfb7..1057ebb9948 100644
|
||||
--- a/board/raspberrypi/rpi/rpi.c
|
||||
+++ b/board/raspberrypi/rpi/rpi.c
|
||||
@@ -158,7 +158,7 @@ static const struct rpi_model rpi_models_new_scheme[] = {
|
||||
},
|
||||
[0x12] = {
|
||||
"Zero 2 W",
|
||||
- DTB_DIR "bcm2837-rpi-zero-2.dtb",
|
||||
+ DTB_DIR "bcm2837-rpi-zero-2-w.dtb",
|
||||
false,
|
||||
},
|
||||
[0x13] = {
|
||||
--
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||||
2.39.2
|
||||
|
||||
|
|
@ -1,228 +0,0 @@
|
|||
From f3a870bfa075fb880f5e018a0a5ae6f27ca8be49 Mon Sep 17 00:00:00 2001
|
||||
From: Vincent Fazio <vfazio@xes-inc.com>
|
||||
Date: Mon, 13 Sep 2021 13:34:45 -0500
|
||||
Subject: [PATCH] mmc: bcm2835-host: let firmware manage the clock
|
||||
|
||||
Newer firmware supports managing the sdhost clock divisor, so leverage
|
||||
this feature if it is available.
|
||||
|
||||
SET_SDHOST_CLOCK is largely undocumented except for its usage within the
|
||||
Linux kernel, which this change is based on.
|
||||
|
||||
https://github.com/raspberrypi/linux/commit/3cd16c39c718e2dda7885c4ed7a20118aed12524
|
||||
|
||||
Signed-off-by: Vincent Fazio <vfazio@xes-inc.com>
|
||||
---
|
||||
arch/arm/mach-bcm283x/include/mach/mbox.h | 18 ++++++++
|
||||
arch/arm/mach-bcm283x/include/mach/msg.h | 10 +++++
|
||||
arch/arm/mach-bcm283x/msg.c | 30 +++++++++++++
|
||||
drivers/mmc/bcm2835_sdhost.c | 53 ++++++++++++++---------
|
||||
4 files changed, 90 insertions(+), 21 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/mach-bcm283x/include/mach/mbox.h b/arch/arm/mach-bcm283x/include/mach/mbox.h
|
||||
index 7dcac583cc4..9b1943fcfc4 100644
|
||||
--- a/arch/arm/mach-bcm283x/include/mach/mbox.h
|
||||
+++ b/arch/arm/mach-bcm283x/include/mach/mbox.h
|
||||
@@ -252,6 +252,24 @@ struct bcm2835_mbox_tag_get_clock_rate {
|
||||
} body;
|
||||
};
|
||||
|
||||
+#define BCM2835_MBOX_TAG_SET_SDHOST_CLOCK 0x00038042
|
||||
+
|
||||
+struct bcm2835_mbox_tag_set_sdhost_clock {
|
||||
+ struct bcm2835_mbox_tag_hdr tag_hdr;
|
||||
+ union {
|
||||
+ struct {
|
||||
+ u32 rate_hz;
|
||||
+ u32 rate_1;
|
||||
+ u32 rate_2;
|
||||
+ } req;
|
||||
+ struct {
|
||||
+ u32 rate_hz;
|
||||
+ u32 rate_1;
|
||||
+ u32 rate_2;
|
||||
+ } resp;
|
||||
+ } body;
|
||||
+};
|
||||
+
|
||||
#define BCM2835_MBOX_TAG_ALLOCATE_BUFFER 0x00040001
|
||||
|
||||
struct bcm2835_mbox_tag_allocate_buffer {
|
||||
diff --git a/arch/arm/mach-bcm283x/include/mach/msg.h b/arch/arm/mach-bcm283x/include/mach/msg.h
|
||||
index e45c1bf010f..ab37abdb6c6 100644
|
||||
--- a/arch/arm/mach-bcm283x/include/mach/msg.h
|
||||
+++ b/arch/arm/mach-bcm283x/include/mach/msg.h
|
||||
@@ -22,6 +22,16 @@ int bcm2835_power_on_module(u32 module);
|
||||
*/
|
||||
int bcm2835_get_mmc_clock(u32 clock_id);
|
||||
|
||||
+/**
|
||||
+ * bcm2835_set_sdhost_clock() - determine if firmware controls sdhost cdiv
|
||||
+ *
|
||||
+ * @rate_hz: Input clock frequency
|
||||
+ * @rate_1: Returns a clock frequency
|
||||
+ * @rate_2: Returns a clock frequency
|
||||
+ * @return 0 of OK, -EIO on error
|
||||
+ */
|
||||
+int bcm2835_set_sdhost_clock(u32 rate_hz, u32 *rate_1, u32 *rate_2);
|
||||
+
|
||||
/**
|
||||
* bcm2835_get_video_size() - get the current display size
|
||||
*
|
||||
diff --git a/arch/arm/mach-bcm283x/msg.c b/arch/arm/mach-bcm283x/msg.c
|
||||
index e2badfecb09..8c1c36a5f15 100644
|
||||
--- a/arch/arm/mach-bcm283x/msg.c
|
||||
+++ b/arch/arm/mach-bcm283x/msg.c
|
||||
@@ -21,6 +21,12 @@ struct msg_get_clock_rate {
|
||||
u32 end_tag;
|
||||
};
|
||||
|
||||
+struct msg_set_sdhost_clock {
|
||||
+ struct bcm2835_mbox_hdr hdr;
|
||||
+ struct bcm2835_mbox_tag_set_sdhost_clock set_sdhost_clock;
|
||||
+ u32 end_tag;
|
||||
+};
|
||||
+
|
||||
struct msg_query {
|
||||
struct bcm2835_mbox_hdr hdr;
|
||||
struct bcm2835_mbox_tag_physical_w_h physical_w_h;
|
||||
@@ -111,6 +117,30 @@ int bcm2835_get_mmc_clock(u32 clock_id)
|
||||
return clock_rate;
|
||||
}
|
||||
|
||||
+int bcm2835_set_sdhost_clock(u32 rate_hz, u32 *rate_1, u32 *rate_2)
|
||||
+{
|
||||
+ ALLOC_CACHE_ALIGN_BUFFER(struct msg_set_sdhost_clock, msg_sdhost_clk, 1);
|
||||
+ int ret;
|
||||
+
|
||||
+ BCM2835_MBOX_INIT_HDR(msg_sdhost_clk);
|
||||
+ BCM2835_MBOX_INIT_TAG(&msg_sdhost_clk->set_sdhost_clock, SET_SDHOST_CLOCK);
|
||||
+
|
||||
+ msg_sdhost_clk->set_sdhost_clock.body.req.rate_hz = rate_hz;
|
||||
+ msg_sdhost_clk->set_sdhost_clock.body.req.rate_1 = *rate_1;
|
||||
+ msg_sdhost_clk->set_sdhost_clock.body.req.rate_2 = *rate_2;
|
||||
+
|
||||
+ ret = bcm2835_mbox_call_prop(BCM2835_MBOX_PROP_CHAN, &msg_sdhost_clk->hdr);
|
||||
+ if (ret) {
|
||||
+ printf("bcm2835: Could not query sdhost clock rate\n");
|
||||
+ return -EIO;
|
||||
+ }
|
||||
+
|
||||
+ *rate_1 = msg_sdhost_clk->set_sdhost_clock.body.resp.rate_1;
|
||||
+ *rate_2 = msg_sdhost_clk->set_sdhost_clock.body.resp.rate_2;
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
int bcm2835_get_video_size(int *widthp, int *heightp)
|
||||
{
|
||||
ALLOC_CACHE_ALIGN_BUFFER(struct msg_query, msg_query, 1);
|
||||
diff --git a/drivers/mmc/bcm2835_sdhost.c b/drivers/mmc/bcm2835_sdhost.c
|
||||
index 894dbdd6861..3a9cd6f1eb2 100644
|
||||
--- a/drivers/mmc/bcm2835_sdhost.c
|
||||
+++ b/drivers/mmc/bcm2835_sdhost.c
|
||||
@@ -181,6 +181,7 @@ struct bcm2835_host {
|
||||
struct udevice *dev;
|
||||
struct mmc *mmc;
|
||||
struct bcm2835_plat *plat;
|
||||
+ unsigned int firmware_sets_cdiv:1;
|
||||
};
|
||||
|
||||
static void bcm2835_dumpregs(struct bcm2835_host *host)
|
||||
@@ -233,7 +234,7 @@ static void bcm2835_reset_internal(struct bcm2835_host *host)
|
||||
msleep(20);
|
||||
host->clock = 0;
|
||||
writel(host->hcfg, host->ioaddr + SDHCFG);
|
||||
- writel(host->cdiv, host->ioaddr + SDCDIV);
|
||||
+ writel(SDCDIV_MAX_CDIV, host->ioaddr + SDCDIV);
|
||||
}
|
||||
|
||||
static int bcm2835_wait_transfer_complete(struct bcm2835_host *host)
|
||||
@@ -598,6 +599,7 @@ static int bcm2835_transmit(struct bcm2835_host *host)
|
||||
static void bcm2835_set_clock(struct bcm2835_host *host, unsigned int clock)
|
||||
{
|
||||
int div;
|
||||
+ u32 clock_rate[2] = { 0 };
|
||||
|
||||
/* The SDCDIV register has 11 bits, and holds (div - 2). But
|
||||
* in data mode the max is 50MHz wihout a minimum, and only
|
||||
@@ -620,26 +622,34 @@ static void bcm2835_set_clock(struct bcm2835_host *host, unsigned int clock)
|
||||
* clock divisor at all times.
|
||||
*/
|
||||
|
||||
- if (clock < 100000) {
|
||||
- /* Can't stop the clock, but make it as slow as possible
|
||||
- * to show willing
|
||||
- */
|
||||
- host->cdiv = SDCDIV_MAX_CDIV;
|
||||
- writel(host->cdiv, host->ioaddr + SDCDIV);
|
||||
- return;
|
||||
- }
|
||||
+ if (host->firmware_sets_cdiv) {
|
||||
+ bcm2835_set_sdhost_clock(clock, &clock_rate[0], &clock_rate[1]);
|
||||
+ clock = max(clock_rate[0], clock_rate[1]);
|
||||
+ } else {
|
||||
+ if (clock < 100000) {
|
||||
+ /* Can't stop the clock, but make it as slow as possible
|
||||
+ * to show willing
|
||||
+ */
|
||||
+ host->cdiv = SDCDIV_MAX_CDIV;
|
||||
+ writel(host->cdiv, host->ioaddr + SDCDIV);
|
||||
+ return;
|
||||
+ }
|
||||
|
||||
- div = host->max_clk / clock;
|
||||
- if (div < 2)
|
||||
- div = 2;
|
||||
- if ((host->max_clk / div) > clock)
|
||||
- div++;
|
||||
- div -= 2;
|
||||
+ div = host->max_clk / clock;
|
||||
+ if (div < 2)
|
||||
+ div = 2;
|
||||
+ if ((host->max_clk / div) > clock)
|
||||
+ div++;
|
||||
+ div -= 2;
|
||||
|
||||
- if (div > SDCDIV_MAX_CDIV)
|
||||
- div = SDCDIV_MAX_CDIV;
|
||||
+ if (div > SDCDIV_MAX_CDIV)
|
||||
+ div = SDCDIV_MAX_CDIV;
|
||||
+
|
||||
+ clock = host->max_clk / (div + 2);
|
||||
+ host->cdiv = div;
|
||||
+ writel(host->cdiv, host->ioaddr + SDCDIV);
|
||||
+ }
|
||||
|
||||
- clock = host->max_clk / (div + 2);
|
||||
host->mmc->clock = clock;
|
||||
|
||||
/* Calibrate some delays */
|
||||
@@ -647,9 +657,6 @@ static void bcm2835_set_clock(struct bcm2835_host *host, unsigned int clock)
|
||||
host->ns_per_fifo_word = (1000000000 / clock) *
|
||||
((host->mmc->card_caps & MMC_MODE_4BIT) ? 8 : 32);
|
||||
|
||||
- host->cdiv = div;
|
||||
- writel(host->cdiv, host->ioaddr + SDCDIV);
|
||||
-
|
||||
/* Set the timeout to 500ms */
|
||||
writel(host->mmc->clock / 2, host->ioaddr + SDTOUT);
|
||||
}
|
||||
@@ -759,6 +766,7 @@ static int bcm2835_probe(struct udevice *dev)
|
||||
struct bcm2835_host *host = dev_get_priv(dev);
|
||||
struct mmc *mmc = mmc_get_mmc_dev(dev);
|
||||
struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
|
||||
+ u32 clock_rate[2] = { ~0 };
|
||||
|
||||
host->dev = dev;
|
||||
host->mmc = mmc;
|
||||
@@ -776,6 +784,9 @@ static int bcm2835_probe(struct udevice *dev)
|
||||
|
||||
host->max_clk = bcm2835_get_mmc_clock(BCM2835_MBOX_CLOCK_ID_CORE);
|
||||
|
||||
+ bcm2835_set_sdhost_clock(0, &clock_rate[0], &clock_rate[1]);
|
||||
+ host->firmware_sets_cdiv = (clock_rate[0] != ~0);
|
||||
+
|
||||
bcm2835_add_host(host);
|
||||
|
||||
dev_dbg(dev, "%s -> OK\n", __func__);
|
||||
|
|
@ -1,77 +0,0 @@
|
|||
From 71ba043e5c5575f3d86536acade70dab6599489b Mon Sep 17 00:00:00 2001
|
||||
From: Vincent Fazio <vfazio@xes-inc.com>
|
||||
Date: Mon, 13 Sep 2021 11:22:30 -0500
|
||||
Subject: [PATCH] arm: rpi: fallback to max clock rate for MMC clock
|
||||
|
||||
In rpi-firmware 25e2b597ebfb2495eab4816a276758dcc6ea21f1 and later,
|
||||
the GET_CLOCK_RATE mailbox property was changed to return the last
|
||||
value set by SET_CLOCK_RATE.
|
||||
|
||||
https://github.com/raspberrypi/firmware/issues/1619#issuecomment-917025502
|
||||
|
||||
U-Boot does not call SET_CLOCK_RATE so bcm2835_get_mmc_clock will
|
||||
return zero and can cause degraded MMC performance.
|
||||
|
||||
Calling SET_CLOCK_RATE fixes the frequency of the clock to a specific
|
||||
value and disables the firmware's clock scaling so is not an option.
|
||||
|
||||
Instead, fallback to GET_MAX_CLOCK_RATE in bcm2835_get_mmc_clock if
|
||||
GET_CLOCK_RATE returns zero.
|
||||
|
||||
Signed-off-by: Vincent Fazio <vfazio@xes-inc.com>
|
||||
---
|
||||
arch/arm/mach-bcm283x/include/mach/mbox.h | 2 ++
|
||||
arch/arm/mach-bcm283x/msg.c | 20 +++++++++++++++++++-
|
||||
2 files changed, 21 insertions(+), 1 deletion(-)
|
||||
|
||||
diff --git a/arch/arm/mach-bcm283x/include/mach/mbox.h b/arch/arm/mach-bcm283x/include/mach/mbox.h
|
||||
index 2ae2d3d97c3..7dcac583cc4 100644
|
||||
--- a/arch/arm/mach-bcm283x/include/mach/mbox.h
|
||||
+++ b/arch/arm/mach-bcm283x/include/mach/mbox.h
|
||||
@@ -224,6 +224,8 @@ struct bcm2835_mbox_tag_set_power_state {
|
||||
};
|
||||
|
||||
#define BCM2835_MBOX_TAG_GET_CLOCK_RATE 0x00030002
|
||||
+#define BCM2835_MBOX_TAG_GET_MAX_CLOCK_RATE 0x00030004
|
||||
+#define BCM2835_MBOX_TAG_GET_MIN_CLOCK_RATE 0x00030007
|
||||
|
||||
#define BCM2835_MBOX_CLOCK_ID_EMMC 1
|
||||
#define BCM2835_MBOX_CLOCK_ID_UART 2
|
||||
diff --git a/arch/arm/mach-bcm283x/msg.c b/arch/arm/mach-bcm283x/msg.c
|
||||
index 347aece3cd8..e2badfecb09 100644
|
||||
--- a/arch/arm/mach-bcm283x/msg.c
|
||||
+++ b/arch/arm/mach-bcm283x/msg.c
|
||||
@@ -75,6 +75,7 @@ int bcm2835_get_mmc_clock(u32 clock_id)
|
||||
{
|
||||
ALLOC_CACHE_ALIGN_BUFFER(struct msg_get_clock_rate, msg_clk, 1);
|
||||
int ret;
|
||||
+ u32 clock_rate = 0;
|
||||
|
||||
ret = bcm2835_power_on_module(BCM2835_MBOX_POWER_DEVID_SDHCI);
|
||||
if (ret)
|
||||
@@ -90,7 +91,24 @@ int bcm2835_get_mmc_clock(u32 clock_id)
|
||||
return -EIO;
|
||||
}
|
||||
|
||||
- return msg_clk->get_clock_rate.body.resp.rate_hz;
|
||||
+ clock_rate = msg_clk->get_clock_rate.body.resp.rate_hz;
|
||||
+
|
||||
+ if (clock_rate == 0)
|
||||
+ {
|
||||
+ BCM2835_MBOX_INIT_HDR(msg_clk);
|
||||
+ BCM2835_MBOX_INIT_TAG(&msg_clk->get_clock_rate, GET_MAX_CLOCK_RATE);
|
||||
+ msg_clk->get_clock_rate.body.req.clock_id = clock_id;
|
||||
+
|
||||
+ ret = bcm2835_mbox_call_prop(BCM2835_MBOX_PROP_CHAN, &msg_clk->hdr);
|
||||
+ if (ret) {
|
||||
+ printf("bcm2835: Could not query max eMMC clock rate\n");
|
||||
+ return -EIO;
|
||||
+ }
|
||||
+
|
||||
+ clock_rate = msg_clk->get_clock_rate.body.resp.rate_hz;
|
||||
+ }
|
||||
+
|
||||
+ return clock_rate;
|
||||
}
|
||||
|
||||
int bcm2835_get_video_size(int *widthp, int *heightp)
|
||||
2
sources
2
sources
|
|
@ -1 +1 @@
|
|||
SHA512 (u-boot-2023.04-rc4.tar.bz2) = b40349d03abcbc0eb9061046071ff29578bf83007e70a0a57518763c1ef4b8a60c9c691c9921ac4d76135910a8053a4271a6d92346649d11d01b6997c4b09254
|
||||
SHA512 (u-boot-2023.04-rc5.tar.bz2) = e953585d3b59f53aec1e17179fe5c84cbc56d5a5150815aaf9b01a73dc6384a9cbe89e6848f8c4fd85c00bf61de4487018fa6df9411caff2f0c9a8a175a5dd28
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
%global candidate rc4
|
||||
%global candidate rc5
|
||||
%if 0%{?rhel}
|
||||
%bcond_with toolsonly
|
||||
%else
|
||||
|
|
@ -7,7 +7,7 @@
|
|||
|
||||
Name: uboot-tools
|
||||
Version: 2023.04
|
||||
Release: 0.3%{?candidate:.%{candidate}}%{?dist}
|
||||
Release: 0.4%{?candidate:.%{candidate}}%{?dist}
|
||||
Summary: U-Boot utilities
|
||||
License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+
|
||||
URL: http://www.denx.de/wiki/U-Boot
|
||||
|
|
@ -24,12 +24,9 @@ Patch2: smbios-Simplify-reporting-of-unknown-values.patch
|
|||
# Board fixes and enablement
|
||||
# RPi - uses RPI firmware device tree for HAT support
|
||||
Patch3: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch
|
||||
Patch4: rpi-fallback-to-max-clock-for-mmc.patch
|
||||
Patch5: rpi-bcm2835_sdhost-firmware-managed-clock.patch
|
||||
Patch6: rpi-Copy-properties-from-firmware-DT-to-loaded-DT.patch
|
||||
Patch7: rpi-Update-the-RPi-Zero-2W-DT-filename.patch
|
||||
# Rockchips improvements
|
||||
Patch8: rockchip-Add-initial-support-for-the-PinePhone-Pro.patch
|
||||
Patch5: rockchip-Fix-incorrect-constant-name-in-RAM-init-code.patch
|
||||
Patch6: rockchip-Add-initial-support-for-the-PinePhone-Pro.patch
|
||||
|
||||
BuildRequires: bc
|
||||
BuildRequires: bison
|
||||
|
|
@ -50,6 +47,7 @@ BuildRequires: swig
|
|||
%if %{with toolsonly}
|
||||
%ifarch aarch64
|
||||
BuildRequires: arm-trusted-firmware-armv8
|
||||
BuildRequires: python3-pyelftools
|
||||
%endif
|
||||
%endif
|
||||
Requires: dtc
|
||||
|
|
@ -107,6 +105,7 @@ do
|
|||
if [[ " ${rk3399[*]} " == *" $board "* ]]; then
|
||||
echo "Board: $board using rk3399"
|
||||
cp /usr/share/arm-trusted-firmware/rk3399/* builds/$(echo $board)/
|
||||
cp builds/$(echo $board)/bl31.elf builds/$(echo $board)/atf-bl31
|
||||
fi
|
||||
# End ATF
|
||||
|
||||
|
|
@ -212,6 +211,11 @@ cp -p board/sunxi/README.nand builds/docs/README.sunxi-nand
|
|||
%endif
|
||||
|
||||
%changelog
|
||||
* Tue Mar 28 2023 Peter Robinson <pbrobinson@fedoraproject.org> - 2023.04-0.4.rc5
|
||||
- Update to 2023.04 RC5
|
||||
- Drop upstreamed patches
|
||||
- Rockchip boot fixes
|
||||
|
||||
* Tue Mar 14 2023 Peter Robinson <pbrobinson@fedoraproject.org> - 2023.04-0.3.rc4
|
||||
- Update to 2023.04 RC4
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue