diff --git a/rockchip-dts-rk3328-rock64-Add-same-as-spl-order.patch b/rockchip-dts-rk3328-rock64-Add-same-as-spl-order.patch new file mode 100644 index 0000000..a5b2405 --- /dev/null +++ b/rockchip-dts-rk3328-rock64-Add-same-as-spl-order.patch @@ -0,0 +1,108 @@ +From patchwork Tue Oct 8 17:59:50 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Emmanuel Vadot +X-Patchwork-Id: 1173473 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; + spf=none (mailfrom) smtp.mailfrom=lists.denx.de + (client-ip=81.169.180.215; helo=lists.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; + receiver=) +Authentication-Results: ozlabs.org; + dmarc=none (p=none dis=none) header.from=freebsd.org +Received: from lists.denx.de (dione.denx.de [81.169.180.215]) + by ozlabs.org (Postfix) with ESMTP id 46nlW24FCYz9sDB + for ; + Wed, 9 Oct 2019 05:00:12 +1100 (AEDT) +Received: by lists.denx.de (Postfix, from userid 105) + id A69C5C21FA4; Tue, 8 Oct 2019 18:00:04 +0000 (UTC) +X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de +X-Spam-Level: +X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable + autolearn_force=no version=3.4.0 +Received: from lists.denx.de (localhost [IPv6:::1]) + by lists.denx.de (Postfix) with ESMTP id A7772C21E08; + Tue, 8 Oct 2019 18:00:00 +0000 (UTC) +Received: by lists.denx.de (Postfix, from userid 105) + id EC0BCC21E08; Tue, 8 Oct 2019 17:59:58 +0000 (UTC) +Received: from mx2.freebsd.org (mx2.freebsd.org [96.47.72.81]) + by lists.denx.de (Postfix) with ESMTPS id 8F808C21DCA + for ; Tue, 8 Oct 2019 17:59:58 +0000 (UTC) +Received: from mx1.freebsd.org (mx1.freebsd.org [96.47.72.80]) + (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) + (Client CN "mx1.freebsd.org", + Issuer "Let's Encrypt Authority X3" (verified OK)) + by mx2.freebsd.org (Postfix) with ESMTPS id 61F239BD47; + Tue, 8 Oct 2019 17:59:57 +0000 (UTC) + (envelope-from manu@freebsd.org) +Received: from smtp.freebsd.org (smtp.freebsd.org + [IPv6:2610:1c1:1:606c::24b:4]) + (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) + server-signature RSA-PSS (4096 bits) + client-signature RSA-PSS (4096 bits) client-digest SHA256) + (Client CN "smtp.freebsd.org", + Issuer "Let's Encrypt Authority X3" (verified OK)) + by mx1.freebsd.org (Postfix) with ESMTPS id 46nlVj06mwz4KTX; + Tue, 8 Oct 2019 17:59:57 +0000 (UTC) + (envelope-from manu@freebsd.org) +Received: from skull.home.blih.net (ip-9.net-89-3-105.rev.numericable.fr + [89.3.105.9]) + (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 + bits)) + (Client did not present a certificate) (Authenticated sender: manu) + by smtp.freebsd.org (Postfix) with ESMTPSA id 5F3A9BEAE; + Tue, 8 Oct 2019 17:59:56 +0000 (UTC) + (envelope-from manu@freebsd.org) +From: Emmanuel Vadot +To: matwey.kornilov@gmail.com, + albert.u.boot@aribaud.net +Date: Tue, 8 Oct 2019 19:59:50 +0200 +Message-Id: <20191008175950.77719-1-manu@freebsd.org> +X-Mailer: git-send-email 2.22.0 +MIME-Version: 1.0 +Cc: u-boot@lists.denx.de +Subject: [U-Boot] [PATCH] rockchip: dts: rk3328: rock64: Add same-as-spl order +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.18 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" + +rk3328 can use same-as-spl option so next loaders are loaded from the same +medium. +Add the boot order in the rock64 dts otherwise booting from sdcard +will result in u-boot looking into the eMMC. + +Signed-off-by: Emmanuel Vadot +--- + arch/arm/dts/rk3328-rock64-u-boot.dtsi | 5 +++++ + 1 file changed, 5 insertions(+) + +diff --git a/arch/arm/dts/rk3328-rock64-u-boot.dtsi b/arch/arm/dts/rk3328-rock64-u-boot.dtsi +index 1d441f7124..e5946d2d2d 100644 +--- a/arch/arm/dts/rk3328-rock64-u-boot.dtsi ++++ b/arch/arm/dts/rk3328-rock64-u-boot.dtsi +@@ -5,6 +5,11 @@ + + #include "rk3328-u-boot.dtsi" + #include "rk3328-sdram-lpddr3-1600.dtsi" ++/ { ++ chosen { ++ u-boot,spl-boot-order = "same-as-spl", &sdmmc, &emmc; ++ }; ++}; + + &usb_host0_xhci { + status = "okay"; diff --git a/rockchip-rk3328-Fix-memory-instability-on-ROCK64.patch b/rockchip-rk3328-Fix-memory-instability-on-ROCK64.patch new file mode 100644 index 0000000..bc5602a --- /dev/null +++ b/rockchip-rk3328-Fix-memory-instability-on-ROCK64.patch @@ -0,0 +1,193 @@ +From patchwork Sun Oct 6 16:28:13 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Simon South +X-Patchwork-Id: 1172554 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; + spf=none (mailfrom) smtp.mailfrom=lists.denx.de + (client-ip=81.169.180.215; helo=lists.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; + receiver=) +Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) + header.from=simonsouth.net +Received: from lists.denx.de (dione.denx.de [81.169.180.215]) + by ozlabs.org (Postfix) with ESMTP id 46mTcR2S2Xz9sN1 + for ; + Mon, 7 Oct 2019 03:30:31 +1100 (AEDT) +Received: by lists.denx.de (Postfix, from userid 105) + id CD03BC21EEB; Sun, 6 Oct 2019 16:30:28 +0000 (UTC) +X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de +X-Spam-Level: +X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable + autolearn_force=no version=3.4.0 +Received: from lists.denx.de (localhost [IPv6:::1]) + by lists.denx.de (Postfix) with ESMTP id 60E00C21DDC; + Sun, 6 Oct 2019 16:30:27 +0000 (UTC) +Received: by lists.denx.de (Postfix, from userid 105) + id 3DFA2C21EBF; Sun, 6 Oct 2019 16:30:16 +0000 (UTC) +Received: from mailout.easymail.ca (mailout.easymail.ca [64.68.200.34]) + by lists.denx.de (Postfix) with ESMTPS id B8197C21F19 + for ; Sun, 6 Oct 2019 16:30:15 +0000 (UTC) +Received: from localhost (localhost [127.0.0.1]) + by mailout.easymail.ca (Postfix) with ESMTP id D93E0210A0; + Sun, 6 Oct 2019 16:30:14 +0000 (UTC) +X-Virus-Scanned: Debian amavisd-new at emo06-pco.easydns.vpn +Received: from mailout.easymail.ca ([127.0.0.1]) + by localhost (emo06-pco.easydns.vpn [127.0.0.1]) (amavisd-new, + port 10024) + with ESMTP id 6U7MQUmWS2BA; Sun, 6 Oct 2019 16:30:14 +0000 (UTC) +Received: from localhost.localdomain (unknown [108.162.141.100]) + (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 + bits)) (No client certificate requested) + by mailout.easymail.ca (Postfix) with ESMTPSA id 2269520D10; + Sun, 6 Oct 2019 16:30:07 +0000 (UTC) +From: Simon South +To: u-boot@lists.denx.de +Date: Sun, 6 Oct 2019 12:28:13 -0400 +Message-Id: +X-Mailer: git-send-email 2.23.0 +In-Reply-To: +References: +MIME-Version: 1.0 +Subject: [U-Boot] [PATCH 1/2] ram: rk3328: Use correct frequency units in + function +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.18 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" + +Fix a pair of tests in phy_dll_bypass_set() that used incorrect units +for the DDR frequency, causing the DRAM controller to be misconfigured +in most cases. + +Signed-off-by: Simon South +Reviewed-by: Kever Yang +--- + drivers/ram/rockchip/sdram_rk3328.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/drivers/ram/rockchip/sdram_rk3328.c b/drivers/ram/rockchip/sdram_rk3328.c +index 656696ac3c..0541bbadf0 100644 +--- a/drivers/ram/rockchip/sdram_rk3328.c ++++ b/drivers/ram/rockchip/sdram_rk3328.c +@@ -311,12 +311,12 @@ static void phy_dll_bypass_set(struct dram_info *dram, u32 freq) + setbits_le32(PHY_REG(phy_base, 0x56), 1 << 4); + clrbits_le32(PHY_REG(phy_base, 0x57), 1 << 3); + +- if (freq <= (400 * MHz)) ++ if (freq <= 400) + /* DLL bypass */ + setbits_le32(PHY_REG(phy_base, 0xa4), 0x1f); + else + clrbits_le32(PHY_REG(phy_base, 0xa4), 0x1f); +- if (freq <= (680 * MHz)) ++ if (freq <= 680) + tmp = 2; + else + tmp = 1; + +From patchwork Sun Oct 6 16:28:14 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Simon South +X-Patchwork-Id: 1172555 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; + spf=none (mailfrom) smtp.mailfrom=lists.denx.de + (client-ip=81.169.180.215; helo=lists.denx.de; + envelope-from=u-boot-bounces@lists.denx.de; + receiver=) +Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) + header.from=simonsouth.net +Received: from lists.denx.de (dione.denx.de [81.169.180.215]) + by ozlabs.org (Postfix) with ESMTP id 46mTd93q3Qz9sN1 + for ; + Mon, 7 Oct 2019 03:31:09 +1100 (AEDT) +Received: by lists.denx.de (Postfix, from userid 105) + id 1F528C21ECF; Sun, 6 Oct 2019 16:30:43 +0000 (UTC) +X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de +X-Spam-Level: +X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable + autolearn_force=no version=3.4.0 +Received: from lists.denx.de (localhost [IPv6:::1]) + by lists.denx.de (Postfix) with ESMTP id 6FC76C21ECF; + Sun, 6 Oct 2019 16:30:42 +0000 (UTC) +Received: by lists.denx.de (Postfix, from userid 105) + id 12907C21DD7; Sun, 6 Oct 2019 16:30:31 +0000 (UTC) +Received: from mailout.easymail.ca (mailout.easymail.ca [64.68.200.34]) + by lists.denx.de (Postfix) with ESMTPS id 401F8C21ED6 + for ; Sun, 6 Oct 2019 16:30:29 +0000 (UTC) +Received: from localhost (localhost [127.0.0.1]) + by mailout.easymail.ca (Postfix) with ESMTP id 6259C2109A; + Sun, 6 Oct 2019 16:30:28 +0000 (UTC) +X-Virus-Scanned: Debian amavisd-new at emo06-pco.easydns.vpn +Received: from mailout.easymail.ca ([127.0.0.1]) + by localhost (emo06-pco.easydns.vpn [127.0.0.1]) (amavisd-new, + port 10024) + with ESMTP id reQ6_1IuD0WA; Sun, 6 Oct 2019 16:30:28 +0000 (UTC) +Received: from localhost.localdomain (unknown [108.162.141.100]) + (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 + bits)) (No client certificate requested) + by mailout.easymail.ca (Postfix) with ESMTPSA id 42EDE20D10; + Sun, 6 Oct 2019 16:30:20 +0000 (UTC) +From: Simon South +To: u-boot@lists.denx.de +Date: Sun, 6 Oct 2019 12:28:14 -0400 +Message-Id: <17f58d8cdf7d32de26cb36950fa8676e0dd54d49.1570376078.git.simon@simonsouth.net> +X-Mailer: git-send-email 2.23.0 +In-Reply-To: +References: +MIME-Version: 1.0 +Subject: [U-Boot] [PATCH 2/2] ram: rk3328: Fix loading of skew values +X-BeenThere: u-boot@lists.denx.de +X-Mailman-Version: 2.1.18 +Precedence: list +List-Id: U-Boot discussion +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Errors-To: u-boot-bounces@lists.denx.de +Sender: "U-Boot" + +Fix a typo that caused incorrect values to be loaded into the DRAM +controller's deskew registers. + +Signed-off-by: Simon South +Reviewed-by: Kever Yang +--- + drivers/ram/rockchip/sdram_rk3328.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/ram/rockchip/sdram_rk3328.c b/drivers/ram/rockchip/sdram_rk3328.c +index 0541bbadf0..e84c9be6a2 100644 +--- a/drivers/ram/rockchip/sdram_rk3328.c ++++ b/drivers/ram/rockchip/sdram_rk3328.c +@@ -394,7 +394,7 @@ static void phy_cfg(struct dram_info *dram, + copy_to_reg(PHY_REG(phy_base, 0x70), + &sdram_params->skew.cs0_dm0_skew[0], 44 * 4); + copy_to_reg(PHY_REG(phy_base, 0xc0), +- &sdram_params->skew.cs0_dm1_skew[0], 44 * 4); ++ &sdram_params->skew.cs1_dm0_skew[0], 44 * 4); + } + + static int update_refresh_reg(struct dram_info *dram) diff --git a/rockchip-rk3399-rock960-Update-config-for-TPL.patch b/rockchip-rk3399-rock960-Update-config-for-TPL.patch new file mode 100644 index 0000000..db838db --- /dev/null +++ b/rockchip-rk3399-rock960-Update-config-for-TPL.patch @@ -0,0 +1,58 @@ +From d49e0341dcc96b9a33d59579fa9defaaa4b04d1c Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Wed, 9 Oct 2019 12:15:10 +0100 +Subject: [PATCH] rockchip: rk3399: rock960: Update config for TPL + +The SPL is now running at SDRAM, and 0x10000 is used by BL31, +and the ARM SPL do not support relocate now, we need reserved +0x50000 so that it won't overwrite the code when we load the +bl31 to target space. +We should remove this after we enable the relocate feature. + +The SPL need malloc 0x9000 for MMC as buffer used for transfer +data to IRAM(The EMMC DMA can not transfer data to IRAM directly). + +Signed-off-by: Peter Robinson +--- + configs/rock960-rk3399_defconfig | 10 +++++++--- + 1 file changed, 7 insertions(+), 3 deletions(-) + +diff --git a/configs/rock960-rk3399_defconfig b/configs/rock960-rk3399_defconfig +index cb3c68db6b..f211a65587 100644 +--- a/configs/rock960-rk3399_defconfig ++++ b/configs/rock960-rk3399_defconfig +@@ -2,19 +2,21 @@ CONFIG_ARM=y + CONFIG_ARCH_ROCKCHIP=y + CONFIG_SYS_TEXT_BASE=0x00200000 + CONFIG_ROCKCHIP_RK3399=y +-CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000 ++CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x50000 + CONFIG_TARGET_ROCK960_RK3399=y + CONFIG_SPL_STACK_R_ADDR=0x80000 + CONFIG_DEBUG_UART_BASE=0xFF1A0000 + CONFIG_DEBUG_UART_CLOCK=24000000 + CONFIG_DEBUG_UART=y +-CONFIG_SPL_TEXT_BASE=0xff8c2000 + CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rock960.dtb" + # CONFIG_DISPLAY_CPUINFO is not set + CONFIG_DISPLAY_BOARDINFO_LATE=y + # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set + CONFIG_SPL_STACK_R=y +-CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000 ++CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 ++CONFIG_SPL_ATF=y ++CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y ++CONFIG_TPL=y + CONFIG_SYS_PROMPT="rock960 => " + CONFIG_CMD_BOOTZ=y + CONFIG_CMD_GPT=y +@@ -56,4 +58,6 @@ CONFIG_USB_ETHER_ASIX88179=y + CONFIG_USB_ETHER_MCS7830=y + CONFIG_USB_ETHER_RTL8152=y + CONFIG_USB_ETHER_SMSC95XX=y ++CONFIG_USE_TINY_PRINTF=y ++CONFIG_SPL_TINY_MEMSET=y + CONFIG_ERRNO_STR=y +-- +2.21.0 + diff --git a/uboot-tools.spec b/uboot-tools.spec index 484b4dd..7783f0e 100644 --- a/uboot-tools.spec +++ b/uboot-tools.spec @@ -2,7 +2,7 @@ Name: uboot-tools Version: 2019.10 -Release: 1%{?candidate:.%{candidate}}.0.riscv64%{?dist} +Release: 2%{?candidate:.%{candidate}}.0.riscv64%{?dist} Summary: U-Boot utilities License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ URL: http://www.denx.de/wiki/U-Boot @@ -29,6 +29,9 @@ Patch8: ARM-tegra-Add-NVIDIA-Jetson-Nano.patch Patch9: arm-tegra-defaine-fdtfile-for-all-devices.patch Patch10: Revert-spl-imx6-Let-spl_boot_device-return-USDHC1-or.patch Patch11: Revert-ARM-tegra-reserve-unmapped-RAM-so-EFI-doesn-t-use-it.patch +Patch12: rockchip-rk3399-rock960-Update-config-for-TPL.patch +Patch13: rockchip-dts-rk3328-rock64-Add-same-as-spl-order.patch +Patch14: rockchip-rk3328-Fix-memory-instability-on-ROCK64.patch # PXE depends on fdt_addr (mandatory) # fdt_addr is an address to DTB in HW (e.g. ROM) @@ -160,6 +163,9 @@ do # End ATF make $(echo $board)_defconfig O=builds/$(echo $board)/ make HOSTCC="gcc $RPM_OPT_FLAGS" CROSS_COMPILE="" %{?_smp_mflags} V=1 O=builds/$(echo $board)/ + if [[ " ${rk3328[*]} " == *" $board "* ]]; then + make HOSTCC="gcc $RPM_OPT_FLAGS" CROSS_COMPILE="" %{?_smp_mflags} u-boot.itb V=1 O=builds/$(echo $board)/ + fi if [[ " ${rk3399[*]} " == *" $board "* ]]; then echo "Board: $board using rk3399" builds/$(echo $board)/tools/mkimage -n rk3399 -T rksd -d builds/$(echo $board)/spl/u-boot-spl.bin builds/$(echo $board)/spl_sd.img @@ -239,7 +245,7 @@ done for board in $(cat %{_arch}-boards) do mkdir -p $RPM_BUILD_ROOT%{_datadir}/uboot/$(echo $board)/ - for file in MLO SPL spl/arndale-spl.bin spl/origen-spl.bin spl/smdkv310-spl.bin u-boot.bin u-boot.dtb u-boot-dtb-tegra.bin u-boot.img u-boot.imx u-boot-nodtb-tegra.bin u-boot-spl.kwb u-boot-sunxi-with-spl.bin spl_sd.img spl_spi.img + for file in MLO SPL spl/arndale-spl.bin spl/origen-spl.bin spl/smdkv310-spl.bin u-boot.bin u-boot.dtb u-boot-dtb-tegra.bin u-boot.img u-boot.imx u-boot-nodtb-tegra.bin u-boot-spl.kwb u-boot-sunxi-with-spl.bin spl_sd.img spl_spi.img idbloader.img do if [ -f builds/$(echo $board)/$(echo $file) ]; then install -p -m 0644 builds/$(echo $board)/$(echo $file) $RPM_BUILD_ROOT%{_datadir}/uboot/$(echo $board)/ @@ -307,9 +313,12 @@ cp -p board/warp7/README builds/docs/README.warp7 %endif %changelog -* Wed Oct 9 2019 David Abdurachmanov 2019.10-1.0.riscv64 +* Thu Oct 17 2019 David Abdurachmanov 2019.10-2.0.riscv64 - Add support for RISC-V (riscv64) +* Wed Oct 9 2019 Peter Robinson 2019.10-2 +- Fixes for Rockchips rk3328 and rk3399 platforms + * Mon Oct 7 2019 Peter Robinson 2019.10-1 - 2019.10