Merge remote-tracking branch 'up/f31' into master-riscv64

Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
This commit is contained in:
David Abdurachmanov 2019-10-17 10:18:30 +03:00
commit 2b10fe613a
Signed by: davidlt
GPG Key ID: 8B7F1DA0E2C9FDBB
4 changed files with 371 additions and 3 deletions

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From: Emmanuel Vadot <manu@freebsd.org>
To: matwey.kornilov@gmail.com,
albert.u.boot@aribaud.net
Date: Tue, 8 Oct 2019 19:59:50 +0200
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Subject: [U-Boot] [PATCH] rockchip: dts: rk3328: rock64: Add same-as-spl order
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rk3328 can use same-as-spl option so next loaders are loaded from the same
medium.
Add the boot order in the rock64 dts otherwise booting from sdcard
will result in u-boot looking into the eMMC.
Signed-off-by: Emmanuel Vadot <manu@freebsd.org>
---
arch/arm/dts/rk3328-rock64-u-boot.dtsi | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm/dts/rk3328-rock64-u-boot.dtsi b/arch/arm/dts/rk3328-rock64-u-boot.dtsi
index 1d441f7124..e5946d2d2d 100644
--- a/arch/arm/dts/rk3328-rock64-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-rock64-u-boot.dtsi
@@ -5,6 +5,11 @@
#include "rk3328-u-boot.dtsi"
#include "rk3328-sdram-lpddr3-1600.dtsi"
+/ {
+ chosen {
+ u-boot,spl-boot-order = "same-as-spl", &sdmmc, &emmc;
+ };
+};
&usb_host0_xhci {
status = "okay";

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Date: Sun, 6 Oct 2019 12:28:13 -0400
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Subject: [U-Boot] [PATCH 1/2] ram: rk3328: Use correct frequency units in
function
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Fix a pair of tests in phy_dll_bypass_set() that used incorrect units
for the DDR frequency, causing the DRAM controller to be misconfigured
in most cases.
Signed-off-by: Simon South <simon@simonsouth.net>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
---
drivers/ram/rockchip/sdram_rk3328.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/ram/rockchip/sdram_rk3328.c b/drivers/ram/rockchip/sdram_rk3328.c
index 656696ac3c..0541bbadf0 100644
--- a/drivers/ram/rockchip/sdram_rk3328.c
+++ b/drivers/ram/rockchip/sdram_rk3328.c
@@ -311,12 +311,12 @@ static void phy_dll_bypass_set(struct dram_info *dram, u32 freq)
setbits_le32(PHY_REG(phy_base, 0x56), 1 << 4);
clrbits_le32(PHY_REG(phy_base, 0x57), 1 << 3);
- if (freq <= (400 * MHz))
+ if (freq <= 400)
/* DLL bypass */
setbits_le32(PHY_REG(phy_base, 0xa4), 0x1f);
else
clrbits_le32(PHY_REG(phy_base, 0xa4), 0x1f);
- if (freq <= (680 * MHz))
+ if (freq <= 680)
tmp = 2;
else
tmp = 1;
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Subject: [U-Boot] [PATCH 2/2] ram: rk3328: Fix loading of skew values
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Fix a typo that caused incorrect values to be loaded into the DRAM
controller's deskew registers.
Signed-off-by: Simon South <simon@simonsouth.net>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
---
drivers/ram/rockchip/sdram_rk3328.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/ram/rockchip/sdram_rk3328.c b/drivers/ram/rockchip/sdram_rk3328.c
index 0541bbadf0..e84c9be6a2 100644
--- a/drivers/ram/rockchip/sdram_rk3328.c
+++ b/drivers/ram/rockchip/sdram_rk3328.c
@@ -394,7 +394,7 @@ static void phy_cfg(struct dram_info *dram,
copy_to_reg(PHY_REG(phy_base, 0x70),
&sdram_params->skew.cs0_dm0_skew[0], 44 * 4);
copy_to_reg(PHY_REG(phy_base, 0xc0),
- &sdram_params->skew.cs0_dm1_skew[0], 44 * 4);
+ &sdram_params->skew.cs1_dm0_skew[0], 44 * 4);
}
static int update_refresh_reg(struct dram_info *dram)

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@ -0,0 +1,58 @@
From d49e0341dcc96b9a33d59579fa9defaaa4b04d1c Mon Sep 17 00:00:00 2001
From: Peter Robinson <pbrobinson@gmail.com>
Date: Wed, 9 Oct 2019 12:15:10 +0100
Subject: [PATCH] rockchip: rk3399: rock960: Update config for TPL
The SPL is now running at SDRAM, and 0x10000 is used by BL31,
and the ARM SPL do not support relocate now, we need reserved
0x50000 so that it won't overwrite the code when we load the
bl31 to target space.
We should remove this after we enable the relocate feature.
The SPL need malloc 0x9000 for MMC as buffer used for transfer
data to IRAM(The EMMC DMA can not transfer data to IRAM directly).
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
---
configs/rock960-rk3399_defconfig | 10 +++++++---
1 file changed, 7 insertions(+), 3 deletions(-)
diff --git a/configs/rock960-rk3399_defconfig b/configs/rock960-rk3399_defconfig
index cb3c68db6b..f211a65587 100644
--- a/configs/rock960-rk3399_defconfig
+++ b/configs/rock960-rk3399_defconfig
@@ -2,19 +2,21 @@ CONFIG_ARM=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00200000
CONFIG_ROCKCHIP_RK3399=y
-CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x50000
CONFIG_TARGET_ROCK960_RK3399=y
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_DEBUG_UART_BASE=0xFF1A0000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART=y
-CONFIG_SPL_TEXT_BASE=0xff8c2000
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rock960.dtb"
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
CONFIG_SPL_STACK_R=y
-CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
+CONFIG_SPL_ATF=y
+CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
+CONFIG_TPL=y
CONFIG_SYS_PROMPT="rock960 => "
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GPT=y
@@ -56,4 +58,6 @@ CONFIG_USB_ETHER_ASIX88179=y
CONFIG_USB_ETHER_MCS7830=y
CONFIG_USB_ETHER_RTL8152=y
CONFIG_USB_ETHER_SMSC95XX=y
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_SPL_TINY_MEMSET=y
CONFIG_ERRNO_STR=y
--
2.21.0

View File

@ -2,7 +2,7 @@
Name: uboot-tools
Version: 2019.10
Release: 1%{?candidate:.%{candidate}}.0.riscv64%{?dist}
Release: 2%{?candidate:.%{candidate}}.0.riscv64%{?dist}
Summary: U-Boot utilities
License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+
URL: http://www.denx.de/wiki/U-Boot
@ -29,6 +29,9 @@ Patch8: ARM-tegra-Add-NVIDIA-Jetson-Nano.patch
Patch9: arm-tegra-defaine-fdtfile-for-all-devices.patch
Patch10: Revert-spl-imx6-Let-spl_boot_device-return-USDHC1-or.patch
Patch11: Revert-ARM-tegra-reserve-unmapped-RAM-so-EFI-doesn-t-use-it.patch
Patch12: rockchip-rk3399-rock960-Update-config-for-TPL.patch
Patch13: rockchip-dts-rk3328-rock64-Add-same-as-spl-order.patch
Patch14: rockchip-rk3328-Fix-memory-instability-on-ROCK64.patch
# PXE depends on fdt_addr (mandatory)
# fdt_addr is an address to DTB in HW (e.g. ROM)
@ -160,6 +163,9 @@ do
# End ATF
make $(echo $board)_defconfig O=builds/$(echo $board)/
make HOSTCC="gcc $RPM_OPT_FLAGS" CROSS_COMPILE="" %{?_smp_mflags} V=1 O=builds/$(echo $board)/
if [[ " ${rk3328[*]} " == *" $board "* ]]; then
make HOSTCC="gcc $RPM_OPT_FLAGS" CROSS_COMPILE="" %{?_smp_mflags} u-boot.itb V=1 O=builds/$(echo $board)/
fi
if [[ " ${rk3399[*]} " == *" $board "* ]]; then
echo "Board: $board using rk3399"
builds/$(echo $board)/tools/mkimage -n rk3399 -T rksd -d builds/$(echo $board)/spl/u-boot-spl.bin builds/$(echo $board)/spl_sd.img
@ -239,7 +245,7 @@ done
for board in $(cat %{_arch}-boards)
do
mkdir -p $RPM_BUILD_ROOT%{_datadir}/uboot/$(echo $board)/
for file in MLO SPL spl/arndale-spl.bin spl/origen-spl.bin spl/smdkv310-spl.bin u-boot.bin u-boot.dtb u-boot-dtb-tegra.bin u-boot.img u-boot.imx u-boot-nodtb-tegra.bin u-boot-spl.kwb u-boot-sunxi-with-spl.bin spl_sd.img spl_spi.img
for file in MLO SPL spl/arndale-spl.bin spl/origen-spl.bin spl/smdkv310-spl.bin u-boot.bin u-boot.dtb u-boot-dtb-tegra.bin u-boot.img u-boot.imx u-boot-nodtb-tegra.bin u-boot-spl.kwb u-boot-sunxi-with-spl.bin spl_sd.img spl_spi.img idbloader.img
do
if [ -f builds/$(echo $board)/$(echo $file) ]; then
install -p -m 0644 builds/$(echo $board)/$(echo $file) $RPM_BUILD_ROOT%{_datadir}/uboot/$(echo $board)/
@ -307,9 +313,12 @@ cp -p board/warp7/README builds/docs/README.warp7
%endif
%changelog
* Wed Oct 9 2019 David Abdurachmanov <david.abdurachmanov@sifive.com> 2019.10-1.0.riscv64
* Thu Oct 17 2019 David Abdurachmanov <david.abdurachmanov@sifive.com> 2019.10-2.0.riscv64
- Add support for RISC-V (riscv64)
* Wed Oct 9 2019 Peter Robinson <pbrobinson@fedoraproject.org> 2019.10-2
- Fixes for Rockchips rk3328 and rk3399 platforms
* Mon Oct 7 2019 Peter Robinson <pbrobinson@fedoraproject.org> 2019.10-1
- 2019.10