2017.01 RC1
This commit is contained in:
Peter Robinson
parent
1446cad6ba
commit
075387c27a
@ -1,699 +0,0 @@
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From patchwork Fri Nov 25 18:56:57 2016
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Content-Type: text/plain; charset="utf-8"
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MIME-Version: 1.0
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Content-Transfer-Encoding: 7bit
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Subject: [U-Boot] mx6sx: Add initial support for UDOO Neo Board
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From: Breno Lima <breno.lima@nxp.com>
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X-Patchwork-Id: 699359
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X-Patchwork-Delegate: sbabic@denx.de
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Message-Id: <1480100217-853-1-git-send-email-breno.lima@nxp.com>
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To: <sbabic@denx.de>
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Cc: u-boot@lists.denx.de, Breno Lima <breno.lima@nxp.com>,
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fabio.estevam@nxp.com, francesco.montefoschi@udoo.org,
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francesco.monte@gmail.com, brenomatheus@gmail.com
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Date: Fri, 25 Nov 2016 16:56:57 -0200
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UDOO Neo Board is a development board from Seco that has three models:
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- UDOO Neo Basic
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- UDOO Neo Basic Kick Starter
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- UDOO Neo Extended
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- UDOO Neo Full
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All versions are based on the i.MX6 SoloX processor.
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For more details about the UDOO Neo board, please refer to:
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http://www.udoo.org/udoo-neo/
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This work is based on a previous commit of Francesco Montefoschi
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<francesco.monte@gmail.com>:
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https://github.com/fmntf/u-boot/commit/877b71184a5105e708024f232d36aed574961844
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Only tested on the UDOO Neo Full board.
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Signed-off-by: Breno Lima <breno.lima@nxp.com>
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Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
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---
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arch/arm/cpu/armv7/mx6/Kconfig | 5 +
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board/udoo/neo/Kconfig | 12 ++
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board/udoo/neo/MAINTAINERS | 7 +
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board/udoo/neo/Makefile | 6 +
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board/udoo/neo/neo.c | 441 +++++++++++++++++++++++++++++++++++++++++
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configs/udoo_neo_defconfig | 30 +++
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include/configs/udoo_neo.h | 94 +++++++++
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7 files changed, 595 insertions(+)
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create mode 100644 board/udoo/neo/Kconfig
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create mode 100644 board/udoo/neo/MAINTAINERS
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create mode 100644 board/udoo/neo/Makefile
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create mode 100644 board/udoo/neo/neo.c
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create mode 100644 configs/udoo_neo_defconfig
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create mode 100644 include/configs/udoo_neo.h
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diff --git a/arch/arm/cpu/armv7/mx6/Kconfig b/arch/arm/cpu/armv7/mx6/Kconfig
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index 762a581..ea8b693 100644
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--- a/arch/arm/cpu/armv7/mx6/Kconfig
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+++ b/arch/arm/cpu/armv7/mx6/Kconfig
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@@ -192,6 +192,10 @@ config TARGET_UDOO
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bool "udoo"
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select SUPPORT_SPL
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+config TARGET_UDOO_NEO
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+ bool "UDOO Neo"
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+ select SUPPORT_SPL
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+
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config TARGET_WANDBOARD
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bool "wandboard"
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select SUPPORT_SPL
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@@ -253,6 +257,7 @@ source "board/technexion/pico-imx6ul/Kconfig"
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source "board/tbs/tbs2910/Kconfig"
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source "board/tqc/tqma6/Kconfig"
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source "board/udoo/Kconfig"
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+source "board/udoo/neo/Kconfig"
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source "board/wandboard/Kconfig"
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source "board/warp/Kconfig"
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diff --git a/board/udoo/neo/Kconfig b/board/udoo/neo/Kconfig
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new file mode 100644
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index 0000000..8f474df
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--- /dev/null
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+++ b/board/udoo/neo/Kconfig
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@@ -0,0 +1,12 @@
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+if TARGET_UDOO_NEO
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+
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+config SYS_VENDOR
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+ default "udoo"
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+
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+config SYS_BOARD
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+ default "neo"
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+
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+config SYS_CONFIG_NAME
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+ default "udoo_neo"
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+
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+endif
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diff --git a/board/udoo/neo/MAINTAINERS b/board/udoo/neo/MAINTAINERS
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new file mode 100644
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index 0000000..743fe33
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--- /dev/null
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+++ b/board/udoo/neo/MAINTAINERS
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@@ -0,0 +1,7 @@
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+UDOO NEO BOARD
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+M: Breno Lima <breno.lima@nxp.com>
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+M: Francesco Montefoschi <francesco.montefoschi@udoo.org>
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+S: Maintained
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+F: board/udoo/neo/
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+F: include/configs/udoo_neo.h
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+F: configs/udoo_neo_defconfig
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diff --git a/board/udoo/neo/Makefile b/board/udoo/neo/Makefile
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new file mode 100644
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index 0000000..150cbc1
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--- /dev/null
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+++ b/board/udoo/neo/Makefile
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@@ -0,0 +1,6 @@
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+# (C) Copyright 2015 UDOO Team
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+#
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+# SPDX-License-Identifier: GPL-2.0+
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+#
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+
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+obj-y := neo.o
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diff --git a/board/udoo/neo/neo.c b/board/udoo/neo/neo.c
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new file mode 100644
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index 0000000..7f17469
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--- /dev/null
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+++ b/board/udoo/neo/neo.c
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@@ -0,0 +1,441 @@
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+/*
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+ * Copyright (C) 2014-2015 Freescale Semiconductor, Inc.
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+ * Copyright (C) Jasbir Matharu
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+ * Copyright (C) UDOO Team
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+ *
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+ * Author: Breno Lima <breno.lima@nxp.com>
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+ * Author: Francesco Montefoschi <francesco.monte@gmail.com>
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+ *
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+ * SPDX-License-Identifier: GPL-2.0+
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+ */
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+
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+#include <asm/arch/clock.h>
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+#include <asm/arch/imx-regs.h>
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+#include <asm/arch/iomux.h>
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+#include <asm/arch/mx6-pins.h>
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+#include <asm/gpio.h>
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+#include <asm/imx-common/iomux-v3.h>
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+#include <mmc.h>
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+#include <fsl_esdhc.h>
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+#include <asm/arch/crm_regs.h>
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+#include <asm/io.h>
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+#include <asm/arch/sys_proto.h>
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+#include <spl.h>
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+#include <linux/sizes.h>
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+#include <common.h>
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+
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+DECLARE_GLOBAL_DATA_PTR;
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+
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+enum {
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+ UDOO_NEO_TYPE_BASIC,
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+ UDOO_NEO_TYPE_BASIC_KS,
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+ UDOO_NEO_TYPE_FULL,
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+ UDOO_NEO_TYPE_EXTENDED,
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+};
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+
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+#define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
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+ PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
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+ PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS)
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+
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+#define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
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+ PAD_CTL_PUS_22K_UP | PAD_CTL_SPEED_LOW | \
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+ PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS)
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+
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+#define WDOG_PAD_CTRL (PAD_CTL_PUE | PAD_CTL_PKE | PAD_CTL_SPEED_MED | \
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+ PAD_CTL_DSE_40ohm)
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+
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+#define BOARD_DETECT_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
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+ PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
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+ PAD_CTL_DSE_34ohm | PAD_CTL_HYS | PAD_CTL_SRE_FAST)
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+#define BOARD_DETECT_PAD_CFG (MUX_PAD_CTRL(BOARD_DETECT_PAD_CTRL) | \
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+ MUX_MODE_SION)
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+
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+int dram_init(void)
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+{
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+ gd->ram_size = imx_ddr_size();
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+ return 0;
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+}
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+
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+static iomux_v3_cfg_t const uart1_pads[] = {
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+ MX6_PAD_GPIO1_IO04__UART1_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
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+ MX6_PAD_GPIO1_IO05__UART1_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
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+};
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+
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+static iomux_v3_cfg_t const usdhc2_pads[] = {
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+ MX6_PAD_SD2_CLK__USDHC2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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+ MX6_PAD_SD2_CMD__USDHC2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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+ MX6_PAD_SD2_DATA0__USDHC2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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+ MX6_PAD_SD2_DATA1__USDHC2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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+ MX6_PAD_SD2_DATA2__USDHC2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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+ MX6_PAD_SD2_DATA3__USDHC2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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+ /* CD pin */
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+ MX6_PAD_SD1_DATA0__GPIO6_IO_2 | MUX_PAD_CTRL(NO_PAD_CTRL),
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+ /* Power */
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+ MX6_PAD_SD1_CMD__GPIO6_IO_1 | MUX_PAD_CTRL(NO_PAD_CTRL),
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+};
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+
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+static iomux_v3_cfg_t const board_recognition_pads[] = {
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+ /*Connected to R184*/
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+ MX6_PAD_NAND_READY_B__GPIO4_IO_13 | BOARD_DETECT_PAD_CFG,
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+ /*Connected to R185*/
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+ MX6_PAD_NAND_ALE__GPIO4_IO_0 | BOARD_DETECT_PAD_CFG,
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+};
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+
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+static iomux_v3_cfg_t const usdhc3_pads[] = {
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+ /* Configured for WLAN */
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+ MX6_PAD_SD3_CLK__USDHC3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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+ MX6_PAD_SD3_CMD__USDHC3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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+ MX6_PAD_SD3_DATA0__USDHC3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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+ MX6_PAD_SD3_DATA1__USDHC3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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+ MX6_PAD_SD3_DATA2__USDHC3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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+ MX6_PAD_SD3_DATA3__USDHC3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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+};
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+
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+static iomux_v3_cfg_t const wdog_b_pad = {
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+ MX6_PAD_GPIO1_IO13__GPIO1_IO_13 | MUX_PAD_CTRL(WDOG_PAD_CTRL),
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+};
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+
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+static iomux_v3_cfg_t const peri_3v3_pads[] = {
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+ MX6_PAD_QSPI1A_DATA0__GPIO4_IO_16 | MUX_PAD_CTRL(NO_PAD_CTRL),
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+};
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+
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+static void setup_iomux_uart(void)
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+{
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+ imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads));
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+}
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+
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+int board_init(void)
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+{
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+ /* Address of boot parameters */
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+ gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
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+
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+ /*
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+ * Because kernel set WDOG_B mux before pad with the commone pinctrl
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+ * framwork now and wdog reset will be triggered once set WDOG_B mux
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+ * with default pad setting, we set pad setting here to workaround this.
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+ * Since imx_iomux_v3_setup_pad also set mux before pad setting, we set
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+ * as GPIO mux firstly here to workaround it.
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+ */
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+ imx_iomux_v3_setup_pad(wdog_b_pad);
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+
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+ /* Enable PERI_3V3, which is used by SD2, ENET, LVDS, BT */
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+ imx_iomux_v3_setup_multiple_pads(peri_3v3_pads,
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+ ARRAY_SIZE(peri_3v3_pads));
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+
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+ /* Active high for ncp692 */
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+ gpio_direction_output(IMX_GPIO_NR(4, 16) , 1);
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+
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+ return 0;
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+}
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+
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+static int get_board_value(void)
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+{
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+ int r184, r185;
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+
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+ imx_iomux_v3_setup_multiple_pads(board_recognition_pads,
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+ ARRAY_SIZE(board_recognition_pads));
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+
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+ gpio_direction_input(IMX_GPIO_NR(4, 13));
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+ gpio_direction_input(IMX_GPIO_NR(4, 0));
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+
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+ r184 = gpio_get_value(IMX_GPIO_NR(4, 13));
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+ r185 = gpio_get_value(IMX_GPIO_NR(4, 0));
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+
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+ /*
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+ * Machine selection -
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+ * Machine r184, r185
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+ * ---------------------------------
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+ * Basic 0 0
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+ * Basic Ks 0 1
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+ * Full 1 0
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+ * Extended 1 1
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+ */
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+
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+ return (r184 << 1) + r185;
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+}
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+
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+int board_early_init_f(void)
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+{
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+ setup_iomux_uart();
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+
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+ return 0;
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+}
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|
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+
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+static struct fsl_esdhc_cfg usdhc_cfg[2] = {
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+ {USDHC2_BASE_ADDR, 0, 4},
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+ {USDHC3_BASE_ADDR, 0, 4},
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+};
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+
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+#define USDHC2_PWR_GPIO IMX_GPIO_NR(6, 1)
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+#define USDHC2_CD_GPIO IMX_GPIO_NR(6, 2)
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+
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+int board_mmc_getcd(struct mmc *mmc)
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+{
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+ struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
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+ int ret = 0;
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+
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+ switch (cfg->esdhc_base) {
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+ case USDHC2_BASE_ADDR:
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+ ret = !gpio_get_value(USDHC2_CD_GPIO);
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+ break;
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+ }
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+
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+ return ret;
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+}
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+
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+int board_mmc_init(bd_t *bis)
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+{
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+#ifndef CONFIG_SPL_BUILD
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+ int i, ret;
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+
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|
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+ /*
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|
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+ * According to the board_mmc_init() the following map is done:
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|
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+ * (U-boot device node) (Physical Port)
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|
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+ * mmc0 USDHC2
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|
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+ */
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|
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+ for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) {
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|
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+ switch (i) {
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|
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+ case 0:
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|
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+ imx_iomux_v3_setup_multiple_pads(
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|
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+ usdhc2_pads, ARRAY_SIZE(usdhc2_pads));
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|
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+ usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
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|
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+ gpio_direction_input(USDHC2_CD_GPIO);
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|
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+ gpio_direction_output(USDHC2_PWR_GPIO, 1);
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|
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+ break;
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|
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+ case 1:
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|
||||||
+ imx_iomux_v3_setup_multiple_pads(
|
|
||||||
+ usdhc3_pads, ARRAY_SIZE(usdhc3_pads));
|
|
||||||
+ usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
|
|
||||||
+ break;
|
|
||||||
+ default:
|
|
||||||
+ printf("Warning: you configured more USDHC controllers\
|
|
||||||
+ (%d) than supported by the board\n", i + 1);
|
|
||||||
+ return -EINVAL;
|
|
||||||
+ }
|
|
||||||
+
|
|
||||||
+ ret = fsl_esdhc_initialize(bis, &usdhc_cfg[i]);
|
|
||||||
+ if (ret) {
|
|
||||||
+ printf("Warning:\
|
|
||||||
+ failed to initialize mmc dev %d\n", i);
|
|
||||||
+ return ret;
|
|
||||||
+ }
|
|
||||||
+ }
|
|
||||||
+
|
|
||||||
+ return 0;
|
|
||||||
+#else
|
|
||||||
+ struct src *src_regs = (struct src *)SRC_BASE_ADDR;
|
|
||||||
+ u32 val;
|
|
||||||
+ u32 port;
|
|
||||||
+
|
|
||||||
+ val = readl(&src_regs->sbmr1);
|
|
||||||
+
|
|
||||||
+ if ((val & 0xc0) != 0x40) {
|
|
||||||
+ printf("Not boot from USDHC!\n");
|
|
||||||
+ return -EINVAL;
|
|
||||||
+ }
|
|
||||||
+
|
|
||||||
+ port = (val >> 11) & 0x3;
|
|
||||||
+ printf("port %d\n", port);
|
|
||||||
+ switch (port) {
|
|
||||||
+ case 1:
|
|
||||||
+ imx_iomux_v3_setup_multiple_pads(
|
|
||||||
+ usdhc2_pads, ARRAY_SIZE(usdhc2_pads));
|
|
||||||
+ usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
|
|
||||||
+ usdhc_cfg[0].esdhc_base = USDHC2_BASE_ADDR;
|
|
||||||
+ gpio_direction_input(USDHC2_CD_GPIO);
|
|
||||||
+ gpio_direction_output(USDHC2_PWR_GPIO, 1);
|
|
||||||
+ break;
|
|
||||||
+ case 2:
|
|
||||||
+ imx_iomux_v3_setup_multiple_pads(
|
|
||||||
+ usdhc3_pads, ARRAY_SIZE(usdhc3_pads));
|
|
||||||
+ usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
|
|
||||||
+ usdhc_cfg[1].esdhc_base = USDHC3_BASE_ADDR;
|
|
||||||
+ break;
|
|
||||||
+ }
|
|
||||||
+
|
|
||||||
+ gd->arch.sdhc_clk = usdhc_cfg[0].sdhc_clk;
|
|
||||||
+ return fsl_esdhc_initialize(bis, &usdhc_cfg[0]);
|
|
||||||
+#endif
|
|
||||||
+}
|
|
||||||
+
|
|
||||||
+char *board_string(void)
|
|
||||||
+{
|
|
||||||
+ switch (get_board_value()) {
|
|
||||||
+ case UDOO_NEO_TYPE_BASIC:
|
|
||||||
+ return "BASIC";
|
|
||||||
+ case UDOO_NEO_TYPE_BASIC_KS:
|
|
||||||
+ return "BASICKS";
|
|
||||||
+ case UDOO_NEO_TYPE_FULL:
|
|
||||||
+ return "FULL";
|
|
||||||
+ case UDOO_NEO_TYPE_EXTENDED:
|
|
||||||
+ return "EXTENDED";
|
|
||||||
+ }
|
|
||||||
+ return "UNDEFINED";
|
|
||||||
+}
|
|
||||||
+
|
|
||||||
+int checkboard(void)
|
|
||||||
+{
|
|
||||||
+ printf("Board: UDOO Neo %s\n", board_string());
|
|
||||||
+ return 0;
|
|
||||||
+}
|
|
||||||
+
|
|
||||||
+int board_late_init(void)
|
|
||||||
+{
|
|
||||||
+#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
|
|
||||||
+ setenv("board_name", board_string());
|
|
||||||
+#endif
|
|
||||||
+
|
|
||||||
+ return 0;
|
|
||||||
+}
|
|
||||||
+
|
|
||||||
+#ifdef CONFIG_SPL_BUILD
|
|
||||||
+
|
|
||||||
+#include <libfdt.h>
|
|
||||||
+#include <asm/arch/mx6-ddr.h>
|
|
||||||
+
|
|
||||||
+static const struct mx6sx_iomux_ddr_regs mx6_ddr_ioregs = {
|
|
||||||
+ .dram_dqm0 = 0x00000028,
|
|
||||||
+ .dram_dqm1 = 0x00000028,
|
|
||||||
+ .dram_dqm2 = 0x00000028,
|
|
||||||
+ .dram_dqm3 = 0x00000028,
|
|
||||||
+ .dram_ras = 0x00000020,
|
|
||||||
+ .dram_cas = 0x00000020,
|
|
||||||
+ .dram_odt0 = 0x00000020,
|
|
||||||
+ .dram_odt1 = 0x00000020,
|
|
||||||
+ .dram_sdba2 = 0x00000000,
|
|
||||||
+ .dram_sdcke0 = 0x00003000,
|
|
||||||
+ .dram_sdcke1 = 0x00003000,
|
|
||||||
+ .dram_sdclk_0 = 0x00000030,
|
|
||||||
+ .dram_sdqs0 = 0x00000028,
|
|
||||||
+ .dram_sdqs1 = 0x00000028,
|
|
||||||
+ .dram_sdqs2 = 0x00000028,
|
|
||||||
+ .dram_sdqs3 = 0x00000028,
|
|
||||||
+ .dram_reset = 0x00000020,
|
|
||||||
+};
|
|
||||||
+
|
|
||||||
+static const struct mx6sx_iomux_grp_regs mx6_grp_ioregs = {
|
|
||||||
+ .grp_addds = 0x00000020,
|
|
||||||
+ .grp_ddrmode_ctl = 0x00020000,
|
|
||||||
+ .grp_ddrpke = 0x00000000,
|
|
||||||
+ .grp_ddrmode = 0x00020000,
|
|
||||||
+ .grp_b0ds = 0x00000028,
|
|
||||||
+ .grp_b1ds = 0x00000028,
|
|
||||||
+ .grp_ctlds = 0x00000020,
|
|
||||||
+ .grp_ddr_type = 0x000c0000,
|
|
||||||
+ .grp_b2ds = 0x00000028,
|
|
||||||
+ .grp_b3ds = 0x00000028,
|
|
||||||
+};
|
|
||||||
+
|
|
||||||
+static const struct mx6_mmdc_calibration neo_mmcd_calib = {
|
|
||||||
+ .p0_mpwldectrl0 = 0x000E000B,
|
|
||||||
+ .p0_mpwldectrl1 = 0x000E0010,
|
|
||||||
+ .p0_mpdgctrl0 = 0x41600158,
|
|
||||||
+ .p0_mpdgctrl1 = 0x01500140,
|
|
||||||
+ .p0_mprddlctl = 0x3A383E3E,
|
|
||||||
+ .p0_mpwrdlctl = 0x3A383C38,
|
|
||||||
+};
|
|
||||||
+
|
|
||||||
+static const struct mx6_mmdc_calibration neo_basic_mmcd_calib = {
|
|
||||||
+ .p0_mpwldectrl0 = 0x001E0022,
|
|
||||||
+ .p0_mpwldectrl1 = 0x001C0019,
|
|
||||||
+ .p0_mpdgctrl0 = 0x41540150,
|
|
||||||
+ .p0_mpdgctrl1 = 0x01440138,
|
|
||||||
+ .p0_mprddlctl = 0x403E4644,
|
|
||||||
+ .p0_mpwrdlctl = 0x3C3A4038,
|
|
||||||
+};
|
|
||||||
+
|
|
||||||
+/* MT41K256M16 */
|
|
||||||
+static struct mx6_ddr3_cfg neo_mem_ddr = {
|
|
||||||
+ .mem_speed = 1600,
|
|
||||||
+ .density = 4,
|
|
||||||
+ .width = 16,
|
|
||||||
+ .banks = 8,
|
|
||||||
+ .rowaddr = 15,
|
|
||||||
+ .coladdr = 10,
|
|
||||||
+ .pagesz = 2,
|
|
||||||
+ .trcd = 1375,
|
|
||||||
+ .trcmin = 4875,
|
|
||||||
+ .trasmin = 3500,
|
|
||||||
+};
|
|
||||||
+
|
|
||||||
+/* MT41K128M16 */
|
|
||||||
+static struct mx6_ddr3_cfg neo_basic_mem_ddr = {
|
|
||||||
+ .mem_speed = 1600,
|
|
||||||
+ .density = 2,
|
|
||||||
+ .width = 16,
|
|
||||||
+ .banks = 8,
|
|
||||||
+ .rowaddr = 14,
|
|
||||||
+ .coladdr = 10,
|
|
||||||
+ .pagesz = 2,
|
|
||||||
+ .trcd = 1375,
|
|
||||||
+ .trcmin = 4875,
|
|
||||||
+ .trasmin = 3500,
|
|
||||||
+};
|
|
||||||
+
|
|
||||||
+static void ccgr_init(void)
|
|
||||||
+{
|
|
||||||
+ struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
|
|
||||||
+
|
|
||||||
+ writel(0xFFFFFFFF, &ccm->CCGR0);
|
|
||||||
+ writel(0xFFFFFFFF, &ccm->CCGR1);
|
|
||||||
+ writel(0xFFFFFFFF, &ccm->CCGR2);
|
|
||||||
+ writel(0xFFFFFFFF, &ccm->CCGR3);
|
|
||||||
+ writel(0xFFFFFFFF, &ccm->CCGR4);
|
|
||||||
+ writel(0xFFFFFFFF, &ccm->CCGR5);
|
|
||||||
+ writel(0xFFFFFFFF, &ccm->CCGR6);
|
|
||||||
+ writel(0xFFFFFFFF, &ccm->CCGR7);
|
|
||||||
+}
|
|
||||||
+
|
|
||||||
+static void spl_dram_init(void)
|
|
||||||
+{
|
|
||||||
+ int board = get_board_value();
|
|
||||||
+
|
|
||||||
+ struct mx6_ddr_sysinfo sysinfo = {
|
|
||||||
+ .dsize = 1, /* width of data bus: 1 = 32 bits */
|
|
||||||
+ .cs_density = 24,
|
|
||||||
+ .ncs = 1,
|
|
||||||
+ .cs1_mirror = 0,
|
|
||||||
+ .rtt_wr = 2,
|
|
||||||
+ .rtt_nom = 2, /* RTT_Nom = RZQ/2 */
|
|
||||||
+ .walat = 1, /* Write additional latency */
|
|
||||||
+ .ralat = 5, /* Read additional latency */
|
|
||||||
+ .mif3_mode = 3, /* Command prediction working mode */
|
|
||||||
+ .bi_on = 1, /* Bank interleaving enabled */
|
|
||||||
+ .sde_to_rst = 0x10, /* 14 cycles, 200us (JEDEC default) */
|
|
||||||
+ .rst_to_cke = 0x23, /* 33 cycles, 500us (JEDEC default) */
|
|
||||||
+ };
|
|
||||||
+
|
|
||||||
+ mx6sx_dram_iocfg(32, &mx6_ddr_ioregs, &mx6_grp_ioregs);
|
|
||||||
+ if (board == UDOO_NEO_TYPE_BASIC || board == UDOO_NEO_TYPE_BASIC_KS)
|
|
||||||
+ mx6_dram_cfg(&sysinfo, &neo_basic_mmcd_calib,
|
|
||||||
+ &neo_basic_mem_ddr);
|
|
||||||
+ else
|
|
||||||
+ mx6_dram_cfg(&sysinfo, &neo_mmcd_calib, &neo_mem_ddr);
|
|
||||||
+}
|
|
||||||
+
|
|
||||||
+void board_init_f(ulong dummy)
|
|
||||||
+{
|
|
||||||
+ ccgr_init();
|
|
||||||
+
|
|
||||||
+ /* setup AIPS and disable watchdog */
|
|
||||||
+ arch_cpu_init();
|
|
||||||
+
|
|
||||||
+ board_early_init_f();
|
|
||||||
+
|
|
||||||
+ /* setup GP timer */
|
|
||||||
+ timer_init();
|
|
||||||
+
|
|
||||||
+ /* UART clocks enabled and gd valid - init serial console */
|
|
||||||
+ preloader_console_init();
|
|
||||||
+
|
|
||||||
+ /* DDR initialization */
|
|
||||||
+ spl_dram_init();
|
|
||||||
+
|
|
||||||
+ /* Clear the BSS. */
|
|
||||||
+ memset(__bss_start, 0, __bss_end - __bss_start);
|
|
||||||
+
|
|
||||||
+ /* load/boot image from boot device */
|
|
||||||
+ board_init_r(NULL, 0);
|
|
||||||
+}
|
|
||||||
+
|
|
||||||
+#endif
|
|
||||||
diff --git a/configs/udoo_neo_defconfig b/configs/udoo_neo_defconfig
|
|
||||||
new file mode 100644
|
|
||||||
index 0000000..3304afb
|
|
||||||
--- /dev/null
|
|
||||||
+++ b/configs/udoo_neo_defconfig
|
|
||||||
@@ -0,0 +1,30 @@
|
|
||||||
+CONFIG_ARM=y
|
|
||||||
+CONFIG_ARCH_MX6=y
|
|
||||||
+CONFIG_SPL_GPIO_SUPPORT=y
|
|
||||||
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
|
|
||||||
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
|
|
||||||
+CONFIG_TARGET_UDOO_NEO=y
|
|
||||||
+CONFIG_SPL_EXT_SUPPORT=y
|
|
||||||
+CONFIG_SPL_LIBDISK_SUPPORT=y
|
|
||||||
+CONFIG_SPL_MMC_SUPPORT=y
|
|
||||||
+CONFIG_SPL_SERIAL_SUPPORT=y
|
|
||||||
+CONFIG_SPL_ENV_SUPPORT=y
|
|
||||||
+CONFIG_SPL_WATCHDOG_SUPPORT=y
|
|
||||||
+CONFIG_SPL=y
|
|
||||||
+CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,MX6SX"
|
|
||||||
+CONFIG_HUSH_PARSER=y
|
|
||||||
+CONFIG_CMD_BOOTZ=y
|
|
||||||
+# CONFIG_CMD_IMLS is not set
|
|
||||||
+# CONFIG_CMD_FLASH is not set
|
|
||||||
+CONFIG_CMD_MMC=y
|
|
||||||
+CONFIG_CMD_GPIO=y
|
|
||||||
+# CONFIG_CMD_SETEXPR is not set
|
|
||||||
+# CONFIG_CMD_DHCP=y
|
|
||||||
+CONFIG_CMD_CACHE=y
|
|
||||||
+CONFIG_CMD_TIME=y
|
|
||||||
+CONFIG_CMD_EXT2=y
|
|
||||||
+CONFIG_CMD_EXT4=y
|
|
||||||
+CONFIG_CMD_EXT4_WRITE=y
|
|
||||||
+CONFIG_CMD_FAT=y
|
|
||||||
+CONFIG_CMD_FS_GENERIC=y
|
|
||||||
+CONFIG_OF_LIBFDT=y
|
|
||||||
diff --git a/include/configs/udoo_neo.h b/include/configs/udoo_neo.h
|
|
||||||
new file mode 100644
|
|
||||||
index 0000000..81e0481
|
|
||||||
--- /dev/null
|
|
||||||
+++ b/include/configs/udoo_neo.h
|
|
||||||
@@ -0,0 +1,94 @@
|
|
||||||
+/*
|
|
||||||
+ * Copyright 2014-2015 Freescale Semiconductor, Inc.
|
|
||||||
+ * Copyright Jasbir Matharu
|
|
||||||
+ * Copyright 2015 UDOO Team
|
|
||||||
+ *
|
|
||||||
+ * Configuration settings for the UDOO NEO board.
|
|
||||||
+ *
|
|
||||||
+ * SPDX-License-Identifier: GPL-2.0+
|
|
||||||
+ */
|
|
||||||
+
|
|
||||||
+#ifndef __CONFIG_H
|
|
||||||
+#define __CONFIG_H
|
|
||||||
+
|
|
||||||
+#include <config_distro_defaults.h>
|
|
||||||
+#include "mx6_common.h"
|
|
||||||
+
|
|
||||||
+#include "imx6_spl.h"
|
|
||||||
+
|
|
||||||
+/* Size of malloc() pool */
|
|
||||||
+#define CONFIG_SYS_MALLOC_LEN (3 * SZ_1M)
|
|
||||||
+#define CONFIG_BOARD_EARLY_INIT_F
|
|
||||||
+#define CONFIG_BOARD_LATE_INIT
|
|
||||||
+#define CONFIG_MXC_UART
|
|
||||||
+
|
|
||||||
+/* MMC Configuration */
|
|
||||||
+#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR
|
|
||||||
+
|
|
||||||
+/* Command definition */
|
|
||||||
+#define CONFIG_MXC_UART_BASE UART1_BASE
|
|
||||||
+#define CONFIG_SYS_FSL_USDHC_NUM 2
|
|
||||||
+#define CONFIG_SYS_MMC_ENV_DEV 0 /*USDHC2*/
|
|
||||||
+
|
|
||||||
+/* Linux only */
|
|
||||||
+#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
|
|
||||||
+#define CONFIG_EXTRA_ENV_SETTINGS \
|
|
||||||
+ "console=ttymxc0,115200\0" \
|
|
||||||
+ "fdt_high=0xffffffff\0" \
|
|
||||||
+ "initrd_high=0xffffffff\0" \
|
|
||||||
+ "fdt_file=undefined\0" \
|
|
||||||
+ "fdt_addr=0x83000000\0" \
|
|
||||||
+ "ip_dyn=yes\0" \
|
|
||||||
+ "mmcdev=0\0" \
|
|
||||||
+ "mmcrootfstype=ext4\0" \
|
|
||||||
+ "mmcautodetect=no\0" \
|
|
||||||
+ "findfdt="\
|
|
||||||
+ "if test $board_name = BASIC; then " \
|
|
||||||
+ "setenv fdt_file imx6sx-udoo-neo-basic.dtb; fi; " \
|
|
||||||
+ "if test $board_name = BASICKS; then " \
|
|
||||||
+ "setenv fdt_file imx6sx-udoo-neo-basic.dtb; fi; " \
|
|
||||||
+ "if test $board_name = FULL; then " \
|
|
||||||
+ "setenv fdt_file imx6sx-udoo-neo-full.dtb; fi; " \
|
|
||||||
+ "if test $board_name = EXTENDED; then " \
|
|
||||||
+ "setenv fdt_file imx6sx-udoo-neo-extended.dtb; fi; " \
|
|
||||||
+ "if test $fdt_file = UNDEFINED; then " \
|
|
||||||
+ "echo WARNING: Could not determine dtb to use; fi; \0" \
|
|
||||||
+ "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
|
|
||||||
+ "pxefile_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
|
|
||||||
+ "ramdisk_addr_r=0x83000000\0" \
|
|
||||||
+ "ramdiskaddr=0x83000000\0" \
|
|
||||||
+ "scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \
|
|
||||||
+ BOOTENV
|
|
||||||
+
|
|
||||||
+#define BOOT_TARGET_DEVICES(func) \
|
|
||||||
+ func(MMC, mmc, 0)
|
|
||||||
+
|
|
||||||
+#define CONFIG_BOOTCOMMAND \
|
|
||||||
+ "run findfdt; " \
|
|
||||||
+ "run distro_bootcmd"
|
|
||||||
+
|
|
||||||
+#include <config_distro_bootcmd.h>
|
|
||||||
+
|
|
||||||
+/* Miscellaneous configurable options */
|
|
||||||
+#define CONFIG_SYS_MEMTEST_START 0x80000000
|
|
||||||
+#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x10000)
|
|
||||||
+#define CONFIG_STACKSIZE SZ_128K
|
|
||||||
+
|
|
||||||
+/* Physical Memory Map */
|
|
||||||
+#define CONFIG_NR_DRAM_BANKS 1
|
|
||||||
+#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
|
|
||||||
+#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
|
|
||||||
+#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
|
|
||||||
+#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
|
|
||||||
+
|
|
||||||
+#define CONFIG_SYS_INIT_SP_OFFSET \
|
|
||||||
+ (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
|
|
||||||
+#define CONFIG_SYS_INIT_SP_ADDR \
|
|
||||||
+ (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
|
|
||||||
+
|
|
||||||
+/* Environment organization */
|
|
||||||
+#define CONFIG_ENV_OFFSET (8 * SZ_64K)
|
|
||||||
+#define CONFIG_ENV_SIZE SZ_8K
|
|
||||||
+#define CONFIG_ENV_IS_IN_MMC
|
|
||||||
+
|
|
||||||
+#endif /* __CONFIG_H */
|
|
||||||
2
sources
2
sources
@ -1 +1 @@
|
|||||||
ca1f6e019d08aff8d0ca1beb2e66737d u-boot-2016.11.tar.bz2
|
e3106e42695bd9317c9481f191340ada u-boot-2017.01-rc1.tar.bz2
|
||||||
|
|||||||
@ -1,8 +1,8 @@
|
|||||||
#global candidate rc3
|
%global candidate rc1
|
||||||
|
|
||||||
Name: uboot-tools
|
Name: uboot-tools
|
||||||
Version: 2016.11
|
Version: 2017.01
|
||||||
Release: 2%{?candidate:.%{candidate}}%{?dist}
|
Release: 0.1%{?candidate:.%{candidate}}%{?dist}
|
||||||
Summary: U-Boot utilities
|
Summary: U-Boot utilities
|
||||||
|
|
||||||
Group: Development/Tools
|
Group: Development/Tools
|
||||||
@ -15,7 +15,6 @@ Source2: armv8-boards
|
|||||||
Patch1: add-BOOTENV_INIT_COMMAND-for-commands-that-may-be-ne.patch
|
Patch1: add-BOOTENV_INIT_COMMAND-for-commands-that-may-be-ne.patch
|
||||||
Patch2: port-utilite-to-distro-generic-boot-commands.patch
|
Patch2: port-utilite-to-distro-generic-boot-commands.patch
|
||||||
Patch3: mvebu-enable-generic-distro-boot-config.patch
|
Patch3: mvebu-enable-generic-distro-boot-config.patch
|
||||||
Patch4: mx6sx-Add-initial-support-for-UDOO-Neo-Board.patch
|
|
||||||
|
|
||||||
BuildRequires: bc
|
BuildRequires: bc
|
||||||
BuildRequires: dtc
|
BuildRequires: dtc
|
||||||
@ -247,6 +246,9 @@ cp -p board/rockchip/evb_rk3399/README doc/README.evb_rk3399
|
|||||||
%endif
|
%endif
|
||||||
|
|
||||||
%changelog
|
%changelog
|
||||||
|
* Wed Dec 7 2016 Peter Robinson <pbrobinson@fedoraproject.org> 2017.01-01.rc1
|
||||||
|
- 2017.01 RC1
|
||||||
|
|
||||||
* Tue Nov 29 2016 Peter Robinson <pbrobinson@fedoraproject.org> 2016.11-2
|
* Tue Nov 29 2016 Peter Robinson <pbrobinson@fedoraproject.org> 2016.11-2
|
||||||
- Add upstream patch to support UDOO Neo
|
- Add upstream patch to support UDOO Neo
|
||||||
|
|
||||||
|
|||||||
Loading…
Reference in New Issue
Block a user