2020-12-28 22:14:17 +00:00
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From patchwork Tue Dec 15 09:49:23 2020
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xypron.glpk@gmx.de
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Cc: u-boot@lists.denx.de,
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Matthias Brugger <mbrugger@suse.com>
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Subject: [PATCH v2 1/2] rng: Add iProc RNG200 driver
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Date: Tue, 15 Dec 2020 10:49:23 +0100
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Message-Id: <20201215094924.30072-1-matthias.bgg@kernel.org>
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From: Matthias Brugger <mbrugger@suse.com>
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Add support for random number generator RNG200.
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This is for example found on RPi4.
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Signed-off-by: Matthias Brugger <mbrugger@suse.com>
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Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
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---
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Changes in v2: None
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drivers/rng/Kconfig | 6 ++
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drivers/rng/Makefile | 1 +
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drivers/rng/iproc_rng200.c | 186 +++++++++++++++++++++++++++++++++++++
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3 files changed, 193 insertions(+)
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create mode 100644 drivers/rng/iproc_rng200.c
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diff --git a/drivers/rng/Kconfig b/drivers/rng/Kconfig
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index 11001c8ae7..94915d45b3 100644
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--- a/drivers/rng/Kconfig
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+++ b/drivers/rng/Kconfig
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@@ -46,4 +46,10 @@ config RNG_ROCKCHIP
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Enable random number generator for rockchip.This driver is
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support rng module of crypto v1 and crypto v2.
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+config RNG_IPROC200
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+ bool "Broadcom iProc RNG200 random number generator"
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+ depends on DM_RNG
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+ default n
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+ help
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+ Enable random number generator for RPI4.
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endif
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diff --git a/drivers/rng/Makefile b/drivers/rng/Makefile
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index 8953406882..39f7ee3f03 100644
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--- a/drivers/rng/Makefile
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+++ b/drivers/rng/Makefile
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@@ -9,3 +9,4 @@ obj-$(CONFIG_RNG_SANDBOX) += sandbox_rng.o
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obj-$(CONFIG_RNG_MSM) += msm_rng.o
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obj-$(CONFIG_RNG_STM32MP1) += stm32mp1_rng.o
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obj-$(CONFIG_RNG_ROCKCHIP) += rockchip_rng.o
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+obj-$(CONFIG_RNG_IPROC200) += iproc_rng200.o
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diff --git a/drivers/rng/iproc_rng200.c b/drivers/rng/iproc_rng200.c
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new file mode 100644
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index 0000000000..1063f43953
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--- /dev/null
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+++ b/drivers/rng/iproc_rng200.c
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@@ -0,0 +1,186 @@
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+// SPDX-License-Identifier: GPL-2.0-or-later
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+/*
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+ * Copyright 2020, Matthias Brugger <mbrugger@suse.com>
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+ *
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+ * Driver for Raspberry Pi hardware random number generator
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+ */
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+
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+#include <common.h>
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+#include <dm.h>
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+#include <linux/delay.h>
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+#include <rng.h>
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+#include <asm/io.h>
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+
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+#define usleep_range(a, b) udelay((b))
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+
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+#define RNG_CTRL_OFFSET 0x00
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+#define RNG_CTRL_RNG_RBGEN_MASK 0x00001FFF
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+#define RNG_CTRL_RNG_RBGEN_ENABLE 0x00000001
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+#define RNG_CTRL_RNG_RBGEN_DISABLE 0x00000000
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+
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+#define RNG_SOFT_RESET_OFFSET 0x04
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+#define RNG_SOFT_RESET 0x00000001
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+
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+#define RBG_SOFT_RESET_OFFSET 0x08
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+#define RBG_SOFT_RESET 0x00000001
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+
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+#define RNG_INT_STATUS_OFFSET 0x18
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+#define RNG_INT_STATUS_MASTER_FAIL_LOCKOUT_IRQ_MASK 0x80000000
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+#define RNG_INT_STATUS_NIST_FAIL_IRQ_MASK 0x00000020
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+
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+#define RNG_FIFO_DATA_OFFSET 0x20
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+
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+#define RNG_FIFO_COUNT_OFFSET 0x24
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+#define RNG_FIFO_COUNT_RNG_FIFO_COUNT_MASK 0x000000FF
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+
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2021-02-02 09:42:30 +00:00
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+struct iproc_rng200_plat {
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2020-12-28 22:14:17 +00:00
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+ fdt_addr_t base;
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+};
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+
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2021-02-02 09:42:30 +00:00
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+static void iproc_rng200_enable(struct iproc_rng200_plat *pdata, bool enable)
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2020-12-28 22:14:17 +00:00
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+{
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+ fdt_addr_t rng_base = pdata->base;
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+ u32 val;
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+
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+ val = readl(rng_base + RNG_CTRL_OFFSET);
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+ val &= ~RNG_CTRL_RNG_RBGEN_MASK;
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+ if (enable)
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+ val |= RNG_CTRL_RNG_RBGEN_ENABLE;
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+ else
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+ val &= ~RNG_CTRL_RNG_RBGEN_ENABLE;
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+
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+ writel(val, rng_base + RNG_CTRL_OFFSET);
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+
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+}
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+
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2021-02-02 09:42:30 +00:00
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+static void iproc_rng200_restart(struct iproc_rng200_plat *pdata)
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2020-12-28 22:14:17 +00:00
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+{
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+ fdt_addr_t rng_base = pdata->base;
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+ u32 val;
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+
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+ iproc_rng200_enable(pdata, false);
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+
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+ /* Clear all interrupt status */
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+ writel(0xFFFFFFFFUL, rng_base + RNG_INT_STATUS_OFFSET);
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+
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+ /* Reset RNG and RBG */
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+ val = readl(rng_base + RBG_SOFT_RESET_OFFSET);
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+ val |= RBG_SOFT_RESET;
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+ writel(val, rng_base + RBG_SOFT_RESET_OFFSET);
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+
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+ val = readl(rng_base + RNG_SOFT_RESET_OFFSET);
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+ val |= RNG_SOFT_RESET;
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+ writel(val, rng_base + RNG_SOFT_RESET_OFFSET);
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+
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+ val = readl(rng_base + RNG_SOFT_RESET_OFFSET);
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+ val &= ~RNG_SOFT_RESET;
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+ writel(val, rng_base + RNG_SOFT_RESET_OFFSET);
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+
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+ val = readl(rng_base + RBG_SOFT_RESET_OFFSET);
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+ val &= ~RBG_SOFT_RESET;
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+ writel(val, rng_base + RBG_SOFT_RESET_OFFSET);
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+
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+ iproc_rng200_enable(pdata, true);
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+}
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+
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+static int iproc_rng200_read(struct udevice *dev, void *data, size_t len)
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+{
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2021-02-02 09:42:30 +00:00
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+ struct iproc_rng200_plat *priv = dev_get_plat(dev);
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2020-12-28 22:14:17 +00:00
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+ char *buf = (char *)data;
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+ u32 num_remaining = len;
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+ u32 status;
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+
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+ #define MAX_RESETS_PER_READ 1
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+ u32 num_resets = 0;
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+
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+ while (num_remaining > 0) {
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+
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+ /* Is RNG sane? If not, reset it. */
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+ status = readl(priv->base + RNG_INT_STATUS_OFFSET);
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+ if ((status & (RNG_INT_STATUS_MASTER_FAIL_LOCKOUT_IRQ_MASK |
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+ RNG_INT_STATUS_NIST_FAIL_IRQ_MASK)) != 0) {
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+
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+ if (num_resets >= MAX_RESETS_PER_READ)
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+ return len - num_remaining;
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+
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+ iproc_rng200_restart(priv);
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+ num_resets++;
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+ }
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+
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+ /* Are there any random numbers available? */
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+ if ((readl(priv->base + RNG_FIFO_COUNT_OFFSET) &
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+ RNG_FIFO_COUNT_RNG_FIFO_COUNT_MASK) > 0) {
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+
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+ if (num_remaining >= sizeof(u32)) {
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+ /* Buffer has room to store entire word */
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+ *(u32 *)buf = readl(priv->base +
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+ RNG_FIFO_DATA_OFFSET);
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+ buf += sizeof(u32);
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+ num_remaining -= sizeof(u32);
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+ } else {
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+ /* Buffer can only store partial word */
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+ u32 rnd_number = readl(priv->base +
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+ RNG_FIFO_DATA_OFFSET);
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+ memcpy(buf, &rnd_number, num_remaining);
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+ buf += num_remaining;
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+ num_remaining = 0;
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+ }
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+
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+ } else {
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+ /* Can wait, give others chance to run */
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+ usleep_range(min(num_remaining * 10, 500U), 500);
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+ }
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+ }
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+
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+ return 0;
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+}
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+
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+static int iproc_rng200_probe(struct udevice *dev)
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+{
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2021-02-02 09:42:30 +00:00
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+ struct iproc_rng200_plat *priv = dev_get_plat(dev);
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2020-12-28 22:14:17 +00:00
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+
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+ iproc_rng200_enable(priv, true);
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+
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+ return 0;
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+}
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+
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+static int iproc_rng200_remove(struct udevice *dev)
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+{
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2021-02-02 09:42:30 +00:00
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+ struct iproc_rng200_plat *priv = dev_get_plat(dev);
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2020-12-28 22:14:17 +00:00
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+
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+ iproc_rng200_enable(priv, false);
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+
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+ return 0;
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+}
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+
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2021-02-02 09:42:30 +00:00
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+static int iproc_rng200_of_to_plat(struct udevice *dev)
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2020-12-28 22:14:17 +00:00
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+{
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2021-02-02 09:42:30 +00:00
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+ struct iproc_rng200_plat *pdata = dev_get_plat(dev);
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2020-12-28 22:14:17 +00:00
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+
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+ pdata->base = dev_read_addr(dev);
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+ if (!pdata->base)
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+ return -ENODEV;
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+
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+ return 0;
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+}
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+
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+static const struct dm_rng_ops iproc_rng200_ops = {
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+ .read = iproc_rng200_read,
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+};
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+
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+static const struct udevice_id iproc_rng200_rng_match[] = {
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+ { .compatible = "brcm,bcm2711-rng200", },
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+ { .compatible = "brcm,iproc-rng200", },
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+ {},
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+};
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+
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+U_BOOT_DRIVER(iproc_rng200_rng) = {
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+ .name = "iproc_rng200-rng",
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+ .id = UCLASS_RNG,
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+ .of_match = iproc_rng200_rng_match,
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+ .ops = &iproc_rng200_ops,
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+ .probe = iproc_rng200_probe,
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+ .remove = iproc_rng200_remove,
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2021-02-02 09:42:30 +00:00
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+ .priv_auto = sizeof(struct iproc_rng200_plat),
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+ .of_to_plat = iproc_rng200_of_to_plat,
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2020-12-28 22:14:17 +00:00
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+};
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From patchwork Tue Dec 15 09:49:24 2020
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Cc: u-boot@lists.denx.de,
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Matthias Brugger <mbrugger@suse.com>
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Subject: [PATCH v2 2/2] config: Enable iProc RNG200 driver in RPi4 configs
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Date: Tue, 15 Dec 2020 10:49:24 +0100
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From: Matthias Brugger <mbrugger@suse.com>
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We find the iProc RNG200 in the Raspberry Pi 4. Add it to all it's
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config so that it can be used.
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Signed-off-by: Matthias Brugger <mbrugger@suse.com>
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---
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Changes in v2:
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- fix defconfigs using savedefconfig (Heinrich)
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configs/rpi_4_32b_defconfig | 2 ++
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configs/rpi_4_defconfig | 2 ++
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configs/rpi_arm64_defconfig | 2 ++
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drivers/rng/iproc_rng200.c | 1 -
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4 files changed, 6 insertions(+), 1 deletion(-)
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diff --git a/configs/rpi_4_32b_defconfig b/configs/rpi_4_32b_defconfig
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index 5ddd838fd5..4039e46c81 100644
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--- a/configs/rpi_4_32b_defconfig
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+++ b/configs/rpi_4_32b_defconfig
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@@ -36,6 +36,8 @@ CONFIG_PCI_BRCMSTB=y
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CONFIG_PINCTRL=y
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# CONFIG_PINCTRL_GENERIC is not set
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CONFIG_DM_RESET=y
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+CONFIG_DM_RNG=y
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+CONFIG_RNG_IPROC200=y
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# CONFIG_REQUIRE_SERIAL_CONSOLE is not set
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CONFIG_USB=y
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CONFIG_DM_USB=y
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diff --git a/configs/rpi_4_defconfig b/configs/rpi_4_defconfig
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index 2590d0a696..46b6cc3046 100644
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--- a/configs/rpi_4_defconfig
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+++ b/configs/rpi_4_defconfig
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@@ -36,6 +36,8 @@ CONFIG_PCI_BRCMSTB=y
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CONFIG_PINCTRL=y
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# CONFIG_PINCTRL_GENERIC is not set
|
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CONFIG_DM_RESET=y
|
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+CONFIG_DM_RNG=y
|
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+CONFIG_RNG_IPROC200=y
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# CONFIG_REQUIRE_SERIAL_CONSOLE is not set
|
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CONFIG_USB=y
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CONFIG_DM_USB=y
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diff --git a/configs/rpi_arm64_defconfig b/configs/rpi_arm64_defconfig
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index 2639219a1a..b75144036d 100644
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--- a/configs/rpi_arm64_defconfig
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+++ b/configs/rpi_arm64_defconfig
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@@ -33,6 +33,8 @@ CONFIG_PCI_BRCMSTB=y
|
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CONFIG_PINCTRL=y
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# CONFIG_PINCTRL_GENERIC is not set
|
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CONFIG_DM_RESET=y
|
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|
+CONFIG_DM_RNG=y
|
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+CONFIG_RNG_IPROC200=y
|
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|
# CONFIG_REQUIRE_SERIAL_CONSOLE is not set
|
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|
CONFIG_USB=y
|
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CONFIG_DM_USB=y
|
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diff --git a/drivers/rng/iproc_rng200.c b/drivers/rng/iproc_rng200.c
|
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index 1063f43953..378f6cf48d 100644
|
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--- a/drivers/rng/iproc_rng200.c
|
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|
+++ b/drivers/rng/iproc_rng200.c
|
2021-02-02 09:42:30 +00:00
|
|
|
@@ -50,7 +50,6 @@ static void iproc_rng200_enable(struct iproc_rng200_plat *pdata, bool enable
|
2020-12-28 22:14:17 +00:00
|
|
|
val &= ~RNG_CTRL_RNG_RBGEN_ENABLE;
|
|
|
|
|
|
|
|
writel(val, rng_base + RNG_CTRL_OFFSET);
|
|
|
|
-
|
|
|
|
}
|
|
|
|
|
2021-02-02 09:42:30 +00:00
|
|
|
static void iproc_rng200_restart(struct iproc_rng200_plat *pdata)
|