Fix libvirt + seccomp combo (bz #855162) Fix scsi hotplug crash (bz #879657) Fix QOM refcount crash (bz #881486)
138 lines
4.1 KiB
Diff
138 lines
4.1 KiB
Diff
From d65d20819ac52207befffa9a7aa858cc7de9cbaf Mon Sep 17 00:00:00 2001
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From: malc <av1474@comtv.ru>
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Date: Sat, 22 Sep 2012 19:14:33 +0400
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Subject: [PATCH] tcg/ppc32: Implement movcond32
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Thanks to Richard Henderson
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Signed-off-by: malc <av1474@comtv.ru>
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Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
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---
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tcg/ppc/tcg-target.c | 75 ++++++++++++++++++++++++++++++++++++++++++++++++++++
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tcg/ppc/tcg-target.h | 2 +-
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2 files changed, 76 insertions(+), 1 deletion(-)
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diff --git a/tcg/ppc/tcg-target.c b/tcg/ppc/tcg-target.c
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index 26c4b33..8f8b193 100644
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--- a/tcg/ppc/tcg-target.c
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+++ b/tcg/ppc/tcg-target.c
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@@ -390,6 +390,7 @@ static int tcg_target_const_match(tcg_target_long val,
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#define ORC XO31(412)
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#define EQV XO31(284)
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#define NAND XO31(476)
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+#define ISEL XO31( 15)
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#define LBZX XO31( 87)
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#define LHZX XO31(279)
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@@ -1269,6 +1270,72 @@ static void tcg_out_setcond2 (TCGContext *s, const TCGArg *args,
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);
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}
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+static void tcg_out_movcond (TCGContext *s, TCGCond cond,
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+ TCGArg dest,
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+ TCGArg c1, TCGArg c2,
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+ TCGArg v1, TCGArg v2,
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+ int const_c2)
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+{
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+ tcg_out_cmp (s, cond, c1, c2, const_c2, 7);
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+
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+ if (1) {
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+ /* At least here on 7747A bit twiddling hacks are outperformed
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+ by jumpy code (the testing was not scientific) */
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+ if (dest == v2) {
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+ cond = tcg_invert_cond (cond);
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+ v2 = v1;
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+ }
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+ else {
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+ if (dest != v1) {
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+ tcg_out_mov (s, TCG_TYPE_I32, dest, v1);
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+ }
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+ }
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+ /* Branch forward over one insn */
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+ tcg_out32 (s, tcg_to_bc[cond] | 8);
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+ tcg_out_mov (s, TCG_TYPE_I32, dest, v2);
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+ }
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+ else {
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+ /* isel version, "if (1)" above should be replaced once a way
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+ to figure out availability of isel on the underlying
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+ hardware is found */
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+ int tab, bc;
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+
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+ switch (cond) {
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+ case TCG_COND_EQ:
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+ tab = TAB (dest, v1, v2);
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+ bc = CR_EQ;
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+ break;
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+ case TCG_COND_NE:
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+ tab = TAB (dest, v2, v1);
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+ bc = CR_EQ;
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+ break;
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+ case TCG_COND_LTU:
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+ case TCG_COND_LT:
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+ tab = TAB (dest, v1, v2);
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+ bc = CR_LT;
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+ break;
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+ case TCG_COND_GEU:
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+ case TCG_COND_GE:
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+ tab = TAB (dest, v2, v1);
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+ bc = CR_LT;
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+ break;
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+ case TCG_COND_LEU:
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+ case TCG_COND_LE:
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+ tab = TAB (dest, v2, v1);
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+ bc = CR_GT;
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+ break;
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+ case TCG_COND_GTU:
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+ case TCG_COND_GT:
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+ tab = TAB (dest, v1, v2);
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+ bc = CR_GT;
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+ break;
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+ default:
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+ tcg_abort ();
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+ }
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+ tcg_out32 (s, ISEL | tab | ((bc + 28) << 6));
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+ }
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+}
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+
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static void tcg_out_brcond (TCGContext *s, TCGCond cond,
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TCGArg arg1, TCGArg arg2, int const_arg2,
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int label_index)
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@@ -1826,6 +1893,13 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
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);
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break;
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+ case INDEX_op_movcond_i32:
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+ tcg_out_movcond (s, args[5], args[0],
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+ args[1], args[2],
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+ args[3], args[4],
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+ const_args[2]);
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+ break;
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+
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default:
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tcg_dump_ops (s);
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tcg_abort ();
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@@ -1922,6 +1996,7 @@ static const TCGTargetOpDef ppc_op_defs[] = {
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{ INDEX_op_ext16u_i32, { "r", "r" } },
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{ INDEX_op_deposit_i32, { "r", "0", "r" } },
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+ { INDEX_op_movcond_i32, { "r", "r", "ri", "r", "r" } },
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{ -1 },
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};
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diff --git a/tcg/ppc/tcg-target.h b/tcg/ppc/tcg-target.h
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index 177eea1..3259d89 100644
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--- a/tcg/ppc/tcg-target.h
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+++ b/tcg/ppc/tcg-target.h
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@@ -92,7 +92,7 @@ typedef enum {
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#define TCG_TARGET_HAS_nand_i32 1
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#define TCG_TARGET_HAS_nor_i32 1
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#define TCG_TARGET_HAS_deposit_i32 1
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-#define TCG_TARGET_HAS_movcond_i32 0
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+#define TCG_TARGET_HAS_movcond_i32 1
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#define TCG_AREG0 TCG_REG_R27
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--
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1.8.0.2
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