qemu/0047-target-xtensa-fix-extui-shift-amount.patch
Cole Robinson f375e62ad9 Update to qemu 1.2.2 stable
Fix libvirt + seccomp combo (bz #855162)
Fix scsi hotplug crash (bz #879657)
Fix QOM refcount crash (bz #881486)
2012-12-16 18:27:22 -05:00

58 lines
1.9 KiB
Diff

From 1c596a9498830485a1b2f4a4445643a149179b99 Mon Sep 17 00:00:00 2001
From: Max Filippov <jcmvbkbc@gmail.com>
Date: Fri, 21 Sep 2012 02:59:49 +0400
Subject: [PATCH] target-xtensa: fix extui shift amount
extui opcode only uses lowermost op1 bit for sa4.
Reported-by: malc <av1474@comtv.ru>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Cc: qemu-stable <qemu-stable@nongnu.org>
Signed-off-by: malc <av1474@comtv.ru>
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
---
target-xtensa/translate.c | 24 +++++++++++++++++++++---
1 file changed, 21 insertions(+), 3 deletions(-)
diff --git a/target-xtensa/translate.c b/target-xtensa/translate.c
index 1900bd5..7a1c528 100644
--- a/target-xtensa/translate.c
+++ b/target-xtensa/translate.c
@@ -1778,12 +1778,30 @@ static void disas_xtensa_insn(DisasContext *dc)
case 5:
gen_window_check2(dc, RRR_R, RRR_T);
{
- int shiftimm = RRR_S | (OP1 << 4);
+ int shiftimm = RRR_S | ((OP1 & 1) << 4);
int maskimm = (1 << (OP2 + 1)) - 1;
TCGv_i32 tmp = tcg_temp_new_i32();
- tcg_gen_shri_i32(tmp, cpu_R[RRR_T], shiftimm);
- tcg_gen_andi_i32(cpu_R[RRR_R], tmp, maskimm);
+
+ if (shiftimm) {
+ tcg_gen_shri_i32(tmp, cpu_R[RRR_T], shiftimm);
+ } else {
+ tcg_gen_mov_i32(tmp, cpu_R[RRR_T]);
+ }
+
+ switch (maskimm) {
+ case 0xff:
+ tcg_gen_ext8u_i32(cpu_R[RRR_R], tmp);
+ break;
+
+ case 0xffff:
+ tcg_gen_ext16u_i32(cpu_R[RRR_R], tmp);
+ break;
+
+ default:
+ tcg_gen_andi_i32(cpu_R[RRR_R], tmp, maskimm);
+ break;
+ }
tcg_temp_free(tmp);
}
break;
--
1.8.0.2