Fix libvirt + seccomp combo (bz #855162) Fix scsi hotplug crash (bz #879657) Fix QOM refcount crash (bz #881486)
289 lines
11 KiB
Diff
289 lines
11 KiB
Diff
From 5dd8e9207a39d8fe41eaa110edfdba5e37064562 Mon Sep 17 00:00:00 2001
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From: Richard Henderson <rth@twiddle.net>
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Date: Tue, 18 Sep 2012 21:55:33 -0700
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Subject: [PATCH] target-mips: Fix MIPS_DEBUG.
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The macro uses the DisasContext. Pass it around as needed.
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Signed-off-by: Richard Henderson <rth@twiddle.net>
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Acked-by: Aurelien Jarno <aurelien@aurel32.net>
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Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
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Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
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---
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target-mips/translate.c | 74 +++++++++++++++++++++++++------------------------
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1 file changed, 38 insertions(+), 36 deletions(-)
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diff --git a/target-mips/translate.c b/target-mips/translate.c
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index c31f91c..4937f6b 100644
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--- a/target-mips/translate.c
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+++ b/target-mips/translate.c
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@@ -1431,7 +1431,8 @@ static void gen_arith_imm (CPUMIPSState *env, DisasContext *ctx, uint32_t opc,
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}
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/* Logic with immediate operand */
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-static void gen_logic_imm (CPUMIPSState *env, uint32_t opc, int rt, int rs, int16_t imm)
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+static void gen_logic_imm(CPUMIPSState *env, DisasContext *ctx, uint32_t opc,
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+ int rt, int rs, int16_t imm)
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{
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target_ulong uimm;
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const char *opn = "imm logic";
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@@ -1474,7 +1475,8 @@ static void gen_logic_imm (CPUMIPSState *env, uint32_t opc, int rt, int rs, int1
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}
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/* Set on less than with immediate operand */
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-static void gen_slt_imm (CPUMIPSState *env, uint32_t opc, int rt, int rs, int16_t imm)
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+static void gen_slt_imm(CPUMIPSState *env, DisasContext *ctx, uint32_t opc,
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+ int rt, int rs, int16_t imm)
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{
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target_ulong uimm = (target_long)imm; /* Sign extend to 32/64 bits */
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const char *opn = "imm arith";
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@@ -1775,7 +1777,8 @@ static void gen_arith (CPUMIPSState *env, DisasContext *ctx, uint32_t opc,
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}
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/* Conditional move */
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-static void gen_cond_move (CPUMIPSState *env, uint32_t opc, int rd, int rs, int rt)
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+static void gen_cond_move(CPUMIPSState *env, DisasContext *ctx, uint32_t opc,
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+ int rd, int rs, int rt)
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{
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const char *opn = "cond move";
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int l1;
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@@ -1813,7 +1816,8 @@ static void gen_cond_move (CPUMIPSState *env, uint32_t opc, int rd, int rs, int
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}
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/* Logic */
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-static void gen_logic (CPUMIPSState *env, uint32_t opc, int rd, int rs, int rt)
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+static void gen_logic(CPUMIPSState *env, DisasContext *ctx, uint32_t opc,
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+ int rd, int rs, int rt)
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{
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const char *opn = "logic";
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@@ -1874,7 +1878,8 @@ static void gen_logic (CPUMIPSState *env, uint32_t opc, int rd, int rs, int rt)
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}
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/* Set on lower than */
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-static void gen_slt (CPUMIPSState *env, uint32_t opc, int rd, int rs, int rt)
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+static void gen_slt(CPUMIPSState *env, DisasContext *ctx, uint32_t opc,
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+ int rd, int rs, int rt)
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{
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const char *opn = "slt";
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TCGv t0, t1;
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@@ -8778,10 +8783,10 @@ static int decode_extended_mips16_opc (CPUMIPSState *env, DisasContext *ctx,
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gen_arith_imm(env, ctx, OPC_ADDIU, rx, rx, imm);
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break;
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case M16_OPC_SLTI:
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- gen_slt_imm(env, OPC_SLTI, 24, rx, imm);
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+ gen_slt_imm(env, ctx, OPC_SLTI, 24, rx, imm);
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break;
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case M16_OPC_SLTIU:
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- gen_slt_imm(env, OPC_SLTIU, 24, rx, imm);
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+ gen_slt_imm(env, ctx, OPC_SLTIU, 24, rx, imm);
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break;
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case M16_OPC_I8:
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switch (funct) {
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@@ -8992,15 +8997,13 @@ static int decode_mips16_opc (CPUMIPSState *env, DisasContext *ctx,
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case M16_OPC_SLTI:
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{
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int16_t imm = (uint8_t) ctx->opcode;
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-
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- gen_slt_imm(env, OPC_SLTI, 24, rx, imm);
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+ gen_slt_imm(env, ctx, OPC_SLTI, 24, rx, imm);
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}
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break;
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case M16_OPC_SLTIU:
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{
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int16_t imm = (uint8_t) ctx->opcode;
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-
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- gen_slt_imm(env, OPC_SLTIU, 24, rx, imm);
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+ gen_slt_imm(env, ctx, OPC_SLTIU, 24, rx, imm);
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}
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break;
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case M16_OPC_I8:
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@@ -9075,8 +9078,7 @@ static int decode_mips16_opc (CPUMIPSState *env, DisasContext *ctx,
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case M16_OPC_CMPI:
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{
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int16_t imm = (uint8_t) ctx->opcode;
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-
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- gen_logic_imm(env, OPC_XORI, 24, rx, imm);
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+ gen_logic_imm(env, ctx, OPC_XORI, 24, rx, imm);
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}
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break;
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#if defined(TARGET_MIPS64)
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@@ -9188,10 +9190,10 @@ static int decode_mips16_opc (CPUMIPSState *env, DisasContext *ctx,
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}
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break;
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case RR_SLT:
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- gen_slt(env, OPC_SLT, 24, rx, ry);
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+ gen_slt(env, ctx, OPC_SLT, 24, rx, ry);
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break;
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case RR_SLTU:
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- gen_slt(env, OPC_SLTU, 24, rx, ry);
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+ gen_slt(env, ctx, OPC_SLTU, 24, rx, ry);
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break;
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case RR_BREAK:
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generate_exception(ctx, EXCP_BREAK);
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@@ -9212,22 +9214,22 @@ static int decode_mips16_opc (CPUMIPSState *env, DisasContext *ctx,
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break;
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#endif
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case RR_CMP:
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- gen_logic(env, OPC_XOR, 24, rx, ry);
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+ gen_logic(env, ctx, OPC_XOR, 24, rx, ry);
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break;
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case RR_NEG:
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gen_arith(env, ctx, OPC_SUBU, rx, 0, ry);
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break;
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case RR_AND:
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- gen_logic(env, OPC_AND, rx, rx, ry);
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+ gen_logic(env, ctx, OPC_AND, rx, rx, ry);
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break;
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case RR_OR:
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- gen_logic(env, OPC_OR, rx, rx, ry);
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+ gen_logic(env, ctx, OPC_OR, rx, rx, ry);
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break;
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case RR_XOR:
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- gen_logic(env, OPC_XOR, rx, rx, ry);
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+ gen_logic(env, ctx, OPC_XOR, rx, rx, ry);
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break;
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case RR_NOT:
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- gen_logic(env, OPC_NOR, rx, ry, 0);
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+ gen_logic(env, ctx, OPC_NOR, rx, ry, 0);
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break;
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case RR_MFHI:
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gen_HILO(ctx, OPC_MFHI, rx);
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@@ -9849,7 +9851,7 @@ static void gen_andi16 (CPUMIPSState *env, DisasContext *ctx)
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int rs = mmreg(uMIPS_RS(ctx->opcode));
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int encoded = ZIMM(ctx->opcode, 0, 4);
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- gen_logic_imm(env, OPC_ANDI, rd, rs, decoded_imm[encoded]);
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+ gen_logic_imm(env, ctx, OPC_ANDI, rd, rs, decoded_imm[encoded]);
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}
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static void gen_ldst_multiple (DisasContext *ctx, uint32_t opc, int reglist,
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@@ -9911,25 +9913,25 @@ static void gen_pool16c_insn (CPUMIPSState *env, DisasContext *ctx, int *is_bran
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case NOT16 + 1:
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case NOT16 + 2:
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case NOT16 + 3:
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- gen_logic(env, OPC_NOR, rd, rs, 0);
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+ gen_logic(env, ctx, OPC_NOR, rd, rs, 0);
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break;
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case XOR16 + 0:
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case XOR16 + 1:
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case XOR16 + 2:
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case XOR16 + 3:
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- gen_logic(env, OPC_XOR, rd, rd, rs);
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+ gen_logic(env, ctx, OPC_XOR, rd, rd, rs);
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break;
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case AND16 + 0:
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case AND16 + 1:
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case AND16 + 2:
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case AND16 + 3:
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- gen_logic(env, OPC_AND, rd, rd, rs);
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+ gen_logic(env, ctx, OPC_AND, rd, rd, rs);
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break;
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case OR16 + 0:
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case OR16 + 1:
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case OR16 + 2:
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case OR16 + 3:
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- gen_logic(env, OPC_OR, rd, rd, rs);
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+ gen_logic(env, ctx, OPC_OR, rd, rd, rs);
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break;
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case LWM16 + 0:
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case LWM16 + 1:
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@@ -10743,7 +10745,7 @@ static void decode_micromips32_opc (CPUMIPSState *env, DisasContext *ctx,
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case XOR32:
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mips32_op = OPC_XOR;
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do_logic:
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- gen_logic(env, mips32_op, rd, rs, rt);
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+ gen_logic(env, ctx, mips32_op, rd, rs, rt);
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break;
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/* Set less than */
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case SLT:
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@@ -10752,7 +10754,7 @@ static void decode_micromips32_opc (CPUMIPSState *env, DisasContext *ctx,
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case SLTU:
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mips32_op = OPC_SLTU;
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do_slt:
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- gen_slt(env, mips32_op, rd, rs, rt);
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+ gen_slt(env, ctx, mips32_op, rd, rs, rt);
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break;
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default:
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goto pool32a_invalid;
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@@ -10768,7 +10770,7 @@ static void decode_micromips32_opc (CPUMIPSState *env, DisasContext *ctx,
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case MOVZ:
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mips32_op = OPC_MOVZ;
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do_cmov:
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- gen_cond_move(env, mips32_op, rd, rs, rt);
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+ gen_cond_move(env, ctx, mips32_op, rd, rs, rt);
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break;
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case LWXS:
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gen_ldxs(ctx, rs, rt, rd);
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@@ -11181,7 +11183,7 @@ static void decode_micromips32_opc (CPUMIPSState *env, DisasContext *ctx,
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target. */
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break;
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case LUI:
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- gen_logic_imm(env, OPC_LUI, rs, -1, imm);
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+ gen_logic_imm(env, ctx, OPC_LUI, rs, -1, imm);
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break;
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case SYNCI:
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break;
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@@ -11300,7 +11302,7 @@ static void decode_micromips32_opc (CPUMIPSState *env, DisasContext *ctx,
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case ANDI32:
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mips32_op = OPC_ANDI;
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do_logici:
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- gen_logic_imm(env, mips32_op, rt, rs, imm);
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+ gen_logic_imm(env, ctx, mips32_op, rt, rs, imm);
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break;
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/* Set less than immediate */
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@@ -11310,7 +11312,7 @@ static void decode_micromips32_opc (CPUMIPSState *env, DisasContext *ctx,
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case SLTIU32:
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mips32_op = OPC_SLTIU;
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do_slti:
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- gen_slt_imm(env, mips32_op, rt, rs, imm);
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+ gen_slt_imm(env, ctx, mips32_op, rt, rs, imm);
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break;
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case JALX32:
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offset = (int32_t)(ctx->opcode & 0x3FFFFFF) << 2;
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@@ -11787,7 +11789,7 @@ static void decode_opc (CPUMIPSState *env, DisasContext *ctx, int *is_branch)
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case OPC_MOVZ:
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check_insn(env, ctx, ISA_MIPS4 | ISA_MIPS32 |
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INSN_LOONGSON2E | INSN_LOONGSON2F);
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- gen_cond_move(env, op1, rd, rs, rt);
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+ gen_cond_move(env, ctx, op1, rd, rs, rt);
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break;
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case OPC_ADD ... OPC_SUBU:
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gen_arith(env, ctx, op1, rd, rs, rt);
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@@ -11814,13 +11816,13 @@ static void decode_opc (CPUMIPSState *env, DisasContext *ctx, int *is_branch)
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break;
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case OPC_SLT: /* Set on less than */
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case OPC_SLTU:
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- gen_slt(env, op1, rd, rs, rt);
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+ gen_slt(env, ctx, op1, rd, rs, rt);
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break;
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case OPC_AND: /* Logic*/
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case OPC_OR:
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case OPC_NOR:
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case OPC_XOR:
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- gen_logic(env, op1, rd, rs, rt);
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+ gen_logic(env, ctx, op1, rd, rs, rt);
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break;
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case OPC_MULT ... OPC_DIVU:
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if (sa) {
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@@ -12221,13 +12223,13 @@ static void decode_opc (CPUMIPSState *env, DisasContext *ctx, int *is_branch)
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break;
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case OPC_SLTI: /* Set on less than with immediate opcode */
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case OPC_SLTIU:
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- gen_slt_imm(env, op, rt, rs, imm);
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+ gen_slt_imm(env, ctx, op, rt, rs, imm);
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break;
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case OPC_ANDI: /* Arithmetic with immediate opcode */
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case OPC_LUI:
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case OPC_ORI:
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case OPC_XORI:
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- gen_logic_imm(env, op, rt, rs, imm);
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+ gen_logic_imm(env, ctx, op, rt, rs, imm);
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break;
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case OPC_J ... OPC_JAL: /* Jump */
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offset = (int32_t)(ctx->opcode & 0x3FFFFFF) << 2;
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--
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1.8.0.2
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