qemu/0002-riscv-force-float-save.patch
Cole Robinson 3c6a0ca337 Rebase to qemu-2.12.0-rc0
- Add hppa and riscv32/64 targets
- Add audio and ui modules
2018-03-22 09:13:01 -04:00

12 lines
767 B
Diff

diff -ur riscv-qemu-b6e0a38a922005d4015e2fdb42e8a783b3cc8e41.old/target/riscv/op_helper.c riscv-qemu-b6e0a38a922005d4015e2fdb42e8a783b3cc8e41/target/riscv/op_helper.c
--- riscv-qemu-b6e0a38a922005d4015e2fdb42e8a783b3cc8e41.old/target/riscv/op_helper.c 2018-03-02 13:29:21.000000000 +0000
+++ riscv-qemu-b6e0a38a922005d4015e2fdb42e8a783b3cc8e41/target/riscv/op_helper.c 2018-03-10 21:21:48.999120773 +0000
@@ -144,6 +144,7 @@
}
mstatus = (mstatus & ~mask) | (val_to_write & mask);
+ if (mstatus & MSTATUS_FS) mstatus |= MSTATUS_FS; /* FP is always dirty if enabled */
int dirty = (mstatus & MSTATUS_FS) == MSTATUS_FS;
dirty |= (mstatus & MSTATUS_XS) == MSTATUS_XS;
mstatus = set_field(mstatus, MSTATUS_SD, dirty);