161 lines
4.5 KiB
Diff
161 lines
4.5 KiB
Diff
From 4bf321d3f494134fe2e03c9cbc042e28ec3a1045 Mon Sep 17 00:00:00 2001
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From: Richard Henderson <rth@twiddle.net>
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Date: Fri, 21 Sep 2012 10:13:35 -0700
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Subject: [PATCH] target-alpha: Use movcond
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For proper cmov insns, as well as the non-goto-tb case
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of conditional branch.
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Signed-off-by: Richard Henderson <rth@twiddle.net>
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Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
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Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
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---
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target-alpha/translate.c | 102 ++++++++++++++++++++++-------------------------
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1 file changed, 48 insertions(+), 54 deletions(-)
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diff --git a/target-alpha/translate.c b/target-alpha/translate.c
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index 12de6a3..4a9011a 100644
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--- a/target-alpha/translate.c
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+++ b/target-alpha/translate.c
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@@ -426,27 +426,15 @@ static ExitStatus gen_bcond_internal(DisasContext *ctx, TCGCond cond,
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return EXIT_GOTO_TB;
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} else {
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- int lab_over = gen_new_label();
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-
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- /* ??? Consider using either
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- movi pc, next
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- addi tmp, pc, disp
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- movcond pc, cond, 0, tmp, pc
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- or
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- setcond tmp, cond, 0
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- movi pc, next
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- neg tmp, tmp
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- andi tmp, tmp, disp
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- add pc, pc, tmp
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- The current diamond subgraph surely isn't efficient. */
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+ TCGv_i64 z = tcg_const_i64(0);
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+ TCGv_i64 d = tcg_const_i64(dest);
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+ TCGv_i64 p = tcg_const_i64(ctx->pc);
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- tcg_gen_brcondi_i64(cond, cmp, 0, lab_true);
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- tcg_gen_movi_i64(cpu_pc, ctx->pc);
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- tcg_gen_br(lab_over);
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- gen_set_label(lab_true);
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- tcg_gen_movi_i64(cpu_pc, dest);
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- gen_set_label(lab_over);
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+ tcg_gen_movcond_i64(cond, cpu_pc, cmp, z, d, p);
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+ tcg_temp_free_i64(z);
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+ tcg_temp_free_i64(d);
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+ tcg_temp_free_i64(p);
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return EXIT_PC_UPDATED;
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}
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}
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@@ -521,61 +509,67 @@ static ExitStatus gen_fbcond(DisasContext *ctx, TCGCond cond, int ra,
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static void gen_cmov(TCGCond cond, int ra, int rb, int rc,
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int islit, uint8_t lit, int mask)
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{
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- TCGCond inv_cond = tcg_invert_cond(cond);
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- int l1;
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+ TCGv_i64 c1, z, v1;
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- if (unlikely(rc == 31))
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+ if (unlikely(rc == 31)) {
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return;
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+ }
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- l1 = gen_new_label();
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-
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- if (ra != 31) {
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- if (mask) {
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- TCGv tmp = tcg_temp_new();
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- tcg_gen_andi_i64(tmp, cpu_ir[ra], 1);
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- tcg_gen_brcondi_i64(inv_cond, tmp, 0, l1);
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- tcg_temp_free(tmp);
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- } else
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- tcg_gen_brcondi_i64(inv_cond, cpu_ir[ra], 0, l1);
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- } else {
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+ if (ra == 31) {
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/* Very uncommon case - Do not bother to optimize. */
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- TCGv tmp = tcg_const_i64(0);
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- tcg_gen_brcondi_i64(inv_cond, tmp, 0, l1);
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- tcg_temp_free(tmp);
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+ c1 = tcg_const_i64(0);
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+ } else if (mask) {
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+ c1 = tcg_const_i64(1);
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+ tcg_gen_and_i64(c1, c1, cpu_ir[ra]);
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+ } else {
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+ c1 = cpu_ir[ra];
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}
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+ if (islit) {
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+ v1 = tcg_const_i64(lit);
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+ } else {
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+ v1 = cpu_ir[rb];
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+ }
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+ z = tcg_const_i64(0);
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- if (islit)
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- tcg_gen_movi_i64(cpu_ir[rc], lit);
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- else
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- tcg_gen_mov_i64(cpu_ir[rc], cpu_ir[rb]);
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- gen_set_label(l1);
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+ tcg_gen_movcond_i64(cond, cpu_ir[rc], c1, z, v1, cpu_ir[rc]);
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+
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+ tcg_temp_free_i64(z);
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+ if (ra == 31 || mask) {
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+ tcg_temp_free_i64(c1);
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+ }
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+ if (islit) {
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+ tcg_temp_free_i64(v1);
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+ }
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}
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static void gen_fcmov(TCGCond cond, int ra, int rb, int rc)
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{
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- TCGv cmp_tmp;
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- int l1;
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+ TCGv_i64 c1, z, v1;
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if (unlikely(rc == 31)) {
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return;
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}
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- cmp_tmp = tcg_temp_new();
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+ c1 = tcg_temp_new_i64();
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if (unlikely(ra == 31)) {
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- tcg_gen_movi_i64(cmp_tmp, 0);
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+ tcg_gen_movi_i64(c1, 0);
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+ } else {
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+ gen_fold_mzero(cond, c1, cpu_fir[ra]);
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+ }
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+ if (rb == 31) {
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+ v1 = tcg_const_i64(0);
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} else {
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- gen_fold_mzero(cond, cmp_tmp, cpu_fir[ra]);
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+ v1 = cpu_fir[rb];
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}
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+ z = tcg_const_i64(0);
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- l1 = gen_new_label();
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- tcg_gen_brcondi_i64(tcg_invert_cond(cond), cmp_tmp, 0, l1);
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- tcg_temp_free(cmp_tmp);
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+ tcg_gen_movcond_i64(cond, cpu_fir[rc], c1, z, v1, cpu_fir[rc]);
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- if (rb != 31)
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- tcg_gen_mov_i64(cpu_fir[rc], cpu_fir[rb]);
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- else
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- tcg_gen_movi_i64(cpu_fir[rc], 0);
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- gen_set_label(l1);
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+ tcg_temp_free_i64(z);
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+ tcg_temp_free_i64(c1);
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+ if (rb == 31) {
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+ tcg_temp_free_i64(v1);
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+ }
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}
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#define QUAL_RM_N 0x080 /* Round mode nearest even */
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--
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1.7.12.1
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