140 lines
5.1 KiB
Diff
140 lines
5.1 KiB
Diff
From: Anton Blanchard <anton@samba.org>
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Date: Fri, 15 Jan 2016 16:00:51 +0100
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Subject: [PATCH] target-ppc: gdbstub: Add VSX support
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Add the XML and functions to get and set VSX registers.
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Signed-off-by: Anton Blanchard <anton@samba.org>
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(fixed little-endian guests)
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Signed-off-by: Greg Kurz <gkurz@linux.vnet.ibm.com>
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Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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(cherry picked from commit 1438eff302cbc6c85d477fd7181b8a9aeea2efd7)
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---
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configure | 6 +++---
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gdb-xml/power-vsx.xml | 44 ++++++++++++++++++++++++++++++++++++++++++++
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target-ppc/translate_init.c | 24 ++++++++++++++++++++++++
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3 files changed, 71 insertions(+), 3 deletions(-)
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create mode 100644 gdb-xml/power-vsx.xml
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diff --git a/configure b/configure
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index adbe117..69a5e2d 100755
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--- a/configure
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+++ b/configure
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@@ -5188,20 +5188,20 @@ case "$target_name" in
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ppc64)
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TARGET_BASE_ARCH=ppc
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TARGET_ABI_DIR=ppc
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- gdb_xml_files="power64-core.xml power-fpu.xml power-altivec.xml power-spe.xml"
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+ gdb_xml_files="power64-core.xml power-fpu.xml power-altivec.xml power-spe.xml power-vsx.xml"
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;;
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ppc64le)
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TARGET_ARCH=ppc64
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TARGET_BASE_ARCH=ppc
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TARGET_ABI_DIR=ppc
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- gdb_xml_files="power64-core.xml power-fpu.xml power-altivec.xml power-spe.xml"
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+ gdb_xml_files="power64-core.xml power-fpu.xml power-altivec.xml power-spe.xml power-vsx.xml"
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;;
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ppc64abi32)
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TARGET_ARCH=ppc64
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TARGET_BASE_ARCH=ppc
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TARGET_ABI_DIR=ppc
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echo "TARGET_ABI32=y" >> $config_target_mak
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- gdb_xml_files="power64-core.xml power-fpu.xml power-altivec.xml power-spe.xml"
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+ gdb_xml_files="power64-core.xml power-fpu.xml power-altivec.xml power-spe.xml power-vsx.xml"
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;;
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sh4|sh4eb)
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TARGET_ARCH=sh4
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diff --git a/gdb-xml/power-vsx.xml b/gdb-xml/power-vsx.xml
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new file mode 100644
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index 0000000..fd290e9
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--- /dev/null
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+++ b/gdb-xml/power-vsx.xml
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@@ -0,0 +1,44 @@
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+<?xml version="1.0"?>
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+<!-- Copyright (C) 2008-2015 Free Software Foundation, Inc.
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+
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+ Copying and distribution of this file, with or without modification,
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+ are permitted in any medium without royalty provided the copyright
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+ notice and this notice are preserved. -->
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+
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+<!-- POWER7 VSX registers that do not overlap existing FP and VMX
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+ registers. -->
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+<!DOCTYPE feature SYSTEM "gdb-target.dtd">
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+<feature name="org.gnu.gdb.power.vsx">
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+ <reg name="vs0h" bitsize="64" type="uint64"/>
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+ <reg name="vs1h" bitsize="64" type="uint64"/>
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+ <reg name="vs2h" bitsize="64" type="uint64"/>
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+ <reg name="vs3h" bitsize="64" type="uint64"/>
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+ <reg name="vs4h" bitsize="64" type="uint64"/>
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+ <reg name="vs5h" bitsize="64" type="uint64"/>
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+ <reg name="vs6h" bitsize="64" type="uint64"/>
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+ <reg name="vs7h" bitsize="64" type="uint64"/>
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+ <reg name="vs8h" bitsize="64" type="uint64"/>
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+ <reg name="vs9h" bitsize="64" type="uint64"/>
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+ <reg name="vs10h" bitsize="64" type="uint64"/>
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+ <reg name="vs11h" bitsize="64" type="uint64"/>
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+ <reg name="vs12h" bitsize="64" type="uint64"/>
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+ <reg name="vs13h" bitsize="64" type="uint64"/>
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+ <reg name="vs14h" bitsize="64" type="uint64"/>
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+ <reg name="vs15h" bitsize="64" type="uint64"/>
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+ <reg name="vs16h" bitsize="64" type="uint64"/>
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+ <reg name="vs17h" bitsize="64" type="uint64"/>
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+ <reg name="vs18h" bitsize="64" type="uint64"/>
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+ <reg name="vs19h" bitsize="64" type="uint64"/>
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+ <reg name="vs20h" bitsize="64" type="uint64"/>
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+ <reg name="vs21h" bitsize="64" type="uint64"/>
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+ <reg name="vs22h" bitsize="64" type="uint64"/>
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+ <reg name="vs23h" bitsize="64" type="uint64"/>
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+ <reg name="vs24h" bitsize="64" type="uint64"/>
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+ <reg name="vs25h" bitsize="64" type="uint64"/>
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+ <reg name="vs26h" bitsize="64" type="uint64"/>
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+ <reg name="vs27h" bitsize="64" type="uint64"/>
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+ <reg name="vs28h" bitsize="64" type="uint64"/>
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+ <reg name="vs29h" bitsize="64" type="uint64"/>
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+ <reg name="vs30h" bitsize="64" type="uint64"/>
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+ <reg name="vs31h" bitsize="64" type="uint64"/>
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+</feature>
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diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
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index 879d283..130e27e 100644
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--- a/target-ppc/translate_init.c
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+++ b/target-ppc/translate_init.c
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@@ -8900,6 +8900,26 @@ static int gdb_set_spe_reg(CPUPPCState *env, uint8_t *mem_buf, int n)
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return 0;
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}
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+static int gdb_get_vsx_reg(CPUPPCState *env, uint8_t *mem_buf, int n)
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+{
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+ if (n < 32) {
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+ stq_p(mem_buf, env->vsr[n]);
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+ ppc_maybe_bswap_register(env, mem_buf, 8);
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+ return 8;
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+ }
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+ return 0;
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+}
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+
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+static int gdb_set_vsx_reg(CPUPPCState *env, uint8_t *mem_buf, int n)
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+{
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+ if (n < 32) {
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+ ppc_maybe_bswap_register(env, mem_buf, 8);
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+ env->vsr[n] = ldq_p(mem_buf);
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+ return 8;
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+ }
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+ return 0;
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+}
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+
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static int ppc_fixup_cpu(PowerPCCPU *cpu)
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{
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CPUPPCState *env = &cpu->env;
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@@ -8997,6 +9017,10 @@ static void ppc_cpu_realizefn(DeviceState *dev, Error **errp)
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gdb_register_coprocessor(cs, gdb_get_spe_reg, gdb_set_spe_reg,
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34, "power-spe.xml", 0);
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}
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+ if (pcc->insns_flags2 & PPC2_VSX) {
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+ gdb_register_coprocessor(cs, gdb_get_vsx_reg, gdb_set_vsx_reg,
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+ 32, "power-vsx.xml", 0);
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+ }
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qemu_init_vcpu(cs);
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