f375e62ad9
Fix libvirt + seccomp combo (bz #855162) Fix scsi hotplug crash (bz #879657) Fix QOM refcount crash (bz #881486)
100 lines
3.7 KiB
Diff
100 lines
3.7 KiB
Diff
From e30cf829e9d8200364b53b9189c76d2155a32876 Mon Sep 17 00:00:00 2001
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From: Aurelien Jarno <aurelien@aurel32.net>
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Date: Fri, 21 Sep 2012 18:20:26 +0200
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Subject: [PATCH] tcg/mips: optimize brcond arg, 0
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MIPS has some conditional branch instructions when comparing with zero.
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Use them.
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Reviewed-by: Richard Henderson <rth@twiddle.net>
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Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
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Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
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---
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tcg/mips/tcg-target.c | 38 ++++++++++++++++++++++++++++++--------
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1 file changed, 30 insertions(+), 8 deletions(-)
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diff --git a/tcg/mips/tcg-target.c b/tcg/mips/tcg-target.c
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index c05169f..6aa4527 100644
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--- a/tcg/mips/tcg-target.c
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+++ b/tcg/mips/tcg-target.c
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@@ -278,6 +278,8 @@ static inline int tcg_target_const_match(tcg_target_long val,
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enum {
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OPC_BEQ = 0x04 << 26,
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OPC_BNE = 0x05 << 26,
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+ OPC_BLEZ = 0x06 << 26,
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+ OPC_BGTZ = 0x07 << 26,
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OPC_ADDIU = 0x09 << 26,
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OPC_SLTI = 0x0A << 26,
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OPC_SLTIU = 0x0B << 26,
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@@ -319,6 +321,10 @@ enum {
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OPC_SLT = OPC_SPECIAL | 0x2A,
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OPC_SLTU = OPC_SPECIAL | 0x2B,
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+ OPC_REGIMM = 0x01 << 26,
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+ OPC_BLTZ = OPC_REGIMM | (0x00 << 16),
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+ OPC_BGEZ = OPC_REGIMM | (0x01 << 16),
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+
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OPC_SPECIAL3 = 0x1f << 26,
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OPC_SEB = OPC_SPECIAL3 | 0x420,
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OPC_SEH = OPC_SPECIAL3 | 0x620,
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@@ -590,32 +596,48 @@ static void tcg_out_brcond(TCGContext *s, TCGCond cond, TCGArg arg1,
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tcg_out_opc_br(s, OPC_BNE, arg1, arg2);
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break;
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case TCG_COND_LT:
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- tcg_out_opc_reg(s, OPC_SLT, TCG_REG_AT, arg1, arg2);
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- tcg_out_opc_br(s, OPC_BNE, TCG_REG_AT, TCG_REG_ZERO);
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+ if (arg2 == 0) {
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+ tcg_out_opc_br(s, OPC_BLTZ, 0, arg1);
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+ } else {
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+ tcg_out_opc_reg(s, OPC_SLT, TCG_REG_AT, arg1, arg2);
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+ tcg_out_opc_br(s, OPC_BNE, TCG_REG_AT, TCG_REG_ZERO);
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+ }
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break;
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case TCG_COND_LTU:
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tcg_out_opc_reg(s, OPC_SLTU, TCG_REG_AT, arg1, arg2);
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tcg_out_opc_br(s, OPC_BNE, TCG_REG_AT, TCG_REG_ZERO);
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break;
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case TCG_COND_GE:
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- tcg_out_opc_reg(s, OPC_SLT, TCG_REG_AT, arg1, arg2);
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- tcg_out_opc_br(s, OPC_BEQ, TCG_REG_AT, TCG_REG_ZERO);
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+ if (arg2 == 0) {
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+ tcg_out_opc_br(s, OPC_BGEZ, 0, arg1);
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+ } else {
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+ tcg_out_opc_reg(s, OPC_SLT, TCG_REG_AT, arg1, arg2);
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+ tcg_out_opc_br(s, OPC_BEQ, TCG_REG_AT, TCG_REG_ZERO);
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+ }
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break;
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case TCG_COND_GEU:
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tcg_out_opc_reg(s, OPC_SLTU, TCG_REG_AT, arg1, arg2);
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tcg_out_opc_br(s, OPC_BEQ, TCG_REG_AT, TCG_REG_ZERO);
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break;
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case TCG_COND_LE:
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- tcg_out_opc_reg(s, OPC_SLT, TCG_REG_AT, arg2, arg1);
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- tcg_out_opc_br(s, OPC_BEQ, TCG_REG_AT, TCG_REG_ZERO);
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+ if (arg2 == 0) {
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+ tcg_out_opc_br(s, OPC_BLEZ, 0, arg1);
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+ } else {
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+ tcg_out_opc_reg(s, OPC_SLT, TCG_REG_AT, arg2, arg1);
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+ tcg_out_opc_br(s, OPC_BEQ, TCG_REG_AT, TCG_REG_ZERO);
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+ }
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break;
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case TCG_COND_LEU:
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tcg_out_opc_reg(s, OPC_SLTU, TCG_REG_AT, arg2, arg1);
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tcg_out_opc_br(s, OPC_BEQ, TCG_REG_AT, TCG_REG_ZERO);
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break;
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case TCG_COND_GT:
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- tcg_out_opc_reg(s, OPC_SLT, TCG_REG_AT, arg2, arg1);
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- tcg_out_opc_br(s, OPC_BNE, TCG_REG_AT, TCG_REG_ZERO);
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+ if (arg2 == 0) {
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+ tcg_out_opc_br(s, OPC_BGTZ, 0, arg1);
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+ } else {
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+ tcg_out_opc_reg(s, OPC_SLT, TCG_REG_AT, arg2, arg1);
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+ tcg_out_opc_br(s, OPC_BNE, TCG_REG_AT, TCG_REG_ZERO);
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+ }
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break;
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case TCG_COND_GTU:
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tcg_out_opc_reg(s, OPC_SLTU, TCG_REG_AT, arg2, arg1);
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--
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1.8.0.2
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