f375e62ad9
Fix libvirt + seccomp combo (bz #855162) Fix scsi hotplug crash (bz #879657) Fix QOM refcount crash (bz #881486)
71 lines
3.0 KiB
Diff
71 lines
3.0 KiB
Diff
From e6f923b4e3e71661343f6d2eecd7f102022e5635 Mon Sep 17 00:00:00 2001
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From: Richard Henderson <rth@twiddle.net>
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Date: Tue, 18 Sep 2012 21:55:34 -0700
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Subject: [PATCH] target-mips: Always evaluate debugging macro arguments
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this will prevent some of the compilation errors with debugging
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enabled from creeping back in.
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Signed-off-by: Richard Henderson <rth@twiddle.net>
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Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
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Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
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---
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target-mips/translate.c | 31 +++++++++++++++++--------------
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1 file changed, 17 insertions(+), 14 deletions(-)
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diff --git a/target-mips/translate.c b/target-mips/translate.c
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index 4937f6b..aba7935 100644
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--- a/target-mips/translate.c
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+++ b/target-mips/translate.c
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@@ -28,7 +28,7 @@
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#define GEN_HELPER 1
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#include "helper.h"
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-//#define MIPS_DEBUG_DISAS
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+#define MIPS_DEBUG_DISAS 0
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//#define MIPS_DEBUG_SIGN_EXTENSIONS
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/* MIPS major opcodes */
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@@ -566,22 +566,25 @@ static const char *fregnames[] =
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"f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
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"f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31", };
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-#ifdef MIPS_DEBUG_DISAS
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-#define MIPS_DEBUG(fmt, ...) \
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- qemu_log_mask(CPU_LOG_TB_IN_ASM, \
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- TARGET_FMT_lx ": %08x " fmt "\n", \
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- ctx->pc, ctx->opcode , ## __VA_ARGS__)
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-#define LOG_DISAS(...) qemu_log_mask(CPU_LOG_TB_IN_ASM, ## __VA_ARGS__)
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-#else
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-#define MIPS_DEBUG(fmt, ...) do { } while(0)
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-#define LOG_DISAS(...) do { } while (0)
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-#endif
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+#define MIPS_DEBUG(fmt, ...) \
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+ do { \
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+ if (MIPS_DEBUG_DISAS) { \
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+ qemu_log_mask(CPU_LOG_TB_IN_ASM, \
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+ TARGET_FMT_lx ": %08x " fmt "\n", \
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+ ctx->pc, ctx->opcode , ## __VA_ARGS__); \
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+ } \
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+ } while (0)
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+
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+#define LOG_DISAS(...) \
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+ do { \
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+ if (MIPS_DEBUG_DISAS) { \
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+ qemu_log_mask(CPU_LOG_TB_IN_ASM, ## __VA_ARGS__); \
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+ } \
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+ } while (0)
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#define MIPS_INVAL(op) \
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-do { \
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MIPS_DEBUG("Invalid %s %03x %03x %03x", op, ctx->opcode >> 26, \
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- ctx->opcode & 0x3F, ((ctx->opcode >> 16) & 0x1F)); \
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-} while (0)
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+ ctx->opcode & 0x3F, ((ctx->opcode >> 16) & 0x1F))
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/* General purpose registers moves. */
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static inline void gen_load_gpr (TCGv t, int reg)
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--
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1.8.0.2
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