100 lines
3.8 KiB
Diff
100 lines
3.8 KiB
Diff
From: Christoffer Dall <christoffer.dall@linaro.org>
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Date: Thu, 12 Sep 2013 22:18:20 -0700
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Subject: [PATCH] arm_gic: Support setting/getting binary point reg
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Add a binary_point field to the gic emulation structure and support
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setting/getting this register now when we have it. We don't actually
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support interrupt grouping yet, oh well.
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Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
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Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
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Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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(cherry picked from commit aa7d461ae9dd79d35999f4710743cdf9dec88cef)
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---
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hw/intc/arm_gic.c | 12 +++++++++---
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hw/intc/arm_gic_common.c | 6 ++++--
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include/hw/intc/arm_gic_common.h | 7 +++++++
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3 files changed, 20 insertions(+), 5 deletions(-)
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diff --git a/hw/intc/arm_gic.c b/hw/intc/arm_gic.c
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index 29f98be..d31892d 100644
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--- a/hw/intc/arm_gic.c
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+++ b/hw/intc/arm_gic.c
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@@ -669,14 +669,15 @@ static uint32_t gic_cpu_read(GICState *s, int cpu, int offset)
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case 0x04: /* Priority mask */
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return s->priority_mask[cpu];
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case 0x08: /* Binary Point */
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- /* ??? Not implemented. */
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- return 0;
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+ return s->bpr[cpu];
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case 0x0c: /* Acknowledge */
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return gic_acknowledge_irq(s, cpu);
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case 0x14: /* Running Priority */
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return s->running_priority[cpu];
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case 0x18: /* Highest Pending Interrupt */
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return s->current_pending[cpu];
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+ case 0x1c: /* Aliased Binary Point */
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+ return s->abpr[cpu];
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default:
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qemu_log_mask(LOG_GUEST_ERROR,
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"gic_cpu_read: Bad offset %x\n", (int)offset);
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@@ -695,10 +696,15 @@ static void gic_cpu_write(GICState *s, int cpu, int offset, uint32_t value)
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s->priority_mask[cpu] = (value & 0xff);
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break;
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case 0x08: /* Binary Point */
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- /* ??? Not implemented. */
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+ s->bpr[cpu] = (value & 0x7);
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break;
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case 0x10: /* End Of Interrupt */
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return gic_complete_irq(s, cpu, value & 0x3ff);
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+ case 0x1c: /* Aliased Binary Point */
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+ if (s->revision >= 2) {
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+ s->abpr[cpu] = (value & 0x7);
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+ }
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+ break;
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default:
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qemu_log_mask(LOG_GUEST_ERROR,
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"gic_cpu_write: Bad offset %x\n", (int)offset);
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diff --git a/hw/intc/arm_gic_common.c b/hw/intc/arm_gic_common.c
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index f4c7f14..7966985 100644
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--- a/hw/intc/arm_gic_common.c
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+++ b/hw/intc/arm_gic_common.c
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@@ -58,8 +58,8 @@ static const VMStateDescription vmstate_gic_irq_state = {
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static const VMStateDescription vmstate_gic = {
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.name = "arm_gic",
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- .version_id = 5,
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- .minimum_version_id = 5,
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+ .version_id = 6,
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+ .minimum_version_id = 6,
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.pre_save = gic_pre_save,
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.post_load = gic_post_load,
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.fields = (VMStateField[]) {
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@@ -76,6 +76,8 @@ static const VMStateDescription vmstate_gic = {
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VMSTATE_UINT16_ARRAY(running_irq, GICState, GIC_NCPU),
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VMSTATE_UINT16_ARRAY(running_priority, GICState, GIC_NCPU),
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VMSTATE_UINT16_ARRAY(current_pending, GICState, GIC_NCPU),
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+ VMSTATE_UINT8_ARRAY(bpr, GICState, GIC_NCPU),
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+ VMSTATE_UINT8_ARRAY(abpr, GICState, GIC_NCPU),
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VMSTATE_END_OF_LIST()
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}
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};
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diff --git a/include/hw/intc/arm_gic_common.h b/include/hw/intc/arm_gic_common.h
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index d2e0c2f..983c3cf 100644
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--- a/include/hw/intc/arm_gic_common.h
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+++ b/include/hw/intc/arm_gic_common.h
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@@ -68,6 +68,13 @@ typedef struct GICState {
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uint16_t running_priority[GIC_NCPU];
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uint16_t current_pending[GIC_NCPU];
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+ /* We present the GICv2 without security extensions to a guest and
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+ * therefore the guest can configure the GICC_CTLR to configure group 1
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+ * binary point in the abpr.
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+ */
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+ uint8_t bpr[GIC_NCPU];
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+ uint8_t abpr[GIC_NCPU];
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+
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uint32_t num_cpu;
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MemoryRegion iomem; /* Distributor */
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