40 lines
1.4 KiB
Diff
40 lines
1.4 KiB
Diff
From: Christoffer Dall <christoffer.dall@linaro.org>
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Date: Fri, 31 Jan 2014 14:47:38 +0000
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Subject: [PATCH] arm_gic: Fix GICD_ICPENDR and GICD_ISPENDR writes
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Fix two bugs that would allow changing the state of SGIs through the
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ICPENDR and ISPENDRs.
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Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
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Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
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Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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(cherry picked from commit 5b0adce156216fb24dcc5f1683e8b686f3793fff)
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---
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hw/intc/arm_gic.c | 6 +++++-
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1 file changed, 5 insertions(+), 1 deletion(-)
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diff --git a/hw/intc/arm_gic.c b/hw/intc/arm_gic.c
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index 0ce11ac..62153fd 100644
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--- a/hw/intc/arm_gic.c
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+++ b/hw/intc/arm_gic.c
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@@ -428,7 +428,7 @@ static void gic_dist_writeb(void *opaque, hwaddr offset,
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if (irq >= s->num_irq)
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goto bad_reg;
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if (irq < GIC_NR_SGIS) {
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- irq = 0;
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+ value = 0;
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}
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for (i = 0; i < 8; i++) {
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@@ -441,6 +441,10 @@ static void gic_dist_writeb(void *opaque, hwaddr offset,
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irq = (offset - 0x280) * 8 + GIC_BASE_IRQ;
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if (irq >= s->num_irq)
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goto bad_reg;
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+ if (irq < GIC_NR_SGIS) {
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+ value = 0;
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+ }
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+
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for (i = 0; i < 8; i++) {
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/* ??? This currently clears the pending bit for all CPUs, even
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for per-CPU interrupts. It's unclear whether this is the
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