40 lines
1.7 KiB
Diff
40 lines
1.7 KiB
Diff
From: Yiting Wang <yiting.wang@windriver.com>
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Date: Fri, 3 Jan 2020 11:53:42 +0800
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Subject: [PATCH] riscv: Set xPIE to 1 after xRET
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When executing an xRET instruction, supposing xPP holds the
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value y, xIE is set to xPIE; the privilege mode is changed to y;
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xPIE is set to 1. But QEMU sets xPIE to 0 incorrectly.
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Signed-off-by: Yiting Wang <yiting.wang@windriver.com>
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Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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Tested-by: Bin Meng <bmeng.cn@gmail.com>
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Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
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Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
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---
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target/riscv/op_helper.c | 4 ++--
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1 file changed, 2 insertions(+), 2 deletions(-)
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diff --git a/target/riscv/op_helper.c b/target/riscv/op_helper.c
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index 331cc36232..e87c9115bc 100644
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--- a/target/riscv/op_helper.c
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+++ b/target/riscv/op_helper.c
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@@ -93,7 +93,7 @@ target_ulong helper_sret(CPURISCVState *env, target_ulong cpu_pc_deb)
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env->priv_ver >= PRIV_VERSION_1_10_0 ?
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MSTATUS_SIE : MSTATUS_UIE << prev_priv,
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get_field(mstatus, MSTATUS_SPIE));
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- mstatus = set_field(mstatus, MSTATUS_SPIE, 0);
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+ mstatus = set_field(mstatus, MSTATUS_SPIE, 1);
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mstatus = set_field(mstatus, MSTATUS_SPP, PRV_U);
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riscv_cpu_set_mode(env, prev_priv);
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env->mstatus = mstatus;
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@@ -118,7 +118,7 @@ target_ulong helper_mret(CPURISCVState *env, target_ulong cpu_pc_deb)
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env->priv_ver >= PRIV_VERSION_1_10_0 ?
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MSTATUS_MIE : MSTATUS_UIE << prev_priv,
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get_field(mstatus, MSTATUS_MPIE));
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- mstatus = set_field(mstatus, MSTATUS_MPIE, 0);
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+ mstatus = set_field(mstatus, MSTATUS_MPIE, 1);
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mstatus = set_field(mstatus, MSTATUS_MPP, PRV_U);
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riscv_cpu_set_mode(env, prev_priv);
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env->mstatus = mstatus;
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