36 lines
1.3 KiB
Diff
36 lines
1.3 KiB
Diff
From: Prasad J Pandit <pjp@fedoraproject.org>
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Date: Wed, 12 Oct 2016 18:07:41 +0530
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Subject: [PATCH] dma: rc4030: limit interval timer reload value
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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The JAZZ RC4030 chipset emulator has a periodic timer and
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associated interval reload register. The reload value is used
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as divider when computing timer's next tick value. If reload
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value is large, it could lead to divide by zero error. Limit
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the interval reload value to avoid it.
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Reported-by: Huawei PSIRT <psirt@huawei.com>
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Signed-off-by: Prasad J Pandit <pjp@fedoraproject.org>
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Tested-by: Hervé Poussineau <hpoussin@reactos.org>
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Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com>
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(cherry picked from commit c0a3172fa6bbddcc73192f2a2c48d0bf3a7ba61c)
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---
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hw/dma/rc4030.c | 2 +-
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1 file changed, 1 insertion(+), 1 deletion(-)
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diff --git a/hw/dma/rc4030.c b/hw/dma/rc4030.c
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index a06c235..1814ca6 100644
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--- a/hw/dma/rc4030.c
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+++ b/hw/dma/rc4030.c
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@@ -459,7 +459,7 @@ static void rc4030_write(void *opaque, hwaddr addr, uint64_t data,
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break;
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/* Interval timer reload */
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case 0x0228:
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- s->itr = val;
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+ s->itr = val & 0x01FF;
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qemu_irq_lower(s->timer_irq);
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set_next_tick(s);
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break;
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