Compare commits
6 Commits
master
...
f29-riscv6
Author | SHA1 | Date | |
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6f2daf482a | |||
2c62ea860b | |||
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0cae3bc929 | ||
34bf911448 | |||
1a736eea9b | |||
2e42dab32b |
@ -1,51 +0,0 @@
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From 7920d78dc80e7206e07f2a35f942e9f33174d251 Mon Sep 17 00:00:00 2001
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|
||||||
From: =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= <berrange@redhat.com>
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|
||||||
Date: Mon, 21 May 2018 22:54:22 +0100
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|
||||||
Subject: [PATCH 1/3] i386: define the 'ssbd' CPUID feature bit (CVE-2018-3639)
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|
||||||
MIME-Version: 1.0
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|
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Content-Type: text/plain; charset=UTF-8
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|
||||||
Content-Transfer-Encoding: 8bit
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|
||||||
|
|
||||||
New microcode introduces the "Speculative Store Bypass Disable"
|
|
||||||
CPUID feature bit. This needs to be exposed to guest OS to allow
|
|
||||||
them to protect against CVE-2018-3639.
|
|
||||||
|
|
||||||
Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
|
|
||||||
Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
|
|
||||||
Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
|
|
||||||
Message-Id: <20180521215424.13520-2-berrange@redhat.com>
|
|
||||||
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
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|
||||||
(cherry picked from commit d19d1f965904a533998739698020ff4ee8a103da)
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|
||||||
---
|
|
||||||
target/i386/cpu.c | 2 +-
|
|
||||||
target/i386/cpu.h | 1 +
|
|
||||||
2 files changed, 2 insertions(+), 1 deletion(-)
|
|
||||||
|
|
||||||
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
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|
||||||
index a20fe26573..2f5263e22f 100644
|
|
||||||
--- a/target/i386/cpu.c
|
|
||||||
+++ b/target/i386/cpu.c
|
|
||||||
@@ -510,7 +510,7 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
|
|
||||||
NULL, NULL, NULL, NULL,
|
|
||||||
NULL, NULL, NULL, NULL,
|
|
||||||
NULL, NULL, "spec-ctrl", NULL,
|
|
||||||
- NULL, NULL, NULL, NULL,
|
|
||||||
+ NULL, NULL, NULL, "ssbd",
|
|
||||||
},
|
|
||||||
.cpuid_eax = 7,
|
|
||||||
.cpuid_needs_ecx = true, .cpuid_ecx = 0,
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|
||||||
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
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|
||||||
index 1b219fafc4..970ab96e54 100644
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|
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--- a/target/i386/cpu.h
|
|
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+++ b/target/i386/cpu.h
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|
||||||
@@ -684,6 +684,7 @@ typedef uint32_t FeatureWordArray[FEATURE_WORDS];
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|
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#define CPUID_7_0_EDX_AVX512_4VNNIW (1U << 2) /* AVX512 Neural Network Instructions */
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|
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#define CPUID_7_0_EDX_AVX512_4FMAPS (1U << 3) /* AVX512 Multiply Accumulation Single Precision */
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|
||||||
#define CPUID_7_0_EDX_SPEC_CTRL (1U << 26) /* Speculation Control */
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|
||||||
+#define CPUID_7_0_EDX_SPEC_CTRL_SSBD (1U << 31) /* Speculative Store Bypass Disable */
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|
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|
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#define KVM_HINTS_DEDICATED (1U << 0)
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|
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|
|
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--
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|
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2.17.0
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|
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|
|
@ -1,43 +0,0 @@
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From 5bd5c27c7d284d01477c5cc022ce22438c46bf9f Mon Sep 17 00:00:00 2001
|
|
||||||
Message-Id: <5bd5c27c7d284d01477c5cc022ce22438c46bf9f.1528219523.git.crobinso@redhat.com>
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|
||||||
From: Gerd Hoffmann <kraxel@redhat.com>
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|
||||||
Date: Fri, 27 Apr 2018 13:55:28 +0200
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|
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Subject: [PATCH] qxl: fix local renderer crash
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|
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MIME-Version: 1.0
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|
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Content-Type: text/plain; charset=UTF-8
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|
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Content-Transfer-Encoding: 8bit
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|
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|
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Make sure we only ask the spice local renderer for display updates in
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|
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case we have a valid primary surface. Without that spice is confused
|
|
||||||
and throws errors in case a display update request (triggered by
|
|
||||||
screendump for example) happens in parallel to a mode switch and hits
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|
||||||
the race window where the old primary surface is gone and the new isn't
|
|
||||||
establisted yet.
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|
||||||
|
|
||||||
Cc: qemu-stable@nongnu.org
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|
||||||
Fixes: https://bugzilla.redhat.com//show_bug.cgi?id=1567733
|
|
||||||
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
|
|
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Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
|
|
||||||
Message-id: 20180427115528.345-1-kraxel@redhat.com
|
|
||||||
Signed-off-by: Cole Robinson <crobinso@redhat.com>
|
|
||||||
---
|
|
||||||
hw/display/qxl-render.c | 3 ++-
|
|
||||||
1 file changed, 2 insertions(+), 1 deletion(-)
|
|
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|
|
||||||
diff --git a/hw/display/qxl-render.c b/hw/display/qxl-render.c
|
|
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index e7ac4f8789..c62b9a5e75 100644
|
|
||||||
--- a/hw/display/qxl-render.c
|
|
||||||
+++ b/hw/display/qxl-render.c
|
|
||||||
@@ -169,7 +169,8 @@ void qxl_render_update(PCIQXLDevice *qxl)
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|
||||||
|
|
||||||
qemu_mutex_lock(&qxl->ssd.lock);
|
|
||||||
|
|
||||||
- if (!runstate_is_running() || !qxl->guest_primary.commands) {
|
|
||||||
+ if (!runstate_is_running() || !qxl->guest_primary.commands ||
|
|
||||||
+ qxl->mode == QXL_MODE_UNDEFINED) {
|
|
||||||
qxl_render_update_area_unlocked(qxl);
|
|
||||||
qemu_mutex_unlock(&qxl->ssd.lock);
|
|
||||||
return;
|
|
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--
|
|
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2.17.1
|
|
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|
|
@ -1,148 +0,0 @@
|
|||||||
From 70913a1bded444b1d264c3723fca2f6a7966d667 Mon Sep 17 00:00:00 2001
|
|
||||||
From: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
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|
||||||
Date: Mon, 21 May 2018 22:54:24 +0100
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|
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Subject: [PATCH 2/3] i386: Define the Virt SSBD MSR and handling of it
|
|
||||||
(CVE-2018-3639)
|
|
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MIME-Version: 1.0
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|
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Content-Type: text/plain; charset=UTF-8
|
|
||||||
Content-Transfer-Encoding: 8bit
|
|
||||||
|
|
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"Some AMD processors only support a non-architectural means of enabling
|
|
||||||
speculative store bypass disable (SSBD). To allow a simplified view of
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|
||||||
this to a guest, an architectural definition has been created through a new
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|
||||||
CPUID bit, 0x80000008_EBX[25], and a new MSR, 0xc001011f. With this, a
|
|
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hypervisor can virtualize the existence of this definition and provide an
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|
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architectural method for using SSBD to a guest.
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|
||||||
|
|
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Add the new CPUID feature, the new MSR and update the existing SSBD
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|
||||||
support to use this MSR when present." (from x86/speculation: Add virtualized
|
|
||||||
speculative store bypass disable support in Linux).
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|
||||||
|
|
||||||
Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
|
|
||||||
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
|
|
||||||
Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
|
|
||||||
Message-Id: <20180521215424.13520-4-berrange@redhat.com>
|
|
||||||
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
|
|
||||||
(cherry picked from commit cfeea0c021db6234c154dbc723730e81553924ff)
|
|
||||||
---
|
|
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target/i386/cpu.h | 2 ++
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|
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target/i386/kvm.c | 16 ++++++++++++++--
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|
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target/i386/machine.c | 20 ++++++++++++++++++++
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|
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3 files changed, 36 insertions(+), 2 deletions(-)
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|
||||||
|
|
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diff --git a/target/i386/cpu.h b/target/i386/cpu.h
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|
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index 970ab96e54..75e821cefe 100644
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|
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--- a/target/i386/cpu.h
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|
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+++ b/target/i386/cpu.h
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|
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@@ -351,6 +351,7 @@ typedef enum X86Seg {
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|
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#define MSR_IA32_FEATURE_CONTROL 0x0000003a
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#define MSR_TSC_ADJUST 0x0000003b
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#define MSR_IA32_SPEC_CTRL 0x48
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+#define MSR_VIRT_SSBD 0xc001011f
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#define MSR_IA32_TSCDEADLINE 0x6e0
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#define FEATURE_CONTROL_LOCKED (1<<0)
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|
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@@ -1150,6 +1151,7 @@ typedef struct CPUX86State {
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uint32_t pkru;
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|
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|
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uint64_t spec_ctrl;
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|
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+ uint64_t virt_ssbd;
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|
||||||
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|
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/* End of state preserved by INIT (dummy marker). */
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|
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struct {} end_init_save;
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|
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diff --git a/target/i386/kvm.c b/target/i386/kvm.c
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|
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index 6c49954e68..19e6aa320d 100644
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|
||||||
--- a/target/i386/kvm.c
|
|
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+++ b/target/i386/kvm.c
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|
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@@ -92,6 +92,7 @@ static bool has_msr_hv_stimer;
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|
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static bool has_msr_hv_frequencies;
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|
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static bool has_msr_xss;
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|
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static bool has_msr_spec_ctrl;
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|
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+static bool has_msr_virt_ssbd;
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|
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static bool has_msr_smi_count;
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|
||||||
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|
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static uint32_t has_architectural_pmu_version;
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|
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@@ -1218,6 +1219,9 @@ static int kvm_get_supported_msrs(KVMState *s)
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|
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case MSR_IA32_SPEC_CTRL:
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|
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has_msr_spec_ctrl = true;
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|
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break;
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|
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+ case MSR_VIRT_SSBD:
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|
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+ has_msr_virt_ssbd = true;
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|
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+ break;
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|
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}
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|
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}
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|
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}
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|
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@@ -1706,6 +1710,10 @@ static int kvm_put_msrs(X86CPU *cpu, int level)
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|
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if (has_msr_spec_ctrl) {
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|
||||||
kvm_msr_entry_add(cpu, MSR_IA32_SPEC_CTRL, env->spec_ctrl);
|
|
||||||
}
|
|
||||||
+ if (has_msr_virt_ssbd) {
|
|
||||||
+ kvm_msr_entry_add(cpu, MSR_VIRT_SSBD, env->virt_ssbd);
|
|
||||||
+ }
|
|
||||||
+
|
|
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#ifdef TARGET_X86_64
|
|
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if (lm_capable_kernel) {
|
|
||||||
kvm_msr_entry_add(cpu, MSR_CSTAR, env->cstar);
|
|
||||||
@@ -2077,8 +2085,9 @@ static int kvm_get_msrs(X86CPU *cpu)
|
|
||||||
if (has_msr_spec_ctrl) {
|
|
||||||
kvm_msr_entry_add(cpu, MSR_IA32_SPEC_CTRL, 0);
|
|
||||||
}
|
|
||||||
-
|
|
||||||
-
|
|
||||||
+ if (has_msr_virt_ssbd) {
|
|
||||||
+ kvm_msr_entry_add(cpu, MSR_VIRT_SSBD, 0);
|
|
||||||
+ }
|
|
||||||
if (!env->tsc_valid) {
|
|
||||||
kvm_msr_entry_add(cpu, MSR_IA32_TSC, 0);
|
|
||||||
env->tsc_valid = !runstate_is_running();
|
|
||||||
@@ -2444,6 +2453,9 @@ static int kvm_get_msrs(X86CPU *cpu)
|
|
||||||
case MSR_IA32_SPEC_CTRL:
|
|
||||||
env->spec_ctrl = msrs[i].data;
|
|
||||||
break;
|
|
||||||
+ case MSR_VIRT_SSBD:
|
|
||||||
+ env->virt_ssbd = msrs[i].data;
|
|
||||||
+ break;
|
|
||||||
case MSR_IA32_RTIT_CTL:
|
|
||||||
env->msr_rtit_ctrl = msrs[i].data;
|
|
||||||
break;
|
|
||||||
diff --git a/target/i386/machine.c b/target/i386/machine.c
|
|
||||||
index bd2d82e91b..f0a835c292 100644
|
|
||||||
--- a/target/i386/machine.c
|
|
||||||
+++ b/target/i386/machine.c
|
|
||||||
@@ -893,6 +893,25 @@ static const VMStateDescription vmstate_msr_intel_pt = {
|
|
||||||
}
|
|
||||||
};
|
|
||||||
|
|
||||||
+static bool virt_ssbd_needed(void *opaque)
|
|
||||||
+{
|
|
||||||
+ X86CPU *cpu = opaque;
|
|
||||||
+ CPUX86State *env = &cpu->env;
|
|
||||||
+
|
|
||||||
+ return env->virt_ssbd != 0;
|
|
||||||
+}
|
|
||||||
+
|
|
||||||
+static const VMStateDescription vmstate_msr_virt_ssbd = {
|
|
||||||
+ .name = "cpu/virt_ssbd",
|
|
||||||
+ .version_id = 1,
|
|
||||||
+ .minimum_version_id = 1,
|
|
||||||
+ .needed = virt_ssbd_needed,
|
|
||||||
+ .fields = (VMStateField[]){
|
|
||||||
+ VMSTATE_UINT64(env.virt_ssbd, X86CPU),
|
|
||||||
+ VMSTATE_END_OF_LIST()
|
|
||||||
+ }
|
|
||||||
+};
|
|
||||||
+
|
|
||||||
VMStateDescription vmstate_x86_cpu = {
|
|
||||||
.name = "cpu",
|
|
||||||
.version_id = 12,
|
|
||||||
@@ -1015,6 +1034,7 @@ VMStateDescription vmstate_x86_cpu = {
|
|
||||||
&vmstate_spec_ctrl,
|
|
||||||
&vmstate_mcg_ext_ctl,
|
|
||||||
&vmstate_msr_intel_pt,
|
|
||||||
+ &vmstate_msr_virt_ssbd,
|
|
||||||
NULL
|
|
||||||
}
|
|
||||||
};
|
|
||||||
--
|
|
||||||
2.17.0
|
|
||||||
|
|
@ -1,41 +0,0 @@
|
|||||||
From f956cd4aed74d55ecc03d3c33ea66b1d933cb28f Mon Sep 17 00:00:00 2001
|
|
||||||
From: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
|
|
||||||
Date: Mon, 21 May 2018 22:54:23 +0100
|
|
||||||
Subject: [PATCH 3/3] i386: define the AMD 'virt-ssbd' CPUID feature bit
|
|
||||||
(CVE-2018-3639)
|
|
||||||
MIME-Version: 1.0
|
|
||||||
Content-Type: text/plain; charset=UTF-8
|
|
||||||
Content-Transfer-Encoding: 8bit
|
|
||||||
|
|
||||||
AMD Zen expose the Intel equivalant to Speculative Store Bypass Disable
|
|
||||||
via the 0x80000008_EBX[25] CPUID feature bit.
|
|
||||||
|
|
||||||
This needs to be exposed to guest OS to allow them to protect
|
|
||||||
against CVE-2018-3639.
|
|
||||||
|
|
||||||
Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
|
|
||||||
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
|
|
||||||
Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
|
|
||||||
Message-Id: <20180521215424.13520-3-berrange@redhat.com>
|
|
||||||
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
|
|
||||||
(cherry picked from commit 403503b162ffc33fb64cfefdf7b880acf41772cd)
|
|
||||||
---
|
|
||||||
target/i386/cpu.c | 2 +-
|
|
||||||
1 file changed, 1 insertion(+), 1 deletion(-)
|
|
||||||
|
|
||||||
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
|
|
||||||
index 2f5263e22f..2e305ab689 100644
|
|
||||||
--- a/target/i386/cpu.c
|
|
||||||
+++ b/target/i386/cpu.c
|
|
||||||
@@ -541,7 +541,7 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
|
|
||||||
"ibpb", NULL, NULL, NULL,
|
|
||||||
NULL, NULL, NULL, NULL,
|
|
||||||
NULL, NULL, NULL, NULL,
|
|
||||||
- NULL, NULL, NULL, NULL,
|
|
||||||
+ NULL, "virt-ssbd", NULL, NULL,
|
|
||||||
NULL, NULL, NULL, NULL,
|
|
||||||
},
|
|
||||||
.cpuid_eax = 0x80000008,
|
|
||||||
--
|
|
||||||
2.17.0
|
|
||||||
|
|
2077
qemu-3.0.0-riscv64-backend.patch
Normal file
2077
qemu-3.0.0-riscv64-backend.patch
Normal file
File diff suppressed because it is too large
Load Diff
33
qemu.spec
33
qemu.spec
@ -33,7 +33,7 @@
|
|||||||
|
|
||||||
# Matches numactl ExcludeArch
|
# Matches numactl ExcludeArch
|
||||||
%global have_numactl 1
|
%global have_numactl 1
|
||||||
%ifarch s390 %{arm}
|
%ifarch s390 %{arm} riscv64
|
||||||
%global have_numactl 0
|
%global have_numactl 0
|
||||||
%endif
|
%endif
|
||||||
|
|
||||||
@ -105,7 +105,7 @@ Requires: %{name}-ui-sdl = %{epoch}:%{version}-%{release}
|
|||||||
Summary: QEMU is a FAST! processor emulator
|
Summary: QEMU is a FAST! processor emulator
|
||||||
Name: qemu
|
Name: qemu
|
||||||
Version: 3.0.0
|
Version: 3.0.0
|
||||||
Release: 1%{?rcrel}%{?dist}
|
Release: 1%{?rcrel}.1.riscv64%{?dist}
|
||||||
Epoch: 2
|
Epoch: 2
|
||||||
License: GPLv2 and BSD and MIT and CC-BY
|
License: GPLv2 and BSD and MIT and CC-BY
|
||||||
URL: http://www.qemu.org/
|
URL: http://www.qemu.org/
|
||||||
@ -131,13 +131,20 @@ Source21: 95-kvm-ppc64-memlock.conf
|
|||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
# riscv backend
|
||||||
|
# Source: https://github.com/riscv/riscv-qemu/commit/0805ad337785f0cce29ecf162bad9e1c477051f3.patch
|
||||||
|
# Development: https://github.com/riscv/riscv-qemu/commits/wip-riscv-tcg-backend
|
||||||
|
Patch0: qemu-3.0.0-riscv64-backend.patch
|
||||||
|
|
||||||
# documentation deps
|
# documentation deps
|
||||||
BuildRequires: texinfo
|
BuildRequires: texinfo
|
||||||
# For /usr/bin/pod2man
|
# For /usr/bin/pod2man
|
||||||
BuildRequires: perl-podlators
|
BuildRequires: perl-podlators
|
||||||
# For sanity test
|
# For sanity test
|
||||||
BuildRequires: qemu-sanity-check-nodeps
|
BuildRequires: qemu-sanity-check-nodeps
|
||||||
|
%ifnarch riscv64
|
||||||
BuildRequires: kernel
|
BuildRequires: kernel
|
||||||
|
%endif
|
||||||
%if %{have_iasl}
|
%if %{have_iasl}
|
||||||
# For acpi compilation
|
# For acpi compilation
|
||||||
BuildRequires: iasl
|
BuildRequires: iasl
|
||||||
@ -185,7 +192,9 @@ BuildRequires: spice-protocol >= 0.12.2
|
|||||||
BuildRequires: spice-server-devel >= 0.12.0
|
BuildRequires: spice-server-devel >= 0.12.0
|
||||||
%endif
|
%endif
|
||||||
# seccomp containment support
|
# seccomp containment support
|
||||||
|
%ifnarch riscv64
|
||||||
BuildRequires: libseccomp-devel >= 2.3.0
|
BuildRequires: libseccomp-devel >= 2.3.0
|
||||||
|
%endif
|
||||||
# For network block driver
|
# For network block driver
|
||||||
BuildRequires: libcurl-devel
|
BuildRequires: libcurl-devel
|
||||||
# For rbd block driver
|
# For rbd block driver
|
||||||
@ -241,13 +250,19 @@ BuildRequires: virglrenderer-devel
|
|||||||
# qemu 2.6: Needed for gtk GL support
|
# qemu 2.6: Needed for gtk GL support
|
||||||
BuildRequires: mesa-libgbm-devel
|
BuildRequires: mesa-libgbm-devel
|
||||||
# qemu 2.11: preferred disassembler for TCG
|
# qemu 2.11: preferred disassembler for TCG
|
||||||
|
%ifnarch riscv64
|
||||||
BuildRequires: capstone-devel
|
BuildRequires: capstone-devel
|
||||||
|
%endif
|
||||||
# qemu 2.12: parallels disk images require libxml2 now
|
# qemu 2.12: parallels disk images require libxml2 now
|
||||||
BuildRequires: libxml2-devel
|
BuildRequires: libxml2-devel
|
||||||
# python scripts in the build process
|
# python scripts in the build process
|
||||||
BuildRequires: python3
|
BuildRequires: python3
|
||||||
|
|
||||||
BuildRequires: glibc-static pcre-static glib2-static zlib-static
|
BuildRequires: glibc-static pcre-static glib2-static zlib-static
|
||||||
|
# if -pthread is used GCC SPEC will add --as-needed -latomic --no-as-needed for linker
|
||||||
|
%ifarch riscv64
|
||||||
|
BuildRequires: libatomic-static
|
||||||
|
%endif
|
||||||
|
|
||||||
%if 0%{?hostqemu:1}
|
%if 0%{?hostqemu:1}
|
||||||
# For complicated reasons, this is required so that
|
# For complicated reasons, this is required so that
|
||||||
@ -822,7 +837,7 @@ This package provides the QEMU system emulator for Xtensa boards.
|
|||||||
%build
|
%build
|
||||||
|
|
||||||
# drop -g flag to prevent memory exhaustion by linker
|
# drop -g flag to prevent memory exhaustion by linker
|
||||||
%ifarch s390
|
%ifarch s390 riscv64
|
||||||
%global optflags %(echo %{optflags} | sed 's/-g//')
|
%global optflags %(echo %{optflags} | sed 's/-g//')
|
||||||
sed -i.debug 's/"-g $CFLAGS"/"$CFLAGS"/g' configure
|
sed -i.debug 's/"-g $CFLAGS"/"$CFLAGS"/g' configure
|
||||||
%endif
|
%endif
|
||||||
@ -858,10 +873,16 @@ run_configure() {
|
|||||||
--with-pkgversion=%{name}-%{version}-%{release} \
|
--with-pkgversion=%{name}-%{version}-%{release} \
|
||||||
--disable-strip \
|
--disable-strip \
|
||||||
--disable-werror \
|
--disable-werror \
|
||||||
|
%ifnarch riscv64
|
||||||
--enable-kvm \
|
--enable-kvm \
|
||||||
|
%endif
|
||||||
--python=/usr/bin/python3 \
|
--python=/usr/bin/python3 \
|
||||||
%ifarch s390 %{mips64}
|
%ifarch s390 %{mips64}
|
||||||
--enable-tcg-interpreter \
|
--enable-tcg-interpreter \
|
||||||
|
%endif
|
||||||
|
%ifarch riscv64
|
||||||
|
--disable-capstone \
|
||||||
|
--disable-seccomp \
|
||||||
%endif
|
%endif
|
||||||
--enable-trace-backend=$tracebackends \
|
--enable-trace-backend=$tracebackends \
|
||||||
--extra-ldflags="$extraldflags -Wl,-z,relro -Wl,-z,now" \
|
--extra-ldflags="$extraldflags -Wl,-z,relro -Wl,-z,now" \
|
||||||
@ -1598,6 +1619,12 @@ getent passwd qemu >/dev/null || \
|
|||||||
|
|
||||||
|
|
||||||
%changelog
|
%changelog
|
||||||
|
* Tue Sep 11 2018 David Abdurachmanov <david.abdurachmanov@gmail.com> - 2:3.0.0-1.1.riscv64
|
||||||
|
- Rebase backend patch
|
||||||
|
|
||||||
|
* Mon Sep 10 2018 David Abdurachmanov <david.abdurachmanov@gmail.com> - 2:3.0.0-1.0.riscv64
|
||||||
|
- Enable riscv64 as host
|
||||||
|
|
||||||
* Wed Aug 15 2018 Cole Robinson <crobinso@redhat.com> - 2:3.0.0-1
|
* Wed Aug 15 2018 Cole Robinson <crobinso@redhat.com> - 2:3.0.0-1
|
||||||
- Rebase to qemu-3.0.0 GA
|
- Rebase to qemu-3.0.0 GA
|
||||||
|
|
||||||
|
Loading…
Reference in New Issue
Block a user