qemu-6.2.0-rc4
Signed-off-by: Eduardo Lima (Etrunko) <etrunko@redhat.com>
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@ -1,73 +0,0 @@
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From 1331e4eec016a295949009b4360c592401b089f7 Mon Sep 17 00:00:00 2001
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From: Richard Henderson <richard.henderson@linaro.org>
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Date: Sun, 12 Sep 2021 10:49:25 -0700
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Subject: [PATCH] tcg/arm: Reduce vector alignment requirement for NEON
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With arm32, the ABI gives us 8-byte alignment for the stack.
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While it's possible to realign the stack to provide 16-byte alignment,
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it's far easier to simply not encode 16-byte alignment in the
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VLD1 and VST1 instructions that we emit.
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Remove the assertion in temp_allocate_frame, limit natural alignment
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to the provided stack alignment, and add a comment.
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Reported-by: Richard W.M. Jones <rjones@redhat.com>
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Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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---
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tcg/arm/tcg-target.c.inc | 13 +++++++++----
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tcg/tcg.c | 8 +++++++-
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2 files changed, 16 insertions(+), 5 deletions(-)
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diff --git a/tcg/arm/tcg-target.c.inc b/tcg/arm/tcg-target.c.inc
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index 007ceee68e..34acfb522c 100644
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--- a/tcg/arm/tcg-target.c.inc
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+++ b/tcg/arm/tcg-target.c.inc
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@@ -2477,8 +2477,13 @@ static void tcg_out_ld(TCGContext *s, TCGType type, TCGReg arg,
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tcg_out_vldst(s, INSN_VLD1 | 0x7d0, arg, arg1, arg2);
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return;
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case TCG_TYPE_V128:
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- /* regs 2; size 8; align 16 */
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- tcg_out_vldst(s, INSN_VLD1 | 0xae0, arg, arg1, arg2);
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+ /*
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+ * We have only 8-byte alignment for the stack per the ABI.
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+ * Rather than dynamically re-align the stack, it's easier
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+ * to simply not request alignment beyond that. So:
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+ * regs 2; size 8; align 8
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+ */
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+ tcg_out_vldst(s, INSN_VLD1 | 0xad0, arg, arg1, arg2);
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return;
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default:
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g_assert_not_reached();
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@@ -2497,8 +2502,8 @@ static void tcg_out_st(TCGContext *s, TCGType type, TCGReg arg,
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tcg_out_vldst(s, INSN_VST1 | 0x7d0, arg, arg1, arg2);
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return;
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case TCG_TYPE_V128:
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- /* regs 2; size 8; align 16 */
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- tcg_out_vldst(s, INSN_VST1 | 0xae0, arg, arg1, arg2);
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+ /* See tcg_out_ld re alignment: regs 2; size 8; align 8 */
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+ tcg_out_vldst(s, INSN_VST1 | 0xad0, arg, arg1, arg2);
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return;
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default:
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g_assert_not_reached();
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diff --git a/tcg/tcg.c b/tcg/tcg.c
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index 4142d42d77..ca5bcc4635 100644
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--- a/tcg/tcg.c
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+++ b/tcg/tcg.c
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@@ -3060,7 +3060,13 @@ static void temp_allocate_frame(TCGContext *s, TCGTemp *ts)
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g_assert_not_reached();
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}
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- assert(align <= TCG_TARGET_STACK_ALIGN);
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+ /*
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+ * Assume the stack is sufficiently aligned.
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+ * This affects e.g. ARM NEON, where we have 8 byte stack alignment
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+ * and do not require 16 byte vector alignment. This seems slightly
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+ * easier than fully parameterizing the above switch statement.
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+ */
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+ align = MIN(TCG_TARGET_STACK_ALIGN, align);
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off = ROUND_UP(s->current_frame_offset, align);
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/* If we've exhausted the stack frame, restart with a smaller TB. */
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--
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2.32.0
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@ -277,7 +277,7 @@ Obsoletes: %{name}-system-unicore32 <= %{epoch}:%{version}-%{release} \
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Obsoletes: %{name}-system-unicore32-core <= %{epoch}:%{version}-%{release}
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# Release candidate version tracking
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%global rcver rc3
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%global rcver rc4
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%if 0%{?rcver:1}
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%global rcrel .%{rcver}
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%global rcstr -%{rcver}
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@ -305,10 +305,6 @@ Source30: kvm-s390x.conf
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Source31: kvm-x86.conf
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Source36: README.tests
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# Fix assertion on armv7hl
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# https://bugzilla.redhat.com/show_bug.cgi?id=1999878
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Patch1: 0001-tcg-arm-Reduce-vector-alignment-requirement-for-NEON.patch
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BuildRequires: meson >= %{meson_version}
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BuildRequires: zlib-devel
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BuildRequires: glib2-devel
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@ -2247,6 +2243,9 @@ useradd -r -u 107 -g qemu -G kvm -d / -s /sbin/nologin \
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%changelog
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* Thu Dec 09 2021 Eduardo Lima (Etrunko) <etrunko@redhat.com> - 6.2.0-0.1-rc4
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- Rebase to qemu 6.2.0-rc4
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* Fri Dec 03 2021 Eduardo Lima (Etrunko) <etrunko@redhat.com> - 6.2.0-0.1-rc3
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- Rebase to qemu 6.2.0-rc3
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2
sources
2
sources
@ -1 +1 @@
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SHA512 (qemu-6.2.0-rc3.tar.xz) = e3da3da4b24d48c1458b498838180df18111a5fde4f1a2b85097219ea75acd4efd66ffeb1170fc8f0b0a759e5b91acc50b0fa8fda04eb037f10f4d1204db6f67
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SHA512 (qemu-6.2.0-rc4.tar.xz) = a933ad78a66bd703fe68bff33db08e92163753b99565d70fabb59903f2ad9132c6300b9852ab5060f255b77fd38d4ee370cdbd4495ebcf5c29ebce88f5749587
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