72 lines
2.7 KiB
Diff
72 lines
2.7 KiB
Diff
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From: Gerd Hoffmann <kraxel@redhat.com>
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Date: Tue, 26 Apr 2016 14:48:06 +0200
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Subject: [PATCH] vga: make sure vga register setup for vbe stays intact
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(CVE-2016-3712).
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Call vbe_update_vgaregs() when the guest touches GFX, SEQ or CRT
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registers, to make sure the vga registers will always have the
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values needed by vbe mode. This makes sure the sanity checks
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applied by vbe_fixup_regs() are effective.
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Without this guests can muck with shift_control, can turn on planar
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vga modes or text mode emulation while VBE is active, making qemu
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take code paths meant for CGA compatibility, but with the very
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large display widths and heigts settable using VBE registers.
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Which is good for one or another buffer overflow. Not that
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critical as they typically read overflows happening somewhere
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in the display code. So guests can DoS by crashing qemu with a
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segfault, but it is probably not possible to break out of the VM.
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Fixes: CVE-2016-3712
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Reported-by: Zuozhi Fzz <zuozhi.fzz@alibaba-inc.com>
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Reported-by: P J P <ppandit@redhat.com>
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Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
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(cherry picked from commit fd3c136b3e1482cd0ec7285d6bc2a3e6a62c38d7)
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---
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hw/display/vga.c | 6 ++++++
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1 file changed, 6 insertions(+)
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diff --git a/hw/display/vga.c b/hw/display/vga.c
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index 3875538..e721b2d 100644
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--- a/hw/display/vga.c
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+++ b/hw/display/vga.c
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@@ -140,6 +140,8 @@ static uint32_t expand4[256];
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static uint16_t expand2[256];
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static uint8_t expand4to8[16];
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+static void vbe_update_vgaregs(VGACommonState *s);
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+
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static inline bool vbe_enabled(VGACommonState *s)
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{
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return s->vbe_regs[VBE_DISPI_INDEX_ENABLE] & VBE_DISPI_ENABLED;
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@@ -482,6 +484,7 @@ void vga_ioport_write(void *opaque, uint32_t addr, uint32_t val)
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printf("vga: write SR%x = 0x%02x\n", s->sr_index, val);
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#endif
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s->sr[s->sr_index] = val & sr_mask[s->sr_index];
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+ vbe_update_vgaregs(s);
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if (s->sr_index == VGA_SEQ_CLOCK_MODE) {
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s->update_retrace_info(s);
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}
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@@ -513,6 +516,7 @@ void vga_ioport_write(void *opaque, uint32_t addr, uint32_t val)
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printf("vga: write GR%x = 0x%02x\n", s->gr_index, val);
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#endif
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s->gr[s->gr_index] = val & gr_mask[s->gr_index];
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+ vbe_update_vgaregs(s);
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vga_update_memory_access(s);
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break;
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case VGA_CRT_IM:
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@@ -531,10 +535,12 @@ void vga_ioport_write(void *opaque, uint32_t addr, uint32_t val)
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if (s->cr_index == VGA_CRTC_OVERFLOW) {
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s->cr[VGA_CRTC_OVERFLOW] = (s->cr[VGA_CRTC_OVERFLOW] & ~0x10) |
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(val & 0x10);
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+ vbe_update_vgaregs(s);
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}
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return;
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}
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s->cr[s->cr_index] = val;
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+ vbe_update_vgaregs(s);
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switch(s->cr_index) {
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case VGA_CRTC_H_TOTAL:
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