78 lines
3.2 KiB
Diff
78 lines
3.2 KiB
Diff
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From c6f924c195da25e7211db91abfe0f2942d631509 Mon Sep 17 00:00:00 2001
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From: Aurelien Jarno <aurelien@aurel32.net>
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Date: Tue, 9 Oct 2012 21:53:11 +0200
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Subject: [PATCH] tcg/arm: fix cross-endian qemu_st16
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The bswap16 TCG opcode assumes that the high bytes of the temp equal
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to 0 before calling it. The ARM backend implementation takes this
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assumption to slightly optimize the generated code.
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The same implementation is called for implementing the cross-endian
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qemu_st16 opcode, where this assumption is not true anymore. One way to
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fix that would be to zero the high bytes before calling it. Given the
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store instruction just ignore them, it is possible to provide a slightly
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more optimized version. With ARMv6+ the rev16 instruction does the work
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correctly. For lower ARM versions the patch provides a version which
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behaves correctly with non-zero high bytes, but fill them with junk.
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Cc: Andrzej Zaborowski <balrogg@gmail.com>
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Cc: Peter Maydell <peter.maydell@linaro.org>
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Cc: qemu-stable@nongnu.org
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Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
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Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
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(cherry picked from commit 7aab08aa786e3a8838beac758ee61c5000144937)
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Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
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---
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tcg/arm/tcg-target.c | 20 ++++++++++++++++++--
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1 file changed, 18 insertions(+), 2 deletions(-)
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diff --git a/tcg/arm/tcg-target.c b/tcg/arm/tcg-target.c
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index fbad716..83aa856 100644
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--- a/tcg/arm/tcg-target.c
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+++ b/tcg/arm/tcg-target.c
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@@ -602,6 +602,22 @@ static inline void tcg_out_bswap16(TCGContext *s, int cond, int rd, int rn)
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}
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}
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+/* swap the two low bytes assuming that the two high input bytes and the
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+ two high output bit can hold any value. */
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+static inline void tcg_out_bswap16st(TCGContext *s, int cond, int rd, int rn)
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+{
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+ if (use_armv6_instructions) {
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+ /* rev16 */
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+ tcg_out32(s, 0x06bf0fb0 | (cond << 28) | (rd << 12) | rn);
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+ } else {
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+ tcg_out_dat_reg(s, cond, ARITH_MOV,
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+ TCG_REG_R8, 0, rn, SHIFT_IMM_LSR(8));
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+ tcg_out_dat_imm(s, cond, ARITH_AND, TCG_REG_R8, TCG_REG_R8, 0xff);
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+ tcg_out_dat_reg(s, cond, ARITH_ORR,
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+ rd, TCG_REG_R8, rn, SHIFT_IMM_LSL(8));
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+ }
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+}
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+
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static inline void tcg_out_bswap32(TCGContext *s, int cond, int rd, int rn)
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{
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if (use_armv6_instructions) {
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@@ -1367,7 +1383,7 @@ static inline void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, int opc)
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break;
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case 1:
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if (bswap) {
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- tcg_out_bswap16(s, COND_EQ, TCG_REG_R0, data_reg);
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+ tcg_out_bswap16st(s, COND_EQ, TCG_REG_R0, data_reg);
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tcg_out_st16_r(s, COND_EQ, TCG_REG_R0, addr_reg, TCG_REG_R1);
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} else {
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tcg_out_st16_r(s, COND_EQ, data_reg, addr_reg, TCG_REG_R1);
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@@ -1453,7 +1469,7 @@ static inline void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, int opc)
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break;
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case 1:
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if (bswap) {
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- tcg_out_bswap16(s, COND_AL, TCG_REG_R0, data_reg);
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+ tcg_out_bswap16st(s, COND_AL, TCG_REG_R0, data_reg);
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tcg_out_st16_8(s, COND_AL, TCG_REG_R0, addr_reg, 0);
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} else {
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tcg_out_st16_8(s, COND_AL, data_reg, addr_reg, 0);
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--
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1.8.0.2
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